BR9913588A - Microvia não circular - Google Patents

Microvia não circular

Info

Publication number
BR9913588A
BR9913588A BR9913588-4A BR9913588A BR9913588A BR 9913588 A BR9913588 A BR 9913588A BR 9913588 A BR9913588 A BR 9913588A BR 9913588 A BR9913588 A BR 9913588A
Authority
BR
Brazil
Prior art keywords
circular pathway
circular
pathway
microvia
manufacturing
Prior art date
Application number
BR9913588-4A
Other languages
English (en)
Inventor
Martin A Cotton
Original Assignee
Viasystems Group Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Viasystems Group Inc filed Critical Viasystems Group Inc
Publication of BR9913588A publication Critical patent/BR9913588A/pt

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H05K1/0221—Coaxially shielded signal lines comprising a continuous shielding layer partially or wholly surrounding the signal lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09354—Ground conductor along edge of main surface
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981—Metallised walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0041—Etching of the substrate by chemical or physical means by plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)
  • Multi-Conductor Connections (AREA)

Abstract

"MICROVIA NãO CIRCULAR" Micro vias não circulares (102) para painéis de circuito impresso são descritas e um processo de fabricação das mesmas.
BR9913588-4A 1998-09-10 1999-09-07 Microvia não circular BR9913588A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US9973098P 1998-09-10 1998-09-10
PCT/US1999/020418 WO2000016443A1 (en) 1998-09-10 1999-09-07 Non-circular micro-via

Publications (1)

Publication Number Publication Date
BR9913588A true BR9913588A (pt) 2001-06-05

Family

ID=22276347

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9913588-4A BR9913588A (pt) 1998-09-10 1999-09-07 Microvia não circular

Country Status (16)

Country Link
EP (1) EP1127387B1 (pt)
JP (1) JP2002525854A (pt)
KR (3) KR20010086372A (pt)
CN (1) CN1133240C (pt)
AU (2) AU5812099A (pt)
BR (1) BR9913588A (pt)
CA (1) CA2343445A1 (pt)
DE (1) DE69934814T2 (pt)
EA (1) EA003157B1 (pt)
ES (1) ES2281188T3 (pt)
HK (1) HK1042780A1 (pt)
IL (1) IL141826A0 (pt)
NO (1) NO20011219L (pt)
PL (1) PL346561A1 (pt)
TR (1) TR200100713T2 (pt)
WO (2) WO2000016443A1 (pt)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10052532C2 (de) * 2000-10-23 2002-11-14 Conducta Endress & Hauser Leiterplatte mit einer Eingangsschaltung zur Aufnahme und Verarbeitung eines elektrischen Signals sowie Verwendung der Leiterplatte
WO2002059985A1 (en) * 2001-01-24 2002-08-01 Koninklijke Philips Electronics N.V. Method of producing a track on a substrate
DE10219388A1 (de) 2002-04-30 2003-11-20 Siemens Ag Verfahren zur Erzeugung einer Grabenstruktur in einem Polymer-Substrat
WO2007052396A1 (ja) * 2005-10-31 2007-05-10 Sharp Kabushiki Kaisha 多層配線基板及び多層配線基板の製造方法
JP2009033114A (ja) * 2007-06-29 2009-02-12 Tdk Corp 電子モジュール、及び電子モジュールの製造方法
DE102009019782A1 (de) 2009-05-02 2010-11-04 Valeo Schalter Und Sensoren Gmbh Verfahren zur Herstellung von durchkontaktierbaren Leiterplatten
JP2011061021A (ja) * 2009-09-10 2011-03-24 Kyokutoku Kagi Kofun Yugenkoshi 非円柱ビア構造及びこのビア構造を有する伝熱促進基板
US8488329B2 (en) 2010-05-10 2013-07-16 International Business Machines Corporation Power and ground vias for power distribution systems
US8748750B2 (en) 2011-07-08 2014-06-10 Honeywell International Inc. Printed board assembly interface structures
WO2014108744A1 (en) * 2013-01-09 2014-07-17 Freescale Semiconductor, Inc. Electronic high frequency device and manufacturing method
KR102128508B1 (ko) * 2013-10-08 2020-06-30 엘지이노텍 주식회사 인쇄회로기판
KR101507268B1 (ko) * 2014-01-10 2015-03-30 (주)인터플렉스 연성회로기판의 그라운드 확장 구조
US20170064821A1 (en) * 2015-08-31 2017-03-02 Kristof Darmawikarta Electronic package and method forming an electrical package
US10516207B2 (en) 2017-05-17 2019-12-24 Nxp B.V. High frequency system, communication link
FR3077158B1 (fr) * 2018-01-25 2021-02-26 Commissariat Energie Atomique Puce electronique a face arriere protegee par une structure de fragilisation amelioree
EP3582233B1 (en) * 2018-06-13 2021-07-28 Airbus Operations, S.L.U. Method for printed cable installation in harness systems for aircrafts and a composite element with an integrated harness system
US11967542B2 (en) 2019-03-12 2024-04-23 Absolics Inc. Packaging substrate, and semiconductor device comprising same
CN113424304B (zh) 2019-03-12 2024-04-12 爱玻索立克公司 装载盒及对象基板的装载方法
WO2020185016A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
CN113383413B (zh) 2019-03-29 2022-04-08 爱玻索立克公司 半导体用封装玻璃基板、半导体用封装基板及半导体装置
WO2021040178A1 (ko) 2019-08-23 2021-03-04 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
KR20220003342A (ko) 2020-07-01 2022-01-10 삼성전기주식회사 전자 소자 패키지 및 이의 제조방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA939831A (en) * 1969-03-27 1974-01-08 Frederick W. Schneble (Jr.) Plated through hole printed circuit boards
US5347086A (en) * 1992-03-24 1994-09-13 Microelectronics And Computer Technology Corporation Coaxial die and substrate bumps
US5304743A (en) * 1992-05-12 1994-04-19 Lsi Logic Corporation Multilayer IC semiconductor package
JP3241139B2 (ja) * 1993-02-04 2001-12-25 三菱電機株式会社 フィルムキャリア信号伝送線路
US5401912A (en) * 1993-06-07 1995-03-28 St Microwave Corp., Arizona Operations Microwave surface mount package
US5359767A (en) * 1993-08-26 1994-11-01 International Business Machines Corporation Method of making multilayered circuit board
JPH07235775A (ja) * 1994-02-21 1995-09-05 Mitsubishi Electric Corp 多層プリント配線基板
US5773195A (en) * 1994-12-01 1998-06-30 International Business Machines Corporation Cap providing flat surface for DCA and solder ball attach and for sealing plated through holes, multi-layer electronic structures including the cap, and a process of forming the cap and for forming multi-layer electronic structures including the cap
DE59702929D1 (de) * 1996-07-31 2001-02-22 Dyconex Patente Zug Verfahren zur herstellung von verbindungsleitern
US5724727A (en) * 1996-08-12 1998-03-10 Motorola, Inc. Method of forming electronic component

Also Published As

Publication number Publication date
DE69934814D1 (de) 2007-02-22
CA2343445A1 (en) 2000-03-23
DE69934814T2 (de) 2007-10-11
KR20010086372A (ko) 2001-09-10
AU5820999A (en) 2000-03-27
KR100455021B1 (ko) 2004-11-06
KR20030074544A (ko) 2003-09-19
EP1127387A1 (en) 2001-08-29
CN1317163A (zh) 2001-10-10
WO2000016443A1 (en) 2000-03-23
EA003157B1 (ru) 2003-02-27
WO2000014771A2 (en) 2000-03-16
JP2002525854A (ja) 2002-08-13
AU5812099A (en) 2000-04-03
HK1042780A1 (en) 2002-08-23
NO20011219D0 (no) 2001-03-09
PL346561A1 (en) 2002-02-11
EP1127387B1 (en) 2007-01-10
EA200100329A1 (ru) 2001-10-22
ES2281188T3 (es) 2007-09-16
EP1127387A4 (en) 2004-05-26
KR20030074545A (ko) 2003-09-19
IL141826A0 (en) 2002-03-10
CN1133240C (zh) 2003-12-31
NO20011219L (no) 2001-05-04
TR200100713T2 (tr) 2001-10-22

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 6A, 7A E 8A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 1911 DE 21/08/2007.

B15K Others concerning applications: alteration of classification

Ipc: H05K 1/02 (2006.01), H05K 1/11 (2006.0