BR9509845A - Microprocessador com operação de compactação de elementos de operação compósitos - Google Patents

Microprocessador com operação de compactação de elementos de operação compósitos

Info

Publication number
BR9509845A
BR9509845A BR9509845A BR9509845A BR9509845A BR 9509845 A BR9509845 A BR 9509845A BR 9509845 A BR9509845 A BR 9509845A BR 9509845 A BR9509845 A BR 9509845A BR 9509845 A BR9509845 A BR 9509845A
Authority
BR
Brazil
Prior art keywords
microprocessor
operating elements
compacting operation
composite operating
composite
Prior art date
Application number
BR9509845A
Other languages
English (en)
Inventor
Alexander Peleg
Yaakow Yaari
Milind Mittal
Larry M Mennemeir
Benny Eitan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of BR9509845A publication Critical patent/BR9509845A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30196—Instruction operation extension or modification using decoder, e.g. decoder per instruction set, adaptable or programmable decoders
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G06F7/49921—Saturation, i.e. clipping the result to a minimum or maximum value
BR9509845A 1994-12-02 1995-12-01 Microprocessador com operação de compactação de elementos de operação compósitos BR9509845A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US34904794A 1994-12-02 1994-12-02
PCT/US1995/015713 WO1996017291A1 (en) 1994-12-02 1995-12-01 Microprocessor with packing operation of composite operands

Publications (1)

Publication Number Publication Date
BR9509845A true BR9509845A (pt) 1997-12-30

Family

ID=23370692

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9509845A BR9509845A (pt) 1994-12-02 1995-12-01 Microprocessador com operação de compactação de elementos de operação compósitos

Country Status (8)

Country Link
US (21) US5802336A (pt)
EP (2) EP1265132A3 (pt)
JP (1) JP3615222B2 (pt)
KR (1) KR100329338B1 (pt)
CN (5) CN101211255B (pt)
AU (1) AU4464596A (pt)
BR (1) BR9509845A (pt)
WO (1) WO1996017291A1 (pt)

Families Citing this family (82)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5539911A (en) 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5493687A (en) * 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
EP0636256B1 (en) * 1992-03-31 1997-06-04 Seiko Epson Corporation Superscalar risc processor instruction scheduling
WO1993022722A1 (en) * 1992-05-01 1993-11-11 Seiko Epson Corporation A system and method for retiring instructions in a superscalar microprocessor
US5628021A (en) * 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
DE69320991T2 (de) * 1992-12-31 1999-01-28 Seiko Epson Corp System und verfahren zur änderung der namen von registern
CN101211255B (zh) 1994-12-02 2012-07-04 英特尔公司 对复合操作数进行压缩操作的处理器、设备和计算系统
US6813699B1 (en) 1995-06-02 2004-11-02 Transmeta Corporation Speculative address translation for processor using segmentation and optional paging
US5953241A (en) * 1995-08-16 1999-09-14 Microunity Engeering Systems, Inc. Multiplier array processing system with enhanced utilization at lower precision for group multiply and sum instruction
US7483935B2 (en) * 1995-08-16 2009-01-27 Microunity Systems Engineering, Inc. System and method to implement a matrix multiply unit of a broadband processor
US5742840A (en) 1995-08-16 1998-04-21 Microunity Systems Engineering, Inc. General purpose, multiple precision parallel operation, programmable media processor
US6643765B1 (en) * 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
US7301541B2 (en) 1995-08-16 2007-11-27 Microunity Systems Engineering, Inc. Programmable processor and method with wide operations
US6295599B1 (en) * 1995-08-16 2001-09-25 Microunity Systems Engineering System and method for providing a wide operand architecture
US7395298B2 (en) 1995-08-31 2008-07-01 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US6385634B1 (en) 1995-08-31 2002-05-07 Intel Corporation Method for performing multiply-add operations on packed data
US6260137B1 (en) * 1997-09-12 2001-07-10 Siemens Aktiengesellschaft Data processing unit with digital signal processing capabilities
US6263420B1 (en) * 1997-09-17 2001-07-17 Sony Corporation Digital signal processor particularly suited for decoding digital audio
US6138274A (en) * 1998-01-23 2000-10-24 Lucent Technologies, Inc. Method and apparatus for updating an online computer program
US6122725A (en) * 1998-03-31 2000-09-19 Intel Corporation Executing partial-width packed data instructions
US6041404A (en) 1998-03-31 2000-03-21 Intel Corporation Dual function system and method for shuffling packed data elements
US6233671B1 (en) 1998-03-31 2001-05-15 Intel Corporation Staggering execution of an instruction by dividing a full-width macro instruction into at least two partial-width micro instructions
US6230257B1 (en) 1998-03-31 2001-05-08 Intel Corporation Method and apparatus for staggering execution of a single packed data instruction using the same circuit
US6230253B1 (en) * 1998-03-31 2001-05-08 Intel Corporation Executing partial-width packed data instructions
US6504550B1 (en) * 1998-05-21 2003-01-07 Mitsubishi Electric & Electronics Usa, Inc. System for graphics processing employing semiconductor device
US6535218B1 (en) * 1998-05-21 2003-03-18 Mitsubishi Electric & Electronics Usa, Inc. Frame buffer memory for graphic processing
US7932911B2 (en) * 1998-08-24 2011-04-26 Microunity Systems Engineering, Inc. Processor for executing switch and translate instructions requiring wide operands
ATE557342T1 (de) * 1998-08-24 2012-05-15 Microunity Systems Eng Prozessor und verfahren zur matrixmultiplikation mit einem breiten operand
US7242414B1 (en) * 1999-07-30 2007-07-10 Mips Technologies, Inc. Processor having a compare extension of an instruction set architecture
US7346643B1 (en) * 1999-07-30 2008-03-18 Mips Technologies, Inc. Processor with improved accuracy for multiply-add operations
US6446195B1 (en) * 2000-01-31 2002-09-03 Intel Corporation Dyadic operations instruction processor with configurable functional blocks
US6829696B1 (en) * 1999-12-30 2004-12-07 Texas Instruments Incorporated Data processing system with register store/load utilizing data packing/unpacking
US6638239B1 (en) * 2000-04-14 2003-10-28 Glaukos Corporation Apparatus and method for treating glaucoma
GB0024312D0 (en) 2000-10-04 2000-11-15 Advanced Risc Mach Ltd Single instruction multiple data processing
JP3779540B2 (ja) 2000-11-08 2006-05-31 株式会社ルネサステクノロジ 複数レジスタ指定が可能なｓｉｍｄ演算方式
FR2818145B1 (fr) * 2000-12-18 2003-11-28 Oreal Compositions cosmetiques antisolaires a base d'un melange synergetique de filtres et utilisations
US7913261B2 (en) * 2001-05-02 2011-03-22 nCipher Corporation, Ltd. Application-specific information-processing method, system, and apparatus
WO2003021423A2 (en) * 2001-09-04 2003-03-13 Microunity Systems Engineering, Inc. System and method for performing multiplication
US7430578B2 (en) 2001-10-29 2008-09-30 Intel Corporation Method and apparatus for performing multiply-add operations on packed byte data
US20030188135A1 (en) * 2002-03-28 2003-10-02 Intel Corporation Addressing modes and/or instructions and/or operating modes for on-the-fly, precision adjustment of packed data
US7028171B2 (en) * 2002-03-28 2006-04-11 Intel Corporation Multi-way select instructions using accumulated condition codes
US6986023B2 (en) * 2002-08-09 2006-01-10 Intel Corporation Conditional execution of coprocessor instruction based on main processor arithmetic flags
JP2005535966A (ja) * 2002-08-09 2005-11-24 インテル・コーポレーション アライメントまたはブロードキャスト命令を含むマルチメディア・コプロセッサの制御メカニズム
US7392368B2 (en) * 2002-08-09 2008-06-24 Marvell International Ltd. Cross multiply and add instruction and multiply and subtract instruction SIMD execution on real and imaginary components of a plurality of complex data elements
US7899855B2 (en) * 2003-09-08 2011-03-01 Intel Corporation Method, apparatus and instructions for parallel data conversions
EP1622009A1 (en) * 2004-07-27 2006-02-01 Texas Instruments Incorporated JSM architecture and systems
US7457938B2 (en) * 2005-09-30 2008-11-25 Intel Corporation Staggered execution stack for vector processing
US20090006822A1 (en) * 2006-01-27 2009-01-01 Freescale Semiconductor , Inc. Device and Method for Adding and Subtracting Two Variables and a Constant
US7958181B2 (en) * 2006-09-21 2011-06-07 Intel Corporation Method and apparatus for performing logical compare operations
US9069547B2 (en) 2006-09-22 2015-06-30 Intel Corporation Instruction and logic for processing text strings
US8341165B2 (en) 2007-12-03 2012-12-25 Intel Corporation Method and apparatus for searching extensible markup language (XML) data
US8502819B1 (en) 2007-12-17 2013-08-06 Nvidia Corporation System and method for performing ray tracing node traversal in image rendering
US8780128B2 (en) * 2007-12-17 2014-07-15 Nvidia Corporation Contiguously packed data
US8289324B1 (en) 2007-12-17 2012-10-16 Nvidia Corporation System, method, and computer program product for spatial hierarchy traversal
US8078836B2 (en) 2007-12-30 2011-12-13 Intel Corporation Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits
US9086872B2 (en) 2009-06-30 2015-07-21 Intel Corporation Unpacking packed data in multiple lanes
US9747105B2 (en) * 2009-12-17 2017-08-29 Intel Corporation Method and apparatus for performing a shift and exclusive or operation in a single instruction
US8564589B1 (en) 2010-05-17 2013-10-22 Nvidia Corporation System and method for accelerated ray-box intersection testing
US8555036B1 (en) 2010-05-17 2013-10-08 Nvidia Corporation System and method for performing predicated selection of an output register
US20120254589A1 (en) * 2011-04-01 2012-10-04 Jesus Corbal San Adrian System, apparatus, and method for aligning registers
CN102884505B (zh) * 2011-04-08 2016-01-20 松下电器产业株式会社 数据处理装置和数据处理方法
US9600285B2 (en) 2011-12-22 2017-03-21 Intel Corporation Packed data operation mask concatenation processors, methods, systems and instructions
CN104126170B (zh) * 2011-12-22 2018-05-18 英特尔公司 打包数据操作掩码寄存器算术组合处理器、方法、系统及指令
US20140082333A1 (en) * 2011-12-22 2014-03-20 Elmoustapha Ould-Ahmed-Vall Systems, apparatuses, and methods for performing an absolute difference calculation between corresponding packed data elements of two vector registers
WO2013095666A1 (en) * 2011-12-23 2013-06-27 Intel Corporation Systems, apparatuses, and methods for performing vector packed unary decoding using masks
US8849885B2 (en) * 2012-06-07 2014-09-30 Via Technologies, Inc. Saturation detector
US9436474B2 (en) * 2012-07-27 2016-09-06 Microsoft Technology Licensing, Llc Lock free streaming of executable code data
US9477467B2 (en) 2013-03-30 2016-10-25 Intel Corporation Processors, methods, and systems to implement partial register accesses with masked full register accesses
WO2014203034A1 (en) * 2013-06-18 2014-12-24 Freescale Semiconductor, Inc. Signal processing device and method of performing a pack-insert operation
US10228941B2 (en) * 2013-06-28 2019-03-12 Intel Corporation Processors, methods, and systems to access a set of registers as either a plurality of smaller registers or a combined larger register
US9785565B2 (en) 2014-06-30 2017-10-10 Microunity Systems Engineering, Inc. System and methods for expandably wide processor instructions
EP3001306A1 (en) * 2014-09-25 2016-03-30 Intel Corporation Bit group interleave processors, methods, systems, and instructions
US10489158B2 (en) 2014-09-26 2019-11-26 Intel Corporation Processors, methods, systems, and instructions to selectively fence only persistent storage of given data relative to subsequent stores
US9772848B2 (en) 2014-11-14 2017-09-26 Intel Corporation Three-dimensional morton coordinate conversion processors, methods, systems, and instructions
US9772850B2 (en) 2014-11-14 2017-09-26 Intel Corporation Morton coordinate adjustment processors, methods, systems, and instructions
US9772849B2 (en) 2014-11-14 2017-09-26 Intel Corporation Four-dimensional morton coordinate conversion processors, methods, systems, and instructions
US10387150B2 (en) * 2015-06-24 2019-08-20 International Business Machines Corporation Instructions to count contiguous register elements having a specific value in a selected location
US20170177351A1 (en) * 2015-12-18 2017-06-22 Intel Corporation Instructions and Logic for Even and Odd Vector Get Operations
US11204764B2 (en) * 2016-03-31 2021-12-21 Intel Corporation Processors, methods, systems, and instructions to Partition a source packed data into lanes
US10891131B2 (en) * 2016-09-22 2021-01-12 Intel Corporation Processors, methods, systems, and instructions to consolidate data elements and generate index updates
US20180173527A1 (en) * 2016-12-15 2018-06-21 Optimum Semiconductor Technologies, Inc. Floating point instruction format with embedded rounding rule
CN111381874B (zh) * 2018-12-28 2022-12-02 上海寒武纪信息科技有限公司 Compress指令译码方法、数据处理方法、译码器及数据处理装置

Family Cites Families (94)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541516A (en) * 1965-06-30 1970-11-17 Ibm Vector arithmetic multiprocessor computing system
US3711692A (en) * 1971-03-15 1973-01-16 Goodyear Aerospace Corp Determination of number of ones in a data field by addition
US3723715A (en) * 1971-08-25 1973-03-27 Ibm Fast modulo threshold operator binary adder for multi-number additions
US4139899A (en) * 1976-10-18 1979-02-13 Burroughs Corporation Shift network having a mask generator and a rotator
US4141005A (en) 1976-11-11 1979-02-20 International Business Machines Corporation Data format converting apparatus for use in a digital data processor
US4161784A (en) * 1978-01-05 1979-07-17 Honeywell Information Systems, Inc. Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands
JPS5537648A (en) * 1978-09-07 1980-03-15 Matsushita Electric Ind Co Ltd Instruction decoder circuit
US4229801A (en) 1978-12-11 1980-10-21 Data General Corporation Floating point processor having concurrent exponent/mantissa operation
US4481580A (en) 1979-11-19 1984-11-06 Sperry Corporation Distributed data transfer control for parallel processor architectures
US4418383A (en) * 1980-06-30 1983-11-29 International Business Machines Corporation Data flow component for processor and microprocessor systems
US4393468A (en) * 1981-03-26 1983-07-12 Advanced Micro Devices, Inc. Bit slice microprogrammable processor for signal processing applications
US4498177A (en) * 1982-08-30 1985-02-05 Sperry Corporation M Out of N code checker circuit
US4595911A (en) * 1983-07-14 1986-06-17 Sperry Corporation Programmable data reformat system
US5265204A (en) * 1984-10-05 1993-11-23 Hitachi, Ltd. Method and apparatus for bit operational process
US4707800A (en) * 1985-03-04 1987-11-17 Raytheon Company Adder/substractor for variable length numbers
JPS6297060A (ja) * 1985-10-23 1987-05-06 Mitsubishi Electric Corp デイジタルシグナルプロセツサ
JPH0827716B2 (ja) * 1985-10-25 1996-03-21 株式会社日立製作所 データ処理装置及びデータ処理方法
US4760525A (en) * 1986-06-10 1988-07-26 The United States Of America As Represented By The Secretary Of The Air Force Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal processing instruction
US5193159A (en) * 1986-09-24 1993-03-09 Hitachi, Ltd. Microprocessor system
JP3070744B2 (ja) * 1987-04-10 2000-07-31 株式会社日立製作所 ベクトル処理装置
US4992938A (en) 1987-07-01 1991-02-12 International Business Machines Corporation Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers
JP2613223B2 (ja) * 1987-09-10 1997-05-21 株式会社日立製作所 演算装置
US4868748A (en) 1987-11-25 1989-09-19 General Electric Company Rapid processing of three-dimensional graphical objects from tomographic data
US4989168A (en) * 1987-11-30 1991-01-29 Fujitsu Limited Multiplying unit in a computer system, capable of population counting
US5008812A (en) 1988-03-18 1991-04-16 Digital Equipment Corporation Context switching method and apparatus for use in a vector processing system
US4903228A (en) 1988-11-09 1990-02-20 International Business Machines Corporation Single cycle merge/logic unit
US5241635A (en) 1988-11-18 1993-08-31 Massachusetts Institute Of Technology Tagged token data processing system with operand matching in activation frames
KR920007505B1 (ko) * 1989-02-02 1992-09-04 정호선 신경회로망을 이용한 곱셈기
US5081698A (en) 1989-02-14 1992-01-14 Intel Corporation Method and apparatus for graphics display data manipulation
US5127098A (en) 1989-04-12 1992-06-30 Sun Microsystems, Inc. Method and apparatus for the context switching of devices
US5001662A (en) * 1989-04-28 1991-03-19 Apple Computer, Inc. Method and apparatus for multi-gauge computation
JPH03139726A (ja) 1989-10-26 1991-06-13 Hitachi Ltd 命令読出し制御方式
US5212777A (en) 1989-11-17 1993-05-18 Texas Instruments Incorporated Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation
US5276891A (en) * 1990-01-11 1994-01-04 Bull Hn Information Systems Inc. Alignment of sign, data, edit byte operand results for storage in memory
US5168571A (en) * 1990-01-24 1992-12-01 International Business Machines Corporation System for aligning bytes of variable multi-bytes length operand based on alu byte length and a number of unprocessed byte data
AU7305491A (en) 1990-01-29 1991-08-21 Teraplex, Inc. Architecture for minimal instruction set computing system
CA2045773A1 (en) * 1990-06-29 1991-12-30 Compaq Computer Corporation Byte-compare operation for high-performance processor
WO1992008188A1 (en) 1990-11-02 1992-05-14 Seiko Epson Corporation Semiconductor device
US5268854A (en) 1990-11-13 1993-12-07 Kabushiki Kaisha Toshiba Microprocessor with a function for three-dimensional graphic processing
EP0485776A3 (en) 1990-11-15 1993-07-07 Motorola Inc. A method for executing graphics pixel packing instructions in a data processor
JP2601960B2 (ja) * 1990-11-15 1997-04-23 インターナショナル・ビジネス・マシーンズ・コーポレイション データ処理方法及びその装置
US5268995A (en) * 1990-11-21 1993-12-07 Motorola, Inc. Method for executing graphics Z-compare and pixel merge instructions in a data processor
US5680161A (en) * 1991-04-03 1997-10-21 Radius Inc. Method and apparatus for high speed graphics data compression
US5187679A (en) * 1991-06-05 1993-02-16 International Business Machines Corporation Generalized 7/3 counters
US5493687A (en) 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
US5168751A (en) * 1991-08-01 1992-12-08 Raymond Hwang Digital tire pressure gauge
US5239399A (en) 1991-08-22 1993-08-24 Radiant Technologies Electrical-optical interface device
US5530835A (en) * 1991-09-18 1996-06-25 Ncr Corporation Computer memory data merging technique for computers with write-back caches
US5423010A (en) * 1992-01-24 1995-06-06 C-Cube Microsystems Structure and method for packing and unpacking a stream of N-bit data to and from a stream of N-bit data words
US5657253A (en) 1992-05-15 1997-08-12 Intel Corporation Apparatus for monitoring the performance of a microprocessor
KR950009687B1 (ko) * 1992-06-30 1995-08-26 삼성항공산업주식회사 프로그램어블 로직 콘트롤러용 고속 래더명령 처리장치
US5522051A (en) 1992-07-29 1996-05-28 Intel Corporation Method and apparatus for stack manipulation in a pipelined processor
US5426783A (en) * 1992-11-02 1995-06-20 Amdahl Corporation System for processing eight bytes or less by the move, pack and unpack instruction of the ESA/390 instruction set
US5519841A (en) 1992-11-12 1996-05-21 Digital Equipment Corporation Multi instruction register mapper
US5408670A (en) * 1992-12-18 1995-04-18 Xerox Corporation Performing arithmetic in parallel on composite operands with packed multi-bit components
KR0122528B1 (ko) 1993-01-08 1997-11-20 윌리엄 티.엘리스 슈퍼스칼라 프로세서 시스템에서 중간 기억 버퍼의 할당을 인덱스하기 위한 방법 및 시스템
US5467473A (en) 1993-01-08 1995-11-14 International Business Machines Corporation Out of order instruction load and store comparison
US5465374A (en) * 1993-01-12 1995-11-07 International Business Machines Corporation Processor for processing data string by byte-by-byte
US5717947A (en) 1993-03-31 1998-02-10 Motorola, Inc. Data processing system and method thereof
JP3203401B2 (ja) * 1993-05-21 2001-08-27 三菱電機株式会社 データ処理装置
US5535397A (en) 1993-06-30 1996-07-09 Intel Corporation Method and apparatus for providing a context switch in response to an interrupt in a computer process
US5625374A (en) * 1993-09-07 1997-04-29 Apple Computer, Inc. Method for parallel interpolation of images
US5499352A (en) 1993-09-30 1996-03-12 Intel Corporation Floating point register alias table FXCH and retirement floating point register array
EP0651321B1 (en) 1993-10-29 2001-11-14 Advanced Micro Devices, Inc. Superscalar microprocessors
US5390135A (en) * 1993-11-29 1995-02-14 Hewlett-Packard Parallel shift and add circuit and method
US5590350A (en) 1993-11-30 1996-12-31 Texas Instruments Incorporated Three input arithmetic logic unit with mask generator
US5499376A (en) * 1993-12-06 1996-03-12 Cpu Technology, Inc. High speed mask and logical combination operations for parallel processor units
US5487159A (en) * 1993-12-23 1996-01-23 Unisys Corporation System for processing shift, mask, and merge operations in one instruction
US5541865A (en) 1993-12-30 1996-07-30 Intel Corporation Method and apparatus for performing a population count operation
US5546554A (en) 1994-02-02 1996-08-13 Sun Microsystems, Inc. Apparatus for dynamic register management in a floating point unit
US5781457A (en) 1994-03-08 1998-07-14 Exponential Technology, Inc. Merge/mask, rotate/shift, and boolean operations from two instruction sets executed in a vectored mux on a dual-ALU
US5734874A (en) * 1994-04-29 1998-03-31 Sun Microsystems, Inc. Central processing unit with integrated graphics functions
US5696955A (en) 1994-06-01 1997-12-09 Advanced Micro Devices, Inc. Floating point stack and exchange instruction
US5649225A (en) 1994-06-01 1997-07-15 Advanced Micro Devices, Inc. Resynchronization of a superscalar processor
US5594437A (en) 1994-08-01 1997-01-14 Motorola, Inc. Circuit and method of unpacking a serial bitstream
US5481719A (en) 1994-09-09 1996-01-02 International Business Machines Corporation Exception handling method and apparatus for a microkernel data processing system
US5507000A (en) 1994-09-26 1996-04-09 Bull Hn Information Systems Inc. Sharing of register stack by two execution units in a central processor
EP0795155B1 (en) 1994-12-01 2003-03-19 Intel Corporation A microprocessor having a multiply operation
CN101211255B (zh) 1994-12-02 2012-07-04 英特尔公司 对复合操作数进行压缩操作的处理器、设备和计算系统
US5819101A (en) 1994-12-02 1998-10-06 Intel Corporation Method for packing a plurality of packed data elements in response to a pack instruction
US5537606A (en) 1995-01-31 1996-07-16 International Business Machines Corporation Scalar pipeline replication for parallel vector element processing
US5634118A (en) 1995-04-10 1997-05-27 Exponential Technology, Inc. Splitting a floating-point stack-exchange instruction for merging into surrounding instructions by operand translation
US5760792A (en) 1995-05-01 1998-06-02 Intergraph Corporation Fifo logical addresses for control and error recovery
US5752001A (en) 1995-06-01 1998-05-12 Intel Corporation Method and apparatus employing Viterbi scoring using SIMD instructions for data recognition
US5721892A (en) 1995-08-31 1998-02-24 Intel Corporation Method and apparatus for performing multiply-subtract operations on packed data
US5852726A (en) 1995-12-19 1998-12-22 Intel Corporation Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner
US5857096A (en) 1995-12-19 1999-01-05 Intel Corporation Microarchitecture for implementing an instruction to clear the tags of a stack reference register file
US5701508A (en) 1995-12-19 1997-12-23 Intel Corporation Executing different instructions that cause different data type operations to be performed on single logical register file
US5940859A (en) 1995-12-19 1999-08-17 Intel Corporation Emptying packed data state during execution of packed data instructions
US5835748A (en) 1995-12-19 1998-11-10 Intel Corporation Method for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register file
US5862067A (en) * 1995-12-29 1999-01-19 Intel Corporation Method and apparatus for providing high numerical accuracy with packed multiply-add or multiply-subtract operations
US5687336A (en) 1996-01-11 1997-11-11 Exponential Technology, Inc. Stack push/pop tracking and pairing in a pipelined processor
US5835782A (en) * 1996-03-04 1998-11-10 Intel Corporation Packed/add and packed subtract operations
US6115812A (en) 1998-04-01 2000-09-05 Intel Corporation Method and apparatus for efficient vertical SIMD computations

Also Published As

Publication number Publication date
CN1492315A (zh) 2004-04-28
EP0795153A4 (en) 2001-11-14
US8639914B2 (en) 2014-01-28
CN102841776B (zh) 2016-06-29
CN1094610C (zh) 2002-11-20
CN1326033C (zh) 2007-07-11
US5881275A (en) 1999-03-09
WO1996017291A1 (en) 1996-06-06
CN102841776A (zh) 2012-12-26
US20130124831A1 (en) 2013-05-16
CN101211255B (zh) 2012-07-04
JPH10512070A (ja) 1998-11-17
US20130124834A1 (en) 2013-05-16
US20130117538A1 (en) 2013-05-09
JP3615222B2 (ja) 2005-02-02
US5802336A (en) 1998-09-01
US20060236076A1 (en) 2006-10-19
AU4464596A (en) 1996-06-19
US6119216A (en) 2000-09-12
EP1265132A2 (en) 2002-12-11
US8601246B2 (en) 2013-12-03
US20030131219A1 (en) 2003-07-10
US8793475B2 (en) 2014-07-29
US8838946B2 (en) 2014-09-16
US9223572B2 (en) 2015-12-29
US20130124832A1 (en) 2013-05-16
US9116687B2 (en) 2015-08-25
CN1492314A (zh) 2004-04-28
US9389858B2 (en) 2016-07-12
CN100412786C (zh) 2008-08-20
US20030115441A1 (en) 2003-06-19
US20130124830A1 (en) 2013-05-16
US9141387B2 (en) 2015-09-22
US20130117537A1 (en) 2013-05-09
US9361100B2 (en) 2016-06-07
US20130117539A1 (en) 2013-05-09
US20110093682A1 (en) 2011-04-21
US9015453B2 (en) 2015-04-21
US8190867B2 (en) 2012-05-29
US6516406B1 (en) 2003-02-04
US20130124833A1 (en) 2013-05-16
US8521994B2 (en) 2013-08-27
CN101211255A (zh) 2008-07-02
KR100329338B1 (ko) 2002-07-18
US9182983B2 (en) 2015-11-10
EP1265132A3 (en) 2005-02-09
US20130117547A1 (en) 2013-05-09
EP0795153A1 (en) 1997-09-17
CN1173230A (zh) 1998-02-11
US8495346B2 (en) 2013-07-23
US20130124835A1 (en) 2013-05-16
US20110219214A1 (en) 2011-09-08
US20130117540A1 (en) 2013-05-09
US20120198210A1 (en) 2012-08-02
US7966482B2 (en) 2011-06-21

Similar Documents

Publication Publication Date Title
BR9509845A (pt) Microprocessador com operação de compactação de elementos de operação compósitos
DE69524148D1 (de) Verbundvliesstoffe
DE69525568T2 (de) Stickähnlicher Verbundvliesstoff
DE69525824D1 (de) Zusammengesetzter Leistungs-MOSFET
DE69505863D1 (de) Verbundplatte
DE69728399D1 (de) Verbundmatte
DE69536102D1 (de) Neue streptogramine
EP0795154A4 (en) MICROPROCESSOR WITH COMPARISON OPERATION OF COMPOSITE OPERANDS
NO971996L (no) Tre-kompositt
DE69515181D1 (de) Exzentergetriebe
DE29713040U1 (de) Verbundplatte
NO952109D0 (no) Komposittmateriale
NO970121D0 (no) Komposittgulvkonstruksjon
DE9407901U1 (de) Verbundplatte
DE69530008D1 (de) Bodenverdichtung
DE29620751U1 (de) Verbundplatte
GB2292745B (en) Composite material
BR9500515A (pt) Tramsmissão composta
DE9417021U1 (de) Schalldämmendes Verbundelement
GB9400747D0 (en) Composite panel
DE9421096U1 (de) Verbundmaterial
DE69514529D1 (de) Verbundwerkstoff
KR950024704U (ko) 복합판재
KR960015063U (ko) 복합 전자렌지
GB9426105D0 (en) Improvements relating to electrolevels

Legal Events

Date Code Title Description
EG Technical examination (opinion): publication of technical examination (opinion)
FB36 Technical and formal requirements: requirement - article 36 of industrial property law
B09X Republication of the decision to grant [chapter 9.1.3 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]
B21A Patent or certificate of addition expired [chapter 21.1 patent gazette]

Free format text: PATENTE EXTINTA EM 01/12/2015