BR9501494A - Aparelho e método para a geração de um sinal de relógio controlado por fase - Google Patents
Aparelho e método para a geração de um sinal de relógio controlado por faseInfo
- Publication number
- BR9501494A BR9501494A BR9501494A BR9501494A BR9501494A BR 9501494 A BR9501494 A BR 9501494A BR 9501494 A BR9501494 A BR 9501494A BR 9501494 A BR9501494 A BR 9501494A BR 9501494 A BR9501494 A BR 9501494A
- Authority
- BR
- Brazil
- Prior art keywords
- generating
- phase
- clock signal
- controlled clock
- controlled
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/228,470 US5557224A (en) | 1994-04-15 | 1994-04-15 | Apparatus and method for generating a phase-controlled clock signal |
Publications (1)
Publication Number | Publication Date |
---|---|
BR9501494A true BR9501494A (pt) | 1997-08-19 |
Family
ID=22857304
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR9501494A BR9501494A (pt) | 1994-04-15 | 1995-04-07 | Aparelho e método para a geração de um sinal de relógio controlado por fase |
Country Status (8)
Country | Link |
---|---|
US (1) | US5557224A (pt) |
EP (1) | EP0677802B1 (pt) |
JP (1) | JP3154637B2 (pt) |
KR (1) | KR100188486B1 (pt) |
BR (1) | BR9501494A (pt) |
CA (1) | CA2145927A1 (pt) |
DE (1) | DE69525093T2 (pt) |
TW (1) | TW364076B (pt) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6246278B1 (en) * | 1995-12-22 | 2001-06-12 | Lsi Logic Corporation | High speed single phase to dual phase clock divider |
US6055362A (en) * | 1996-03-29 | 2000-04-25 | Bull Hn Information Systems Inc. | Apparatus for phase synchronizing clock signals in a fully redundant computer system |
US5920518A (en) * | 1997-02-11 | 1999-07-06 | Micron Technology, Inc. | Synchronous clock generator including delay-locked loop |
US5946244A (en) | 1997-03-05 | 1999-08-31 | Micron Technology, Inc. | Delay-locked loop with binary-coupled capacitor |
US6173432B1 (en) | 1997-06-20 | 2001-01-09 | Micron Technology, Inc. | Method and apparatus for generating a sequence of clock signals |
US6269451B1 (en) | 1998-02-27 | 2001-07-31 | Micron Technology, Inc. | Method and apparatus for adjusting data timing by delaying clock signal |
US5977837A (en) * | 1998-05-01 | 1999-11-02 | International Business Machines Corporation | Phase selector for external frequency divider and phase locked loop |
US6338127B1 (en) | 1998-08-28 | 2002-01-08 | Micron Technology, Inc. | Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same |
US6349399B1 (en) | 1998-09-03 | 2002-02-19 | Micron Technology, Inc. | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same |
US6279090B1 (en) | 1998-09-03 | 2001-08-21 | Micron Technology, Inc. | Method and apparatus for resynchronizing a plurality of clock signals used in latching respective digital signals applied to a packetized memory device |
US6430696B1 (en) | 1998-11-30 | 2002-08-06 | Micron Technology, Inc. | Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same |
US6374360B1 (en) | 1998-12-11 | 2002-04-16 | Micron Technology, Inc. | Method and apparatus for bit-to-bit timing correction of a high speed memory bus |
US6470060B1 (en) | 1999-03-01 | 2002-10-22 | Micron Technology, Inc. | Method and apparatus for generating a phase dependent control signal |
US6633994B1 (en) | 2000-02-22 | 2003-10-14 | International Business Machines Corporation | Method and system for optimizing data transfers between devices interconnected by buses operating at different clocking speeds |
JP2001267890A (ja) * | 2000-03-22 | 2001-09-28 | Hitachi Ltd | クロック発生装置、バスインタフェース制御装置及び情報処理装置 |
US6313712B1 (en) | 2000-06-13 | 2001-11-06 | International Business Machines Corporation | Low power crystal oscillator having improved long term and short term stability |
US6928575B2 (en) * | 2000-10-12 | 2005-08-09 | Matsushita Electric Industrial Co., Ltd. | Apparatus for controlling and supplying in phase clock signals to components of an integrated circuit with a multiprocessor architecture |
US6411130B1 (en) * | 2001-01-23 | 2002-06-25 | Micrel, Inc. | Method and system for reliably providing a lock indication |
US6801989B2 (en) | 2001-06-28 | 2004-10-05 | Micron Technology, Inc. | Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same |
US6993306B2 (en) * | 2002-01-22 | 2006-01-31 | Broadcom Corporation | Determination and processing for fractional-N programming values |
KR100448707B1 (ko) * | 2002-08-20 | 2004-09-13 | 삼성전자주식회사 | 클럭 및 데이터 복원 회로 및 방법 |
US7168027B2 (en) | 2003-06-12 | 2007-01-23 | Micron Technology, Inc. | Dynamic synchronization of data capture on an optical or other high speed communications link |
US7983361B2 (en) * | 2007-04-26 | 2011-07-19 | Mediatek Inc. | Clock data recovery circuit |
CA2939453A1 (en) | 2014-01-29 | 2015-08-06 | Matthew Guthaus | Current-mode clock distribution |
KR102110770B1 (ko) | 2014-02-14 | 2020-05-14 | 삼성전자 주식회사 | 클럭 분주 장치 |
JP7165695B2 (ja) | 2020-03-18 | 2022-11-04 | 本田技研工業株式会社 | 鞍乗り型車両 |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3982190A (en) * | 1975-07-31 | 1976-09-21 | Rockwell International Corporation | Phaselock circuitry with lock indication |
US4031317A (en) * | 1976-02-12 | 1977-06-21 | Ncr Corporation | Data communications system with improved digital phase-locked loop retiming circuit |
JPS5680931A (en) * | 1979-12-06 | 1981-07-02 | Seiko Instr & Electronics Ltd | Frequency dividing circuit |
JPS6022829A (ja) * | 1983-07-18 | 1985-02-05 | Advantest Corp | 高分解能周波数合成装置 |
US4573176A (en) * | 1983-11-18 | 1986-02-25 | Rca Corporation | Fractional frequency divider |
US4639680A (en) * | 1985-04-12 | 1987-01-27 | Sperry Corporation | Digital phase and frequency detector |
FR2587568B1 (fr) * | 1985-09-19 | 1987-12-11 | France Etat | Circuit numerique diviseur de frequence |
JPH0744448B2 (ja) * | 1986-03-31 | 1995-05-15 | 株式会社東芝 | デジタル位相同期ル−プ回路 |
FR2617349B1 (fr) * | 1987-06-26 | 1989-10-20 | Thomson Csf | Procede et dispositif de synthese numerique d'un signal d'horloge |
US4757264A (en) * | 1987-10-08 | 1988-07-12 | American Telephone And Telegraph Company, At&T Bell Laboratories | Sample clock signal generator circuit |
DK163397C (da) * | 1988-06-24 | 1992-07-13 | Nordiske Kabel Traad | Fremgangsmaade ved regulering af en taktgenerators fase i forhold til et datasignal |
US4942595A (en) * | 1988-12-05 | 1990-07-17 | Ag Communication Systems Corporation | Circuit for dividing the frequency of a digital clock signal by two and one-half |
JPH02292915A (ja) * | 1989-05-08 | 1990-12-04 | Mitsubishi Electric Corp | 2モジュラス可変分周回路 |
US5073730A (en) * | 1990-04-23 | 1991-12-17 | International Business Machines Corporation | Current transient reduction for vlsi chips |
JPH06502264A (ja) * | 1990-10-12 | 1994-03-10 | インテル・コーポレーション | 動的に切替え自在な多周波数クロック発生器 |
US5257294A (en) * | 1990-11-13 | 1993-10-26 | National Semiconductor Corporation | Phase-locked loop circuit and method |
US5095233A (en) * | 1991-02-14 | 1992-03-10 | Motorola, Inc. | Digital delay line with inverter tap resolution |
US5111160A (en) * | 1991-04-30 | 1992-05-05 | The Grass Valley Group | Clock generation circuit for multistandard serial digital video with automatic format identification |
US5260979A (en) * | 1991-05-28 | 1993-11-09 | Codex Corp. | Circuit and method of switching between redundant clocks for a phase lock loop |
US5142247A (en) * | 1991-08-06 | 1992-08-25 | Compaq Computer Corporation | Multiple frequency phase-locked loop clock generator with stable transitions between frequencies |
US5144254A (en) * | 1991-09-30 | 1992-09-01 | Wilke William G | Dual synthesizer including programmable counters which are controlled by means of calculated input controls |
US5294894A (en) * | 1992-10-02 | 1994-03-15 | Compaq Computer Corporation | Method of and apparatus for startup of a digital computer system clock |
US5278520A (en) * | 1992-10-26 | 1994-01-11 | Codex, Corp. | Phase lock detection in a phase lock loop |
US5375148A (en) * | 1993-03-01 | 1994-12-20 | Motorola, Inc. | VCO bias generator in a phase lock loop |
FR2709624B1 (fr) * | 1993-08-31 | 1995-11-17 | Sgs Thomson Microelectronics | Synthétiseur de fréquence. |
-
1994
- 1994-04-15 US US08/228,470 patent/US5557224A/en not_active Expired - Fee Related
- 1994-08-04 TW TW083107157A patent/TW364076B/zh active
-
1995
- 1995-03-30 CA CA002145927A patent/CA2145927A1/en not_active Abandoned
- 1995-03-31 JP JP07531995A patent/JP3154637B2/ja not_active Expired - Fee Related
- 1995-03-31 DE DE69525093T patent/DE69525093T2/de not_active Expired - Fee Related
- 1995-03-31 EP EP95480034A patent/EP0677802B1/en not_active Expired - Lifetime
- 1995-04-07 BR BR9501494A patent/BR9501494A/pt unknown
- 1995-04-13 KR KR1019950008596A patent/KR100188486B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TW364076B (en) | 1999-07-11 |
EP0677802A1 (en) | 1995-10-18 |
KR950029905A (ko) | 1995-11-24 |
KR100188486B1 (ko) | 1999-06-01 |
DE69525093T2 (de) | 2002-10-17 |
JPH07319578A (ja) | 1995-12-08 |
EP0677802B1 (en) | 2002-01-23 |
CA2145927A1 (en) | 1995-10-16 |
DE69525093D1 (de) | 2002-03-14 |
JP3154637B2 (ja) | 2001-04-09 |
US5557224A (en) | 1996-09-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD5 | Application fees: dismissal - article 86 of industrial property law |