BR9200544A - Metodo para controlar o sinal de relogio do processador e sistema de processamento de informacoes - Google Patents

Metodo para controlar o sinal de relogio do processador e sistema de processamento de informacoes

Info

Publication number
BR9200544A
BR9200544A BR929200544A BR9200544A BR9200544A BR 9200544 A BR9200544 A BR 9200544A BR 929200544 A BR929200544 A BR 929200544A BR 9200544 A BR9200544 A BR 9200544A BR 9200544 A BR9200544 A BR 9200544A
Authority
BR
Brazil
Prior art keywords
processor
information processing
control
processing system
clock sign
Prior art date
Application number
BR929200544A
Other languages
English (en)
Inventor
Naoshi Suzuki
Shunya Uno
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR9200544A publication Critical patent/BR9200544A/pt

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/324Power saving characterised by the action undertaken by lowering clock frequency
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Power Sources (AREA)
  • Executing Machine-Instructions (AREA)
BR929200544A 1991-02-25 1992-02-19 Metodo para controlar o sinal de relogio do processador e sistema de processamento de informacoes BR9200544A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3050307A JPH0776894B2 (ja) 1991-02-25 1991-02-25 プロセッサ用クロック信号の制御方法及び情報処理システム

Publications (1)

Publication Number Publication Date
BR9200544A true BR9200544A (pt) 1992-10-27

Family

ID=12855242

Family Applications (1)

Application Number Title Priority Date Filing Date
BR929200544A BR9200544A (pt) 1991-02-25 1992-02-19 Metodo para controlar o sinal de relogio do processador e sistema de processamento de informacoes

Country Status (10)

Country Link
US (1) US5189647A (pt)
EP (1) EP0501655B1 (pt)
JP (1) JPH0776894B2 (pt)
KR (1) KR950005217B1 (pt)
CN (1) CN1023915C (pt)
BR (1) BR9200544A (pt)
CA (1) CA2061056A1 (pt)
DE (1) DE69202278T2 (pt)
ES (1) ES2072703T3 (pt)
MY (1) MY107803A (pt)

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Also Published As

Publication number Publication date
EP0501655A2 (en) 1992-09-02
JPH0776894B2 (ja) 1995-08-16
EP0501655B1 (en) 1995-05-03
DE69202278D1 (de) 1995-06-08
KR950005217B1 (ko) 1995-05-22
KR920016929A (ko) 1992-09-25
CN1023915C (zh) 1994-03-02
DE69202278T2 (de) 1996-01-25
JPH04278612A (ja) 1992-10-05
CN1064956A (zh) 1992-09-30
US5189647A (en) 1993-02-23
ES2072703T3 (es) 1995-07-16
MY107803A (en) 1996-06-29
CA2061056A1 (en) 1992-08-26
EP0501655A3 (en) 1993-02-24

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