BR112015028634A2 - sistema e método para camada de tradução flash de alto desempenho e baixo custo - Google Patents

sistema e método para camada de tradução flash de alto desempenho e baixo custo

Info

Publication number
BR112015028634A2
BR112015028634A2 BR112015028634A BR112015028634A BR112015028634A2 BR 112015028634 A2 BR112015028634 A2 BR 112015028634A2 BR 112015028634 A BR112015028634 A BR 112015028634A BR 112015028634 A BR112015028634 A BR 112015028634A BR 112015028634 A2 BR112015028634 A2 BR 112015028634A2
Authority
BR
Brazil
Prior art keywords
flash
memory
flash memory
translation layer
low cost
Prior art date
Application number
BR112015028634A
Other languages
English (en)
Inventor
Srinivasan Anand
Chun Dexter
Shin Hyunsuk
Haehnichen Steven
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112015028634A2 publication Critical patent/BR112015028634A2/pt

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Read Only Memory (AREA)

Abstract

resumo “sistema e método para camada de tradução flash de alto desempenho e baixo custo” aspectos incluem sistemas e métodos para aumentar o desempenho de uma camada de tradução flash (ftl) de um dispositivo de memória flash. uma cópia de tabelas de ftl armazenadas em um dispositivo de memória flash pode ser copiada para uma memória de um dispositivo hospedeiro. a cópia das tabelas de ftl pode ser acessada diretamente pelo dispositivo de memória flash para traduzir entre endereços lógicos providos pelo dispositivo hospedeiro para operações de leitura / gravação de/para o dispositivo de memória flash de memória flash, e os respectivos endereços físicos da memória flash. ao dispositivo de memória flash é concedido o acesso direto à memória para uma parte da memória do dispositivo hospedeiro em que a cópia das tabelas de ftl é armazenada. o barramento de dispositivo de memória flash domina barramentos de comunicação que conectam o dispositivo de dispositivo de memória flash para a memória do dispositivo hospedeiro.
BR112015028634A 2013-05-13 2014-05-09 sistema e método para camada de tradução flash de alto desempenho e baixo custo BR112015028634A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/892,433 US9575884B2 (en) 2013-05-13 2013-05-13 System and method for high performance and low cost flash translation layer
PCT/US2014/037531 WO2014186232A1 (en) 2013-05-13 2014-05-09 System and method for high performance and low cost flash translation layer

Publications (1)

Publication Number Publication Date
BR112015028634A2 true BR112015028634A2 (pt) 2017-07-25

Family

ID=50942864

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112015028634A BR112015028634A2 (pt) 2013-05-13 2014-05-09 sistema e método para camada de tradução flash de alto desempenho e baixo custo

Country Status (8)

Country Link
US (1) US9575884B2 (pt)
EP (1) EP2997459B1 (pt)
JP (1) JP6190045B2 (pt)
KR (1) KR20160006709A (pt)
CN (1) CN105378642A (pt)
BR (1) BR112015028634A2 (pt)
TW (1) TWI556099B (pt)
WO (1) WO2014186232A1 (pt)

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Also Published As

Publication number Publication date
US9575884B2 (en) 2017-02-21
US20140337560A1 (en) 2014-11-13
TWI556099B (zh) 2016-11-01
TW201506619A (zh) 2015-02-16
JP6190045B2 (ja) 2017-08-30
JP2016522942A (ja) 2016-08-04
EP2997459A1 (en) 2016-03-23
WO2014186232A1 (en) 2014-11-20
EP2997459B1 (en) 2018-03-07
CN105378642A (zh) 2016-03-02
KR20160006709A (ko) 2016-01-19

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