BR112013009219A2 - estrutura semicondutora para ajuste de voltagem (vt) e controle de canal curto com mosfets porta de metal de alto k e respectivo método de fabricação - Google Patents

estrutura semicondutora para ajuste de voltagem (vt) e controle de canal curto com mosfets porta de metal de alto k e respectivo método de fabricação

Info

Publication number
BR112013009219A2
BR112013009219A2 BR112013009219A BR112013009219A BR112013009219A2 BR 112013009219 A2 BR112013009219 A2 BR 112013009219A2 BR 112013009219 A BR112013009219 A BR 112013009219A BR 112013009219 A BR112013009219 A BR 112013009219A BR 112013009219 A2 BR112013009219 A2 BR 112013009219A2
Authority
BR
Brazil
Prior art keywords
manufacturing
semiconductor structure
metal gate
channel control
voltage adjustment
Prior art date
Application number
BR112013009219A
Other languages
English (en)
Portuguese (pt)
Inventor
Cai Jin
Chen Xiangdong
Wang Xinlin
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR112013009219A2 publication Critical patent/BR112013009219A2/pt

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213Channel regions of field-effect devices
    • H10D62/221Channel regions of field-effect devices of FETs
    • H10D62/235Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/299Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191Manufacturing their doped wells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
BR112013009219A 2010-12-06 2011-09-15 estrutura semicondutora para ajuste de voltagem (vt) e controle de canal curto com mosfets porta de metal de alto k e respectivo método de fabricação BR112013009219A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/960,589 US8466473B2 (en) 2010-12-06 2010-12-06 Structure and method for Vt tuning and short channel control with high k/metal gate MOSFETs
PCT/US2011/051675 WO2012078225A1 (en) 2010-12-06 2011-09-15 STRUCTURE AND METHOD FOR Vt TUNING AND SHORT CHANNEL CONTROL WITH HIGH K/METAL GATE MOSFETs

Publications (1)

Publication Number Publication Date
BR112013009219A2 true BR112013009219A2 (pt) 2019-09-24

Family

ID=46161384

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112013009219A BR112013009219A2 (pt) 2010-12-06 2011-09-15 estrutura semicondutora para ajuste de voltagem (vt) e controle de canal curto com mosfets porta de metal de alto k e respectivo método de fabricação

Country Status (7)

Country Link
US (1) US8466473B2 (enExample)
EP (1) EP2641271B1 (enExample)
JP (1) JP5669954B2 (enExample)
CN (1) CN103262246B (enExample)
BR (1) BR112013009219A2 (enExample)
TW (1) TWI493710B (enExample)
WO (1) WO2012078225A1 (enExample)

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Also Published As

Publication number Publication date
EP2641271B1 (en) 2017-04-12
EP2641271A1 (en) 2013-09-25
JP5669954B2 (ja) 2015-02-18
EP2641271A4 (en) 2014-03-19
CN103262246B (zh) 2016-04-27
WO2012078225A1 (en) 2012-06-14
US20120138953A1 (en) 2012-06-07
CN103262246A (zh) 2013-08-21
JP2013545315A (ja) 2013-12-19
US8466473B2 (en) 2013-06-18
TWI493710B (zh) 2015-07-21
TW201236153A (en) 2012-09-01

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]
B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2543 DE 01-10-2019 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.