BR102013003024B1 - aparelho de comparação de dados, sistema de segurança e método de comparação de dados - Google Patents

aparelho de comparação de dados, sistema de segurança e método de comparação de dados Download PDF

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Publication number
BR102013003024B1
BR102013003024B1 BR102013003024-4A BR102013003024A BR102013003024B1 BR 102013003024 B1 BR102013003024 B1 BR 102013003024B1 BR 102013003024 A BR102013003024 A BR 102013003024A BR 102013003024 B1 BR102013003024 B1 BR 102013003024B1
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BR
Brazil
Prior art keywords
data
synchronization
comparison
signal
circuit
Prior art date
Application number
BR102013003024-4A
Other languages
English (en)
Portuguese (pt)
Other versions
BR102013003024A2 (pt
Inventor
Keiichi Katsuta
Keiji Maekawa
Naoki Shibata
Kenji Imamoto
Nobuyasu Kanekawa
Dai Watanabe
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Publication of BR102013003024A2 publication Critical patent/BR102013003024A2/pt
Publication of BR102013003024B1 publication Critical patent/BR102013003024B1/pt

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
BR102013003024-4A 2012-02-07 2013-02-07 aparelho de comparação de dados, sistema de segurança e método de comparação de dados BR102013003024B1 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012-024235 2012-02-07
JP2012024235A JP5925507B2 (ja) 2012-02-07 2012-02-07 データ照合装置、照合方法及びそれを用いた安全保安システム

Publications (2)

Publication Number Publication Date
BR102013003024A2 BR102013003024A2 (pt) 2015-06-23
BR102013003024B1 true BR102013003024B1 (pt) 2020-12-08

Family

ID=47740816

Family Applications (1)

Application Number Title Priority Date Filing Date
BR102013003024-4A BR102013003024B1 (pt) 2012-02-07 2013-02-07 aparelho de comparação de dados, sistema de segurança e método de comparação de dados

Country Status (4)

Country Link
EP (1) EP2626787B1 (https=)
JP (1) JP5925507B2 (https=)
CN (1) CN103257647B (https=)
BR (1) BR102013003024B1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6280359B2 (ja) * 2013-12-17 2018-02-14 株式会社東芝 プログラマブルコントローラ
JP6407836B2 (ja) * 2015-10-29 2018-10-17 株式会社京三製作所 適応データ出力装置
CN107943629A (zh) * 2017-11-20 2018-04-20 英业达科技有限公司 计算机装置及其控制方法
CN108712242B (zh) * 2018-04-26 2020-10-30 烽火通信科技股份有限公司 分组设备内提升信令处理能力的系统及方法
CN110175091B (zh) * 2018-12-11 2023-06-23 中国航空工业集团公司西安航空计算技术研究所 一种Lockstep架构下的节点间信号同步方法、装置及电路
WO2022249818A1 (ja) 2021-05-27 2022-12-01 株式会社日立製作所 保安装置および保安方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4696019A (en) * 1984-09-19 1987-09-22 United Technologies Corporation Multi-channel clock synchronizer
JP2561181B2 (ja) 1991-05-13 1996-12-04 財団法人鉄道総合技術研究所 クロック同期形2重系回路
EP0653708B1 (en) * 1993-10-15 2000-08-16 Hitachi, Ltd. Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it
JPH08297588A (ja) * 1995-04-25 1996-11-12 Fujitsu Ltd 二重照合装置
JPH09288150A (ja) * 1996-04-24 1997-11-04 Hitachi Ltd 誤り検出方法,論理回路およびフォールトトレラントシステム
JP2001197052A (ja) * 2000-01-13 2001-07-19 Nec Corp フレーム同期検出回路
JP4137387B2 (ja) * 2001-01-11 2008-08-20 三菱電機株式会社 フェールセーフコンピュータシステム
DE102004038590A1 (de) * 2004-08-06 2006-03-16 Robert Bosch Gmbh Verfahren zur Verzögerung von Zugriffen auf Daten und/oder Befehle eines Zweirechnersystems sowie entsprechende Verzögerungseinheit
JP4330146B2 (ja) * 2004-08-19 2009-09-16 Necエンジニアリング株式会社 スキュー調整回路
JP2009094891A (ja) * 2007-10-10 2009-04-30 Toshiba Corp 半導体集積回路装置及びパターン検出方法
US8058916B2 (en) * 2010-04-15 2011-11-15 Xilinx, Inc. Lockstep synchronization and maintenance

Also Published As

Publication number Publication date
EP2626787B1 (en) 2014-09-03
JP5925507B2 (ja) 2016-05-25
CN103257647A (zh) 2013-08-21
JP2013161354A (ja) 2013-08-19
BR102013003024A2 (pt) 2015-06-23
EP2626787A1 (en) 2013-08-14
CN103257647B (zh) 2015-09-02

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Legal Events

Date Code Title Description
B03A Publication of a patent application or of a certificate of addition of invention [chapter 3.1 patent gazette]
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 07/02/2013, OBSERVADAS AS CONDICOES LEGAIS.

B21F Lapse acc. art. 78, item iv - on non-payment of the annual fees in time

Free format text: REFERENTE A 11A ANUIDADE.

B24J Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12)

Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2760 DE 28-11-2023 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.