AU506465B2 - Semiconductor F. E. T. device - Google Patents

Semiconductor F. E. T. device

Info

Publication number
AU506465B2
AU506465B2 AU20908/76A AU2090876A AU506465B2 AU 506465 B2 AU506465 B2 AU 506465B2 AU 20908/76 A AU20908/76 A AU 20908/76A AU 2090876 A AU2090876 A AU 2090876A AU 506465 B2 AU506465 B2 AU 506465B2
Authority
AU
Australia
Prior art keywords
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU20908/76A
Other languages
English (en)
Other versions
AU2090876A (en
Inventor
E. Jochems P. J. W. and Vanzanten A. T Koni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of AU2090876A publication Critical patent/AU2090876A/en
Application granted granted Critical
Publication of AU506465B2 publication Critical patent/AU506465B2/en
Expired legal-status Critical Current

Links

Classifications

    • H10P14/61—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10W15/00—
    • H10W15/01—
    • H10W20/20—
AU20908/76A 1976-10-25 1976-12-24 Semiconductor F. E. T. device Expired AU506465B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NLAANVRAGE7611773,A NL185376C (nl) 1976-10-25 1976-10-25 Werkwijze ter vervaardiging van een halfgeleiderinrichting.
NLNL7,611,77 1976-10-25

Publications (2)

Publication Number Publication Date
AU2090876A AU2090876A (en) 1978-06-29
AU506465B2 true AU506465B2 (en) 1980-01-03

Family

ID=19827103

Family Applications (1)

Application Number Title Priority Date Filing Date
AU20908/76A Expired AU506465B2 (en) 1976-10-25 1976-12-24 Semiconductor F. E. T. device

Country Status (11)

Country Link
US (1) US4101344A (enExample)
JP (1) JPS5353276A (enExample)
AU (1) AU506465B2 (enExample)
CA (1) CA1075372A (enExample)
CH (1) CH623959A5 (enExample)
DE (1) DE2745857A1 (enExample)
FR (1) FR2368799A1 (enExample)
GB (1) GB1567197A (enExample)
IT (1) IT1066832B (enExample)
NL (1) NL185376C (enExample)
SE (1) SE414980B (enExample)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5696402A (en) * 1965-09-28 1997-12-09 Li; Chou H. Integrated circuit device
US7038290B1 (en) 1965-09-28 2006-05-02 Li Chou H Integrated circuit device
US4244752A (en) * 1979-03-06 1981-01-13 Burroughs Corporation Single mask method of fabricating complementary integrated circuits
US4288910A (en) * 1979-04-16 1981-09-15 Teletype Corporation Method of manufacturing a semiconductor device
NL7903158A (nl) * 1979-04-23 1980-10-27 Philips Nv Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.
US4261761A (en) * 1979-09-04 1981-04-14 Tektronix, Inc. Method of manufacturing sub-micron channel width MOS transistor
US4458262A (en) * 1980-05-27 1984-07-03 Supertex, Inc. CMOS Device with ion-implanted channel-stop region and fabrication method therefor
NL8003612A (nl) * 1980-06-23 1982-01-18 Philips Nv Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd door toepassing van deze werkwijze.
EP0052475A3 (en) * 1980-11-19 1983-12-21 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
NL186886C (nl) * 1980-11-28 1992-03-16 Philips Nv Halfgeleiderinrichting.
US4373965A (en) * 1980-12-22 1983-02-15 Ncr Corporation Suppression of parasitic sidewall transistors in locos structures
US4511911A (en) * 1981-07-22 1985-04-16 International Business Machines Corporation Dense dynamic memory cell structure and process
US4763177A (en) * 1985-02-19 1988-08-09 Texas Instruments Incorporated Read only memory with improved channel length isolation and method of forming
GB2179787B (en) * 1985-08-26 1989-09-20 Intel Corp Buried interconnect for mos structure
US4700461A (en) * 1986-09-29 1987-10-20 Massachusetts Institute Of Technology Process for making junction field-effect transistors
US4874715A (en) * 1987-05-20 1989-10-17 Texas Instruments Incorporated Read only memory with improved channel length control and method of forming
GB2215124A (en) * 1988-02-16 1989-09-13 Stc Plc Integrated circuit underpasses
DE69333881T2 (de) 1992-07-31 2006-07-13 Hughes Electronics Corp., El Segundo Sicherheitssystem für eine integrierte Schaltung und Verfahren mit implantierten Verbindungen
US5927992A (en) * 1993-12-22 1999-07-27 Stmicroelectronics, Inc. Method of forming a dielectric in an integrated circuit
US5811865A (en) * 1993-12-22 1998-09-22 Stmicroelectronics, Inc. Dielectric in an integrated circuit
US5418176A (en) * 1994-02-17 1995-05-23 United Microelectronics Corporation Process for producing memory devices having narrow buried N+ lines
JP3653107B2 (ja) * 1994-03-14 2005-05-25 株式会社ルネサステクノロジ 半導体装置およびその製造方法
US5756385A (en) * 1994-03-30 1998-05-26 Sandisk Corporation Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers
US5661053A (en) * 1994-05-25 1997-08-26 Sandisk Corporation Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers
US20040144999A1 (en) * 1995-06-07 2004-07-29 Li Chou H. Integrated circuit device
US5767000A (en) * 1996-06-05 1998-06-16 Advanced Micro Devices, Inc. Method of manufacturing subfield conductive layer
US5973375A (en) * 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants
US6391724B1 (en) * 1999-12-24 2002-05-21 Hyundai Electronics Industries Co., Ltd. Method for manufacturing a gate structure incorporating aluminum oxide as a gate dielectric
US7217977B2 (en) * 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US6815816B1 (en) * 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US6774413B2 (en) 2001-06-15 2004-08-10 Hrl Laboratories, Llc Integrated circuit structure with programmable connector/isolator
US6740942B2 (en) 2001-06-15 2004-05-25 Hrl Laboratories, Llc. Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
US6897535B2 (en) * 2002-05-14 2005-05-24 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
US6979606B2 (en) * 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
AU2003293540A1 (en) * 2002-12-13 2004-07-09 Raytheon Company Integrated circuit modification using well implants
US20050275058A1 (en) * 2004-05-28 2005-12-15 Leibiger Steven M Method for enhancing field oxide and integrated circuit with enhanced field oxide
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US8421119B2 (en) * 2006-09-13 2013-04-16 Rohm Co., Ltd. GaN related compound semiconductor element and process for producing the same and device having the same
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1357515A (en) * 1972-03-10 1974-06-26 Matsushita Electronics Corp Method for manufacturing an mos integrated circuit
US3747200A (en) * 1972-03-31 1973-07-24 Motorola Inc Integrated circuit fabrication method
US3873372A (en) * 1973-07-09 1975-03-25 Ibm Method for producing improved transistor devices
US4013489A (en) * 1976-02-10 1977-03-22 Intel Corporation Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
JPS52146578A (en) * 1976-05-28 1977-12-06 Texas Instruments Inc Method of producing resistance element and semiconductor device having same element

Also Published As

Publication number Publication date
GB1567197A (en) 1980-05-14
AU2090876A (en) 1978-06-29
DE2745857A1 (de) 1978-04-27
SE7614157L (sv) 1978-04-26
US4101344A (en) 1978-07-18
NL7611773A (nl) 1978-04-27
JPS6112382B2 (enExample) 1986-04-08
SE414980B (sv) 1980-08-25
CH623959A5 (enExample) 1981-06-30
CA1075372A (en) 1980-04-08
JPS5353276A (en) 1978-05-15
NL185376C (nl) 1990-03-16
FR2368799B1 (enExample) 1983-04-08
DE2745857C2 (enExample) 1988-12-08
NL185376B (nl) 1989-10-16
IT1066832B (it) 1985-03-12
FR2368799A1 (fr) 1978-05-19

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