AU2002357140A1 - Cmos process with an integrated, high performance, silicide agglomeration fuse - Google Patents

Cmos process with an integrated, high performance, silicide agglomeration fuse

Info

Publication number
AU2002357140A1
AU2002357140A1 AU2002357140A AU2002357140A AU2002357140A1 AU 2002357140 A1 AU2002357140 A1 AU 2002357140A1 AU 2002357140 A AU2002357140 A AU 2002357140A AU 2002357140 A AU2002357140 A AU 2002357140A AU 2002357140 A1 AU2002357140 A1 AU 2002357140A1
Authority
AU
Australia
Prior art keywords
integrated
high performance
cmos process
silicide agglomeration
fuse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002357140A
Other languages
English (en)
Inventor
Philip A. Fisher
Ciby Thuruthiyil
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of AU2002357140A1 publication Critical patent/AU2002357140A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
AU2002357140A 2001-12-10 2002-12-09 Cmos process with an integrated, high performance, silicide agglomeration fuse Abandoned AU2002357140A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/014,064 US6756255B1 (en) 2001-12-10 2001-12-10 CMOS process with an integrated, high performance, silicide agglomeration fuse
US10/014,064 2001-12-10
PCT/US2002/039482 WO2003050858A1 (en) 2001-12-10 2002-12-09 Cmos process with an integrated, high performance, silicide agglomeration fuse

Publications (1)

Publication Number Publication Date
AU2002357140A1 true AU2002357140A1 (en) 2003-06-23

Family

ID=21763328

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002357140A Abandoned AU2002357140A1 (en) 2001-12-10 2002-12-09 Cmos process with an integrated, high performance, silicide agglomeration fuse

Country Status (9)

Country Link
US (1) US6756255B1 (enExample)
EP (1) EP1451860B1 (enExample)
JP (1) JP4651941B2 (enExample)
KR (1) KR100957601B1 (enExample)
CN (1) CN100352009C (enExample)
AU (1) AU2002357140A1 (enExample)
DE (1) DE60224712T2 (enExample)
TW (1) TWI270961B (enExample)
WO (1) WO2003050858A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050124097A1 (en) * 2003-12-05 2005-06-09 Advanced Micro Devices, Inc Integrated circuit with two phase fuse material and method of using and making same
US7645687B2 (en) * 2005-01-20 2010-01-12 Chartered Semiconductor Manufacturing, Ltd. Method to fabricate variable work function gates for FUSI devices
JP2009506577A (ja) * 2005-08-31 2009-02-12 インターナショナル・ビジネス・マシーンズ・コーポレーション ランダム・アクセス電気的プログラム可能なｅヒューズｒｏｍ
US7288804B2 (en) * 2006-03-09 2007-10-30 International Business Machines Corporation Electrically programmable π-shaped fuse structures and methods of fabrication thereof
US7784009B2 (en) * 2006-03-09 2010-08-24 International Business Machines Corporation Electrically programmable π-shaped fuse structures and design process therefore
US7417300B2 (en) * 2006-03-09 2008-08-26 International Business Machines Corporation Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabrication thereof
US7645645B2 (en) * 2006-03-09 2010-01-12 International Business Machines Corporation Electrically programmable fuse structures with terminal portions residing at different heights, and methods of fabrication thereof
US7460003B2 (en) * 2006-03-09 2008-12-02 International Business Machines Corporation Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer
US7924597B2 (en) * 2007-10-31 2011-04-12 Hewlett-Packard Development Company, L.P. Data storage in circuit elements with changed resistance
US8354304B2 (en) * 2008-12-05 2013-01-15 Stats Chippac, Ltd. Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant
WO2011024340A1 (ja) * 2009-08-27 2011-03-03 パナソニック株式会社 半導体装置及びその製造方法
US8912626B2 (en) 2011-01-25 2014-12-16 International Business Machines Corporation eFuse and method of fabrication
US12408563B1 (en) * 2020-08-24 2025-09-02 Synopsys, Inc. Superconducting anti-fuse based field programmable gate array

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4042950A (en) * 1976-03-01 1977-08-16 Advanced Micro Devices, Inc. Platinum silicide fuse links for integrated circuit devices
JPS60261154A (ja) * 1984-06-08 1985-12-24 Hitachi Micro Comput Eng Ltd 半導体集積回路装置の製造方法
US4647340A (en) * 1986-03-31 1987-03-03 Ncr Corporation Programmable read only memory using a tungsten fuse
JPH0424945A (ja) * 1990-05-16 1992-01-28 Seiko Instr Inc 半導体装置の製造方法
US6337507B1 (en) * 1995-09-29 2002-01-08 Intel Corporation Silicide agglomeration fuse device with notches to enhance programmability
US5708291A (en) * 1995-09-29 1998-01-13 Intel Corporation Silicide agglomeration fuse device
US5821160A (en) * 1996-06-06 1998-10-13 Motorola, Inc. Method for forming a laser alterable fuse area of a memory cell using an etch stop layer
US5976943A (en) * 1996-12-27 1999-11-02 Vlsi Technology, Inc. Method for bi-layer programmable resistor
FR2760563A1 (fr) * 1997-03-07 1998-09-11 Sgs Thomson Microelectronics Pseudofusible et application a un circuit d'etablissement d'une bascule a la mise sous tension
US6022775A (en) 1998-08-17 2000-02-08 Taiwan Semiconductor Manufacturing Company High effective area capacitor for high density DRAM circuits using silicide agglomeration
US6242790B1 (en) 1999-08-30 2001-06-05 Advanced Micro Devices, Inc. Using polysilicon fuse for IC programming
JP2001077050A (ja) * 1999-08-31 2001-03-23 Toshiba Corp 半導体装置の製造方法
US6391767B1 (en) * 2000-02-11 2002-05-21 Advanced Micro Devices, Inc. Dual silicide process to reduce gate resistance
JP2001326242A (ja) * 2000-05-16 2001-11-22 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US6642601B2 (en) * 2000-12-18 2003-11-04 Texas Instruments Incorporated Low current substantially silicide fuse for integrated circuits

Also Published As

Publication number Publication date
EP1451860A1 (en) 2004-09-01
JP2005513764A (ja) 2005-05-12
TW200301549A (en) 2003-07-01
CN1695232A (zh) 2005-11-09
KR100957601B1 (ko) 2010-05-13
DE60224712D1 (de) 2008-03-06
JP4651941B2 (ja) 2011-03-16
US6756255B1 (en) 2004-06-29
DE60224712T2 (de) 2009-01-29
EP1451860B1 (en) 2008-01-16
CN100352009C (zh) 2007-11-28
TWI270961B (en) 2007-01-11
KR20040064302A (ko) 2004-07-16
WO2003050858A1 (en) 2003-06-19

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase