ATE549651T1 - Siebdruckverfahren verfahren zur verkapselung von optoelektronischen chips - Google Patents

Siebdruckverfahren verfahren zur verkapselung von optoelektronischen chips

Info

Publication number
ATE549651T1
ATE549651T1 AT04738016T AT04738016T ATE549651T1 AT E549651 T1 ATE549651 T1 AT E549651T1 AT 04738016 T AT04738016 T AT 04738016T AT 04738016 T AT04738016 T AT 04738016T AT E549651 T1 ATE549651 T1 AT E549651T1
Authority
AT
Austria
Prior art keywords
screen printing
printing method
optoelectronic chips
encapsulating optoelectronic
encapsulating
Prior art date
Application number
AT04738016T
Other languages
English (en)
Inventor
David Robert Cameron Rolston
Tomasz Maj
Shao-Wei Fu
Original Assignee
Reflex Photonique Inc Reflex Photonics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/725,566 external-priority patent/US7178235B2/en
Application filed by Reflex Photonique Inc Reflex Photonics Inc filed Critical Reflex Photonique Inc Reflex Photonics Inc
Application granted granted Critical
Publication of ATE549651T1 publication Critical patent/ATE549651T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4212—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element being a coupling medium interposed therebetween, e.g. epoxy resin, refractive index matching material, index grease, matching liquid or gel
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236—Fixing or mounting methods of the aligned elements
    • G02B6/4239—Adhesive bonding; Encapsulation with polymer material
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4249—Packages, e.g. shape, construction, internal or external details comprising arrays of active devices and fibres
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4943—Connecting portions the connecting portions being staggered
    • H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optical Couplings Of Light Guides (AREA)
  • Led Device Packages (AREA)
  • Packages (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Semiconductor Lasers (AREA)
AT04738016T 2003-07-24 2004-07-26 Siebdruckverfahren verfahren zur verkapselung von optoelektronischen chips ATE549651T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US62590603A 2003-07-24 2003-07-24
US10/725,566 US7178235B2 (en) 2003-12-03 2003-12-03 Method of manufacturing an optoelectronic package
PCT/CA2004/001408 WO2005010580A1 (en) 2003-07-24 2004-07-26 Encapsulated optical package

Publications (1)

Publication Number Publication Date
ATE549651T1 true ATE549651T1 (de) 2012-03-15

Family

ID=34108155

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04738016T ATE549651T1 (de) 2003-07-24 2004-07-26 Siebdruckverfahren verfahren zur verkapselung von optoelektronischen chips

Country Status (6)

Country Link
US (1) US7820462B2 (de)
EP (1) EP1654572B1 (de)
JP (1) JP2006528834A (de)
AT (1) ATE549651T1 (de)
CA (1) CA2569265C (de)
WO (1) WO2005010580A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
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US7200295B2 (en) * 2004-12-07 2007-04-03 Reflex Photonics, Inc. Optically enabled hybrid semiconductor package
US7482610B2 (en) * 2005-01-13 2009-01-27 Massachusetts Institute Of Technology Vertical-cavity enhanced resonant thermal emitter
DE102005036824A1 (de) * 2005-08-04 2007-03-29 Siemens Ag Chipmodul zum Einbau in Sensorchipkarten für fluidische Anwendungen sowie Verfahren zur Herstellung eines derartigen Chipmoduls
JP4699155B2 (ja) * 2005-09-29 2011-06-08 日本電信電話株式会社 光モジュール
TWI325618B (en) * 2007-01-02 2010-06-01 Chipmos Technologies Inc Film type package for fingerprint sensor
JP4553026B2 (ja) * 2008-03-27 2010-09-29 富士ゼロックス株式会社 光伝送装置
GB0902569D0 (en) 2009-02-16 2009-04-01 Univ Southampton An optical device
JP5526738B2 (ja) * 2009-11-27 2014-06-18 株式会社リコー 発光装置、マルチビーム光源装置、マルチビーム走査装置及び画像形成装置
JP6036463B2 (ja) * 2013-03-26 2016-11-30 日立金属株式会社 光モジュール、光通信機器、および光伝送装置
US20150030281A1 (en) * 2013-07-25 2015-01-29 Avago Technologies General IP (Singapore) Pte, Ltd. Methods and apparatuses for preventing an optics system of an optical communications module from being damaged or moved out of alignment by external forces
WO2018152647A1 (en) * 2017-02-24 2018-08-30 Reflex Photonics Inc. Wirebonding for side-packaged optical engine

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US4130343A (en) 1977-02-22 1978-12-19 Bell Telephone Laboratories, Incorporated Coupling arrangements between a light-emitting diode and an optical fiber waveguide and between an optical fiber waveguide and a semiconductor optical detector
US4819041A (en) 1983-12-30 1989-04-04 Amp Incorporated Surface mounted integrated circuit chip package and method for making same
NL8702493A (nl) * 1986-10-31 1988-05-16 Seiko Epson Corp Optisch opnamemedium en werkwijze voor het vervaardigen daarvan.
JPH02209785A (ja) * 1989-02-09 1990-08-21 Sony Corp 光半導体装置
EP0734074A1 (de) 1990-07-16 1996-09-25 Nitto Denko Corporation Photohalbleitervorrichtung
JP2542746B2 (ja) * 1991-03-04 1996-10-09 ローム株式会社 レ―ザダイオ―ド
US5313365A (en) 1992-06-30 1994-05-17 Motorola, Inc. Encapsulated electronic package
US6054716A (en) 1997-01-10 2000-04-25 Rohm Co., Ltd. Semiconductor light emitting device having a protecting device
JP3087676B2 (ja) 1997-02-13 2000-09-11 日本電気株式会社 ゲル状樹脂を用いた光結合系及び実装構造
US6583444B2 (en) 1997-02-18 2003-06-24 Tessera, Inc. Semiconductor packages having light-sensitive chips
JPH11119064A (ja) 1997-10-17 1999-04-30 Fujitsu Ltd 光伝送端末装置
JP3355122B2 (ja) 1998-01-08 2002-12-09 富士通株式会社 光モジュールの封止方法
JP2000110176A (ja) * 1998-10-02 2000-04-18 Fujitsu Ltd 光モジュール及びその製造方法
AU2653299A (en) 1998-11-25 2000-06-13 Act Micro Devices Optoelectronic module and method of making same
DE10084933B3 (de) 1999-08-25 2012-01-19 Hamamatsu Photonics K.K. Optischer Empfänger sowie zugehörige Haltevorrichtung und zugehöriges Verfahren zum Anordnen
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Also Published As

Publication number Publication date
CA2569265C (en) 2012-10-09
US20080211048A1 (en) 2008-09-04
EP1654572A1 (de) 2006-05-10
JP2006528834A (ja) 2006-12-21
WO2005010580A1 (en) 2005-02-03
EP1654572B1 (de) 2012-03-14
US7820462B2 (en) 2010-10-26
EP1654572A4 (de) 2009-03-25
CA2569265A1 (en) 2005-02-03

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