ATE494614T1 - Leseoperation für nichtflüchtige speicherung mit floating-gate-kopplungskompensation - Google Patents

Leseoperation für nichtflüchtige speicherung mit floating-gate-kopplungskompensation

Info

Publication number
ATE494614T1
ATE494614T1 AT07751706T AT07751706T ATE494614T1 AT E494614 T1 ATE494614 T1 AT E494614T1 AT 07751706 T AT07751706 T AT 07751706T AT 07751706 T AT07751706 T AT 07751706T AT E494614 T1 ATE494614 T1 AT E494614T1
Authority
AT
Austria
Prior art keywords
memory cell
adjacent
floating gate
volatile memory
coupling
Prior art date
Application number
AT07751706T
Other languages
English (en)
Inventor
Nima Mokhlesi
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/384,057 external-priority patent/US7499319B2/en
Priority claimed from US11/377,972 external-priority patent/US7436733B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE494614T1 publication Critical patent/ATE494614T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
AT07751706T 2006-03-03 2007-02-27 Leseoperation für nichtflüchtige speicherung mit floating-gate-kopplungskompensation ATE494614T1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US77885706P 2006-03-03 2006-03-03
US11/384,057 US7499319B2 (en) 2006-03-03 2006-03-17 Read operation for non-volatile storage with compensation for coupling
US11/377,972 US7436733B2 (en) 2006-03-03 2006-03-17 System for performing read operation on non-volatile storage with compensation for coupling
PCT/US2007/004967 WO2007103038A1 (en) 2006-03-03 2007-02-27 Read operation for non-volatile storage with compensation for floating gate coupling

Publications (1)

Publication Number Publication Date
ATE494614T1 true ATE494614T1 (de) 2011-01-15

Family

ID=38229358

Family Applications (2)

Application Number Title Priority Date Filing Date
AT07751706T ATE494614T1 (de) 2006-03-03 2007-02-27 Leseoperation für nichtflüchtige speicherung mit floating-gate-kopplungskompensation
AT09015112T ATE496374T1 (de) 2006-03-03 2007-02-27 Leseverfahren für nichtflüchtigen speicher mit kompensation der floating-gate kopplung

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT09015112T ATE496374T1 (de) 2006-03-03 2007-02-27 Leseverfahren für nichtflüchtigen speicher mit kompensation der floating-gate kopplung

Country Status (8)

Country Link
EP (2) EP1991989B1 (de)
JP (1) JP4954223B2 (de)
KR (1) KR101015612B1 (de)
CN (1) CN101395673B (de)
AT (2) ATE494614T1 (de)
DE (2) DE602007011736D1 (de)
TW (1) TWI330848B (de)
WO (1) WO2007103038A1 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7499319B2 (en) 2006-03-03 2009-03-03 Sandisk Corporation Read operation for non-volatile storage with compensation for coupling
TWI335596B (en) * 2006-06-02 2011-01-01 Sandisk Corp Method and system for data pattern sensitivity compensation using different voltage
US7894269B2 (en) 2006-07-20 2011-02-22 Sandisk Corporation Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells
US7606070B2 (en) 2006-12-29 2009-10-20 Sandisk Corporation Systems for margined neighbor reading for non-volatile memory read operations including coupling compensation
US7518923B2 (en) 2006-12-29 2009-04-14 Sandisk Corporation Margined neighbor reading for non-volatile memory read operations including coupling compensation
CN101627443B (zh) 2006-12-29 2012-10-03 桑迪士克股份有限公司 通过考虑相邻存储器单元的所存储状态来读取非易失性存储器单元
TWI380311B (en) * 2006-12-29 2012-12-21 Sandisk Technologies Inc Systems and methods for margined neighbor reading for non-volatile memory read operations including coupling compensation
KR101291667B1 (ko) * 2007-08-20 2013-08-01 삼성전자주식회사 불휘발성 메모리 장치 및 그 독출 방법
US7652929B2 (en) * 2007-09-17 2010-01-26 Sandisk Corporation Non-volatile memory and method for biasing adjacent word line for verify during programming
US7663932B2 (en) * 2007-12-27 2010-02-16 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
KR101468149B1 (ko) * 2008-09-19 2014-12-03 삼성전자주식회사 플래시 메모리 장치 및 시스템들 그리고 그것의 읽기 방법
US8737129B2 (en) 2008-11-14 2014-05-27 Samsung Electronics Co., Ltd. Nonvolatile memory device and read method thereof
KR101490426B1 (ko) * 2008-11-14 2015-02-06 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 읽기 방법
KR101618063B1 (ko) 2009-06-10 2016-05-04 삼성전자주식회사 비휘발성 반도체 메모리 장치 및 그것의 독출 방법
US8482975B2 (en) * 2009-09-14 2013-07-09 Micron Technology, Inc. Memory kink checking
JP4913191B2 (ja) * 2009-09-25 2012-04-11 株式会社東芝 不揮発性半導体記憶装置
US8169822B2 (en) 2009-11-11 2012-05-01 Sandisk Technologies Inc. Data state-dependent channel boosting to reduce channel-to-floating gate coupling in memory
KR101678907B1 (ko) 2010-06-01 2016-11-23 삼성전자주식회사 리드 디스터번스를 줄일 수 있는 불휘발성 메모리 장치 및 그것의 읽기 방법
JP5198529B2 (ja) * 2010-09-22 2013-05-15 株式会社東芝 不揮発性半導体記憶装置
JP5404685B2 (ja) * 2011-04-06 2014-02-05 株式会社東芝 不揮発性半導体記憶装置
KR20130072084A (ko) 2011-12-21 2013-07-01 에스케이하이닉스 주식회사 비휘발성 메모리 장치의 리드 방법
US9001577B2 (en) * 2012-06-01 2015-04-07 Micron Technology, Inc. Memory cell sensing
JP6088751B2 (ja) 2012-06-07 2017-03-01 株式会社東芝 半導体メモリ
KR20160023305A (ko) * 2014-08-22 2016-03-03 에스케이하이닉스 주식회사 전자 장치
CN108109664A (zh) * 2017-11-29 2018-06-01 深圳忆联信息系统有限公司 一种缓解mlc闪存读干扰问题的方法
CN110648710A (zh) * 2018-06-26 2020-01-03 北京兆易创新科技股份有限公司 字线电压的施加方法、装置、电子设备和存储介质
CN110648714B (zh) * 2018-06-26 2021-03-30 北京兆易创新科技股份有限公司 数据的读取方法、装置、电子设备和存储介质
CN110689913B (zh) * 2018-07-05 2024-07-26 三星电子株式会社 非易失性存储器装置
KR102211122B1 (ko) * 2018-12-20 2021-02-02 삼성전자주식회사 스토리지 장치 및 스토리지 시스템
CN110223724A (zh) * 2019-05-10 2019-09-10 北京兆易创新科技股份有限公司 一种nand flash的读操作方法和装置
CN111066087A (zh) 2019-10-29 2020-04-24 长江存储科技有限责任公司 用于对存储器设备进行编程的方法
US11557350B2 (en) * 2020-10-16 2023-01-17 Western Digital Technologies, Inc. Dynamic read threshold calibration

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1312504A (en) 1919-08-05 Thermic
US1519904A (en) 1922-08-09 1924-12-16 Clifford L Cummings Combination bonnet lock and ignition-cut-off device for motor vehicles
US2653604A (en) 1950-12-19 1953-09-29 Jr George N Hein Injection device
KR960002006B1 (ko) 1991-03-12 1996-02-09 가부시끼가이샤 도시바 2개의 기준 레벨을 사용하는 기록 검증 제어기를 갖는 전기적으로 소거 가능하고 프로그램 가능한 불휘발성 메모리 장치
US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5555204A (en) 1993-06-29 1996-09-10 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
KR0169267B1 (ko) 1993-09-21 1999-02-01 사토 후미오 불휘발성 반도체 기억장치
US5903495A (en) 1996-03-18 1999-05-11 Kabushiki Kaisha Toshiba Semiconductor device and memory system
US6857099B1 (en) * 1996-09-18 2005-02-15 Nippon Steel Corporation Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
US5867429A (en) 1997-11-19 1999-02-02 Sandisk Corporation High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates
US6614070B1 (en) * 1998-04-16 2003-09-02 Cypress Semiconductor Corporation Semiconductor non-volatile memory device having a NAND cell structure
JP3829088B2 (ja) * 2001-03-29 2006-10-04 株式会社東芝 半導体記憶装置
US6522580B2 (en) 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US6456528B1 (en) 2001-09-17 2002-09-24 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
CN1215561C (zh) * 2002-01-11 2005-08-17 力晶半导体股份有限公司 可随机编程的非挥发半导体存储器
US7196931B2 (en) 2002-09-24 2007-03-27 Sandisk Corporation Non-volatile memory and method with reduced source line bias errors
US7327619B2 (en) 2002-09-24 2008-02-05 Sandisk Corporation Reference sense amplifier for non-volatile memory
US7046568B2 (en) 2002-09-24 2006-05-16 Sandisk Corporation Memory sensing circuit and method for low voltage operation
JP3913704B2 (ja) 2003-04-22 2007-05-09 株式会社東芝 不揮発性半導体記憶装置及びこれを用いた電子装置
US7237074B2 (en) 2003-06-13 2007-06-26 Sandisk Corporation Tracking cells for a memory system
US6956770B2 (en) * 2003-09-17 2005-10-18 Sandisk Corporation Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
US7372730B2 (en) 2004-01-26 2008-05-13 Sandisk Corporation Method of reading NAND memory to compensate for coupling between storage elements
KR100626371B1 (ko) * 2004-03-30 2006-09-20 삼성전자주식회사 캐쉬 읽기 동작을 수행하는 비휘발성 메모리 장치, 그것을포함한 메모리 시스템, 그리고 캐쉬 읽기 방법
US7120051B2 (en) 2004-12-14 2006-10-10 Sandisk Corporation Pipelined programming of non-volatile memories using early data
US20060140007A1 (en) 2004-12-29 2006-06-29 Raul-Adrian Cernea Non-volatile memory and method with shared processing for an aggregate of read/write circuits
US7187585B2 (en) * 2005-04-05 2007-03-06 Sandisk Corporation Read operation for non-volatile storage that includes compensation for coupling
US7196928B2 (en) 2005-04-05 2007-03-27 Sandisk Corporation Compensating for coupling during read operations of non-volatile memory
US9913305B2 (en) 2014-08-11 2018-03-06 Intel IP Corporation Systems, methods, and devices for congestion control on a mobile network

Also Published As

Publication number Publication date
EP1991989B1 (de) 2011-01-05
EP2161723A1 (de) 2010-03-10
CN101395673B (zh) 2011-09-21
CN101395673A (zh) 2009-03-25
TWI330848B (en) 2010-09-21
JP2009528651A (ja) 2009-08-06
TW200802389A (en) 2008-01-01
ATE496374T1 (de) 2011-02-15
DE602007011736D1 (de) 2011-02-17
EP2161723B1 (de) 2011-01-19
EP1991989A1 (de) 2008-11-19
KR101015612B1 (ko) 2011-02-17
WO2007103038A1 (en) 2007-09-13
JP4954223B2 (ja) 2012-06-13
DE602007012157D1 (de) 2011-03-03
KR20090026117A (ko) 2009-03-11

Similar Documents

Publication Publication Date Title
ATE494614T1 (de) Leseoperation für nichtflüchtige speicherung mit floating-gate-kopplungskompensation
ATE525727T1 (de) Lesen benachbarter zellen mit marge für leseoperationen eines nichtflüchtigen speichers mit kopplungskompensation
ATE510287T1 (de) Kopplungskompensation bei nichtflüchtiger speicherung
TW200703341A (en) Read operation for non-volatile storage that includes compensation for coupling
WO2008011440A3 (en) Floating gate memory with compensating for coupling during programming
ATE499682T1 (de) Kompensationsströme bei leseoperationen in nichtflüchtigen speichern
WO2008011439A3 (en) Compensating for coupling between adjacent storage elements in a nonvolatile memory, based on sensing a neighbour using coupling
WO2007149678A3 (en) Programming defferently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory
WO2007133645A3 (en) Nand architecture memory devices and operation
DE602007007974D1 (de) Lesen einer nichtflüchtigen speicherzelle unter berücksichtigung des speicherstatus einer benachbarten speicherzelle
TWI318406B (en) Systems and method for alternate row-based reading and writing for non-volatile memory
TWI264727B (en) NAND flash memory device and method of reading the same
TW200608404A (en) Operating non-volatile memory without read disturb limitations
TW200737207A (en) Reverse coupling effect with timing information
EP2859554A1 (de) Speicherzellenerfassung
WO2008012464A3 (fr) Circuit eeprom de retention de charges pour mesure temporelle
TW200710861A (en) Improved read mode for flash memory
CN103227174B (zh) 一种半导体存储装置及其版图
WO2008083132A3 (en) Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations
WO2008070578A3 (en) Method for reducing charge loss in analog floating gate cell
CN1825483B (zh) 非易失性存储器装置及其编程与读取方法
US7782676B2 (en) Method of operating a nonvolatile memory device
WO2007143399A3 (en) Nand flash verify method with different compensated pass voltages
US20120188822A1 (en) Control voltage generation circuit and non-volatile memory device including the same
US9472287B2 (en) Local self-boost using a plurality of cut-off cells on a single side of a string of memory cells

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties