TW200737207A - Reverse coupling effect with timing information - Google Patents
Reverse coupling effect with timing informationInfo
- Publication number
- TW200737207A TW200737207A TW095141514A TW95141514A TW200737207A TW 200737207 A TW200737207 A TW 200737207A TW 095141514 A TW095141514 A TW 095141514A TW 95141514 A TW95141514 A TW 95141514A TW 200737207 A TW200737207 A TW 200737207A
- Authority
- TW
- Taiwan
- Prior art keywords
- memory cell
- programmed
- neighbor
- timing information
- coupling effect
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
Abstract
Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in neighboring floating gates (or other neighboring charge storing elements). The problem occurs most pronouncedly between sets of adjacent memory cells that have been programmed at different times. To compensate for this coupling, the read process for a given memory cell will take into account the programmed state of a neighbor memory cell if the neighbor memory cell was programmed subsequent to the given memory cell. Techniques for determining whether the neighbor memory cell was programmed before or after the given memory cell are disclosed.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/271,241 US7289344B2 (en) | 2005-11-10 | 2005-11-10 | Reverse coupling effect with timing information for non-volatile memory |
US11/272,335 US7289348B2 (en) | 2005-11-10 | 2005-11-10 | Reverse coupling effect with timing information |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200737207A true TW200737207A (en) | 2007-10-01 |
TWI315068B TWI315068B (en) | 2009-09-21 |
Family
ID=37831516
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW95141514A TWI315068B (en) | 2005-11-10 | 2006-11-09 | Reverse coupling effect with timing information |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1946325A1 (en) |
JP (1) | JP4938020B2 (en) |
KR (1) | KR101016432B1 (en) |
TW (1) | TWI315068B (en) |
WO (1) | WO2007058846A1 (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7936599B2 (en) * | 2007-06-15 | 2011-05-03 | Micron Technology, Inc. | Coarse and fine programming in a solid state memory |
KR101411976B1 (en) * | 2007-07-09 | 2014-06-27 | 삼성전자주식회사 | Flash memory system and error correction method thereof |
US8499229B2 (en) | 2007-11-21 | 2013-07-30 | Micro Technology, Inc. | Method and apparatus for reading data from flash memory |
US7633798B2 (en) * | 2007-11-21 | 2009-12-15 | Micron Technology, Inc. | M+N bit programming and M+L bit read for M bit memory cells |
KR101368694B1 (en) * | 2008-01-22 | 2014-03-03 | 삼성전자주식회사 | Apparatus and method of memory programming |
JP5562329B2 (en) * | 2008-07-01 | 2014-07-30 | エルエスアイ コーポレーション | Method and apparatus for interfacing between a flash memory controller and a flash memory array |
US7983078B2 (en) * | 2008-09-24 | 2011-07-19 | Sandisk Technologies Inc. | Data retention of last word line of non-volatile memory arrays |
KR20100093885A (en) | 2009-02-17 | 2010-08-26 | 삼성전자주식회사 | Nonvolatile memory device, operating method thereof and memory system including the same |
KR101212387B1 (en) | 2011-01-03 | 2012-12-13 | 에스케이하이닉스 주식회사 | Method of reading a semiconductor memory device |
US10910061B2 (en) * | 2018-03-14 | 2021-02-02 | Silicon Storage Technology, Inc. | Method and apparatus for programming analog neural memory in a deep learning artificial neural network |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6542407B1 (en) * | 2002-01-18 | 2003-04-01 | Sandisk Corporation | Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells |
JP3913704B2 (en) * | 2003-04-22 | 2007-05-09 | 株式会社東芝 | Nonvolatile semiconductor memory device and electronic device using the same |
US7372730B2 (en) * | 2004-01-26 | 2008-05-13 | Sandisk Corporation | Method of reading NAND memory to compensate for coupling between storage elements |
-
2006
- 2006-11-08 JP JP2008540159A patent/JP4938020B2/en not_active Expired - Fee Related
- 2006-11-08 EP EP06827629A patent/EP1946325A1/en not_active Withdrawn
- 2006-11-08 KR KR1020087013971A patent/KR101016432B1/en active IP Right Grant
- 2006-11-08 WO PCT/US2006/043483 patent/WO2007058846A1/en active Application Filing
- 2006-11-09 TW TW95141514A patent/TWI315068B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP1946325A1 (en) | 2008-07-23 |
KR101016432B1 (en) | 2011-02-21 |
JP4938020B2 (en) | 2012-05-23 |
KR20080080529A (en) | 2008-09-04 |
JP2009516318A (en) | 2009-04-16 |
TWI315068B (en) | 2009-09-21 |
WO2007058846A1 (en) | 2007-05-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |