ATE478386T1 - Multimedia-kartenschnittstellenverfahren, computerprogrammprodukt und vorrichtung - Google Patents

Multimedia-kartenschnittstellenverfahren, computerprogrammprodukt und vorrichtung

Info

Publication number
ATE478386T1
ATE478386T1 AT05799469T AT05799469T ATE478386T1 AT E478386 T1 ATE478386 T1 AT E478386T1 AT 05799469 T AT05799469 T AT 05799469T AT 05799469 T AT05799469 T AT 05799469T AT E478386 T1 ATE478386 T1 AT E478386T1
Authority
AT
Austria
Prior art keywords
unit
status signal
computer program
program product
card interface
Prior art date
Application number
AT05799469T
Other languages
English (en)
Inventor
Kimmo Mylly
Jani Hyvonen
Original Assignee
Nokia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=36385977&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE478386(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Nokia Corp filed Critical Nokia Corp
Application granted granted Critical
Publication of ATE478386T1 publication Critical patent/ATE478386T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1063—Control signal output circuits, e.g. status or busy flags, feedback command signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Read Only Memory (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Stored Programmes (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
AT05799469T 2004-11-17 2005-11-03 Multimedia-kartenschnittstellenverfahren, computerprogrammprodukt und vorrichtung ATE478386T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US62909804P 2004-11-17 2004-11-17
US11/250,711 US7565469B2 (en) 2004-11-17 2005-10-14 Multimedia card interface method, computer program product and apparatus
PCT/IB2005/003279 WO2006054136A1 (en) 2004-11-17 2005-11-03 Multimedia card interface method, computer program product and apparatus

Publications (1)

Publication Number Publication Date
ATE478386T1 true ATE478386T1 (de) 2010-09-15

Family

ID=36385977

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05799469T ATE478386T1 (de) 2004-11-17 2005-11-03 Multimedia-kartenschnittstellenverfahren, computerprogrammprodukt und vorrichtung

Country Status (13)

Country Link
US (1) US7565469B2 (de)
EP (1) EP1820110B1 (de)
JP (1) JP4739349B2 (de)
KR (1) KR100919159B1 (de)
AT (1) ATE478386T1 (de)
AU (1) AU2005305564B2 (de)
BR (1) BRPI0519042A2 (de)
CA (2) CA2723056C (de)
DE (1) DE602005023049D1 (de)
HK (1) HK1110971A1 (de)
MX (1) MX2007005812A (de)
RU (1) RU2416819C2 (de)
WO (1) WO2006054136A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7565469B2 (en) * 2004-11-17 2009-07-21 Nokia Corporation Multimedia card interface method, computer program product and apparatus
US20080082750A1 (en) * 2006-09-28 2008-04-03 Okin Kenneth A Methods of communicating to, memory modules in a memory channel
KR100966374B1 (ko) 2007-08-27 2010-07-01 삼성엘이디 주식회사 백색 ｌｅｄ를 이용한 면광원 및 이를 구비한 ｌｃｄ백라이트 유닛
JP2009086988A (ja) * 2007-09-28 2009-04-23 Toshiba Corp メモリカード
US8200864B1 (en) * 2010-03-02 2012-06-12 Amazon Technologies, Inc. Pre-defined multiblock transfers
US8843692B2 (en) * 2010-04-27 2014-09-23 Conversant Intellectual Property Management Inc. System of interconnected nonvolatile memories having automatic status packet
US9552206B2 (en) * 2010-11-18 2017-01-24 Texas Instruments Incorporated Integrated circuit with control node circuitry and processing circuitry
US10122889B1 (en) 2017-05-08 2018-11-06 Bank Of America Corporation Device for generating a resource distribution document with physical authentication markers
TWI714487B (zh) * 2017-12-28 2020-12-21 慧榮科技股份有限公司 記憶卡控制器以及使用於記憶卡控制器的方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3134819B2 (ja) 1997-06-04 2001-02-13 ソニー株式会社 データ処理装置
US7003593B2 (en) 1997-12-17 2006-02-21 Src Computers, Inc. Computer system architecture and memory controller for close-coupling within a hybrid processing system utilizing an adaptive processor interface port
US6279114B1 (en) * 1998-11-04 2001-08-21 Sandisk Corporation Voltage negotiation in a single host multiple cards system
EP1073006A1 (de) * 1999-07-26 2001-01-31 Molex Incorporated Chipkartenauswerfvorrichtung
US7243185B2 (en) * 2004-04-05 2007-07-10 Super Talent Electronics, Inc. Flash memory system with a high-speed flash controller
JP3815936B2 (ja) * 2000-01-25 2006-08-30 株式会社ルネサステクノロジ Ｉｃカード
JP3865629B2 (ja) * 2001-07-09 2007-01-10 株式会社ルネサステクノロジ 記憶装置
JP4185680B2 (ja) * 2001-07-09 2008-11-26 株式会社ルネサステクノロジ 記憶装置
KR100893428B1 (ko) 2001-07-25 2009-04-17 소니 가부시끼 가이샤 인터페이스 장치
JP3839288B2 (ja) 2001-09-12 2006-11-01 株式会社ルネサステクノロジ メモリカード
GB0123416D0 (en) * 2001-09-28 2001-11-21 Memquest Ltd Non-volatile memory control
JP2003242470A (ja) * 2002-02-21 2003-08-29 Sony Corp 外部接続機器及びホスト機器
US20040064612A1 (en) * 2002-09-26 2004-04-01 Sandisk Corporation Method and system for using a memory card protocol inside a bus protocol
US6917992B2 (en) * 2002-09-30 2005-07-12 Intel Corporation Method and apparatus for efficient command queuing within a serial ATA environment
CN100428210C (zh) 2002-10-16 2008-10-22 松下电器产业株式会社 集成电路卡、数据传送装置以及数据传送方法
US6977656B1 (en) * 2003-07-28 2005-12-20 Neomagic Corp. Two-layer display-refresh and video-overlay arbitration of both DRAM and SRAM memories
US8429313B2 (en) * 2004-05-27 2013-04-23 Sandisk Technologies Inc. Configurable ready/busy control
US7466588B2 (en) * 2004-10-07 2008-12-16 Nokia Corporation Method for improving programming speed in memory devices
US7565469B2 (en) * 2004-11-17 2009-07-21 Nokia Corporation Multimedia card interface method, computer program product and apparatus

Also Published As

Publication number Publication date
KR20070086197A (ko) 2007-08-27
US7565469B2 (en) 2009-07-21
CA2587681C (en) 2012-01-10
RU2007119309A (ru) 2008-12-27
CA2723056A1 (en) 2006-05-26
MX2007005812A (es) 2007-07-20
EP1820110A1 (de) 2007-08-22
JP4739349B2 (ja) 2011-08-03
EP1820110B1 (de) 2010-08-18
HK1110971A1 (en) 2008-07-25
RU2416819C2 (ru) 2011-04-20
CA2587681A1 (en) 2006-05-26
BRPI0519042A2 (pt) 2008-12-23
US20060103948A1 (en) 2006-05-18
WO2006054136A8 (en) 2007-08-02
AU2005305564A1 (en) 2006-05-26
JP2008521080A (ja) 2008-06-19
AU2005305564B2 (en) 2010-07-15
CA2723056C (en) 2014-01-07
DE602005023049D1 (de) 2010-09-30
WO2006054136A1 (en) 2006-05-26
KR100919159B1 (ko) 2009-09-28

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Legal Events

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