ATE362139T1 - Gatterprozessor - Google Patents
GatterprozessorInfo
- Publication number
- ATE362139T1 ATE362139T1 AT03765145T AT03765145T ATE362139T1 AT E362139 T1 ATE362139 T1 AT E362139T1 AT 03765145 T AT03765145 T AT 03765145T AT 03765145 T AT03765145 T AT 03765145T AT E362139 T1 ATE362139 T1 AT E362139T1
- Authority
- AT
- Austria
- Prior art keywords
- array
- spare
- gate processor
- row
- elements
- Prior art date
Links
- 230000007547 defect Effects 0.000 abstract 1
- 230000002950 deficient Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2051—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant in regular structures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8023—Two dimensional arrays, e.g. mesh, torus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2038—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2041—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with more than one idle spare processing component
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Exchange Systems With Centralized Control (AREA)
- Eye Examination Apparatus (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0216880A GB2391083B (en) | 2002-07-19 | 2002-07-19 | Processor array |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE362139T1 true ATE362139T1 (de) | 2007-06-15 |
Family
ID=9940825
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT03765145T ATE362139T1 (de) | 2002-07-19 | 2003-06-27 | Gatterprozessor |
Country Status (11)
Country | Link |
---|---|
US (1) | US7549081B2 (de) |
EP (1) | EP1535192B1 (de) |
JP (1) | JP4467430B2 (de) |
CN (1) | CN100416545C (de) |
AT (1) | ATE362139T1 (de) |
AU (1) | AU2003250383A1 (de) |
DE (1) | DE60313781T2 (de) |
ES (1) | ES2285191T3 (de) |
GB (2) | GB2417586B (de) |
TW (1) | TWI314682B (de) |
WO (1) | WO2004010321A2 (de) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2370380B (en) | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
CN1310133C (zh) * | 2004-08-04 | 2007-04-11 | 联合信源数字音视频技术(北京)有限公司 | 一种视频图象象素插值装置 |
GB2454865B (en) | 2007-11-05 | 2012-06-13 | Picochip Designs Ltd | Power control |
GB2457309A (en) | 2008-02-11 | 2009-08-12 | Picochip Designs Ltd | Process allocation in a processor array using a simulated annealing method |
GB2457310B (en) * | 2008-02-11 | 2012-03-21 | Picochip Designs Ltd | Signal routing in processor arrays |
WO2009145916A1 (en) * | 2008-05-30 | 2009-12-03 | Advanced Micro Devices, Inc. | Redundancy methods and apparatus for shader column repair |
US20090309896A1 (en) | 2008-05-30 | 2009-12-17 | Advanced Micro Devices, Inc. | Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache |
GB2466661B (en) * | 2009-01-05 | 2014-11-26 | Intel Corp | Rake receiver |
GB2470037B (en) | 2009-05-07 | 2013-07-10 | Picochip Designs Ltd | Methods and devices for reducing interference in an uplink |
GB2470771B (en) | 2009-06-05 | 2012-07-18 | Picochip Designs Ltd | A method and device in a communication network |
GB2470891B (en) | 2009-06-05 | 2013-11-27 | Picochip Designs Ltd | A method and device in a communication network |
GB2474071B (en) | 2009-10-05 | 2013-08-07 | Picochip Designs Ltd | Femtocell base station |
GB2482869B (en) | 2010-08-16 | 2013-11-06 | Picochip Designs Ltd | Femtocell access control |
US8688957B2 (en) * | 2010-12-21 | 2014-04-01 | Intel Corporation | Mechanism for conflict detection using SIMD |
GB2489716B (en) | 2011-04-05 | 2015-06-24 | Intel Corp | Multimode base system |
GB2489919B (en) | 2011-04-05 | 2018-02-14 | Intel Corp | Filter |
GB2491098B (en) | 2011-05-16 | 2015-05-20 | Intel Corp | Accessing a base station |
JP2014016894A (ja) * | 2012-07-10 | 2014-01-30 | Renesas Electronics Corp | 並列演算装置、並列演算装置を備えたデータ処理システム、及び、データ処理プログラム |
US8990616B2 (en) * | 2012-09-28 | 2015-03-24 | International Business Machines Corporation | Final faulty core recovery mechanisms for a two-dimensional network on a processor array |
US9160617B2 (en) | 2012-09-28 | 2015-10-13 | International Business Machines Corporation | Faulty core recovery mechanisms for a three-dimensional network on a processor array |
US9411584B2 (en) | 2012-12-29 | 2016-08-09 | Intel Corporation | Methods, apparatus, instructions, and logic to provide vector address conflict detection functionality |
US9411592B2 (en) | 2012-12-29 | 2016-08-09 | Intel Corporation | Vector address conflict resolution with vector population count functionality |
US20140244218A1 (en) * | 2013-02-25 | 2014-08-28 | International Business Machines Corporation | Architecture optimization |
TWI490784B (zh) * | 2013-05-16 | 2015-07-01 | Wistron Neweb Corp | 功能模組管理方法及電子系統 |
US10552740B2 (en) | 2014-11-10 | 2020-02-04 | International Business Machines Corporation | Fault-tolerant power-driven synthesis |
CN107547451B (zh) * | 2017-05-31 | 2020-04-03 | 新华三信息技术有限公司 | 一种多路服务器、cpu连接方法及装置 |
JP6926708B2 (ja) * | 2017-06-14 | 2021-08-25 | 住友電気工業株式会社 | 車載通信システム、スイッチ装置、通信制御方法および通信制御プログラム |
KR20200047551A (ko) | 2017-07-30 | 2020-05-07 | 뉴로블레이드, 리미티드. | 메모리 기반 분산 프로세서 아키텍처 |
US12067472B2 (en) | 2018-03-30 | 2024-08-20 | International Business Machines Corporation | Defect resistant designs for location-sensitive neural network processor arrays |
US10691632B1 (en) * | 2019-03-14 | 2020-06-23 | DeGirum Corporation | Permutated ring network interconnected computing architecture |
CN112820202B (zh) * | 2019-10-30 | 2023-03-28 | 海信视像科技股份有限公司 | 一种显示装置及其显示方法 |
US20230237011A1 (en) * | 2022-01-21 | 2023-07-27 | Nvidia Corporation | Mapping logical and physical processors and logical and physical memory |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US174318A (en) * | 1876-02-29 | Improvement in safety hoisting apparatus | ||
US4389715A (en) * | 1980-10-06 | 1983-06-21 | Inmos Corporation | Redundancy scheme for a dynamic RAM |
JPS58137192A (ja) * | 1981-12-29 | 1983-08-15 | Fujitsu Ltd | 半導体記憶装置 |
GB2129585B (en) * | 1982-10-29 | 1986-03-05 | Inmos Ltd | Memory system including a faulty rom array |
DE3681463D1 (de) * | 1985-01-29 | 1991-10-24 | Secr Defence Brit | Verarbeitungszelle fuer fehlertolerante matrixanordnungen. |
GB8612454D0 (en) * | 1986-05-22 | 1986-07-02 | Inmos Ltd | Redundancy scheme for multi-stage apparatus |
US5253308A (en) * | 1989-06-21 | 1993-10-12 | Amber Engineering, Inc. | Massively parallel digital image data processor using pixel-mapped input/output and relative indexed addressing |
HU900629D0 (en) * | 1990-02-01 | 1990-04-28 | Cellware Mikroelektronikai Kut | Cicuit arrangement for inhomogen operating processors with homogen structure and cellular building |
US6408402B1 (en) * | 1994-03-22 | 2002-06-18 | Hyperchip Inc. | Efficient direct replacement cell fault tolerant architecture |
JP3345626B2 (ja) * | 1994-09-29 | 2002-11-18 | 富士通株式会社 | マルチプロセッサシステムにおけるプロセッサ異常対策装置およびマルチプロセッサシステムにおけるプロセッサ異常対策方法 |
US5795797A (en) * | 1995-08-18 | 1998-08-18 | Teradyne, Inc. | Method of making memory chips using memory tester providing fast repair |
DE19907567B4 (de) * | 1999-02-22 | 2007-08-09 | Forschungszentrum Jülich GmbH | Verfahren zur mikrobiellen Herstellung von L-Valin |
GB2348976A (en) * | 1999-04-09 | 2000-10-18 | Pixelfusion Ltd | Single instruction multiple data array |
EP1181648A1 (de) * | 1999-04-09 | 2002-02-27 | Clearspeed Technology Limited | Paralleldatenverarbeitungsvorrichtung |
FR2795839B1 (fr) * | 1999-07-02 | 2001-09-07 | Commissariat Energie Atomique | Procede de reconfiguration applicable a un reseau d'elements fonctionnels identiques |
US6681341B1 (en) * | 1999-11-03 | 2004-01-20 | Cisco Technology, Inc. | Processor isolation method for integrated multi-processor systems |
GB2370380B (en) * | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
-
2002
- 2002-07-19 GB GB0520346A patent/GB2417586B/en not_active Expired - Fee Related
- 2002-07-19 GB GB0216880A patent/GB2391083B/en not_active Expired - Fee Related
-
2003
- 2003-06-27 EP EP03765145A patent/EP1535192B1/de not_active Expired - Lifetime
- 2003-06-27 JP JP2004522285A patent/JP4467430B2/ja not_active Expired - Fee Related
- 2003-06-27 ES ES03765145T patent/ES2285191T3/es not_active Expired - Lifetime
- 2003-06-27 AU AU2003250383A patent/AU2003250383A1/en not_active Abandoned
- 2003-06-27 CN CNB038198207A patent/CN100416545C/zh not_active Expired - Lifetime
- 2003-06-27 WO PCT/GB2003/002772 patent/WO2004010321A2/en active IP Right Grant
- 2003-06-27 AT AT03765145T patent/ATE362139T1/de not_active IP Right Cessation
- 2003-06-27 US US10/521,889 patent/US7549081B2/en active Active
- 2003-06-27 DE DE60313781T patent/DE60313781T2/de not_active Expired - Lifetime
- 2003-07-10 TW TW092118854A patent/TWI314682B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
GB0216880D0 (en) | 2002-08-28 |
US7549081B2 (en) | 2009-06-16 |
JP2005534091A (ja) | 2005-11-10 |
EP1535192A2 (de) | 2005-06-01 |
GB2417586A (en) | 2006-03-01 |
DE60313781T2 (de) | 2008-01-24 |
ES2285191T3 (es) | 2007-11-16 |
CN100416545C (zh) | 2008-09-03 |
DE60313781D1 (de) | 2007-06-21 |
TW200417853A (en) | 2004-09-16 |
GB2391083B (en) | 2006-03-01 |
US20050257105A1 (en) | 2005-11-17 |
WO2004010321A2 (en) | 2004-01-29 |
EP1535192B1 (de) | 2007-05-09 |
GB2391083A (en) | 2004-01-28 |
WO2004010321A3 (en) | 2005-03-31 |
TWI314682B (en) | 2009-09-11 |
CN1675633A (zh) | 2005-09-28 |
GB2417586B (en) | 2007-03-28 |
JP4467430B2 (ja) | 2010-05-26 |
GB0520346D0 (en) | 2005-11-16 |
AU2003250383A1 (en) | 2004-02-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |