ATE372542T1 - Zugriff zum breiten speicher - Google Patents

Zugriff zum breiten speicher

Info

Publication number
ATE372542T1
ATE372542T1 AT03717500T AT03717500T ATE372542T1 AT E372542 T1 ATE372542 T1 AT E372542T1 AT 03717500 T AT03717500 T AT 03717500T AT 03717500 T AT03717500 T AT 03717500T AT E372542 T1 ATE372542 T1 AT E372542T1
Authority
AT
Austria
Prior art keywords
data
size
memory
access
processor
Prior art date
Application number
AT03717500T
Other languages
English (en)
Inventor
Berkel Cornelis Van
Patrick Meuwissen
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE372542T1 publication Critical patent/ATE372542T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8061—Details on data memory access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Complex Calculations (AREA)
  • Saccharide Compounds (AREA)
  • Static Random-Access Memory (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
  • Image Input (AREA)
AT03717500T 2002-05-24 2003-05-07 Zugriff zum breiten speicher ATE372542T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP02077034 2002-05-24
EP02078618 2002-09-04

Publications (1)

Publication Number Publication Date
ATE372542T1 true ATE372542T1 (de) 2007-09-15

Family

ID=29585702

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03717500T ATE372542T1 (de) 2002-05-24 2003-05-07 Zugriff zum breiten speicher

Country Status (9)

Country Link
US (1) US7430631B2 (de)
EP (1) EP1512068B1 (de)
JP (1) JP2005527035A (de)
CN (1) CN1656445B (de)
AT (1) ATE372542T1 (de)
AU (1) AU2003222411A1 (de)
DE (1) DE60316151T2 (de)
TW (1) TWI291096B (de)
WO (1) WO2003100599A2 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7725745B2 (en) * 2006-12-19 2010-05-25 Intel Corporation Power aware software pipelining for hardware accelerators
ATE523840T1 (de) 2007-04-16 2011-09-15 St Ericsson Sa Verfahren zum speichern von daten, verfahren zum laden von daten und signalprozessor
US20090198910A1 (en) * 2008-02-01 2009-08-06 Arimilli Ravi K Data processing system, processor and method that support a touch of a partial cache line of data
US8266381B2 (en) * 2008-02-01 2012-09-11 International Business Machines Corporation Varying an amount of data retrieved from memory based upon an instruction hint
US8255635B2 (en) * 2008-02-01 2012-08-28 International Business Machines Corporation Claiming coherency ownership of a partial cache line of data
US8140771B2 (en) * 2008-02-01 2012-03-20 International Business Machines Corporation Partial cache line storage-modifying operation based upon a hint
US8250307B2 (en) * 2008-02-01 2012-08-21 International Business Machines Corporation Sourcing differing amounts of prefetch data in response to data prefetch requests
US7958309B2 (en) 2008-02-01 2011-06-07 International Business Machines Corporation Dynamic selection of a memory access size
US8024527B2 (en) * 2008-02-01 2011-09-20 International Business Machines Corporation Partial cache line accesses based on memory access patterns
US8117401B2 (en) 2008-02-01 2012-02-14 International Business Machines Corporation Interconnect operation indicating acceptability of partial data delivery
US8108619B2 (en) * 2008-02-01 2012-01-31 International Business Machines Corporation Cache management for partial cache line operations
US8035537B2 (en) * 2008-06-13 2011-10-11 Lsi Corporation Methods and apparatus for programmable decoding of a plurality of code types
US7895381B2 (en) * 2009-02-16 2011-02-22 Himax Media Solutions, Inc. Data accessing system
US8117390B2 (en) * 2009-04-15 2012-02-14 International Business Machines Corporation Updating partial cache lines in a data processing system
US8140759B2 (en) * 2009-04-16 2012-03-20 International Business Machines Corporation Specifying an access hint for prefetching partial cache block data in a cache hierarchy
US8176254B2 (en) * 2009-04-16 2012-05-08 International Business Machines Corporation Specifying an access hint for prefetching limited use data in a cache hierarchy
CN101986287B (zh) * 2010-11-25 2012-10-17 中国人民解放军国防科学技术大学 用于向量数据流的重整理缓冲器
US8688957B2 (en) * 2010-12-21 2014-04-01 Intel Corporation Mechanism for conflict detection using SIMD
US9727526B2 (en) * 2011-01-25 2017-08-08 Nxp Usa, Inc. Apparatus and method of vector unit sharing
US10037205B2 (en) * 2011-12-23 2018-07-31 Intel Corporation Instruction and logic to provide vector blend and permute functionality
US9342479B2 (en) 2012-08-23 2016-05-17 Qualcomm Incorporated Systems and methods of data extraction in a vector processor
US9411592B2 (en) 2012-12-29 2016-08-09 Intel Corporation Vector address conflict resolution with vector population count functionality
US9411584B2 (en) 2012-12-29 2016-08-09 Intel Corporation Methods, apparatus, instructions, and logic to provide vector address conflict detection functionality
US9424034B2 (en) * 2013-06-28 2016-08-23 Intel Corporation Multiple register memory access instructions, processors, methods, and systems
CN104679584B (zh) * 2013-11-28 2017-10-24 中国航空工业集团公司第六三一研究所 矢量上下文切换方法
EP3193254A4 (de) * 2014-10-09 2017-10-11 Huawei Technologies Co. Ltd. Vorrichtung und verfahren für asynchrone befehlsausführung
CN105337995B (zh) * 2015-11-29 2019-06-21 恒宝股份有限公司 一种智能卡快速个人化方法及系统

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4949247A (en) * 1988-02-23 1990-08-14 Stellar Computer, Inc. System for transferring multiple vector data elements to and from vector memory in a single operation
US5379393A (en) * 1992-05-14 1995-01-03 The Board Of Governors For Higher Education, State Of Rhode Island And Providence Plantations Cache memory system for vector processing
US5426754A (en) * 1992-05-26 1995-06-20 International Business Machines Corporation Cross-interrogate method and means for combined scaler and vector processing system
US5537606A (en) * 1995-01-31 1996-07-16 International Business Machines Corporation Scalar pipeline replication for parallel vector element processing
US5689653A (en) * 1995-02-06 1997-11-18 Hewlett-Packard Company Vector memory operations
US6006315A (en) * 1996-10-18 1999-12-21 Samsung Electronics Co., Ltd. Computer methods for writing a scalar value to a vector
US5928350A (en) * 1997-04-11 1999-07-27 Raytheon Company Wide memory architecture vector processor using nxP bits wide memory bus for transferring P n-bit vector operands in one cycle

Also Published As

Publication number Publication date
WO2003100599A2 (en) 2003-12-04
DE60316151D1 (de) 2007-10-18
DE60316151T2 (de) 2009-10-22
WO2003100599A3 (en) 2004-07-22
TWI291096B (en) 2007-12-11
CN1656445B (zh) 2010-05-05
EP1512068A2 (de) 2005-03-09
EP1512068B1 (de) 2007-09-05
US7430631B2 (en) 2008-09-30
AU2003222411A8 (en) 2003-12-12
US20050240729A1 (en) 2005-10-27
AU2003222411A1 (en) 2003-12-12
TW200407705A (en) 2004-05-16
CN1656445A (zh) 2005-08-17
JP2005527035A (ja) 2005-09-08

Similar Documents

Publication Publication Date Title
ATE372542T1 (de) Zugriff zum breiten speicher
WO2006015868A3 (en) Global memory system for a data processor comprising a plurality of processing elements
SE7704963L (sv) Nyckelregisterstyrt accessystem
TW200508860A (en) Systems and methods for storing data on computer systems
WO2005029369A3 (en) Data profiling
GB2432943A (en) Data transfer into a processor cache using a DMA controller in the processor
DE60008088D1 (de) Mehrprozessorsystem Prüfungsschaltung
WO2006082091A8 (en) Low latency massive parallel data processing device
NO870415D0 (no) Datamaskinsystem.
JP2006505046A5 (de)
EP1271542A3 (de) Verfahren und System zum schnellen Datenzugriff in einer Speichertabelle
TW200500620A (en) Connecting multiple test access port controllers on a single integrated circuit through a single test access port
DE602005021374D1 (de) Verbindungen in simd-prozessorarchitekturen
EP1313025A3 (de) DMA-Übertragung von Daten und Prüfinformation zu und von einem Datenspeicherungsgerät
WO2003041119A3 (en) Improved architecture with shared memory
GB0327571D0 (en) A memory dump of a computer system
AU2003223437A1 (en) Method and apparatus to permit external access to internal configuration registers
WO2007078552A3 (en) Computer architecture for providing physical separation of computing processes
GB2382674B (en) Data access in a processor
ATE373267T1 (de) Geänderter harvard-architektur prozessor, mit program-speicher eingemapptem daten-speicher und schutz vor der fehlerhaften durchführung
EP1387274A3 (de) Speicherverwaltung für lokale Variablen
TW200506603A (en) Memory management in a data processing system
DE50210759D1 (de) Prozessor mit interner speicherkonfiguration und anordnung mit diesem prozessor
ATE443887T1 (de) Datenverarbeitungssystem mit mehreren registerbänke
WO2004051498A3 (en) A simd processor with multi-port memory unit

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties