ATE333138T1 - Vorrichtung und verfahren zum beschreiben eines kippspeichers - Google Patents

Vorrichtung und verfahren zum beschreiben eines kippspeichers

Info

Publication number
ATE333138T1
ATE333138T1 AT03724302T AT03724302T ATE333138T1 AT E333138 T1 ATE333138 T1 AT E333138T1 AT 03724302 T AT03724302 T AT 03724302T AT 03724302 T AT03724302 T AT 03724302T AT E333138 T1 ATE333138 T1 AT E333138T1
Authority
AT
Austria
Prior art keywords
cell
state
write
flipped
written
Prior art date
Application number
AT03724302T
Other languages
German (de)
English (en)
Inventor
Joseph J Nahas
Thomas W Andre
Chitra K Subramanian
Bradley J Garni
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Application granted granted Critical
Publication of ATE333138T1 publication Critical patent/ATE333138T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1675—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1653—Address circuits or decoders
    • G11C11/1655—Bit-line or column circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1653—Address circuits or decoders
    • G11C11/1657—Word-line or row circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2263—Write conditionally, e.g. only if new data and old data differ

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
  • Hall/Mr Elements (AREA)
  • Digital Magnetic Recording (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
AT03724302T 2002-06-28 2003-04-29 Vorrichtung und verfahren zum beschreiben eines kippspeichers ATE333138T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/186,141 US6693824B2 (en) 2002-06-28 2002-06-28 Circuit and method of writing a toggle memory

Publications (1)

Publication Number Publication Date
ATE333138T1 true ATE333138T1 (de) 2006-08-15

Family

ID=29779824

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03724302T ATE333138T1 (de) 2002-06-28 2003-04-29 Vorrichtung und verfahren zum beschreiben eines kippspeichers

Country Status (10)

Country Link
US (1) US6693824B2 (enExample)
EP (1) EP1518246B1 (enExample)
JP (1) JP4359561B2 (enExample)
KR (1) KR100943112B1 (enExample)
CN (1) CN100470665C (enExample)
AT (1) ATE333138T1 (enExample)
AU (1) AU2003231170A1 (enExample)
DE (1) DE60306782T2 (enExample)
TW (1) TWI307887B (enExample)
WO (1) WO2004003922A1 (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6842365B1 (en) * 2003-09-05 2005-01-11 Freescale Semiconductor, Inc. Write driver for a magnetoresistive memory
US7286378B2 (en) * 2003-11-04 2007-10-23 Micron Technology, Inc. Serial transistor-cell array architecture
US7613868B2 (en) * 2004-06-09 2009-11-03 Headway Technologies, Inc. Method and system for optimizing the number of word line segments in a segmented MRAM array
JP2006031795A (ja) * 2004-07-14 2006-02-02 Renesas Technology Corp 不揮発性半導体記憶装置
JP2006065986A (ja) * 2004-08-27 2006-03-09 Fujitsu Ltd 磁気抵抗メモリおよび磁気抵抗メモリ書き込み方法
JP4012196B2 (ja) * 2004-12-22 2007-11-21 株式会社東芝 磁気ランダムアクセスメモリのデータ書き込み方法
US7543211B2 (en) * 2005-01-31 2009-06-02 Everspin Technologies, Inc. Toggle memory burst
JP4911027B2 (ja) * 2005-02-09 2012-04-04 日本電気株式会社 トグル型磁気ランダムアクセスメモリ及びトグル型磁気ランダムアクセスメモリの書き込み方法
JP5035620B2 (ja) * 2005-09-14 2012-09-26 日本電気株式会社 磁気ランダムアクセスメモリの波形整形回路
WO2007053517A2 (en) * 2005-10-28 2007-05-10 The University Of Alabama Enhanced toggle-mram memory device
US7577017B2 (en) * 2006-01-20 2009-08-18 Industrial Technology Research Institute High-bandwidth magnetoresistive random access memory devices and methods of operation thereof
US7746686B2 (en) * 2006-04-21 2010-06-29 Honeywell International Inc. Partitioned random access and read only memory
US8111544B2 (en) * 2009-02-23 2012-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Programming MRAM cells using probability write
US9613675B2 (en) 2013-12-14 2017-04-04 Qualcomm Incorporated System and method to perform low power memory operations
RU2673977C2 (ru) * 2014-08-29 2018-12-03 Сименс Акциенгезелльшафт Проточная часть компрессора с регулируемым сужением, предназначенная для газотурбинного двигателя
CN204878059U (zh) 2014-12-17 2015-12-16 依必安-派特穆尔芬根股份有限两合公司 一种叶片及风机叶轮
KR101976045B1 (ko) * 2016-08-30 2019-05-09 에스케이하이닉스 주식회사 쓰기 동작시 상태 전환 인식이 가능한 자기 저항 메모리 장치 및 이에 있어서 읽기 및 쓰기 동작 방법
JP6625278B1 (ja) * 2018-11-22 2019-12-25 三菱電機株式会社 入出力制御ユニット、ｐｌｃ及びデータ制御方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4763305A (en) 1985-11-27 1988-08-09 Motorola, Inc. Intelligent write in an EEPROM with data and erase check
US6256224B1 (en) * 2000-05-03 2001-07-03 Hewlett-Packard Co Write circuit for large MRAM arrays
US5946227A (en) 1998-07-20 1999-08-31 Motorola, Inc. Magnetoresistive random access memory with shared word and digit lines
US5953248A (en) 1998-07-20 1999-09-14 Motorola, Inc. Low switching field magnetic tunneling junction for high density arrays
US6111781A (en) 1998-08-03 2000-08-29 Motorola, Inc. Magnetic random access memory array divided into a plurality of memory banks
DE19853447A1 (de) * 1998-11-19 2000-05-25 Siemens Ag Magnetischer Speicher
WO2000042614A1 (de) * 1999-01-13 2000-07-20 Infineon Technologies Ag Schreib-/lesearchitektur für mram
US6185143B1 (en) 2000-02-04 2001-02-06 Hewlett-Packard Company Magnetic random access memory (MRAM) device including differential sense amplifiers
US6191989B1 (en) 2000-03-07 2001-02-20 International Business Machines Corporation Current sensing amplifier
US6272041B1 (en) 2000-08-28 2001-08-07 Motorola, Inc. MTJ MRAM parallel-parallel architecture
JP4149647B2 (ja) * 2000-09-28 2008-09-10 株式会社東芝 半導体記憶装置及びその製造方法
US6335890B1 (en) 2000-11-01 2002-01-01 International Business Machines Corporation Segmented write line architecture for writing magnetic random access memories
US6418046B1 (en) * 2001-01-30 2002-07-09 Motorola, Inc. MRAM architecture and system
DE10107380C1 (de) * 2001-02-16 2002-07-25 Infineon Technologies Ag Verfahren zum Beschreiben magnetoresistiver Speicherzellen und mit diesem Verfahren beschreibbarer magnetoresistiver Speicher

Also Published As

Publication number Publication date
US20040001352A1 (en) 2004-01-01
KR20050009762A (ko) 2005-01-25
CN1666292A (zh) 2005-09-07
WO2004003922A1 (en) 2004-01-08
EP1518246B1 (en) 2006-07-12
JP2005531876A (ja) 2005-10-20
EP1518246A1 (en) 2005-03-30
JP4359561B2 (ja) 2009-11-04
CN100470665C (zh) 2009-03-18
AU2003231170A1 (en) 2004-01-19
TW200409118A (en) 2004-06-01
KR100943112B1 (ko) 2010-02-18
DE60306782D1 (de) 2006-08-24
US6693824B2 (en) 2004-02-17
DE60306782T2 (de) 2006-11-30
TWI307887B (en) 2009-03-21

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