ATE290238T1 - Verfahren und vorrichtung für speicherdata- fehlerdetektion und speichermodul-fehlerdetektion - Google Patents

Verfahren und vorrichtung für speicherdata- fehlerdetektion und speichermodul-fehlerdetektion

Info

Publication number
ATE290238T1
ATE290238T1 AT99966405T AT99966405T ATE290238T1 AT E290238 T1 ATE290238 T1 AT E290238T1 AT 99966405 T AT99966405 T AT 99966405T AT 99966405 T AT99966405 T AT 99966405T AT E290238 T1 ATE290238 T1 AT E290238T1
Authority
AT
Austria
Prior art keywords
memory
error detection
codeword
check code
data
Prior art date
Application number
AT99966405T
Other languages
English (en)
Inventor
Thomas J Holman
Peter D Macwilliams
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE290238T1 publication Critical patent/ATE290238T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1028Adjacent errors, e.g. error in n-bit (n>1) wide storage units, i.e. package error
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1036Unidirectional errors

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
AT99966405T 1998-12-22 1999-12-22 Verfahren und vorrichtung für speicherdata- fehlerdetektion und speichermodul-fehlerdetektion ATE290238T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/217,814 US6519735B1 (en) 1998-12-22 1998-12-22 Method and apparatus for detecting errors in data output from memory and a device failure in the memory
PCT/US1999/030170 WO2000038064A1 (en) 1998-12-22 1999-12-22 A method and apparatus for detecting errors in data output from memory and a device failure in the memory

Publications (1)

Publication Number Publication Date
ATE290238T1 true ATE290238T1 (de) 2005-03-15

Family

ID=22812641

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99966405T ATE290238T1 (de) 1998-12-22 1999-12-22 Verfahren und vorrichtung für speicherdata- fehlerdetektion und speichermodul-fehlerdetektion

Country Status (6)

Country Link
US (1) US6519735B1 (de)
EP (1) EP1141830B1 (de)
AT (1) ATE290238T1 (de)
DE (1) DE69924012T2 (de)
TW (1) TW459175B (de)
WO (1) WO2000038064A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7085971B2 (en) * 2001-10-25 2006-08-01 International Business Machines Corporation ECC based system and method for repairing failed memory elements
US7380167B2 (en) * 2003-02-13 2008-05-27 Dell Products L.P. Method and system for verifying information handling system hardware component failure diagnosis
DE102004030139A1 (de) * 2004-06-22 2006-01-19 Infineon Technologies Ag Verfahren zur Steuerung von Befehlssequenzen und Befehlssteuereinrichtung zur Durchführung des Verfahrens
JP2008165983A (ja) * 2005-02-28 2008-07-17 Toyota Motor Corp 燃料電池状態モニタ装置及び方法
TWI292866B (en) * 2005-09-09 2008-01-21 Via Tech Inc Method for calculatng an error detection code
US7627804B2 (en) * 2006-06-30 2009-12-01 Intel Corporation Memory device with speculative commands to memory core
US7721181B2 (en) * 2007-07-11 2010-05-18 Macronix International Co., Ltd. Memory and 1-bit error checking method thereof
JP2009049642A (ja) * 2007-08-17 2009-03-05 Omron Corp 伝送システム

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4072853A (en) * 1976-09-29 1978-02-07 Honeywell Information Systems Inc. Apparatus and method for storing parity encoded data from a plurality of input/output sources
US4103823A (en) * 1976-12-20 1978-08-01 International Business Machines Corporation Parity checking scheme for detecting word line failure in multiple byte arrays
US4358848A (en) * 1980-11-14 1982-11-09 International Business Machines Corporation Dual function ECC system with block check byte
US4866604A (en) * 1981-10-01 1989-09-12 Stratus Computer, Inc. Digital data processing apparatus with pipelined memory cycles
DE3482509D1 (de) * 1984-12-28 1990-07-19 Ibm Geraet zum korrigieren von fehlern in speichern.
US4964130A (en) * 1988-12-21 1990-10-16 Bull Hn Information Systems Inc. System for determining status of errors in a memory subsystem
US5502732A (en) * 1993-09-20 1996-03-26 International Business Machines Corporation Method for testing ECC logic
JPH09233054A (ja) * 1996-02-27 1997-09-05 Oki Electric Ind Co Ltd 復号装置

Also Published As

Publication number Publication date
DE69924012T2 (de) 2006-05-11
WO2000038064A1 (en) 2000-06-29
DE69924012D1 (de) 2005-04-07
EP1141830A1 (de) 2001-10-10
WO2000038064A9 (en) 2000-12-07
TW459175B (en) 2001-10-11
US6519735B1 (en) 2003-02-11
EP1141830B1 (de) 2005-03-02

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties