ATE229245T1 - Konfigurierbares logisches feld - Google Patents

Konfigurierbares logisches feld

Info

Publication number
ATE229245T1
ATE229245T1 AT97101407T AT97101407T ATE229245T1 AT E229245 T1 ATE229245 T1 AT E229245T1 AT 97101407 T AT97101407 T AT 97101407T AT 97101407 T AT97101407 T AT 97101407T AT E229245 T1 ATE229245 T1 AT E229245T1
Authority
AT
Austria
Prior art keywords
cells
function
array
subsidiary
core cells
Prior art date
Application number
AT97101407T
Other languages
English (en)
Inventor
Gareth James Jones
Gordon Stirling Work
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of ATE229245T1 publication Critical patent/ATE229245T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • H03K19/1736—Controllable logic circuits by wiring, e.g. uncommitted logic arrays in which the wiring can be modified
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H03K19/1774—Structural details of routing resources for global signals, e.g. clock, reset
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H03K19/17744—Structural details of routing resources for input/output signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • H03K19/17796—Structural details for adapting physical parameters for physical disposition of blocks

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
AT97101407T 1993-06-18 1994-06-01 Konfigurierbares logisches feld ATE229245T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB939312674A GB9312674D0 (en) 1993-06-18 1993-06-18 Configurabel logic array
EP94303952A EP0630115B1 (de) 1993-06-18 1994-06-01 Konfigurierbares logisches Feld

Publications (1)

Publication Number Publication Date
ATE229245T1 true ATE229245T1 (de) 2002-12-15

Family

ID=10737437

Family Applications (2)

Application Number Title Priority Date Filing Date
AT97101407T ATE229245T1 (de) 1993-06-18 1994-06-01 Konfigurierbares logisches feld
AT94303952T ATE198685T1 (de) 1993-06-18 1994-06-01 Konfigurierbares logisches feld

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT94303952T ATE198685T1 (de) 1993-06-18 1994-06-01 Konfigurierbares logisches feld

Country Status (12)

Country Link
US (1) US5903165A (de)
EP (2) EP0776093B1 (de)
JP (1) JP3547168B2 (de)
KR (1) KR100340310B1 (de)
AT (2) ATE229245T1 (de)
AU (1) AU685100B2 (de)
CA (1) CA2125307A1 (de)
DE (2) DE69426546T2 (de)
GB (2) GB9312674D0 (de)
RU (1) RU94021641A (de)
SG (2) SG88743A1 (de)
TW (1) TW242192B (de)

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CN1101082C (zh) * 1994-04-14 2003-02-05 Btr公司 用于可编程逻辑电路的结构和互连方案
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US5543732A (en) * 1995-05-17 1996-08-06 Altera Corporation Programmable logic array devices with interconnect lines of various lengths
US5652529A (en) * 1995-06-02 1997-07-29 International Business Machines Corporation Programmable array clock/reset resource
US5631578A (en) * 1995-06-02 1997-05-20 International Business Machines Corporation Programmable array interconnect network
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US5999015A (en) * 1997-02-20 1999-12-07 Altera Corporation Logic region resources for programmable logic devices
US5982195A (en) * 1997-02-20 1999-11-09 Altera Corporation Programmable logic device architectures
US7148722B1 (en) 1997-02-20 2006-12-12 Altera Corporation PCI-compatible programmable logic devices
US6127844A (en) 1997-02-20 2000-10-03 Altera Corporation PCI-compatible programmable logic devices
US5942913A (en) * 1997-03-20 1999-08-24 Xilinx, Inc. FPGA repeatable interconnect structure with bidirectional and unidirectional interconnect lines
US6201410B1 (en) 1997-02-26 2001-03-13 Xilinx, Inc. Wide logic gate implemented in an FPGA configurable logic element
US5914616A (en) * 1997-02-26 1999-06-22 Xilinx, Inc. FPGA repeatable interconnect structure with hierarchical interconnect lines
US5889411A (en) * 1997-02-26 1999-03-30 Xilinx, Inc. FPGA having logic element carry chains capable of generating wide XOR functions
US5963050A (en) 1997-02-26 1999-10-05 Xilinx, Inc. Configurable logic element with fast feedback paths
US6204689B1 (en) 1997-02-26 2001-03-20 Xilinx, Inc. Input/output interconnect circuit for FPGAs
US5920202A (en) * 1997-02-26 1999-07-06 Xilinx, Inc. Configurable logic element with ability to evaluate five and six input functions
US6184710B1 (en) 1997-03-20 2001-02-06 Altera Corporation Programmable logic array devices with enhanced interconnectivity between adjacent logic regions
US6084427A (en) * 1998-05-19 2000-07-04 Altera Corporation Programmable logic devices with enhanced multiplexing capabilities
US6107824A (en) * 1997-10-16 2000-08-22 Altera Corporation Circuitry and methods for internal interconnection of programmable logic devices
US6107825A (en) * 1997-10-16 2000-08-22 Altera Corporation Input/output circuitry for programmable logic devices
US6121790A (en) 1997-10-16 2000-09-19 Altera Corporation Programmable logic device with enhanced multiplexing capabilities in interconnect resources
US6218859B1 (en) * 1998-05-26 2001-04-17 Altera Corporation Programmable logic device having quadrant layout
CN1180667C (zh) * 1998-07-20 2004-12-15 三星电子株式会社 无线电-电子部件
US6353920B1 (en) * 1998-11-17 2002-03-05 Xilinx, Inc. Method for implementing wide gates and tristate buffers using FPGA carry logic
US6215326B1 (en) 1998-11-18 2001-04-10 Altera Corporation Programmable logic device architecture with super-regions having logic regions and a memory region
US6507216B1 (en) 1998-11-18 2003-01-14 Altera Corporation Efficient arrangement of interconnection resources on programmable logic devices
US6191612B1 (en) * 1998-11-19 2001-02-20 Vantis Corporation Enhanced I/O control flexibility for generating control signals
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US6407576B1 (en) 1999-03-04 2002-06-18 Altera Corporation Interconnection and input/output resources for programmable logic integrated circuit devices
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US6657457B1 (en) * 2000-03-15 2003-12-02 Intel Corporation Data transfer on reconfigurable chip
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US6724810B1 (en) 2000-11-17 2004-04-20 Xilinx, Inc. Method and apparatus for de-spreading spread spectrum signals
US6653862B2 (en) 2001-05-06 2003-11-25 Altera Corporation Use of dangling partial lines for interfacing in a PLD
US6605962B2 (en) 2001-05-06 2003-08-12 Altera Corporation PLD architecture for flexible placement of IP function blocks
US6876227B2 (en) * 2002-03-29 2005-04-05 Parama Networks, Inc. Simplifying the layout of printed circuit boards
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JP2003338750A (ja) * 2002-05-20 2003-11-28 Nec Electronics Corp 汎用ロジックセル、これを用いた汎用ロジックセルアレイ、及びこの汎用ロジックセルアレイを用いたａｓｉｃ
US6975139B2 (en) 2004-03-30 2005-12-13 Advantage Logic, Inc. Scalable non-blocking switching network for programmable logic
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US7737751B1 (en) * 2006-08-25 2010-06-15 Altera Corporation Periphery clock distribution network for a programmable logic device
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Also Published As

Publication number Publication date
EP0630115A2 (de) 1994-12-21
JP3547168B2 (ja) 2004-07-28
ATE198685T1 (de) 2001-01-15
JPH0758631A (ja) 1995-03-03
EP0776093B1 (de) 2002-12-04
US5903165A (en) 1999-05-11
CA2125307A1 (en) 1994-12-19
DE69426546T2 (de) 2001-07-12
AU685100B2 (en) 1998-01-15
TW242192B (de) 1995-03-01
DE69426546D1 (de) 2001-02-15
AU6465494A (en) 1994-12-22
RU94021641A (ru) 1996-06-27
SG64300A1 (en) 1999-04-27
GB9410980D0 (en) 1994-07-20
EP0630115A3 (de) 1995-03-22
GB2279168B (en) 1998-01-21
EP0630115B1 (de) 2001-01-10
EP0776093A2 (de) 1997-05-28
DE69431848D1 (de) 2003-01-16
GB9312674D0 (en) 1993-08-04
KR100340310B1 (ko) 2002-11-23
KR950001990A (ko) 1995-01-04
GB2279168A (en) 1994-12-21
DE69431848T2 (de) 2003-05-28
SG88743A1 (en) 2002-05-21
EP0776093A3 (de) 1997-06-18

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