TW242192B - - Google Patents

Info

Publication number
TW242192B
TW242192B TW083105389A TW83105389A TW242192B TW 242192 B TW242192 B TW 242192B TW 083105389 A TW083105389 A TW 083105389A TW 83105389 A TW83105389 A TW 83105389A TW 242192 B TW242192 B TW 242192B
Authority
TW
Taiwan
Prior art keywords
cells
function
array
subsidiary
core cells
Prior art date
Application number
TW083105389A
Other languages
English (en)
Original Assignee
Pilkington Micro Electronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pilkington Micro Electronics filed Critical Pilkington Micro Electronics
Application granted granted Critical
Publication of TW242192B publication Critical patent/TW242192B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733Controllable logic circuits
    • H03K19/1735Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • H03K19/1736Controllable logic circuits by wiring, e.g. uncommitted logic arrays in which the wiring can be modified
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • H03K19/1774Structural details of routing resources for global signals, e.g. clock, reset
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • H03K19/17744Structural details of routing resources for input/output signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • H03K19/17796Structural details for adapting physical parameters for physical disposition of blocks
TW083105389A 1993-06-18 1994-06-15 TW242192B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB939312674A GB9312674D0 (en) 1993-06-18 1993-06-18 Configurabel logic array

Publications (1)

Publication Number Publication Date
TW242192B true TW242192B (zh) 1995-03-01

Family

ID=10737437

Family Applications (1)

Application Number Title Priority Date Filing Date
TW083105389A TW242192B (zh) 1993-06-18 1994-06-15

Country Status (12)

Country Link
US (1) US5903165A (zh)
EP (2) EP0776093B1 (zh)
JP (1) JP3547168B2 (zh)
KR (1) KR100340310B1 (zh)
AT (2) ATE229245T1 (zh)
AU (1) AU685100B2 (zh)
CA (1) CA2125307A1 (zh)
DE (2) DE69431848T2 (zh)
GB (2) GB9312674D0 (zh)
RU (1) RU94021641A (zh)
SG (2) SG88743A1 (zh)
TW (1) TW242192B (zh)

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US6051991A (en) * 1993-08-03 2000-04-18 Btr, Inc. Architecture and interconnect scheme for programmable logic circuits
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EP1162746B1 (en) * 1994-04-14 2005-11-30 Btr, Inc. Architecture and interconnect scheme for programmable logic circuits
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US6624658B2 (en) 1999-02-04 2003-09-23 Advantage Logic, Inc. Method and apparatus for universal program controlled bus architecture
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US6127844A (en) * 1997-02-20 2000-10-03 Altera Corporation PCI-compatible programmable logic devices
US5982195A (en) * 1997-02-20 1999-11-09 Altera Corporation Programmable logic device architectures
US7148722B1 (en) 1997-02-20 2006-12-12 Altera Corporation PCI-compatible programmable logic devices
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US6201410B1 (en) 1997-02-26 2001-03-13 Xilinx, Inc. Wide logic gate implemented in an FPGA configurable logic element
US5889411A (en) * 1997-02-26 1999-03-30 Xilinx, Inc. FPGA having logic element carry chains capable of generating wide XOR functions
US5963050A (en) 1997-02-26 1999-10-05 Xilinx, Inc. Configurable logic element with fast feedback paths
US5914616A (en) * 1997-02-26 1999-06-22 Xilinx, Inc. FPGA repeatable interconnect structure with hierarchical interconnect lines
US6204689B1 (en) 1997-02-26 2001-03-20 Xilinx, Inc. Input/output interconnect circuit for FPGAs
US5942913A (en) * 1997-03-20 1999-08-24 Xilinx, Inc. FPGA repeatable interconnect structure with bidirectional and unidirectional interconnect lines
US6184710B1 (en) 1997-03-20 2001-02-06 Altera Corporation Programmable logic array devices with enhanced interconnectivity between adjacent logic regions
US6084427A (en) 1998-05-19 2000-07-04 Altera Corporation Programmable logic devices with enhanced multiplexing capabilities
US6107825A (en) * 1997-10-16 2000-08-22 Altera Corporation Input/output circuitry for programmable logic devices
US6121790A (en) 1997-10-16 2000-09-19 Altera Corporation Programmable logic device with enhanced multiplexing capabilities in interconnect resources
US6107824A (en) * 1997-10-16 2000-08-22 Altera Corporation Circuitry and methods for internal interconnection of programmable logic devices
US6218859B1 (en) * 1998-05-26 2001-04-17 Altera Corporation Programmable logic device having quadrant layout
EP1061784B1 (en) * 1998-07-20 2006-09-27 Samsung Electronics Co., Ltd. Radio-electronic unit
US6353920B1 (en) * 1998-11-17 2002-03-05 Xilinx, Inc. Method for implementing wide gates and tristate buffers using FPGA carry logic
US6215326B1 (en) 1998-11-18 2001-04-10 Altera Corporation Programmable logic device architecture with super-regions having logic regions and a memory region
US6507216B1 (en) 1998-11-18 2003-01-14 Altera Corporation Efficient arrangement of interconnection resources on programmable logic devices
US6191612B1 (en) * 1998-11-19 2001-02-20 Vantis Corporation Enhanced I/O control flexibility for generating control signals
JP3616518B2 (ja) * 1999-02-10 2005-02-02 日本電気株式会社 プログラマブルデバイス
US6407576B1 (en) 1999-03-04 2002-06-18 Altera Corporation Interconnection and input/output resources for programmable logic integrated circuit devices
DE60021375T2 (de) * 1999-05-07 2006-05-24 Infineon Technologies Ag Vorrichtung und verfahren zur dynamischen definition von teilfeldern innerhalb eines programmierbaren gatterfeldes
US6320412B1 (en) 1999-12-20 2001-11-20 Btr, Inc. C/O Corporate Trust Co. Architecture and interconnect for programmable logic circuits
US6657457B1 (en) * 2000-03-15 2003-12-02 Intel Corporation Data transfer on reconfigurable chip
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US6876227B2 (en) * 2002-03-29 2005-04-05 Parama Networks, Inc. Simplifying the layout of printed circuit boards
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JP2003338750A (ja) * 2002-05-20 2003-11-28 Nec Electronics Corp 汎用ロジックセル、これを用いた汎用ロジックセルアレイ、及びこの汎用ロジックセルアレイを用いたasic
US6975139B2 (en) 2004-03-30 2005-12-13 Advantage Logic, Inc. Scalable non-blocking switching network for programmable logic
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US7737751B1 (en) * 2006-08-25 2010-06-15 Altera Corporation Periphery clock distribution network for a programmable logic device
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US7999570B2 (en) 2009-06-24 2011-08-16 Advantage Logic, Inc. Enhanced permutable switching network with multicasting signals for interconnection fabric
US11216022B1 (en) * 2020-09-16 2022-01-04 Gowin Semiconductor Corporation Methods and apparatus for providing a clock fabric for an FPGA organized in multiple clock regions
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Also Published As

Publication number Publication date
ATE198685T1 (de) 2001-01-15
DE69431848T2 (de) 2003-05-28
KR100340310B1 (ko) 2002-11-23
CA2125307A1 (en) 1994-12-19
US5903165A (en) 1999-05-11
SG64300A1 (en) 1999-04-27
GB9312674D0 (en) 1993-08-04
EP0776093B1 (en) 2002-12-04
KR950001990A (ko) 1995-01-04
ATE229245T1 (de) 2002-12-15
DE69431848D1 (de) 2003-01-16
EP0630115B1 (en) 2001-01-10
SG88743A1 (en) 2002-05-21
JP3547168B2 (ja) 2004-07-28
EP0630115A2 (en) 1994-12-21
EP0776093A2 (en) 1997-05-28
EP0630115A3 (en) 1995-03-22
GB2279168A (en) 1994-12-21
RU94021641A (ru) 1996-06-27
AU6465494A (en) 1994-12-22
DE69426546T2 (de) 2001-07-12
EP0776093A3 (zh) 1997-06-18
GB2279168B (en) 1998-01-21
AU685100B2 (en) 1998-01-15
JPH0758631A (ja) 1995-03-03
DE69426546D1 (de) 2001-02-15
GB9410980D0 (en) 1994-07-20

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