ATE215724T1 - Reduzierung von bitleitungsstörungen - Google Patents

Reduzierung von bitleitungsstörungen

Info

Publication number
ATE215724T1
ATE215724T1 AT97913848T AT97913848T ATE215724T1 AT E215724 T1 ATE215724 T1 AT E215724T1 AT 97913848 T AT97913848 T AT 97913848T AT 97913848 T AT97913848 T AT 97913848T AT E215724 T1 ATE215724 T1 AT E215724T1
Authority
AT
Austria
Prior art keywords
memory cells
reducing line
memory
line disruptions
disruptions
Prior art date
Application number
AT97913848T
Other languages
English (en)
Inventor
Vinod Lakhani
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE215724T1 publication Critical patent/ATE215724T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits

Landscapes

  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Solid-Sorbent Or Filter-Aiding Compositions (AREA)
  • Production Of Liquid Hydrocarbon Mixture For Refining Petroleum (AREA)
  • Separation By Low-Temperature Treatments (AREA)
  • Glass Compositions (AREA)
AT97913848T 1996-10-28 1997-10-28 Reduzierung von bitleitungsstörungen ATE215724T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/736,858 US5912837A (en) 1996-10-28 1996-10-28 Bitline disturb reduction
PCT/US1997/019576 WO1998019310A1 (en) 1996-10-28 1997-10-28 Bitline disturb reduction

Publications (1)

Publication Number Publication Date
ATE215724T1 true ATE215724T1 (de) 2002-04-15

Family

ID=24961600

Family Applications (1)

Application Number Title Priority Date Filing Date
AT97913848T ATE215724T1 (de) 1996-10-28 1997-10-28 Reduzierung von bitleitungsstörungen

Country Status (7)

Country Link
US (1) US5912837A (de)
EP (1) EP0934592B1 (de)
JP (1) JP2000504458A (de)
AT (1) ATE215724T1 (de)
AU (1) AU5093498A (de)
DE (1) DE69711666T2 (de)
WO (1) WO1998019310A1 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7196929B1 (en) * 1997-07-29 2007-03-27 Micron Technology Inc Method for operating a memory device having an amorphous silicon carbide gate insulator
US7154153B1 (en) 1997-07-29 2006-12-26 Micron Technology, Inc. Memory device
US6031263A (en) * 1997-07-29 2000-02-29 Micron Technology, Inc. DEAPROM and transistor with gallium nitride or gallium aluminum nitride gate
US6936849B1 (en) 1997-07-29 2005-08-30 Micron Technology, Inc. Silicon carbide gate transistor
US6794255B1 (en) 1997-07-29 2004-09-21 Micron Technology, Inc. Carburized silicon gate insulators for integrated circuits
US5886368A (en) 1997-07-29 1999-03-23 Micron Technology, Inc. Transistor with silicon oxycarbide gate and methods of fabrication and use
US6746893B1 (en) 1997-07-29 2004-06-08 Micron Technology, Inc. Transistor with variable electron affinity gate and methods of fabrication and use
US6965123B1 (en) 1997-07-29 2005-11-15 Micron Technology, Inc. Transistor with variable electron affinity gate and methods of fabrication and use
US6038169A (en) * 1999-03-18 2000-03-14 Halo Lsi Design & Device Technology, Inc. Read reference scheme for flash memory
US6181599B1 (en) 1999-04-13 2001-01-30 Sandisk Corporation Method for applying variable row BIAS to reduce program disturb in a flash memory storage array
US6556503B2 (en) 2001-08-21 2003-04-29 Micron Technology, Inc. Methods and apparatus for reducing decoder area
US6597609B2 (en) 2001-08-30 2003-07-22 Micron Technology, Inc. Non-volatile memory with test rows for disturb detection
US6798694B2 (en) * 2002-08-29 2004-09-28 Micron Technology, Inc. Method for reducing drain disturb in programming
US7212435B2 (en) * 2004-06-30 2007-05-01 Micron Technology, Inc. Minimizing adjacent wordline disturb in a memory device
US7596028B2 (en) * 2006-12-28 2009-09-29 Macronix International Co., Ltd. Variable program and program verification methods for a virtual ground memory in easing buried drain contacts
US7706180B2 (en) * 2007-09-25 2010-04-27 Cypress Semiconductor Corporation Method and apparatus for reduction of bit-line disturb and soft-erase in a trapped-charge memory
US8045373B2 (en) * 2007-10-02 2011-10-25 Cypress Semiconductor Corporation Method and apparatus for programming memory cell array
US7876618B2 (en) * 2009-03-23 2011-01-25 Sandisk Corporation Non-volatile memory with reduced leakage current for unselected blocks and method for operating same
US8675405B1 (en) * 2013-03-12 2014-03-18 Cypress Semiconductor Corp. Method to reduce program disturbs in non-volatile memory cells
WO2016004388A1 (en) 2014-07-03 2016-01-07 Yale University Circuitry for ferroelectric fet-based dynamic random access memory and non-volatile memory

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4451905A (en) * 1981-12-28 1984-05-29 Hughes Aircraft Company Electrically erasable programmable read-only memory cell having a single transistor
US5077691A (en) * 1989-10-23 1991-12-31 Advanced Micro Devices, Inc. Flash EEPROM array with negative gate voltage erase operation
TW231343B (de) * 1992-03-17 1994-10-01 Hitachi Seisakusyo Kk
US5317535A (en) * 1992-06-19 1994-05-31 Intel Corporation Gate/source disturb protection for sixteen-bit flash EEPROM memory arrays
JPH0729386A (ja) * 1993-07-13 1995-01-31 Hitachi Ltd フラッシュメモリ及びマイクロコンピュータ
KR0142510B1 (ko) * 1993-10-29 1998-08-17 가네꼬 히사시 비휘발성 반도체 메모리 장치
US5412603A (en) * 1994-05-06 1995-05-02 Texas Instruments Incorporated Method and circuitry for programming floating-gate memory cell using a single low-voltage supply

Also Published As

Publication number Publication date
EP0934592B1 (de) 2002-04-03
DE69711666T2 (de) 2002-11-28
EP0934592A1 (de) 1999-08-11
WO1998019310A1 (en) 1998-05-07
US5912837A (en) 1999-06-15
AU5093498A (en) 1998-05-22
DE69711666D1 (de) 2002-05-08
JP2000504458A (ja) 2000-04-11

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties