ATE163484T1 - Vorrichtung zur steuerung des zugangs zu einem datenbus - Google Patents

Vorrichtung zur steuerung des zugangs zu einem datenbus

Info

Publication number
ATE163484T1
ATE163484T1 AT91306702T AT91306702T ATE163484T1 AT E163484 T1 ATE163484 T1 AT E163484T1 AT 91306702 T AT91306702 T AT 91306702T AT 91306702 T AT91306702 T AT 91306702T AT E163484 T1 ATE163484 T1 AT E163484T1
Authority
AT
Austria
Prior art keywords
data bus
processing unit
host
local
computing system
Prior art date
Application number
AT91306702T
Other languages
German (de)
English (en)
Inventor
Douglas D Gephardt
James R Macdonald
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE163484T1 publication Critical patent/ATE163484T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Selective Calling Equipment (AREA)
  • Multi Processors (AREA)
AT91306702T 1990-08-31 1991-07-23 Vorrichtung zur steuerung des zugangs zu einem datenbus ATE163484T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/576,061 US5218681A (en) 1990-08-31 1990-08-31 Apparatus for controlling access to a data bus

Publications (1)

Publication Number Publication Date
ATE163484T1 true ATE163484T1 (de) 1998-03-15

Family

ID=24302809

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91306702T ATE163484T1 (de) 1990-08-31 1991-07-23 Vorrichtung zur steuerung des zugangs zu einem datenbus

Country Status (6)

Country Link
US (1) US5218681A (show.php)
EP (1) EP0473277B1 (show.php)
JP (1) JP3379762B2 (show.php)
AT (1) ATE163484T1 (show.php)
DE (1) DE69128948T2 (show.php)
ES (1) ES2112266T3 (show.php)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9019001D0 (en) * 1990-08-31 1990-10-17 Ncr Co Work station including a direct memory access controller and interfacing means to microchannel means
GB9018992D0 (en) * 1990-08-31 1990-10-17 Ncr Co Internal bus for work station interfacing means
US5333277A (en) * 1992-01-10 1994-07-26 Exportech Trading Company Data buss interface and expansion system
KR100188990B1 (ko) * 1994-09-27 1999-06-01 이리마지리 쇼우이치로 데이타 중계 장치 및 이것을 이용한 비디오 게임 장치
US5634112A (en) * 1994-10-14 1997-05-27 Compaq Computer Corporation Memory controller having precharge prediction based on processor and PCI bus cycles
US5909560A (en) * 1995-06-06 1999-06-01 National Semiconductor Corporation Target peripheral device detection in a multi-bus system
US5673400A (en) * 1995-06-06 1997-09-30 National Semiconductor Corporation Method and apparatus for identifying and controlling a target peripheral device in a multiple bus system
US7076584B2 (en) * 2003-05-09 2006-07-11 Freescale Semiconductor, Inc. Method and apparatus for interconnecting portions of circuitry within a data processing system

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4777591A (en) * 1984-01-03 1988-10-11 Texas Instruments Incorporated Microprocessor with integrated CPU, RAM, timer, and bus arbiter for data communications systems
US4646232A (en) * 1984-01-03 1987-02-24 Texas Instruments Incorporated Microprocessor with integrated CPU, RAM, timer, bus arbiter data for communication system
ATE131641T1 (de) * 1987-06-29 1995-12-15 Digital Equipment Corp Busadapter für digitales rechensystem
EP0335502A3 (en) * 1988-03-30 1991-07-03 Advanced Micro Devices, Inc. Microcontroller and associated method
US5129090A (en) * 1988-05-26 1992-07-07 Ibm Corporation System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration
US4935868A (en) * 1988-11-28 1990-06-19 Ncr Corporation Multiple port bus interface controller with slave bus
US5083259A (en) * 1988-12-07 1992-01-21 Xycom, Inc. Computer bus interconnection device
US5088028A (en) * 1989-04-07 1992-02-11 Tektronix, Inc. Lock converting bus-to-bus interface system

Also Published As

Publication number Publication date
EP0473277A3 (show.php) 1994-01-19
EP0473277A2 (en) 1992-03-04
US5218681A (en) 1993-06-08
DE69128948T2 (de) 1998-09-17
ES2112266T3 (es) 1998-04-01
JPH04332063A (ja) 1992-11-19
DE69128948D1 (de) 1998-04-02
EP0473277B1 (en) 1998-02-25
JP3379762B2 (ja) 2003-02-24

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