ATE146885T1 - Schaltung und verfahren zur fehlerdetektion und - korrektur von datenwörtern mit prüfbits - Google Patents
Schaltung und verfahren zur fehlerdetektion und - korrektur von datenwörtern mit prüfbitsInfo
- Publication number
- ATE146885T1 ATE146885T1 AT92307060T AT92307060T ATE146885T1 AT E146885 T1 ATE146885 T1 AT E146885T1 AT 92307060 T AT92307060 T AT 92307060T AT 92307060 T AT92307060 T AT 92307060T AT E146885 T1 ATE146885 T1 AT E146885T1
- Authority
- AT
- Austria
- Prior art keywords
- check bits
- correction
- error
- memory
- check
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/102—Error in check bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Algebra (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Detection And Correction Of Errors (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Error Detection And Correction (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US74010991A | 1991-08-05 | 1991-08-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE146885T1 true ATE146885T1 (de) | 1997-01-15 |
Family
ID=24975081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT92307060T ATE146885T1 (de) | 1991-08-05 | 1992-08-03 | Schaltung und verfahren zur fehlerdetektion und - korrektur von datenwörtern mit prüfbits |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5633882A (de) |
| EP (1) | EP0527025B1 (de) |
| JP (1) | JPH05216698A (de) |
| AT (1) | ATE146885T1 (de) |
| DE (1) | DE69216172T2 (de) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5923681A (en) * | 1998-02-24 | 1999-07-13 | Tektronix, Inc. | Parallel synchronous header correction machine for ATM |
| JP3537087B2 (ja) * | 2000-09-29 | 2004-06-14 | Necエレクトロニクス株式会社 | 半導体装置及び半導体装置の検査方法 |
| US7634709B2 (en) * | 2001-10-05 | 2009-12-15 | Unisys Corporation | Familial correction with non-familial double bit error detection |
| US6823487B1 (en) * | 2001-11-15 | 2004-11-23 | Lsi Logic Corporation | Method and apparatus for enhancing correction power of reverse order error correction codes |
| US7506226B2 (en) * | 2006-05-23 | 2009-03-17 | Micron Technology, Inc. | System and method for more efficiently using error correction codes to facilitate memory device testing |
| KR101437396B1 (ko) * | 2008-02-27 | 2014-09-05 | 삼성전자주식회사 | 레이턴시를 줄일 수 있는 에러 정정 블록을 포함하는메모리 시스템 및 그것의 에러 정정 방법 |
| US8516336B2 (en) | 2010-06-25 | 2013-08-20 | International Business Machines Corporation | Latch arrangement for an electronic digital system, method, data processing program, and computer program product for implementing a latch arrangement |
| US8612834B2 (en) * | 2011-03-08 | 2013-12-17 | Intel Corporation | Apparatus, system, and method for decoding linear block codes in a memory controller |
| RU2448359C1 (ru) * | 2011-04-05 | 2012-04-20 | Межрегиональное общественное учреждение "Институт инженерной физики" | Устройство хранения и передачи данных с исправлением ошибок в байте информации и обнаружением ошибок в байтах информации |
| RU2534499C2 (ru) * | 2013-03-25 | 2014-11-27 | Межрегиональное общественное учреждение "Институт инженерной физики" | Устройство хранения и передачи данных с исправлением ошибок в двух байтах информации |
| CN110532127B (zh) * | 2019-08-13 | 2023-03-03 | 南京芯驰半导体科技有限公司 | 一种差错校验位协议转换器 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4277844A (en) * | 1979-07-26 | 1981-07-07 | Storage Technology Corporation | Method of detecting and correcting errors in digital data storage systems |
| US4271519A (en) * | 1979-07-26 | 1981-06-02 | Storage Technology Corporation | Address mark generation and decoding method |
| US4317201A (en) * | 1980-04-01 | 1982-02-23 | Honeywell, Inc. | Error detecting and correcting RAM assembly |
| US4334309A (en) * | 1980-06-30 | 1982-06-08 | International Business Machines Corporation | Error correcting code system |
| US4412329A (en) * | 1981-10-15 | 1983-10-25 | Sri International | Parity bit lock-on method and apparatus |
| US4612640A (en) * | 1984-02-21 | 1986-09-16 | Seeq Technology, Inc. | Error checking and correction circuitry for use with an electrically-programmable and electrically-erasable memory array |
| US4646312A (en) * | 1984-12-13 | 1987-02-24 | Ncr Corporation | Error detection and correction system |
| US4730320A (en) * | 1985-02-07 | 1988-03-08 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
| US4737830A (en) * | 1986-01-08 | 1988-04-12 | Advanced Micro Devices, Inc. | Integrated circuit structure having compensating means for self-inductance effects |
| JPS62251949A (ja) * | 1986-04-25 | 1987-11-02 | Mitsubishi Electric Corp | 記憶装置の誤り訂正方法 |
| US4817095A (en) * | 1987-05-15 | 1989-03-28 | Digital Equipment Corporation | Byte write error code method and apparatus |
| JP2583547B2 (ja) * | 1988-01-13 | 1997-02-19 | 株式会社日立製作所 | 半導体メモリ |
| US4993028A (en) * | 1988-09-07 | 1991-02-12 | Thinking Machines Corporation | Error detection and correction coding |
| US5014273A (en) * | 1989-01-27 | 1991-05-07 | Digital Equipment Corporation | Bad data algorithm |
-
1992
- 1992-07-09 JP JP4181395A patent/JPH05216698A/ja not_active Withdrawn
- 1992-08-03 EP EP92307060A patent/EP0527025B1/de not_active Expired - Lifetime
- 1992-08-03 DE DE69216172T patent/DE69216172T2/de not_active Expired - Fee Related
- 1992-08-03 AT AT92307060T patent/ATE146885T1/de active
-
1996
- 1996-03-11 US US08/615,033 patent/US5633882A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US5633882A (en) | 1997-05-27 |
| DE69216172T2 (de) | 1997-05-07 |
| DE69216172D1 (de) | 1997-02-06 |
| EP0527025B1 (de) | 1996-12-27 |
| EP0527025A2 (de) | 1993-02-10 |
| EP0527025A3 (en) | 1994-01-19 |
| JPH05216698A (ja) | 1993-08-27 |
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