AR068602A1 - Aparatos y metodos para el control de la frecuencia en un sintetizador de frecuencia de multiples salidas - Google Patents

Aparatos y metodos para el control de la frecuencia en un sintetizador de frecuencia de multiples salidas

Info

Publication number
AR068602A1
AR068602A1 ARP080104280A ARP080104280A AR068602A1 AR 068602 A1 AR068602 A1 AR 068602A1 AR P080104280 A ARP080104280 A AR P080104280A AR P080104280 A ARP080104280 A AR P080104280A AR 068602 A1 AR068602 A1 AR 068602A1
Authority
AR
Argentina
Prior art keywords
frequency
output signal
phase
signal
closed
Prior art date
Application number
ARP080104280A
Other languages
English (en)
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of AR068602A1 publication Critical patent/AR068602A1/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13—Receivers
    • G01S19/23—Testing, monitoring, correcting or calibrating of receiver elements
    • G01S19/235—Calibration of receiver components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Transceivers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

Métodos y circuitos para sintetizar dos o más senales cerradas en fase con respecto a una senal de frecuencia de referencia en comun. En una forma de realizacion, un método comprende generar senales de salida primera y segunda cerradas en fase con respecto a la senal de un reloj de referencia, mediante el uso de circuitos en bucle cerrados en fase primero y segundo. En respuesta a un error de frecuencia detectado en la primera senal de salida, se corrige la primera senal de salida mediante el ajuste de una relacion de la division de la frecuencia en el primer circuito en bucle cerrado en fase. Se corrige la segunda senal de salida por separado con respecto a la correccion en la primera senal de salida, mediante el ajuste de una relacion de la division de la frecuencia en el segundo circuito en bucle cerrado en fase mediante el uso de un parámetro de ajuste calculado a partir del error de frecuencia detectado. En otro método dado a titulo de ejemplo, se generan senales de salida primera y segunda como se describe en lo que precede, mediante el uso de circuitos en bucle cerrados en fase primero y segundo. Se corrige la primera senal de salida mediante el ajuste de una relacion de la division de la frecuencia en el primer circuito en bucle cerrado en fase y la generacion de una senal de control para ajustar la frecuencia de la senal del reloj de referencia, en respuesta a un error de frecuencia detectado en la primera senal de salida. Dado que la segunda senal de salida se deriva a partir de la senal del reloj de referencia en comun, los ajustes en la frecuencia del reloj de referencia también ajustarán la frecuencia en la segunda senal de salida. En algunas formas de realizacion es posible aplicar ajustes adicionales en la segunda senal de salida mediante el ajuste de una relacion de la division de la frecuencia en los segundos circuitos en bucle cerrados en fase. También, circuitos para implementar los métodos descritos.
ARP080104280A 2007-10-01 2008-09-30 Aparatos y metodos para el control de la frecuencia en un sintetizador de frecuencia de multiples salidas AR068602A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/865,376 US8041310B2 (en) 2007-10-01 2007-10-01 Apparatus and methods for frequency control in a multi-output frequency synthesizer

Publications (1)

Publication Number Publication Date
AR068602A1 true AR068602A1 (es) 2009-11-18

Family

ID=40070716

Family Applications (1)

Application Number Title Priority Date Filing Date
ARP080104280A AR068602A1 (es) 2007-10-01 2008-09-30 Aparatos y metodos para el control de la frecuencia en un sintetizador de frecuencia de multiples salidas

Country Status (9)

Country Link
US (1) US8041310B2 (es)
EP (1) EP2201682B1 (es)
JP (2) JP5291108B2 (es)
CN (1) CN101889393B (es)
AR (1) AR068602A1 (es)
ES (1) ES2439592T3 (es)
MY (1) MY152626A (es)
RU (1) RU2476990C2 (es)
WO (1) WO2009043757A1 (es)

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CN104868912B (zh) * 2015-06-19 2017-11-14 中国电子科技集团公司第五十四研究所 一种双da同步采样装置
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CN108011633B (zh) * 2017-11-14 2021-06-04 天津希格玛微电子技术有限公司 Rc振荡器的校准方法、装置、存储介质和处理器
WO2019198863A1 (ko) * 2018-04-09 2019-10-17 엘지전자 주식회사 클록 동기 시스템 및 이를 구비하는 이동 단말기
CN109831401B (zh) * 2019-03-19 2021-04-13 西安电子科技大学 一种mimo体制中基于共参考的调制器及方法
CN113078991B (zh) * 2021-03-03 2022-07-22 北京紫光青藤微系统有限公司 频率校准系统、方法及应答器
CN113917470B (zh) * 2021-12-14 2022-06-17 成都锐芯盛通电子科技有限公司 一种高效率dbf雷达及标校方法

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Also Published As

Publication number Publication date
WO2009043757A1 (en) 2009-04-09
RU2476990C2 (ru) 2013-02-27
JP5681746B2 (ja) 2015-03-11
JP2010541353A (ja) 2010-12-24
US8041310B2 (en) 2011-10-18
JP5291108B2 (ja) 2013-09-18
RU2010117398A (ru) 2011-11-10
EP2201682A1 (en) 2010-06-30
EP2201682B1 (en) 2013-11-06
MY152626A (en) 2014-10-31
ES2439592T3 (es) 2014-01-23
JP2013168990A (ja) 2013-08-29
CN101889393A (zh) 2010-11-17
US20090088085A1 (en) 2009-04-02
CN101889393B (zh) 2013-02-06

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