GB2131577A - Circuit route planning - Google Patents

Circuit route planning Download PDF

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Publication number
GB2131577A
GB2131577A GB08225262A GB8225262A GB2131577A GB 2131577 A GB2131577 A GB 2131577A GB 08225262 A GB08225262 A GB 08225262A GB 8225262 A GB8225262 A GB 8225262A GB 2131577 A GB2131577 A GB 2131577A
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United Kingdom
Prior art keywords
computer
route
routes
operator
plan
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Granted
Application number
GB08225262A
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GB2131577B (en
Inventor
Keith Herbert Hosking
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BAE Systems Electronics Ltd
Original Assignee
Marconi Co Ltd
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Publication date
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Priority to GB08225262A priority Critical patent/GB2131577B/en
Publication of GB2131577A publication Critical patent/GB2131577A/en
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Publication of GB2131577B publication Critical patent/GB2131577B/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing

Abstract

According to a relatively minor modification of present day techniques a computer is used to plan the routes according to rules by which the routes so far planned are displayed to a human operator at any stage where the computer is unable further to extend any route in one plane: the display shows whether the computer intends to re-plan the route from an earlier stage or to continue the route through a via hole to another plane, and includes an indication of what via holes are available, and which one (if any) the computer intends to use; and the operator then decides, and so instructs the computer, whether the route should be replanned from an earlier stage or continued, and in the latter case whether (i) to accept the computer's choice of via hole, or (ii) to modify that choice by selecting one of the other available via holes; and thereafter the planning process is continued, in accordance with the procedures outlined above, until a satisfactory situation is achieved. <IMAGE>

Description

SPECIFICATION Circuit route planning This invention concerns circuit route planning, and relates in particular to the design and planning of the layout of the conductive tracks used on printed circuit boards and the like.
In recent years considerable attention has been given to the problem of producing the layout of the conductive tracks required for printed circuit boards, thick film circuits, thin film circuits, M.O.S. devices and so forth. The first stage is generally the preparation of an artwork master, and in the case of printed circuit boards, for example, methods for making this artwork master involve the accurate deposition by hand of black adhesive tape onto a stable translucent material at a suitably enlarged scale, the resultant taped artwork master then being photographically reduced to produce the final working artwork.The accuracy of this manual technique is becoming more difficult to maintain in the face of decreasing track widths and intertrack clearances resulting from increasing packaging density requirements; while the use of digitization/photo-plotter techniques has overcome the accuracy problem it does not provide assistance in reducing the time required for the intellectual effort involved in deciding the positions of the components and the interconnection tracking, and much use is now being made of computers to assist in determining these two factors.
The following discussion relates for convenience mainly to the production of circuit designs for printed circuit boards; it will be understood that the concepts disclosed are equally applicable to circuit designs for any other device.
Satisfactory computer programs have been developed for automatisqlly determining the positions of components on a printed circuit board, and an example of such a program is that used by The Marconi Company Limited under the name APPLE and referred to briefly in The Marconi Review, Third Quarter, 1974.
However, it has proved difficult, if not impossible, to develop a program which automatically decides all of the track routes interconnecting the components. For difficult boards, some tracks cannot be routed by the computer, and the human operator is required to adjust the computer's partial solution to achieve a complete solution.
In the past, routing programs were of the "search" typo that is to say, they involved asking where, on the boqrd, could there be placed the next route to be divised. More recently, however, "planned" routing programs have become available wherein there is asked a different question, namely what route can best be allotted to this part of the board.
An example of such a program is that used by The Marconi Company Limited under the name PEAR, and also referred to briefly in The Marconi Review (loc. cuit). Nevertheless, even the use of a program like PEAR is not without its problems, one of them being that if, after there have been devised all the possible routes, there remain some connections unrouted (because there is no available space on the board for any routes for those connections), the human intervention needed to deal with the problem involves re-devising a number of connection routes in toto in order to fit in the unrouted connections, and this is a rather error-prone procedure.
In an attempt to avoid this situation there has been evolved a modified route planning technique in which: a notional grid is superimposed upon the board, and the computer defines each route it is devising (in accordance with the rules of the chosen program) in terms both of the connection points and of the crossing pointshere referred to as "X points"-where the route crosses the grid lines; an initial schematic representation of the devised routes (the schematic representation constituting the vectorial connections all along each route between adjacent points, whether connection points or X-points) is displayed to the operator, together with the X-points; and when human intervention is needed to redefine any route so as to make space for an otherwise unroutable connection this is effected by repositioning merely the relevant Xpoints.In this technique the board is divided into notional parallel strips or zones (usually defined by the array of component pin positions), and all the routes are simultaneously devised through each zone in sequencc that is, starting with the zone at one edge of the board and progressing, zone by zone, across the board to the opposite edgc rather than each route being devised from beginning to end, route by route.
Such a modified route planning technique is incorporated in The Marconi Company Limited's routing program APRICOT, and is employed in the artwork master production method described and claimed in the Complete Specification of our U.K. Letters Patent No. 1,502,006 (l/5856/M).
It is unfortunately often the case with route planning under the control of a suitably programmed computer that the final track route result, though in accordance with the specified rules, and even though acceptable for the most part, is extremely untidy and overly complicated. Moreover, it is also often the case that the untidiness and complexity are because a small number of routes, though properly placed according to the rules, have nevertheless caused a much greater number of connections to be made by routes clearly other than the optimum for those connections.
Thus, because the computer is required to determine all the routes that can possibly be determined, the proposed solution may well be a track route plan which could have been clear and simple if only one or two routes had not been defined but has instead become unnecessarily confused and complicated. A further improved route planning system, applicable specifically to APRICOT-like methods, involves more human intervention to deal with those situations where the rigid programming of the computer causes a needlessly complicated result.It is employed in the artwork master production method described and claimed in the Specification of our Application for UK Letters Patent No: 81/10,484 (1/6444/MR), and seeks to overcome the difficulty by arranging that a route between two circuit points is not automatically devised by the computer if devising it will result in subsequently-devised routes being overly com placated.
The computer-assisted planning methods used in these earlier inventions are, as stated, applicable to various physical implementations of circuit, but they are especially suitable for use with multi layer and/or double sided circuit boards where the portions of track in one plane (on one side, or in one layer) of the board are routed generally in one direction while the portions of track in another plane (on the other side, or in a second layer) are routed generally in a second direction (which is conveniently orthogonal to the first). Using such boards, each track is taken as far as it can be in one plane, and then is continued, via a hole through the board (or between-layer insulation) in the other plane.At some stage the computer displays to the operator the results of its deliberations, and the operator can accept, reject or amend the suggested routes before instructing the computer to continue. The present invention concerns a relatively minor modification of these earlier techniques in which, when the computer has determined that a portion of track route in one plane should now be terminated at a via hole, where it is to be continued by a portion of track route in another plane, or even is to be re-routed altogether (in the event, say, that no suitable via hole exists), the situation is displayed to the operator for him to make a choice between the computer's suggestions, or to make his own suggestion, before the computer is allowed to proceed with its route planning.
In one aspect, therefore, this invention provides a method of planning the routes of circuit connections on a printed circuit board or the like, in which: (a) a computer is used to plan the routes according to certain rules by which the routes so far planned are displayed to a human operator at any stage where the computer is unable further to extend any route in one plane; (b) the display shows whether the computer intends to re-plan the route from an earlier stage or to continue the route through a via hole to another plane, and includes an indication of what via holes are available, and which one (if any) the computer intends to use; and (c) the operator then decides, and so instructs the computer, whether the route should be replanned from an earlier stage or continued, and in the latter case whether (i) to accept the computer's choice of via hole, or (ii) to modify that choice by selecting one of the other available via holes; (d) and thereafter the planning process is continued, in accordance with (a), (b) and (c) above, until a satisfactory situation is achieved.
Although the route planning method of the invention is intended primarily for use with the artwork master production methods of our aforementioned Patent No: 1,502,000 and Application No: 81/10,484, nevertheless it can be employed with any route planning system in which the computer uses certain rules to plan the track routes, and displays its results to a human operator, for guidance, when it reaches some previously-defined critical stage that renders it unable, without assistance, to extend the routes further in the same plane.
The display the computer provides can be a printed display, such as available from a plotter, but for various reasons the use of a Visual Display Unit of the television screen type is much preferred.
When, according to the rules governing its operation, the computer is unable further to extend a track route in any one plane, the routes so far are displayed to the operator.
The reasons why the computer cannot continue may be any reasons appropriate to the rules with which it is planning the routes. In the case of the method of our aforementioned Application No: 81/10,484, for example, one reason may be that the computer is unable to find a route extension such that when schematically represented it is generally parallel to a notional director line.
At the point at which the display is provided, the computer may have decided merely to extend the route through a via hole to another plane. It will thus show which via holes are available (in the general area concerned), and which one it intends to use, and the human operator may then accept that choice, or reject it and choose another via holsor even reject the so far planned route entirely, instructing the computer to re-plan the route from some earlier stage. Alternatively, however, the computer may itself indicate that it intends to re-plan the route from an earlier stage, and the human operator may then accept or reject this intention. The decision is one for the operator, based upon his experience of and feel for these matters, and no further comment need here be made.
After the operator has accepted or rejected the computer's choice, the method loops back to the computer planning section, and the cycle of planning, displaying and acceptance/rejection is continued until a circuit has been devised that is satisfactory to both machine and man. At that stage the production of, say, an artwork master utilising as a basis the result of the combined computer/operator efforts may be carried out in any convenient manner, and attention is here drawn to the various techniques mentioned hereinbefore.
The invention extends to an artwork master whenever produced by the method of the invention, and to a printed circuit board or the like whenever produced using such a master.
The invention is now described, though only by way of illustration, with reference to the accompanying drawings in which: Figure 1 is diagrammatic, and represents a double-sided printed circuit board having conductive tracks thereon interconnecting the pin positions of various components carried by the board; Figure 2 is diagrammatic, and represents a section of a printed circuit board bearing a matrix of pin positions (similar to that on the board of Fig. 1) with different types of position-interconnecting routes being devised by a computerised route-devising system.
Fig. 1 is a diagrammatic representation of a double-sided printed circuit board (10) on which is shown a 4 row 5 column matrix of 20 holes (as 11) into which are fitted the connector members of the components (not shown) the board is to carry. In boards of the type under consideration the components are usually integrated circuits in the form of dualin-line packs; the holes 11 then mark the positions of the components' pins, by which the components are both mounted on the board and interconnected with other components.
Certain of the pin positions 11 are joined to others by conductive tracks (as 1 2a, 1 2b, 12c) on one or both surfaces of the board 10.
The tracks (as 1 2b) on the obverse side (that side showing in the Figure as viewed) are all effectively vertically disposed (as viewed) and shown by solid lines, while the tracks (as 1 2a, 1 2c) on the reverse side are all effectively horizontally disposed (as viewed) and shown by dashed lines. Where an interconnection route uses tracks on both sides of the board, the two are themselves interconnected by plated-through holes, known as via-holes (as 13).Thus, in the board shown in Fig. 1: (a) The conductive tracks interconnecting the top left pin position (column 1, row 1~position 1,1 ) to the bottom right pin posi tion (column 5, row iI position 5,4) are horizontal track 1 2a on the reverse side connected by a via-hole 13 to vertical track 1 2b on the obverse side connected by another viahole 13 to second horizontal track 1 2c on the reverse side.
(b) The tracks interconnecting pin position 4,1 to pin position 1,4 are a vertical track (1 4a) connected by a via-hole to a horizontal track (1 4b) connected by a second via-hole to a second vertical track (1 4c).
(c) The track interconnecting pin position 5,1 to pin position 4,4 is a single vertical track (1 5).
A board layout identical to that of Fig. 1 is shown in Fig. 1 of the drawings accompanying the Specification of our aforementioned Application No: 81/10,484.
Fig. 2 is a representation of a section of a double-sided printed circuit board. The board carries a matrix of pin-position holes (as 20), and is shown having superimposed thereon the display presented to the operator of a computer that is attempting to devise track routes on the board generally in accordance with the procedures employed in the artwork master production method of our aforementioned Application No:: 81/10,484. At the moment shown, the computer is trying to extend into the zone between the lightly dashed lines (A-B) all the routes so far devised up to that point (shown in heavy line) from earlier on (from below the zone as viewed), and has come across the problem that one route (31) on the left of the board section, that has as its destination a pin (21) over towards the right of the board section and in the present zone, when extended (dotdashed section 41) crosses over three other routes--one (32) that is planned (the dotted extension 42) to go straight on up the board, and two (33,34) that are planned (the dashed extensions 43,44) to terminate each in an immediately adjacent pin (23, 24 respectively) in the present zone.A number of via holes (as 50) are available at roughly the right position in the zone, and the display indicates the section (41) of route 31 causing the touble, and suggests which via hole (51 a, encircled by a square) it would like to use in order to move route section 31 on to another plane in this case, the reverse side on the board.
The operator has four choices.
(i) The computer's suggestion can be adopted, route 31 terminating in this plane at via hole 51 a, and continuing to its destination at 21 in another plane.
(ii) A modified version of the computer's suggestion can be adopted. Thus, the via hole (51 a) proposed by the computer may be ignored, and another via hole (say 51 b, encircled by a circle) chosen instead.
(iii) The computer's suggestion can be ignored altogether, and the computer instructed to re-plan the problem route 31 from an earlier stage (from pin 61, say) in an attempt to avoid the problem entirely.
(iv) Finally, the operator may decide to keep the extension 41 of problem route 31 in the present plane, and move instead one or more of the other routes (42,43,44) that with extension 41 have caused the difficulty.

Claims (5)

1. A method of planning the routes of circuit connections on a printed circuit board or the like, in which: (a) a computer is used to plan the routes according to certain rules by which the routes so far planned are displayed to a human operator at any stage where the computer is unable further to extend any route in one plane; (b) the display shows whether the computer intends to re-plan the route from an earlier stage or to continue the route through a via hole to another plane, and includes an indication of what via holes are available, and which one (if any) the computer intends to use; and (c) the operator then decides, and so instructs the computer, whether the route should be replanned from an earlier stage or continued, and in the latter case whether (i) to accept the computer's choice of via hole, or (ii) to modify that choice by selecting one of the other available via holes; (d) and thereafter the planning process is continued, in accordance with (a), (b) and (c) above, until a satisfactory situation is achieved.
2. A route planning method as claimed in claim 1 which is used with the artwork master production methods of British Letters Patent No: 1,502,000 and/or Application for British Letters Patent No: 81/10,484.
3. A route planning method as claimed in either of the preceding claims, in which the display the computer provides is made with a Visual Display Unit of the television screen type.
4. A route planning method as claimed in any of the preceding claims and substantially as described hereinbefore.
5. An artwork master whenever produced using a route planning method as claimed in any of the preceding claims.
GB08225262A 1982-09-04 1982-09-04 Circuit route planning Expired GB2131577B (en)

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GB08225262A GB2131577B (en) 1982-09-04 1982-09-04 Circuit route planning

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GB08225262A GB2131577B (en) 1982-09-04 1982-09-04 Circuit route planning

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GB2131577B GB2131577B (en) 1985-10-02

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4642890A (en) * 1985-10-31 1987-02-17 At&T Technologies, Inc. Method for routing circuit boards
US4777606A (en) * 1986-06-05 1988-10-11 Northern Telecom Limited Method for deriving an interconnection route between elements in an interconnection medium
EP0290254A2 (en) * 1987-05-08 1988-11-09 Valid Logic Systems, Inc. Computer aided printed circuit board wiring
US4823278A (en) * 1984-07-25 1989-04-18 Fujitsu Limited Method of logic design of integrated circuit
US4858143A (en) * 1986-09-25 1989-08-15 Bell-Northern Research, Ltd. Work ordering routine for use in a method of routing

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1398403A (en) * 1972-05-11 1975-06-18 Standard Telephones Cables Ltd Computers
GB1502006A (en) * 1975-10-04 1978-02-22 Marconi Co Ltd Manufacture of printed circuit boards and the like

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1398403A (en) * 1972-05-11 1975-06-18 Standard Telephones Cables Ltd Computers
GB1502006A (en) * 1975-10-04 1978-02-22 Marconi Co Ltd Manufacture of printed circuit boards and the like

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4823278A (en) * 1984-07-25 1989-04-18 Fujitsu Limited Method of logic design of integrated circuit
US4642890A (en) * 1985-10-31 1987-02-17 At&T Technologies, Inc. Method for routing circuit boards
US4777606A (en) * 1986-06-05 1988-10-11 Northern Telecom Limited Method for deriving an interconnection route between elements in an interconnection medium
US4858143A (en) * 1986-09-25 1989-08-15 Bell-Northern Research, Ltd. Work ordering routine for use in a method of routing
EP0290254A2 (en) * 1987-05-08 1988-11-09 Valid Logic Systems, Inc. Computer aided printed circuit board wiring
EP0290254A3 (en) * 1987-05-08 1990-10-24 Valid Logic Systems, Inc. Computer aided printed circuit board wiring

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