GB2096368A - Circuit design - Google Patents

Abstract

A method of producing an artwork master, for a printed circuit board in which: a computer is programmed to devise the routes of conductive tracks interconnecting circuit points provided that such routes when schematically represented are generally parallel to a notional director line on the board; the computer is operated to derive (and display) details of the result of its devising; upon the basis of these details, the result is then modified by inserting into the computer further data defining some or all of the routes that the computer had omitted to devise because it was unable to do so such that when schematically represented they were generally parallel to the notional director line; the computer is operated to derive details of the amended result of its devising; the last two steps are, if necessary, repeated to obtain a satisfactory result; and from the final amended result there is produced the desired artwork master incorporating tracks with the thus-derived routes. <IMAGE>

Description

SPECIFICATION Circuit design This invention concerns circuit design, and relates in particular to the design and planning of the layout of the conductive tracks used on printed circuit boards and the like.

In recent years considerable attention has been given to the problem of producing the layout of the conductive tracks required for printed circuit boards, thick film circuits, thin film circuits, M.O.S.

devices and so forth. The first stage is generally the preparation of an artwork master, and in the case of printed circuit boards, for example, methods for making this artwork master involve the accurate deposition by hand of black adhesive tape onto a stable translucent material at a suitably enlarged scale, the resultant taped artwork master then being photographically reduced to produce the final working artwork.The accuracy of this manual technique is becoming more difficult to maintain in the face of decreasing track widths and intertrack clearances resulting from increasing packaging density requirements; while the use of digitization/photo-plotter techniques has overcome the accuracy problem it does not provide assistance in reducing the time required for the intellectual effort involved in deciding the positions of the components and the interconnection tracking, and much use is now being made of computers to assist in determining these two factors.

The following discussion relates for convenience mainly to the production of circuit designs for printed circuit boards; it will be understood that the concepts disclosed are equally applicable to circuit design for any other device.

Satisfactory computer programmes have been developed for automatically determining the positions of components on a printed circuit board, and an example of such a programme is that used by The Marconi Company Limited under the name APPLE and referred to briefly in The Marconi Review, Third Quarter, 1974. However, it has proved difficult, if not impossible, to develop a programme which automatically decides all of the track routes interconnecting the components. For difficult boards, some tracks cannot be routed by the computer, and the human operator is required to adjust the computer's partial solution to achieve a complete solution.

In the past routing programmes were of the "search" type-that is to say, they involved asking where, on the board, could there by placed the next route to be devised. More recently, however, "planned" routing programmes have become available wherein there is asked a different question, namely what route can best be allotted to this part of the board. An example of such a programme is that used by the The Marconi Company Limited under the name PEAR, and also referred to briefly in The Marconi Review (loc. cit.).Nevertheless, even the use of a programme like PEAR is not without its problems, one of them being that if, after there have been devised all the possible routes, there remain some connections unrouted (because there is no available space on the board for any routes for those connections), the human intervention needed to deal with the problem involves redevising a number of connection routes in toto in order to fit in the unrouted connections, and this is a rather error-prone procedure.

In an attempt to avoid this situation there has been evolved a modified route planning technique in which: a notional grid is superimposed upon the board, and the computer defines each route it is devising (in accordance with the rules of the chosen programme) in terms both of the connection points and of the crossing points~ here referred to as "X-points"-where the route crosses the grid lines; an initial schematic representation of the devised routes (the schematic representation constituting the vectorial connections all along each route between adjacent points, whether connection points or X-points) is displayed to the operator, together with the X-points; and when human intervention is needed to redefine any route so as to make space for an otherwise unroutable connection this is effected by repositioning merely the relevant X-points.In this technique the board is divided into notional parallel strips or zones (usually defined by the array of component pin positions), and all the routes are simultaneously devised through each zone in sequence-that is, starting with the zone at one edge of the board and progressing, zone by zone, across the board to the opposite edge-rather than each route being devised from beginning to end, route by route.

Such a modified route planning technique is incorporated in The Marconi Company Limited's routing programme APRICOT, and is employed in the artwork master production method described and claimed in the Complete Specification of our U.K. Letters Patent No. 1,502,006 (I/5856/M).

This method, which is a method of producing an artwork master for use in the manufacture of a printed circuit board or the like, comprises the steps of: programming a computer to devise, in a first stage, the schematic routes of conductive tracks interconnecting circuit points, determining the positions of a plurality of crossing points (Xpoints) each of which is where a schematic route crosses one of a plurality of imaginary grid lines, and then to determine, in a second stage, from the crossing points so derived the track routes~ that is, the lengths and positions of the actual track sections; operating the computer to derive (and display) details of the results of the first and second stages; modifying the results by instructing the computer to change the location of one or more of the crossing points;; thereafter operating the computer to cause it to display the amended result of the first stage, and to repeat the second stage so as to provide an amended result for the track routes; repeating the last two steps if necessary to obtain a satisfactory result for the track routes; and from the final amended track route result producing an artwork master incorporating the tracks so positioned.

The present invention relates to a further improved route planning system, applicable specifically to APRICOT-like methods, the improvement involving further human intervention to deal with situations where the rigid programming of the computer causes a needlessly complicated result.

It is unfortunately often the case with route planning under the control of a suitably programmed computer that the final track route result, though in accordance with the specified rules, and even though acceptable for the most part, is extremely untidy and overly complicated.

Moreover, it is also often the case that the untidiness and complexity are because a small number of routes, though properly placed according to the rules, have nevertheless caused a much greater number of connections to be made by routes clearly other than the optimum for those connections. Thus, because the computer is required to determine all the routes that can possibly be determined, the proposed solution may well be a track route plan which could have been clear and simple if only one or two routes had not been defined but has instead become unnecessarily confused and complicated.

The present invention seeks to overcome this difficulty by arranging that a route between two circuit points is not automatically devised by the computer if devising it will result in subsequentlydevised routes being overly complicated.

In one aspect, therefore, the invention provides a method of producing an artwork master for use in the manufacture of a printed circuit board or the like, in which method:~ a a computer is programmed to devise the routes of conductive tracks interconnecting circuit points provided that such routes when schematically represented are generally parallel to a notional director line of the board; the computer is operated to derive (and display) details of the result of its devising; upon the basis of these details, the result is then modified by inserting into the computer further data defining some or all of the routes that the computer had omitted to devise because it was unable to do so such that when schematically represented they were generally parallel to the notional director line;; the computer is operated to derive details of the amended result of its devising; the last two steps are, if necessary, repeated to obtain a satisfactory result; and from the final amended result there is produced the desired artwork master incorporating tracks with the thus-derived routes.

Where appropriate the expression "routes" includes those parts of routes that can be devised up to the point at which they would, when schematically represented, no longer be generally parallel to the notional director line. Thus, using the zone-by-zone approach of the APRICOT technique, the computer will devise each route through each zone until that route, schematically represented, can no longer be devised so that it is generally parallel to the notional director line.

Although the computer may be operated to devise the routes in one direction only-that is, to devise the routes starting from one edge (say) of the board and progressing steadily towards another (usually the opposite) edge~ nevertheless it is possible, and indeed desirable, to arrange that the computer devise the routes in both directions. Thus, firstly the computer will attempt to devise all the routes in one chosen direction, and thereafter it will again attempt to devise all the routes but in the opposite direction.

Where the two devisings result in two separate "overlapping" routes for any one conductive track interconnecting circuit points then it can be arranged that the optimum combination of the two be selected. Similarly, where the two devisings result in two separate "nonoverlapping" routes (in each case the route had to be terminated early-for example, because it could no longer be devised generally parallel to the notional director line) then in accordance with the main feature of the method of the invention the final joining of the two route halves, with or without their redevising, is left to the operator.

The method of the invention may be employed with advantage in conjunction with the artwork master production method the subject of our aforementioned U.K. Letters Patent No.

1,502,006. In a preferred aspect, therefore, the invention provides a method of producing an artwork master for use in the manufacture of a printed circuit board or the like, in which method: a computer is programmed to devise, in a first stage, the schematic routes of conductive tracks interconnecting circuit points, determining the positions of a plurality of crossing points (Xpoints) each of which is where a schematic route crosses one of a plurality of imaginary grid lines, with the proviso that such schematic routes must be generally parallel to a notional director line on the board, and then to determine, in a second stage, from the crossing points so derived the track routes-that is, the lengths and positions of the actual track sections; the computer is operated to derive (and display) details of the results of the first and second stages; ; the results are modified by instructing the computer to change the location of one or more of the crossing points; the results are further modified by instructing the computer to insert one or more additional crossing points relating to some or all of the schematic routes that it had omitted to devise because it was unable to do so such that they were generally parallel to the notional director line; the computer is then operated to cause it to display the amended result of the first stage, and repeat the second stage so as to provide an amended track route result; the last three steps are if necessary repeated to obtain a satisfactory result; and from the final amended track route result there is produced the desired artwork master incorporating the tracks with the thus-devised routes.

The following discussion relates in the main to this preferred aspect of the invention, though certain of the observations made can be relevant in a broader context.

The method of the invention is in principle applicable to any sort of printed circuit board, thick film circuit, thin film circuit, M.O.S. device, and the like. For the most part, however, it is likely to be used with so-called multi-layer printed circuit boards, and it is primarily concerned with double-sided boards.

The imaginary grid lines may be arranged and orientated in any way, and need not be rectangular or even regular, so long as the computer is aware of their positions. Most conveniently, however, the grid is a rectangular grid, comprising one set of parallel lines orthogonal to a second set, and where the artwork master is for a printed circuit board in which conductive tracking is required to extend between and around the positions of a regular array of component pins then the imaginary grid lines are preferably defined by the rows and/or the columns of those pin positions.In a case where in the first stage the computer determines the positions of the horizontal grid line X-points (the horizontal grid lines being those defined by the rows of pin positions) it will easily be appreciated that the programme needs to devise routes only for connecting two pin positions that are not either in the same row (a connection between two positions in the same row is referred to as a "Type 0" connection) or in adjacent rows (a connection between two positions in adjacent rows is referred to as a "Type 1" connection), for Type 0 and 1 connections are obviously routed automatically. Thus, the programme only devises routes for connecting pin positions that are separated by at least one row (referred to as a "Type 2" connection).In the case where the board is a double sided one the computer is advantageously programmed to determine, in the first stage, the positions of the points at which tracks extending in one grid co-ordinate direction on one side of the board cross one of the imaginary grid lines, and in the second stage the lengths and positions of the track sections extending in the other grid co-ordinate direction on the other side of the board.

The main feature of the method of the invention lies in arranging for the computer only to devise schematic routes that are generally parallel to a notional director line on the board (the notional director line may be in any direction, but is conveniently in such a direction as is linked to the imaginary grid line-thus, for example, with a rectangular grid the director is conveniently aligned with one or other grid co-ordinate). The expression "generally parallel" is not easy to define, but an understanding of its meaning can be arrived at by considering a simplified process for attaining the desired end.

Even when the positions of the individual components on a printed circuit board have been decided in the best possible way, the totality of the interconnecting conductive tracks will, if "drawn" in the form of a schematic representation (by simply joining each point to each other point to which it is to be connected), probably be a complicated tangle. In order to deal with this problem in the method of the invention the computer is operated to devise all the schematic routes that can be devised in a direction generally parallel to the notional director line, and "generally parallel" means that overall these routes are aligned with the director line. The matter can be understood by the description given hereinafter of a simplified programme for attaining the desired parallelism, the principles of which programme can be summed up as follows.

As the computer devises each schematic route, it scans ahead (in the direction of the notional director line) to see whether there is a free space into which the route as so far devised can extend.

Instead of looking to either side right up to the edges of the board, it is programmed to search only within a slot (or "window") the width and position of which are predetermined by the presence of "non-passable" points (that is, points beyond which the slot cannot be allowed to extend). A point can be non-passable for two main reasons. Firstly, it may be involved in a route which has already been determined. Secondly, it may be a pin position to which the route is immediately going to be connected and which is in, or nearly in, the direction of the notional director line. If the slot thus defined contains a free space, then the route is extended into it to the next point; if not, then the computer terminates the route at its present point, leaving the further extension to the operator.

After going through the first and second stages of its programme the computer derives details of the results so far so that the operator may consider, and if necessary amend, the proposals.

The details are preferably derived in pictorial form, and two convenient such forms are obtained using a conventional plotter or a cathode ray tube display. The operator may modify the computergenerated details in two ways. Not necessarily in this order, he may re-route some of the routes already devised (conveniently by instructing the computer to change the location of one or more of the crossing points defining the route to be rerouted), and he may devise some of the routes that the computer has left undevised (conveniently by instructing the computer to add crossing points defining the new routes).In the latter case these undevised routes are those that the computer was unable to devise in the required generally director-parallel manner (in practice the operator may well also have to devise routes that were left undevised for quite different reasons, but that is not a feature of the present invention, and thus need not be discussed here).

The undevised routes will be those which, if they had been devised by the computer, would have caused other routes (which have been devised in simple, uncomplicated form) to become unduly complex; they can usually be devised by the operator by ignoring the constraints in the programme and more or less placing them wherever there is a spare space~ and while this will undoubtedly result in these routes themselves being rather complicated, the overall result will be one where only a few such complicated routes exist, the vast majority of routes being relatively simple.

Once the route changes and additions have been made, the second stage of the programme is re-run with these as fixed data, the computer then producing up-dated details.

Naturally, this consideration and amendment by the operator may be effected not only upon the first computer-generated details but also upon those details as subsequently amended, so that each time round the "loop" the result becomes more and more acceptable. At some point the result will actually be satisfactory, and can be used, in the final stage of the method, as the basis for the desired artwork master.

The final stage in the method of the invention, the production of the desired artwork master utilising as a basis the achieved satisfactorilyamended result of the combined computer/operator efforts, may be carried out in any convenient manner, and attention is here drawn to the various techniques mentioned hereinbefore.

The invention extends, of course, to an artwork master whenever produced by the method of the invention, and to a printed circuit board or the like whenever produced using such a master.

The invention is now described, though only by way of illustration, with reference to the accompanying drawings in which~ Figure 1 is diagrammatic, and represents a double-sided printed circuit board having conductive tracks thereon interconnecting the pin positions of various components carried by the board; Figures 2A, B and C are diagrammatic, and each represents a matrix of pin positions (similar to that on the board of Figure 1), and shows different types of position-interconnecting routes being devised by the route devising part of the inventive artwork master production method; Figures 3A, B, C, D and E are diagrammatic, and are a series of Figures each of which is a pin position matrix with routes thereon, the series illustrating the route devising part of the inventive artwork master production method; and Figures 4A, B, C and D are representations of a series of real plots (for a real circuit board) similar in principle to the series of Figures 3A to E.

Figure 1 is a diagrammatic representation of a double-sided printed circuit board (10) on which is shown a 4 row 5 column matrix of 20 holes (as 11) into which are fitted the connector members of the components (not shown) the board is to carry. In boards of the type under consideration the components are usually integrated circuits in the form of dual-in-line packs; the holes 11 then mark the positions of the component's pins, by which the components are both mounted on the board and interconnected with other components.

Certain of the pin positions 1 1 are joined to others by conductive tracks (as 1 2a, 1 2b, 1 2c) on one or both surfaces of the board 10. The tracks (as 1 2b) on the obverse side (that side showing in the Figure as viewed) are all effectively vertically disposed (as viewed) and shown by solid lines, while the tracks (as 1 2a, 1 2c) on the reverse side are all effectively horizontally disposed (as viewed) and shown by dashed lines. Where an interconnection route uses tracks on both sides of the board, the two are themselves interconnected by plated-through holes, known as via-holes (as 13).Thus, in the board shown in Figure 1: a) The conductive tracks interconnecting the top left pin position (column 1, row 1~position 1,1) to the bottom right pin position (column 5, row 4~position 5,4) are horizontal track 1 2a on the reverse side connected by a via-hole 13 to vertical track 1 2b on the obverse side connected by another via-hole 13 to second horizontal track 1 2c on the reverse side.

b) The tracks interconnecting pin position 4,1 to pin position 1,4 are a vertical track (1 4a) connected by a via-hole to a horizontal track (1 4b) connected by a second via-hole to a second vertical track (14c).

c) The track interconnecting pin position 5, 1 to pin position 4, 4 is a single vertical track (15).

A board layout substantially identical to that of Figure 1 is shown in Figure 2 of the drawings accompanying the Specification of our aforementioned Letters Patent No. 1,502,006.

Figure 2A illustrates diagrammatically a stage in the devising of track routes in the artwork master production method according to the invention (the connections still to be routed are shown dashed), Figure 2B shows the schematic routes as devised, and Figure 2C shows the track routes as actually formed using a double sided printed circuit board of the type shown in Figure 1. Describing Figure 2A first, it will be seen that it shows a segment (20) of a double sided printed circuit board layout including a matrix of pin positions (again, as 11) arranged (in the segment) in 7 columns and 5 rows. Superimposed upon the layout there is an (imaginary) rectangular grid with vertical and horizontal (as viewed) lines (as 21 and 22 respectively) running both through the pin positions 1 1 and, so far as concerns the vertical lines 21, between them (in an attempt to keep the Figure fairly clear, the grid has been shown in part only). The vertical grid lines are (from the left) VO to V14, and the horizonta! grid lines are (from the bottom) Ho to H6. Shown on the layout are lines (as 23a, 24a) interconnecting pin positions with other pin positions. The lines here are the schematic routes, and indicate which positions are to be connected to which other positions (thus, they do not necessarily represent the actual track routes of these connections as they would be on the produced double sided circuit board).Pin position V3H2 is to be connected to pin position V1 H3, and pin position V5H2 is to be connected to pin position V3H5.

It is assumed that the route devising programme has started at the bottom of the board and is progressing upwards considering in turn each row of positions and each zone between that row and the previous row. At the moment represented by Figure 2A the programme is devising the routes in the zone (shown shaded in the Figure) between rows H2 and H3, and thus in addition to the connections from the pin positions V3H2 and V5H2 it is also attempting to devise that portion of a route joining the X-point at V6H2 (the current end of a route which started lower down the board) to pin position Vt3H5, and to devise that portion of a route joining the X-point at V6H2 to pin position V7H3.

The method of the invention requires the route planning programme only to devise routes or part routes that in schematic form are generally parallel to a notional director line-which in Figure 2A is chosen as being in a vertical (as viewed) direction, so that the programme will only devise routes or part routes that in schematic form are generally parallel with the columns of pin positions and/or the vertical grid lines. In this embodiment that requirement is met by defining a slot, or window, ahead of the route under consideration and through which the route must pass, the position and width of the slot being predetermined by a number of factors already set as a result of earlier decisions (or of fixed data); if these factors effectively result in no slot, then the programme terminates the route at the current position, leaving its further devising to the operator.

In this particularly preferred embodiment of the invention the status of the pin position which is the immediate destination of a connection is one factor defining the slot; the destination of a nearly vertical Type 1 connection is a "non-passable" position, so that any slot presently being defined is on one side bounded at least by that position. In Figure 2A, for example, pin position V1H3 is the immediate destination of the nearly vertical Type 1 connection from pin position V3H2, and is nonpassable, while pin position V7H3 is the immediate destination of the near-vertical connection from the X-point at position V6H2 (the whole route leading up to pin position V7H3 is a Type 2 connection) and thus pin position V7H3 is also non-passable.The programme operates to route Type 1 and the end of Type 2 connections automatically and preferentially, and so of the four connections to be routed "through" the present zone to or through row H3 those to pin positions V1H3 and V7H3 are routed first, and are regarded as fixed when devising the remaining two routes.

These two remaining routes are the connections between positions V5H2 and V3H5 and between positions V8H2 and V13H5; they are Type 2. Another factor involved in filling the slot is a horizontal displacement factor; for each Type 2 route its slope to the next pin position (more specifically, the horizontal distance from the present position to that next pin position) must be considered-and where a slot could be used by a number of different routes, priority is given to that route whose next pin position is nearest (first horizontally, being in the nearest column, and then, if there is more than one in that column, vertically in the direction of route planning, being in the nearest row).

In the case shown in Figure 2A the slot is bounded primarily by the connection destinations at pin positions V1H3 (on the left) and V7H3 (on the right). Of the two remaining (Type 2) connections, that to V3H5 has a smaller horizontal displacement~1 colum or 2 grid lines-than that to V13H5-7 grid lines-so the route for the former is devised first, going to the X-points at V4H3, while the route for the latter is devised second, going to the X-point at V8H3.

A somewhat simplified version of the relevant steps in a programme for devising the routes is as follows.

1. Note those positions in the present row defined as non-passable, and devise routes for all the connections thereto which have not already been determined.

2. List the remaining (Type 2) connections through this row.

3. Set a horizontal displacement parameter (to a chosen value) against which is to be compared the horizontal distance of any destination pin position from each current end-of-route position.

4. If necessary, form a first sub-list of Type 2 connections for which the required horizontal displacement is less than the horizontal displacement parameter, in order of increasing horizontal displacement.

5. If necessary, form a second sub-list by sorting in order of increasing vertical displacement any connections in the first sub-list with the same horizontal displacement.

6. For each second sub-list connection in turn, examine the X-points in the row, starting with the X-point vertically above (in the direction the routes are being devised) the current end-of-route position, then, looking at the X-points alternately to either side (up to the first non-passable point on each side), select the first such X-point that has no previously devised route through it, devise the route for the connection being considered through that X-point, and then try the next connection.

7. If no free X-point is found, terminate that route at the present end-of-route position, and try the next connection.

8. When routes for all the possible connections through the row have been devised, move up to the next row and begin again.

Figure 2B shows the same segment of layout as in Figure 2A but with all the routes devised.

The connections shown dashed in Figure 2A (as 23a, 24a) have been converted into proposed schematic routes (as 23b, 24b) from one pin position or X-point to another. Figure 2C also shows the same segment, but now in the form of the double sided printed circuit board itself, as in Figure 1. The proposed track routes (as 23b, 24b in Figure 2B) are now actual tracks (as 23c, 24c) on the appropriate sides of the board.

Figures 3A to 3E form a set of routing diagrams illustrating the application to a simple circuit layout problem of the route devising part of the artwork master production method of the invention. The Figures are actual plots constructed by a Quest Automation digital plotter in accordance with preferred programmes operating upon rather limited and purely illustrative data.

In each case the Figure shows a set of 56 pin positions (the Xs) arranged in 7 rows of 8 columns, and is overplayed (except in Figure 3E) by an (imaginary) grid with vertical (as viewed) lines for each column and between each column and with horizontal (as viewed) lines for each row. For clarity, only two of the vertical lines (Va, Vb) and four of the horizontal lines (Ha, to Hd) are shown.

Figure 3A shows how all the pin positions are schematically connected as required using a programme of the APRICOT type. It will be immediately apparent that the right hand side (as viewed) of the layout is somewhat complicated compared to the left hand side, and that this complication begins with the route segment (31 a) joining cross-point VbHa to the fourth pin position from the left in the top row, and is compounded by the very similar route segments (32a to 35a) joining alternate crossing points thereafter in row Ha to the top row (all these route segments are indicated in heavy lines).

Figure 3B shows how the same pin positions could be schematically connected if the five heavy line route segments (31a to 35a) in Figure 3A were not included-specifically, how the routes are devised using a programme forming part of the method of the invention, and leaving out those routes that cannot be devised so as to be generally parallel to a notional director line (in this case, generally parallel to the vertical grid lines).

The programme (which incorporates the "both directions" feature mentioned hereinbefore) has routed all the connections except those causing the complexity seen in Figure 3A-(the "missing" connections 31 b to 35b are shown superposed directly onto Figure 3B in heavy line), and it can be seen at once that the routed connections are essentially simple and uncomplicated by comparison with those of Figure 3A.

Figures 3C and 3D show two different ways of devising manually the schematic routes the programme has omitted to devise while producing the layout of Figure 3B. Continuing with the programme forming part of the method of the invention, for Figure 3C the operator has instructed the computer to insert out to the left or right the points where he wants the direct routes 31 b to 35b (in Figure 3B) to cross grid lines Hb and Hc. Thus, for example, for route 31b the new crossing points 31 it and 31 2c have been inserted on line Hb and on line Hc respectively, while for route 35b the new crossing point 31 3c has been inserted on line Hb.Once all the new crossing points on lines 31b to 35b have been inserted in this manner, the computer can be made to re-run its drawing programme to give as the result a route layout like that of Figure 3C (the newly devised routes, 31c to 35c are shown in heavy line). As will be readily apparent, the resulting layout is now essentially much neater than that of Figure 3A; though the routes 31c to 35c are themselves as complicated (as 31a to 35a), all the other routes are very much simpler and more straightforward.

In the alternative solution in Figure 3D, a slightly different, possibly neater, result has been achieved by "re-routing" not only those route sections that were causing the problems in Figure 3A but also some of the route sections connected thereto, which latter sections did not strictly need to be re-routed. As can readily be seen, this has been done by both inserting and moving various grid-line crossing points. Thus, for route 31b (in Figure 3B), for example, new crossing points 311 d and 31 2d have been inserted, and crossing points 31 4b and 315b have been moved out to the left to give new crossing points 314d and 31 5d respectively.

The routing layouts of Figures 3C and 3D are schematic, and show merely which point on the printed circuit board is to be connected to which other point; they do not indicate how, using (say) a double sided board with horizontal connector tracks on one side, vertical connector tracks on the other, and via-holes joining the two, the interconnections are actually to be made on the board itself. For the Figure 3C routes this actual interconnection diagram is shown in Figure 3E, in which the 21 symbol (as at 36) represents a viahole between the two sides of the board. The Figure is not entirely clear, for the plotter, which normally shows the "horizontal" and "vertical" track sections in different colours, has drawn some of the former on top of the latter.

Finally, Figures 4A, B, C and D show (on a reduced scale) the improved results attained when using the method of the invention to produce an artwork master for a real circuit.

Figure 4A is the point-to-point schematic layout produced by the plotter not using the modified programme that is a feature of the inventive method (and is thus comparable to Figure 3A); Figure 48 shows the schematic layout first produced-lacking the "confusing" routes~ produced using the modified programme (and thus is comparable to Figure 38); Figure 4C is the final schematic layout after the operator has manually re-routed all the "confusing" routes (and thus is comparable to Figure 3C); and Figure 4D is the actual printed circuit board diagram corresponding to the schematic layout of Figure 3C (and so is comparable to Figure 3E).

There are a number of places in Figure 4A where the schematic layout has become unduly complicated, but for the purposes of the invention this unnecessary complexity is best shown with reference to the two sets (41,42) of three heavy connections roughly central of the Figure, which have forced the subsequent vertical (as viewed) connections up the left-hand side of the Figure into an unpleasant cats cradle of confusion.

However, if this Schematic is re-plotted in accordance with the routing part of the method of the invention then, as can be seen by Figure 4B, with these six connections left out (in the Figure there are drawn in heavy line#3, 44-merely the lines connecting each pair of start/end points) the schematic routes are neat and simple. In the next stage (Figure 4C), the "missing" routes have been inserted by the operator (45, 46), without disturbing the simplicity of the computer-derived routes. The final stage-actual routes-is depicted in Figure 4D (which seems possibly a little more confused that it is, for in the Figure no distinction has been made between lines on the obverse and lines on the reverse of the board!).

Claims (11)

Claims

1. A method of producing an artwork master for use in the manufacture of a printed circuit board or the like, in which method:~ a computer is programmed to devise the routes of conductive tracks interconnecting circuit points provided that such routes when schematically represented are generally parallel to a notional director line on the board; the computer is operated to derive (and display) details of the result of its devising; upon the basis of these details, the result is then modified by inserting into the computer further data defining some or all of the routes that the computer had omitted to devise because it was unable to do so such that when schematically represented they were generally parallel to the notional director line; the computer is operated to derive details of the amended result of its devising;; the last two steps are, if necessary, repeated to obtain a satisfactory result; and from the final amended result there is produced the desired artwork incorporating tracks with the thus-derived routes.

2. A method as claimed in claim 1, in which it is arranged that the computer devise all the routes firstly in one chosen direction, and secondly in the opposite direction.

3. A method as claimed in either of the preceding claims, in which: a computer is programmed to devise, in a first stage, the schematic routes of conductive tracks interconnecting circuit points, determining the positions of a plurality of crossing points (Xpoints) each of which is where a schematic route crosses one of a plurality of imaginary grid lines, with the proviso that such schematic routes must be generally parallel to a notional director line on the board, and then to determine, in a second stage, from the crossing points so derived the track routes-that is, the lengths and positions of the actual track sections; the computer is operated to derive (and display) details of the results of the first and second stages; the results are modified by instructing the computer to change the location of one or more of the crossing points;; the results are further modified by instructing the computer to insert one or more additional crossing points relating to some or all of the schematic routes that it had omitted to devise because it was unable to do so such that they were generally parallel to the notional director line; the computer is then operated to cause it to display the amended result of the first stage, and repeat the second stage so as to provide an amended track route result; the last three steps are if necessary repeated to obtain a satisfactory result; and from the final amended track route result there is produced the desired artwork master incorporating the tracks with the thus-divided routes.

4. A method as claimed in any of the preceding claims, which is applied to the planning of a double-sided printed circuit board.

5. A method as claimed in any of the preceding claims, in which the grid is a rectangular grid, comprising one set of parallel lines orthogonal to a second set.

6. A method as claimed in claim 5 in which, where the artwork master is for a printed circuit board in which conductive tracking is required to extend between and around the positions of a regular array of component pins, the grid lines are defined by the rows and/or the columns of those pin positions.

7. A method as claimed in either of claims 5 and 6, in which, where the board is a double sided one, the computer is programmed to determine, in the first stage, the positions of the points at which tracks extending in one grid co-ordinate direction on one side of the board cross one of the grid lines, and in the second stage the lengths and positions of the track sections extending in the other grid co-ordinate direction on the other side of the board.

8. A method as claimed in any of the preceding claims, in which the notional director line is in such a direction as is aligned with one set of grid lines.

9. A method as claimed in any of the preceding claims, in which, after going through the first and second stages of its programme, the computer derives pictorial details of the results so far (so that the operator may consider, and if necessary amend, the proposals), these pictorial details being obtained using either a plotter or a cathode ray tube display.

10. A method of producing an artwork master as claimed in any of the preceding claims and substantially as described hereinbefore.

11. An artwork master, whenever produced by a method as claimed in any of the preceding claims.