JP2000123062A - Print board design supporting system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a print board design supporting system for automatically arranging a by-pass capacitor by preventing generation of an insufficient area for the by-pass capacitor. SOLUTION: A capacitor automatic arrangement routine 21 calculates the valid range of a by-pass capacitor on a print circuit board to be evaluated from each kind of information including at least the layout information of a print circuit board and impedance information indicating the valid range of a by-pass capacitor, and extracts the insufficient area for the by-pass capacitor on the print circuit board to be evaluated from the calculated valid range of the by-pass capacitor, and arranges the by-pass capacitor in the extracted insufficient area of the by-pass capacitor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a printed circuit board design support system having a function of evaluating the arrangement state of bypass capacitors for removing noise scattered on a printed circuit board.

[0002]

2. Description of the Related Art For example, in an electronic device having a microprocessor, such as a portable computer, a clock signal in a high frequency band and various signals synchronized with the clock signal propagate on a signal path wired on a printed circuit board. And
In printed circuit boards that operate at such high frequencies, a method of inserting a bypass capacitor, which is a noise elimination element, is generally adopted as a measure to suppress radiation noise and power supply noise, which are particularly serious problems. Have been.

Recently, a so-called printed circuit board design CAD (Comppu) using a computer has been used for layout design for forming an electronic circuit on a printed circuit board.
A ter Aided Design (CAD) system is used, and in this printed circuit board design CAD system, when displaying an electronic circuit laid out on a monitor display, the effective range of the bypass capacitor is approximately determined from the wiring shape of the bypass capacitor. Some have a function of calculating and presenting the result by, for example, an ellipse. Therefore, the layout designer can take measures against radiation noise by a bypass capacitor related to the power supply and the ground by performing the design process so that the ellipse covers the entire printed circuit board.

[0004]

However, it is the layout designer himself who looks at this display and detects the region where the bypass capacitor is insufficient, and places the bypass capacitor in a particularly dangerous region. As the complexity increases, the burden on the layout designer increases, and there is a problem that human error easily occurs.

[0005] The present invention has been made in view of such circumstances, and it is possible to easily present an insufficiency region of a bypass capacitor or to automatically arrange a bypass capacitor so that the insufficiency region does not exist. An object of the present invention is to provide a printed circuit board design support system.

[0006]

SUMMARY OF THE INVENTION In order to achieve the above-mentioned object, the present invention provides a method for evaluating a printed circuit board from various types of information including at least printed circuit board layout information and impedance information indicating an effective range of a bypass capacitor. After calculating the effective range of the bypass capacitor and extracting the insufficient area of the bypass capacitor on the printed circuit board to be evaluated from the calculated effective area of the bypass capacitor, furthermore, from the extracted insufficient area of the bypass capacitor, there is a particularly dangerous area. The electronic circuit formed on the printed circuit board to be evaluated is displayed so as to extract a region that is considered to be the same and visually confirm the extracted two types of regions.

In the present invention, since the area where the capacitor must be more carefully inserted and the area where the capacitor is insufficient can be simultaneously grasped, the layout designer can efficiently arrange the bypass capacitor. It is possible to proceed.

Further, the present invention calculates an effective range of a bypass capacitor on a printed circuit board to be evaluated from various information including at least layout information of the printed circuit board and impedance information indicating an effective range of the bypass capacitor, and calculates the calculated bypass. After extracting an insufficient region of the bypass capacitor on the printed circuit board to be evaluated from the effective range of the capacitor, the bypass capacitor is appropriately arranged in the extracted insufficient region of the bypass capacitor. In the present invention,
Appropriate measures for the insufficient region of the capacitor are automatically performed without human intervention.

[0009]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a functional block diagram showing a part of the configuration of a printed circuit board design support system according to an embodiment of the present invention.

As shown in FIG. 1, the printed circuit board design support system includes a board layout CAD processing unit 1, a bypass capacitor placement evaluation tool 2, and various parameters (effective range of bypass capacitors set by a layout designer). Input unit 3 for inputting an impedance value for determination, setting of color or density when highlighting an insufficient area and a dangerous area of a bypass capacitor, and the like.
And printed circuit board layout information (board data including data indicating the configuration of an electronic circuit for each printed circuit board,
A storage unit 4 for storing library information including simulation data such as a layer structure for each printed circuit board, a thickness of each layer, a material, and the like, and various information including a shortage area and a dangerous area of a bypass capacitor. And a display unit 5.

The board layout CAD processing unit 1 is a processing unit serving as a basic tool (main element) of a printed circuit board design CAD.
It is a tool that forms a part of the board layout CAD processing unit 1. The bypass capacitor placement evaluation tool 2 has a capacitor automatic placement routine 21 and a placement evaluation routine 22.

The capacitor automatic arrangement routine 21 is a processing routine for automatically arranging bypass capacitors so that the entire printed circuit board is covered with an impedance value specified by a layout designer. On the other hand, the placement evaluation routine 22 extracts a danger area in which special attention should be paid within the insufficient area in addition to the extraction of the insufficiency area of the bypass capacitor on the conventional printed circuit board. This is a processing routine for presenting both the insufficient area and the dangerous area so that they can be visually confirmed when the area is displayed on the display unit 5. The arrangement evaluation routine 22 detects unnecessary bypass capacitors that are not working effectively and displays them in a list. For example, an abnormally long and long wiring bypass capacitor that does not follow a predetermined wiring rule. It also has a function of detecting wired bypass capacitors and displaying a list.

Here, the principle of extracting a region where a bypass capacitor is reinforced to extract a dangerous region in the printed circuit board design support system will be described. The reinforced region of the bypass capacitor refers to a region including a structure that easily generates radiation noise. The placement evaluation routine 22 determines the reinforced region existing in the separately extracted deficient region as a dangerous region. The dangerous area is presented to the layout designer in an easy-to-understand manner. Then, the placement evaluation routine 22 extracts the following areas as the enhancement areas. (1) An area on the outline of each power supply, including a place where a signal line from a device connected to a different power supply crosses. (2) A region including a power supply pin and a ground pin of a component. (3) An area within a predetermined distance from the outline of each power supply. (4) An area within a predetermined distance from a clock signal line or a data signal line. Hereinafter, description will be made step by step with reference to the drawings. (1) A region on the outline of each power supply, including a place where a signal line from a device connected to a different type of power supply crosses (see FIG. 2).

The layout evaluation routine 22 first extracts signals of all layers in the outer region of each power supply based on the layout information stored in the storage unit 5. Next, the placement evaluation routine 22 extracts a signal connected to a different type of power supply (an operation voltage is extracted from information of a device serving as a driver for a signal power supply). Then, the placement evaluation routine 22 finds the intersection between the extracted signal connected to the different power supply and the outline, and extracts a region within a predetermined distance from the intersection as the reinforced region 11. (2) A region including a power pin and a ground pin of the component (see FIG. 3).

The layout evaluation routine 22 extracts a device that operates at a high frequency from the device information based on the layout information stored in the storage unit 5 and determines a predetermined region from a rectangular area having the positions of the power supply pin and the ground pin as diagonal. The area expanded by the distance of is extracted as the enhancement area 11. (3) An area within a predetermined distance from the outline of each power supply (see FIG. 4).

The layout evaluation routine 22 extracts an area within a predetermined distance inside the outer shape of the power supply shape as the reinforced area 11 based on the layout information stored in the storage unit 5. (4) An area within a predetermined distance from the clock signal line or the data signal line (see FIG. 5).

The placement evaluation routine 22 detects a clock signal line or a data signal line based on the layout information stored in the storage unit 5, and sets an area within a predetermined distance from the detected signal line as the reinforced area 11. Extract.

As described above, by extracting the various reinforced regions 11 including the structure that easily generates the radiation noise,
The placement evaluation routine 22 extracts a strengthened area existing in the insufficient area of the bypass capacitor, that is, a dangerous area,
The shortage area and the dangerous area can be presented to the layout designer in an easy-to-understand manner, and as a result, it is possible to assist the efficient placement of the bypass capacitor.

Next, the principle of automatic placement of bypass capacitors in the printed circuit board design support system will be described. The capacitor automatic arrangement routine 21 automatically arranges the bypass capacitors in the following procedure so that the entire printed board is covered with the impedance value specified by the layout designer.

The capacitor automatic arrangement routine 21 first inputs from the input unit 3 a designation by the layout designer as to how many ohms of the effective area of the printed circuit board is covered.
The correspondence between the impedance value and the radius of the ellipse may be obtained by an approximation formula each time, or a value stored in the storage unit 4 in advance may be read.

Next, the capacitor automatic arrangement routine 21
Extracts an enhanced region, that is, a region where a bypass capacitor must be particularly arranged, based on the principle described above.
FIG. 6A shows an example in which the outer shape of the substrate is a strengthened region.

Then, the capacitor automatic arrangement routine 21
Is to divide the entire area of the printed circuit board into meshes by a rectangle (or a rectangle having a size smaller than that) included in a circle having a designated impedance value. However, a value smaller than the specified impedance value is used for the enhanced region extracted before this. FIG. 6B shows a state in which the mesh is divided. In the figure, a
Is a rectangle that divides the enhancement region into meshes, and b is a rectangle that divides regions other than the reinforcement region into meshes. That is, b is a rectangle included in a circle having an impedance value specified by the layout designer, and a is a rectangle included in a circle having a value smaller than the impedance value specified by the layout designer.

When the entire area of the printed circuit board is divided into meshes, the capacitor automatic arrangement routine 21 arranges the bypass capacitors in the empty areas in all the rectangles and at positions as close as possible to the center. At this time, the capacitor automatic arrangement routine 21 adds a circle having an impedance value designated by the layout designer as a valid range for a rectangle other than the strengthened area. On the other hand, a circle having a value smaller than the impedance value specified by the layout designer is added as an effective range to the reinforced region. FIG. 6C shows a state in which the bypass capacitors are arranged as described above. In the figure, c is the effective range added to the bypass capacitors arranged in the reinforced region, and d is the effective range added to the bypass capacitors arranged in portions other than the reinforced region.

Next, the automatic capacitor placement routine 21
The area not covered by the effective range of the bypass capacitor, that is, the insufficient area of the bypass capacitor is extracted, the mesh division is performed again on the extracted insufficient area, and the above-described processing is performed on all the newly created rectangles. Implement the placement of bypass capacitors. The capacitor automatic arrangement routine 21 repeats this processing until the shortage area of the bypass capacitor does not become smaller.

When the placement of the bypass capacitors is completed, the capacitor automatic placement routine 21 next wires the placed bypass capacitors. This wiring is performed by using an automatic wiring function which is an existing technology. Then, after the completion of the wiring, the automatic capacitor placement routine 21 recalculates the effective ranges of all the arranged bypass capacitors and updates the effective ranges added to the respective bypass capacitors.

Then, the capacitor automatic arrangement routine 21
From here on, extraction of the area where the bypass capacitor is insufficient,
The mesh division, the arrangement of the bypass capacitors, the wiring, and the updating of the effective range of the bypass capacitors are repeated until the shortage area of the bypass capacitors does not become smaller.

FIG. 7 shows a procedure for automatically arranging bypass capacitors in the printed circuit board design support system. FIG. 7 is a flowchart showing a procedure for automatically arranging bypass capacitors in the printed circuit board design support system.

As described above, the capacitor automatic arrangement routine 21 automatically arranges the bypass capacitors so that the entire printed circuit board is covered with the impedance value specified by the layout designer, thereby efficiently arranging the bypass capacitors. Help them move forward.

In the above-described embodiment, an example has been described in which the operation is performed so that the entire printed circuit board is basically covered with a single impedance. It is also useful to arrange the bypass capacitors so as to be covered with an impedance value corresponding to the selection result. In this case, a more efficient and more accurate arrangement of bypass capacitors is realized.

Also, by utilizing the function of detecting an unnecessary bypass capacitor that is not effectively acting, when the bypass capacitor is arranged, the unnecessary bypass capacitor is moved as much as possible to suppress the addition of the bypass capacitor. It is also useful to do so.

[0031]

As described above in detail, according to the present invention, the effectiveness of the bypass capacitor on the printed circuit board to be evaluated is determined from various information including at least the layout information of the printed circuit board and the impedance information indicating the effective range of the bypass capacitor. After calculating the range and extracting the area where the bypass capacitor is insufficient on the printed circuit board to be evaluated from the calculated effective area of the bypass capacitor, it is considered particularly dangerous from the extracted area where the bypass capacitor is insufficient. A region where capacitors must be more carefully inserted because an area is extracted and an electronic circuit configured on a printed circuit board to be evaluated is displayed so that the two types of extracted areas can be visually confirmed. And the area where the capacitor is insufficient Since it is collected by the layout designer makes it possible to advance the arrangement work efficiently bypass capacitor.

Further, the effective range of the bypass capacitor on the printed circuit board to be evaluated is calculated from various information including at least the layout information of the printed circuit board and the impedance information indicating the effective range of the bypass capacitor, and the calculated effective range of the bypass capacitor is calculated. After extracting the bypass capacitor deficient area on the printed circuit board to be evaluated from, the bypass capacitors are appropriately arranged in the extracted bypass capacitor deficient area. It will be performed automatically without any intervention.

[Brief description of the drawings]

FIG. 1 is a functional block diagram showing a part of a configuration of a printed circuit board design support system according to an embodiment of the present invention.

FIG. 2 is an outline of each power supply, which is extracted as a reinforcement area by the printed circuit board design support system of the embodiment,
FIG. 4 is a diagram showing a region including a portion where a signal line from a device connected to a different type of power supply crosses;

FIG. 3 is an exemplary view showing a region including a power supply pin and a ground pin of a component, which is extracted as a reinforcement region by the printed circuit board design support system of the embodiment.

FIG. 4 is an exemplary view showing an area within a predetermined distance inside the outline of each power supply, which is extracted as an enhanced area by the printed circuit board design support system of the embodiment.

FIG. 5 is an exemplary view showing an area within a predetermined distance from a clock signal line or a data signal line, which is extracted as an enhanced area by the printed circuit board design support system of the embodiment.

FIG. 6 is an exemplary conceptual diagram for explaining the principle of automatic placement of bypass capacitors in the printed circuit board design support system of the embodiment.

FIG. 7 is an exemplary flowchart showing the procedure for automatically arranging bypass capacitors in the printed circuit board design support system of the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Board layout CAD processing part 2 ... Bypass capacitor arrangement evaluation tool 3 ... Input part 4 ... Storage part 5 ... Display part 21 ... Automatic capacitor arrangement routine 22 ... Arrangement evaluation routine

Claims (10)

[Claims] 1. A printed circuit board design support system having a function of evaluating an arrangement state of noise-eliminating bypass capacitors scattered on a printed circuit board, wherein at least printed circuit board layout information and impedance information indicating an effective range of the bypass capacitor. Effective range calculating means for calculating the effective range of the bypass capacitor on the printed circuit board to be evaluated from various information including: a bypass capacitor on the printed circuit board to be evaluated from the effective range of the bypass capacitor calculated by the effective range calculating means First insufficient area extracting means for extracting an insufficient area, and second insufficient area extracting means for extracting a predetermined area from the insufficient area of the bypass capacitor extracted by the first insufficient area extracting means. The area extracted by the second insufficient area extracting means And an area other than the area extracted by the second insufficient area extracting means, which is an area extracted by the first insufficient area extracting means, is formed on a printed circuit board to be evaluated. And a display means for displaying the electronic circuit. 2. The printing method according to claim 1, wherein the predetermined area is an area on an outline of each power supply and includes a place where a signal line from a device connected to a different power supply crosses. Board design support system. 3. The printed circuit board design support system according to claim 1, wherein said predetermined area is an area including a power pin and a ground pin of a component. 4. The printed circuit board design support system according to claim 1, wherein the predetermined area is an area within a predetermined distance from the outline of each power supply. 5. The printed circuit board design support system according to claim 1, wherein the predetermined area is an area within a predetermined distance from a clock signal line or a data signal line. 6. A printed circuit board design support system having a function of evaluating an arrangement state of noise-removing bypass capacitors scattered on a printed circuit board, wherein at least printed circuit board layout information and impedance information indicating an effective range of the bypass capacitor. Effective range calculating means for calculating the effective range of the bypass capacitor on the printed circuit board to be evaluated from various information including: a bypass capacitor on the printed circuit board to be evaluated from the effective range of the bypass capacitor calculated by the effective range calculating means A printed circuit board design support system, comprising: a missing area extracting unit that extracts a missing area of the above; and an arranging unit that adds a bypass capacitor to the insufficient area of the bypass capacitor extracted by the insufficient area extracting unit. 7. An unnecessary bypass capacitor extracting unit for extracting an unnecessary bypass capacitor from the effective range of the bypass capacitor calculated by the effective range calculating unit, wherein the arranging unit is extracted by the unnecessary bypass capacitor extracting unit. 7. The printed circuit board design support system according to claim 6, further comprising means for moving the bypass capacitor to the insufficient area. 8. The apparatus according to claim 6, wherein said arranging means approximately calculates an effective range and adds the calculated effective range to the bypass capacitor, and arranges the bypass capacitor such that the added effective range covers a deficient portion. Or a printed circuit board design support system according to 7. 9. A printed circuit board design support system having a function of evaluating an arrangement state of noise-removing bypass capacitors scattered on a printed circuit board, wherein at least printed circuit board layout information and impedance information indicating an effective range of the bypass capacitor. Effective range calculating means for calculating the effective range of the bypass capacitor on the printed circuit board to be evaluated from various information including: a bypass capacitor on the printed circuit board to be evaluated from the effective range of the bypass capacitor calculated by the effective range calculating means A deficient area extracting means for extracting a deficient area, a diverting means for categorizing the deficient area of the bypass capacitor extracted by the deficient area extracting means into a plurality of types in accordance with the degree of the deficiency, Based on the shortage area extraction means PCB design support system characterized by the lack region of the extracted bypass capacitor in which and a placement means for placing a bypass capacitor. 10. The method according to claim 1, further comprising: extracting a shortage region of the bypass capacitor after the wiring of the bypass capacitor arranged by the arranging means, and arranging the bypass capacitor again when the shortage region exists, until the shortage region no longer exists. 7. The apparatus according to claim 6, further comprising control means for repeatedly operating each of said means.
The printed circuit board design support system according to 7, 8, or 9.