Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W40/00—Arrangements for thermal protection or thermal control
  • H10W40/10—Arrangements for heating
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W90/00—Package configurations

Definitions

• This disclosure relates to power semiconductor devices and power conversion devices.
• a pole called a connector separates the semiconductor device from the wiring.
• This disclosure has been made in consideration of the above-mentioned issues, and its purpose is to provide a power semiconductor device and a power conversion device that achieve high heat dissipation.
• the power semiconductor device disclosed herein comprises a power semiconductor device and a main wiring section electrically connected to the power semiconductor device.
• the power semiconductor device includes a semiconductor substrate including a first surface and a second surface opposite the first surface, a first main electrode provided on the first surface of the semiconductor substrate, a second main electrode provided on the second surface of the semiconductor substrate, and a termination structure provided on the first surface of the semiconductor substrate.
• the main wiring section is electrically connected to the first main electrode and is located on the opposite side of the first main electrode from the second main electrode. At least a portion of the portion of the main wiring section facing the termination structure does not have an insulating layer between it and the termination structure.
• the power semiconductor device disclosed herein can achieve high heat dissipation.
• 1 is a schematic cross-sectional view of a power semiconductor device according to a first embodiment
• 1A and 1B are a top view and a cross-sectional view of a power semiconductor device according to a first embodiment
• 1 is a schematic cross-sectional view of a power semiconductor device using a thermally conductive resin insulating layer according to a first embodiment
• 1 is a schematic cross-sectional view of a power semiconductor device using an exterior case according to a first embodiment.
• 1 is a schematic cross-sectional view of a 2-in-1 package power semiconductor device according to a first embodiment
• This is a circuit diagram in which the power semiconductor device in FIG. 5 is a MOS-FET.
• FIG. 1 is a schematic cross-sectional view of a power semiconductor device according to a first embodiment, which is applied to mounting where the back surface of the power semiconductor device is on the mounting substrate side.
• FIG. 10 is a schematic cross-sectional view of a power semiconductor device according to a second embodiment.
• FIG. 10 is an enlarged view of an end portion of a power semiconductor device according to a second embodiment.
• FIG. 10 is a schematic diagram of a cross-sectional shape of a groove in the second embodiment.
• FIG. 11 is an enlarged view of an end portion of a power semiconductor device according to a third embodiment.
• FIG. 11 is an enlarged view of an end portion of a power semiconductor device in a modified example of the third embodiment.
• FIG. 10 is a schematic cross-sectional view of a power semiconductor device according to a fourth embodiment.
• FIG. 13 is a block diagram schematically showing the configuration of a power conversion device according to a fifth embodiment.
• FIG. 1 is a schematic cross-sectional view of the power semiconductor device 1 according to the first embodiment.
• Figure 2 is a schematic top view and cross-sectional view of a power semiconductor device 10 according to the first embodiment, taken from the front surface.
• Figure 1 corresponds to the cross-section AA' of Figure 2 (upside down).
• Detailed structure and protective films of the power semiconductor device 10 are omitted from both Figures 1 and 2. The same applies to the following drawings.
• the power semiconductor device 1 includes a power semiconductor device 10.
• the power semiconductor device 10 includes a semiconductor substrate 21, a termination structure 22, a first main electrode 23 through which the main current flows, a control electrode 24 that controls the main current, and a second main electrode 25 through which the main current flows.
• the control electrode 24 is not necessary in diodes and other devices that do not have the function of controlling the main current.
• the semiconductor substrate 21 includes a first surface S1 and a second surface S2 opposite the first surface S1.
• the first main electrode 23 is provided on the first surface S1 of the semiconductor substrate 21.
• the second main electrode 25 is provided on the second surface S2 of the semiconductor substrate 21.
• the termination structure 22 is provided on the first surface S1 of the semiconductor substrate 21.
• the material of the semiconductor substrate 21 is a semiconductor such as silicon (Si), silicon carbide (SiC), gallium nitride, or gallium oxide, and is not limited to a specific material.
• heat is mainly generated near the first main electrode 23, so the structure of the present disclosure, which draws heat from the surface close to the heat source, is particularly suitable for gallium oxide-based semiconductors, which have low thermal conductivity and do not easily transfer heat to the back surface.
• the semiconductor substrate 21 is a gallium oxide-based semiconductor.
• the basic structure of the power semiconductor device 10 is called a vertical type, in which the main current flows between the front and back surfaces, i.e., in the thickness direction of the semiconductor substrate 21.
• the power semiconductor device 10 functions as a diode or transistor.
• the basic structure of the transistor is not limited to specific structures such as an IGBT (Insulated Gate Bipolar Transistor) or a MOS-FET (Metal Oxide Semiconductor Field Effect Transistor).
• the electrode material is preferably a material with good electrical and thermal conductivity, such as aluminum (Al), aluminum alloy, copper (Cu), copper alloy, a two-layer aluminum/copper structure, or a multilayer structure containing gold (Au) or silver (Ag).
• the electrode may also contain, for example, titanium (Ti) as a diffusion prevention layer.
• Ti titanium
• Ni nickel
• a thin layer of a precious metal such as gold (Au) may be disposed on the surface to prevent electrode oxidation and improve adhesion.
• Au gold
• the control electrode 24 may be placed anywhere inside the termination structure 22 of the power semiconductor device 10, but the edge of the power semiconductor device 10 is preferable because part of the heat dissipation path is blocked by the control wiring. Possible electrode shapes include a rectangle, an ellipse (including a circle), a combination of an ellipse and a rectangle, or a hexagon. In this disclosure, there are no particular restrictions on the placement or shape of the control electrode 24.
• the mounting substrate 103 includes a conductive portion 100, an insulating substrate 42, and a lower electrode 52.
• the conductive portion 100 is preferably made of a material with good electrical and thermal conductivity, such as copper, copper alloy, aluminum, or an aluminum alloy.
• the insulating substrate 42 may be made of a ceramic primarily composed of silicon nitride (Si-N) or aluminum nitride (Al-N), which are highly thermally conductive, but is not limited to these materials.
• the lower electrode 52 must function as a current-free electrode but must also be highly thermally conductive. It is also necessary to match the linear expansion coefficients of the upper and lower electrodes to prevent warping.
• the lower electrode 52 is typically made of the same material as the conductive portion 100, such as copper, aluminum, or an alloy thereof, but is not limited to these materials.
• the conductive portion 100, insulating substrate 42, and lower electrode 52 of the mounting substrate 103 are each bonded using a direct bonding method, AMB (Active Metal Brazing), or similar.
• the power semiconductor device 1 includes a main wiring portion 110 electrically connected to the power semiconductor device 10.
• the main wiring portion 110 is electrically connected to the first main electrode 23 and is disposed on the opposite side of the first main electrode 23 from the second main electrode 25. At least a portion of the portion of the main wiring portion 110 facing the termination structure 22 does not have an insulating layer between it and the termination structure 22.
• the main wiring portion 110 and the termination structure 22 are at least partially continuous. At least a portion of the termination structure 22 forms part of the current path and the heat dissipation path.
• at least a portion of the area where the main wiring portion 110 and the termination structure 22 face each other is filled with a conductor without any gaps. Specifically, at least a portion of the area where the main wiring portion 110 and the termination structure 22 face each other is filled with the first main electrode 23 and the bonding material 31a without any gaps.
• the power semiconductor device 1 includes a control wiring section 120 electrically connected to the power semiconductor device 10.
• the mounting substrate 103 represents the entire integrated mounting substrate of the control wiring section 120 and the main wiring section 110, which includes the upper electrode (conductive section 100), the insulating substrate 42, and the lower electrode 52.
• the mounting substrate 103 is described as a substrate generally known as a ceramic insulating circuit board, but it may also be one that uses a thermally conductive resin insulating layer 41 as shown in Figure 3, or it may have another structure.
• the material for the support plate 51 is preferably a highly thermally conductive material, specific examples of which include copper, copper alloy, aluminum, and aluminum alloy.
• the mounting substrate 102 is the entire integrated mounting substrate for the main wiring section 110 and control wiring section 120, which has the thermally conductive resin insulating layer 41 and support plate 51.
• the sealing structure of Figure 3 is generally created by transfer molding using epoxy resin.
• the bonding material 31a electrically and mechanically connects the first main electrode 23 to the portion 13 of the mounting substrate 103 opposite the first main electrode 23.
• the bonding material 31b electrically and mechanically connects the control electrode 24 to the portion 14 of the mounting substrate 103 opposite the control electrode 24.
• solder is a common bonding material, it increases thermal resistance, which is roughly determined by thermal conductivity, bonding thickness, and cross-sectional area, making it unsuitable for the present disclosure.
• a sintered material using fine particles of silver or copper is suitable for the present disclosure because it achieves low thermal resistance through a thin bonding thickness and high thermal conductivity. There are no particular requirements for pressure or no pressure, or for the process temperature or temperature profile.
• bonding may be achieved by liquid-phase diffusion bonding using Cu-Sn (tin), which allows for a thin bonding thickness. Because the bonding thickness is proportional to the thermal resistance, it is preferable for the bonding thickness to be at least 0.2 mm, and preferably 0.1 mm or less.
• the distance between the main wiring portion 110 and the termination structure 22 is approximately the same as the joint thickness, so it is preferable that it be at least 0.2 mm, and preferably 0.1 mm or less, similar to the joint thickness.
• the above describes the joint material 31a, and it is not necessarily required for the joint material 31b connected to the control electrode 24, which generates less heat than the first main electrode 23 and the second main electrode 25, but it is preferable for the manufacturing process to use the same joint material and joint thickness.
• the main circuit wiring 53 connected to the first main electrode 23 via the conductive portion 100 of the mounting substrate 103, the control wiring 54 connected to the control electrode 24, and the main circuit wiring 55 connected to the second main electrode 25 are connected via bonding materials 32a, 32b, and 32c, respectively.
• the main circuit wiring 55 connected to the second main electrode 25 is depicted in a lead frame-like shape in this embodiment, it may also be a wire made of aluminum or copper. In this case, it is joined to the second main electrode 25 by wire bonding, eliminating the need for bonding material 32c. While solder is typically used for bonding materials 32a, 32b, and 32c, solder remelting may occur depending on the process temperature or temperature profile when mounting the power semiconductor device 1 of the present disclosure to a power converter.
• solder is not necessarily optimal.
• Other bonding materials similar to bonding material 31a may be used, or direct bonding such as ultrasonic bonding or laser welding without a bonding material may also be used.
• direct bonding there is no bonding material, so the main circuit wiring 53 and the connection portion 12 of the mounting board 103 are in direct contact.
• the termination structure 22 has a field plate structure that is not affected by the electric field from the conductive portion 100 that forms part of the main circuit wiring 53 connected to the first main electrode 23.
• the insulating material 26 forms part of the termination structure 22.
• silicon oxide other materials with high dielectric constants such as hafnium oxide and tantalum oxide can be used for the insulating material 26, but there are no particular restrictions as long as it can withstand the manufacturing process and ensure insulation and insulation reliability.
• Sealing with the sealing material 91 is typically achieved by transfer molding with epoxy resin, or by potting silicone gel or liquid epoxy resin on an outer periphery of an outer case 202 made of thermoplastic resin, as shown in Figure 4.
• the base plate 201 is preferably made of a highly thermally conductive material such as copper, copper alloy, aluminum, aluminum alloy, or AlSiC.
• the bonding material 33 bonds the mounting substrate 103 to the base plate 201, and is preferably a highly thermally conductive material such as the aforementioned bonding material 31a, in addition to solder.
• the bonding material 34 bonds the outer case 202 to the base plate 201.
• a material commonly known as an adhesive may be used as long as there is no gap between the outer case 202 and the base plate 201 and mechanical reliability is ensured. Furthermore, integrating the base plate 201 and mounting substrate 103 is preferable because it eliminates the thermal resistance of the bonding material.
• Other methods for forming the sealing material include compression molding or sheet-like sealing materials.
• a structure in which the conductive part 100, which forms all or part of the cooler, the thermally conductive resin insulating layer 41, and the cooler are integrated in the part corresponding to the support plate 51 in Figure 3 is desirable from the perspective of heat dissipation, as there is no thermal resistance generated in the TIM or bonding material.
• FIG. 5 shows a circuit diagram when the power semiconductor device 10 in Figure 5 is a MOS-FET.
• the P wiring 56, AC wiring 57, and N wiring 58 are arranged as parallel plates as much as possible.
• Each arm may also be composed of multiple power semiconductor devices 10.
• Multiple devices may also be lined up in a direction perpendicular to the paper, or the three phases U, V, and W may be mounted on a single mounting board 103. There is no particular limit to the number of power semiconductor devices 10 mounted.
• the power semiconductor device 1 is described as being configured in what is generally known as flip-chip mounting, in which the front surface of the power semiconductor device 10 faces the mounting substrate. However, it can also be configured in a manner in which the back surface of the power semiconductor device 10 faces the mounting substrate, as shown in Figure 7, for example. Double-sided cooling can be achieved by placing coolers on both sides. Note that using the entire integrated mounting substrate of the main wiring section having the insulating substrate 42 and lower electrode 52 as the mounting substrate 104 is merely one example, and any substrate form, including non-insulated forms, is conceivable for the power semiconductor device 1 as long as the conductive section 100 is a good conductor. Similarly, various forms and arrangements are conceivable for the main circuit wiring 53, control wiring 54, and main circuit wiring 55, including wires.
• the effects of power semiconductor device 1 according to the first embodiment will be described.
• the power semiconductor device 1 of the first embodiment at least a part of the portion of the main wiring portion 110 facing the termination structure 22 does not have an insulating layer between it and the termination structure 22. This allows for increased heat dissipation from the first surface S1 of the semiconductor substrate 21. In other words, the thermal resistance can be reduced. Therefore, high heat dissipation can be achieved.
• the main wiring portion 110 and at least a portion of the termination structure 22 are continuous, and at least a portion of the termination structure 22 forms a current path and a portion of the heat dissipation flow path. Therefore, the heat dissipation flow path can be expanded to an area greater than the area of the first main electrode 23, thereby improving heat dissipation from the first surface S1 of the semiconductor substrate 21.
• the distance between the main wiring portion 110 and the termination structure 22 is less than 0.2 mm.
• the termination structure 22 is a field plate structure.
• the field plate structure is not affected by the conductive portion 100 that forms part of the main circuit wiring 53 connected to the first main electrode 23, and therefore, by shortening the distance between the first main electrode 23 and the main wiring portion 110, heat dissipation from the first surface S1 of the semiconductor substrate 21 can be improved.
• the semiconductor substrate 21 is a gallium oxide semiconductor.
• Gallium oxide semiconductors have low thermal conductivity and do not easily transfer heat to the backside, making them suitable for a structure that draws heat away from the front surface close to the heat source.
• FIG 8 is a schematic cross-sectional view of the power semiconductor device 1 according to a second embodiment of the present disclosure.
• a groove 61 is provided in the main wiring portion 110.
• the groove 61 in the mounting substrate 103 is provided along the outer periphery of the termination structure 22 of the power semiconductor device 10 so as to face the termination structure 22.
• the rest is the same as in Figure 1.
• the power semiconductor device 10 has a side surface 27.
• FIG. 9 shows an enlarged view of the edge of the power semiconductor device.
• Figure 9(b) is a partial enlarged view of Figure 8, and Figure 9(a) shows the case where bonding material 31a has protruded.
• the second main electrode 25, through which the main current flows, and the side surface 27 of the power semiconductor device 10 are basically at the same potential, and since bonding material 31a is a good conductor, the first main electrode 23 and second main electrode 25 are short-circuited.
• a groove 61 is provided in the mounting substrate 103 to prevent bonding material 31a from protruding.
• the cross-sectional shape of the groove 61 is rectangular in Figure 8, but it may also be trapezoidal, a combination of a trapezoid and a rectangle, an ellipse, or a combination of an ellipse and a rectangle, as shown in Figures 10(a) to 10(d).
• the groove sidewall closer to the power semiconductor device 10 moves away from the power semiconductor device 10 in the depth direction, as this increases the cross-sectional area of the heat flow from the power semiconductor device 10.
• the cross-sectional area is constant, but if the sidewall of the groove 61 widens like a trapezoid, the cross-sectional area increases, thereby reducing the thermal resistance.
• the grooves 61 are provided so as to face each other along the outer periphery of the termination structure 22 of the power semiconductor device 10. Therefore, the grooves 61 can suppress the creeping up of the bonding material 31 a, thereby suppressing the short circuit between the first main electrode 23 and the second main electrode 25.
• FIG. 11 is a schematic cross-sectional view of the end portion of the power semiconductor device 1 according to a third embodiment of the present disclosure.
• the power semiconductor device 10 includes an insulating material 28.
• the insulating material 28 is formed on a side surface 27 of the power semiconductor device 10. In this embodiment, the insulating material 28 is formed around the entire periphery of the side surface 27. The rest of the configuration is the same as that shown in FIG. 1 .
• the insulating material 28 may be an oxide such as silicon oxide or aluminum oxide, a nitride such as silicon nitride or aluminum nitride, glass, or a resin such as polyimide or epoxy.
• the insulating material 28 may be formed by masking the termination structure and depositing a film by chemical vapor deposition (CVD), physical vapor deposition (PVD) such as sputtering or evaporation, spraying, or by applying a resin or the like.
• CVD chemical vapor deposition
• PVD physical vapor deposition
• the insulating material 28 can prevent the first main electrode 23 and the second main electrode 25 from shorting out even if the bonding material 31 a creeps up.
• the insulating material 28 does not necessarily need to cover the vicinity of the second main electrode 25, but it should be at least 0.05 mm thick in the thickness direction of the semiconductor substrate 21, and preferably 0.1 mm thick or more.
• an inclined portion 27b is provided at the end of the power semiconductor device.
• a vertical portion 27a and an inclined portion 27b are provided on the side surface 27 of the power semiconductor device 10.
• the inclined portion 27b is formed around the entire periphery of the side surface 27. The inclined portion 27b further improves the ease of forming the insulating material 28 and the insulation reliability.
• the insulating material 28 is formed on the side surface 27 of the power semiconductor device 10. This makes it possible to improve the dielectric strength.
• an inclined portion 27b is provided on the side surface 27 of the power semiconductor device 10. This improves the dielectric strength.
• FIG. 13 is a cross-sectional schematic diagram of the power semiconductor device 1 according to the fourth embodiment of the present disclosure.
• the power semiconductor device 1 includes an underfill resin 81.
• the underfill resin 81 is disposed in a gap between the power semiconductor device 10 and the main wiring portion 110.
• a local gap between the power semiconductor device 10 and the mounting substrate 103 is filled with the underfill resin 81.
• the rest is the same as Fig. 1 .
• the die bonding process described in embodiment 2 creates localized voids between the power semiconductor device 10 and the mounting substrate 103. Because the bonding material 31a is formed so that it does not protrude, as shown in Figure 9(a), voids are created at the edges of the power semiconductor device 10. Also, voids inevitably form around the control electrode 24. This is because, without the voids, the first main electrode 23 and control electrode 24 would be short-circuited. However, in subsequent processes, the back surface or second main electrode 25 will inevitably be exposed to mechanical stress. Gallium oxide, in particular, has cleavage planes, which raise concerns about cracks and chips originating from the edges of the gaps. By filling the voids with underfill resin 81 after the die bonding process, cracks and chips originating from the edges of the gaps are eliminated in subsequent processes, improving reliability.
• the underfill resin 81 is disposed in the gap between the power semiconductor device 10 and the main wiring portion 110.
• Gallium oxide has a cleavage plane and is prone to cracking, so mechanical support by the underfill resin 81 can reduce breakage during the manufacturing process.
• Embodiment 5 the power semiconductor device 1 according to the first to fourth embodiments is applied to a power conversion device.
• the present disclosure is not limited to a specific power conversion device, the fifth embodiment will be described with reference to a case where the present disclosure is applied to a three-phase inverter.
• FIG. 14 is a block diagram showing the configuration of a power conversion system that uses the power conversion device 300.
• the power conversion system shown in FIG. 14 is composed of the power conversion device 300, a power source 410, and a load 420.
• the power supply 410 is a DC power supply that supplies DC power to the power conversion device 300.
• the power supply 410 can be configured from a variety of sources.
• the power supply 410 can be configured from a DC system, a solar cell, or a storage battery.
• the power supply 410 may also be configured from a rectifier circuit connected to an AC system or an AC/DC converter.
• the power supply 410 may also be configured from a DC/DC converter that converts the DC power output from the DC system into a specified power.
• Load 420 is a three-phase electric motor driven by AC power supplied from power conversion device 300. Note that load 420 is not limited to a specific application. Load 420 is an electric motor mounted on various electrical devices. Load 420 is used, for example, as an electric motor for hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.
• the power conversion device 300 is a three-phase inverter connected between the power source 410 and the load 420.
• the power conversion device 300 converts the DC power supplied from the power source 410 into AC power and supplies the AC power to the load 420.
• the power conversion device 300 has a main conversion circuit 301 that converts DC power into AC power and outputs it, and a control circuit 303 that outputs a control signal to the main conversion circuit 301 to control the main conversion circuit 301.
• the configuration of the power conversion device 300 will be described in detail below.
• the main conversion circuit 301 has a switching element and a freewheeling diode, not shown. By switching the switching element, the main conversion circuit 301 converts the DC power supplied from the power source 410 into AC power and supplies it to the load 420.
• the main conversion circuit 301 is a two-level three-phase half-bridge circuit, consisting of six switching elements and six freewheeling diodes connected in anti-parallel to each switching element.
• freewheeling diodes are not required for transistors with freewheeling diode functionality, such as MOS transistors with body diodes or RC-IGBTs with built-in diodes.
• the switching elements themselves may be composed of multiple transistors.
• At least one of the switching elements and freewheel diodes of the main conversion circuit 301 is a switching element or freewheel diode included in a semiconductor device 302 corresponding to the power semiconductor device 1 of any of embodiments 1 to 4.
• the six switching elements are connected in series in groups of two to form upper and lower arms. Each upper and lower arm forms one phase (U phase, V phase, W phase) of the full bridge circuit.
• the output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 301, are connected to the load 420.
• the main conversion circuit 301 has a drive circuit (not shown) that drives each switching element.
• This drive circuit may be built into the semiconductor device 302, or may be configured separately from the semiconductor device 302.
• This drive circuit generates drive signals that drive the switching elements of the main conversion circuit 301, and supplies them to the control electrodes of the switching elements of the main conversion circuit 301.
• this drive circuit outputs a drive signal that turns the switching element on and a drive signal that turns the switching element off to the control electrode of each switching element in accordance with control signals from the control circuit 303, which will be described later.
• the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element.
• the drive signal is a voltage signal (off signal) that is equal to or less than the threshold voltage of the switching element.
• the control circuit 303 controls the switching elements of the main conversion circuit 301 so that the desired power is supplied to the load 420. Specifically, it calculates the time (on time) that each switching element of the main conversion circuit 301 should be in the on state based on the power to be supplied to the load 420.
• the main conversion circuit 301 can be controlled using PWM control, which modulates the on time of the switching elements according to the voltage to be output.
• the control circuit 303 outputs a control command (control signal) to the drive circuit of the main conversion circuit 301 so that an on signal and an off signal are output to the switching elements that should be in the on state and the switching elements that should be in the off state at each point in time, respectively.
• the drive circuit of the main conversion circuit 301 outputs an on signal or an off signal as a drive signal to the control electrode of each switching element in accordance with this control signal.
• the power semiconductor devices according to embodiments 1 to 4 are used as the semiconductor device 302 that constitutes the main conversion circuit 301, thereby achieving high heat dissipation properties for the semiconductor device 302.
• the present disclosure is not limited to this and can be applied to various power conversion devices.
• a two-level power conversion device was described, but a three-level or multi-level power conversion device may also be used, and the present disclosure may also be applied to a single-phase inverter when supplying power to a single-phase load.
• the present disclosure can also be applied to a DC/DC converter or AC/DC converter when supplying power to a DC load, etc.
• the power conversion device to which this disclosure is applied is not limited to cases in which the above-mentioned load is an electric motor, but can also be used, for example, as a power supply device for electric discharge machines, laser processing machines, induction heating cookers, and contactless power supply systems, and can even be used as a power conditioner for solar power generation systems, power storage systems, etc.
• Power semiconductor device 10. Power semiconductor device, 12. Connection portion, 13, 14. Portion, 21. Semiconductor substrate, 22. Termination structure, 23. First main electrode, 24. Control electrode, 25. Second main electrode, 26, 28. Insulating material, 27. Side, 27a. Vertical portion, 27b. Inclined portion, 31a, 31b, 32a, 32c, 33, 34. Bonding material, 41. Thermally conductive resin insulating layer, 42. Insulating substrate, 51. Support plate, 52. Lower electrode, 53, 55. Main circuit wiring, 54. Control wiring, 61. Groove, 81. Underfill resin, 91. Sealing material, 100. Conductive portion, 102, 103, 104. Mounting substrate, 110. Main wiring portion, 201. Base plate, 202. Exterior case, S1. First surface, S2. Second surface.

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