WO2024219286A1 - 樹脂多層基板及び回路モジュール - Google Patents

樹脂多層基板及び回路モジュール Download PDF

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Publication number
WO2024219286A1
WO2024219286A1 PCT/JP2024/014345 JP2024014345W WO2024219286A1 WO 2024219286 A1 WO2024219286 A1 WO 2024219286A1 JP 2024014345 W JP2024014345 W JP 2024014345W WO 2024219286 A1 WO2024219286 A1 WO 2024219286A1
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WO
WIPO (PCT)
Prior art keywords
conductor layer
resin
corners
conductor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2024/014345
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
幸也 平岡
良知 田中
和裕 山地
知大 古村
克郎 平山
直樹 中山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to CN202480026901.XA priority Critical patent/CN120982217A/zh
Priority to DE112024001581.6T priority patent/DE112024001581T5/de
Priority to JP2025515178A priority patent/JP7798237B2/ja
Publication of WO2024219286A1 publication Critical patent/WO2024219286A1/ja
Priority to US19/343,274 priority patent/US20260032818A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H05K2201/09527—Inverse blind vias, i.e. bottoms outwards in multilayer PCB; Blind vias in centre of PCB having opposed bottoms
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09863—Concave hole or via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/421—Blind plated via connections

Definitions

  • the present invention relates to a resin multilayer board and a circuit module.
  • Patent document 1 discloses a printed circuit board that includes a first insulating layer, a plated via formed by penetrating the first insulating layer, a second insulating layer laminated on the first insulating layer, and a paste via formed by penetrating the second insulating layer so as to contact the plated via, and the contact interface between the plated via and the paste via is located within the first insulating layer.
  • the contact interface between the plated via and the paste via is provided within the first insulating layer, thereby improving the connectivity between the plated via and the paste via.
  • the plated via means, for example, a film grown by a liquid phase method or a vapor phase method
  • the paste via means, for example, a solidified paste.
  • the present invention has been made to solve the above problems, and aims to provide a resin multilayer substrate having interlayer connection conductors with high strength. Furthermore, the present invention aims to provide a circuit module including the above resin multilayer substrate.
  • the resin multilayer board of the present invention comprises at least one resin insulation layer, a first conductor layer laminated on the resin insulation layer, a second conductor layer laminated on the resin insulation layer on the side opposite to the first conductor layer, and an interlayer connection conductor provided to penetrate the resin insulation layer in the lamination direction of the first conductor layer and the second conductor layer and connecting the first conductor layer and the second conductor layer.
  • the interlayer connection conductor includes a first portion and a second portion located closer to the second conductor layer than the first portion. The first portion has a lower conductivity than the second portion. The first conductor layer is not in contact with the second portion. The second conductor layer is in contact with the second portion.
  • the distance between the two corners of the tip of the second part that are furthest apart in the direction perpendicular to the stacking direction is longer than the distance between the two corners of the base end of the second part that are in contact with the second conductor layer, and a part of the first part is present on the second conductor layer side of the straight line connecting the corners of the tip of the second part.
  • the circuit module of the present invention comprises a resin multilayer substrate of the present invention and electronic components arranged on the resin multilayer substrate.
  • the present invention it is possible to provide a resin multilayer substrate having interlayer connection conductors with high strength. Furthermore, according to the present invention, it is possible to provide a circuit module including the above-mentioned resin multilayer substrate.
  • FIG. 1 is a cross-sectional view showing a schematic diagram of an example of a resin multilayer substrate according to a first embodiment of the present invention.
  • 2A to 2F are cross-sectional views that typically show an example of a method for manufacturing the resin multilayer substrate 1.
  • FIG. 3 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a second embodiment of the present invention.
  • FIG. 4 is a cross-sectional view showing an example of a resin multilayer substrate according to a third embodiment of the present invention.
  • FIG. 5 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a fourth embodiment of the present invention.
  • FIG. 1 is a cross-sectional view showing a schematic diagram of an example of a resin multilayer substrate according to a first embodiment of the present invention.
  • 2A to 2F are cross-sectional views that typically show an example of a method for manufacturing the resin multilayer substrate 1.
  • FIG. 3 is a cross-sectional
  • FIG. 6 is a cross-sectional view illustrating an example of a resin multilayer substrate according to a fifth embodiment of the present invention.
  • FIG. 7 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a sixth embodiment of the present invention.
  • FIG. 8 is a cross-sectional view that illustrates an example of a circuit module including a resin multilayer substrate of the present invention.
  • the resin multilayer board and the circuit module of the present invention will now be described.
  • the present invention is not limited to the following configurations, and can be appropriately modified and applied within the scope of the present invention.
  • the present invention also includes a combination of two or more of the individual preferred configurations of the present invention described below.
  • terms indicating the relationship between elements e.g., "perpendicular,” “parallel,” “orthogonal,” etc.
  • terms indicating the shapes of elements are not expressions that express only a strict meaning, but are expressions that include a range of substantial equivalence, for example, differences of about a few percent.
  • the interlayer connection conductor includes a first portion and a second portion, and the first conductor layer is in contact with the first portion.
  • FIG. 1 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a first embodiment of the present invention.
  • the resin multilayer substrate 1 comprises at least one resin insulating layer 10, a first conductor layer 20 laminated on the resin insulating layer 10, a second conductor layer 30 laminated on the resin insulating layer 10 on the opposite side to the first conductor layer 20 (the lower side in FIG. 1), and an interlayer connection conductor 40 that penetrates the resin insulating layer 10 in the lamination direction of the first conductor layer 20 and the second conductor layer 30 (the up-down direction in FIG. 1) and connects the first conductor layer 20 and the second conductor layer 30.
  • the resin constituting the resin insulation layer 10 may be a thermosetting resin or a thermoplastic resin, but is preferably a thermoplastic resin.
  • the resin insulation layer 10 is made of a thermoplastic resin, multiple resin sheets on which conductor layers are formed can be stacked and pressure-bonded together by heat treatment.
  • Thermosetting resins include epoxy resins, phenolic resins, polyimide resins or modified resins thereof, and acrylic resins.
  • thermoplastic resins include liquid crystal polymers (LCPs), fluororesins, thermoplastic polyimide resins, polyether ether ketone resins (PEEK), polyphenylene sulfide resins (PPS), etc.
  • LCPs liquid crystal polymers
  • PEEK polyether ether ketone resins
  • PPS polyphenylene sulfide resins
  • the resin insulation layer 10 is preferably made of liquid crystal polymer (LCP).
  • LCP liquid crystal polymer
  • Liquid crystal polymer has a lower water absorption rate than other thermoplastic resins. Therefore, when the resin insulation layer 10 is made of liquid crystal polymer, the amount of moisture remaining in the resin insulation layer 10 can be reduced.
  • the resin insulation layer 10 may contain an inorganic material such as a ceramic filler.
  • Ceramic fillers include, for example, boron nitride, talc, and fused silica.
  • the thickness of one resin insulation layer 10 is preferably 10 ⁇ m or more and 100 ⁇ m or less.
  • the first conductor layer 20 and the second conductor layer 30 may each have a pattern shape patterned into wiring or the like, or may have a surface shape that spreads over one surface.
  • the shapes of the first conductor layer 20 and the second conductor layer 30 may be the same as each other or different.
  • the first conductor layer 20 and the second conductor layer 30 are each a metal layer made of, for example, copper, silver, aluminum, stainless steel, nickel, gold, an alloy containing at least one of these metals, or the like.
  • the materials of the first conductor layer 20 and the second conductor layer 30 may be the same as or different from each other.
  • the first conductor layer 20 and the second conductor layer 30 are each preferably made of a metal foil, and more preferably made of copper (Cu) foil.
  • the first conductor layer 20 and the second conductor layer 30 may each have a matte surface on one main surface and a shiny surface on the other main surface.
  • the thickness (length in the stacking direction) of the first conductor layer 20 and the second conductor layer 30 is preferably 1 ⁇ m or more and 35 ⁇ m or less, and more preferably 6 ⁇ m or more and 18 ⁇ m or less.
  • the thicknesses of the first conductor layer 20 and the second conductor layer 30 may be the same as or different from each other.
  • the first conductor layer 20 and the second conductor layer 30 may or may not be parallel to each other.
  • One resin insulating layer 10 may be provided between the first conductor layer 20 and the second conductor layer 30, or two or more resin insulating layers 10 may be provided.
  • the configurations of the resin insulating layers 10 may be the same as each other or different.
  • the thicknesses of the resin insulating layers 10 may be the same as each other or different.
  • the interlayer connection conductor 40 is provided so as to penetrate the resin insulation layer 10 in the stacking direction but not through the first conductor layer 20 and the second conductor layer 30, and to connect the first conductor layer 20 and the second conductor layer 30. Therefore, the interlayer connection conductor 40 penetrates the resin insulation layer 10 in the stacking direction by the number of layers provided between the first conductor layer 20 and the second conductor layer 30.
  • the shape of the interlayer connection conductor 40 is preferably circular.
  • circular shapes include not only perfect circles, but also ellipses, ovals, etc.
  • the interlayer connection conductor 40 includes a first portion 41 and a second portion 42 located closer to the second conductor layer 30 than the first portion 41.
  • the first portion 41 has a lower conductivity than the second portion 42.
  • the first portion 41 may be a paste via or a plated via.
  • a paste via refers to a solidified paste
  • a plated via refers to a film grown by a liquid phase method or a vapor phase method.
  • the first portion 41 When the first portion 41 is a plated via, it is preferable that the first portion 41 does not contain a resin material.
  • the conductive material content of the first portion 41 is 90.0 volume % or more and 100 volume % or less.
  • the second portion 42 may be a paste via or a plated via, but is preferably a plated via.
  • the second portion 42 is a plated via, it is preferable that the second portion 42 does not contain a resin material.
  • the conductive material content of the second portion 42 is 90.0 volume % or more and 100 volume % or less.
  • the conductive material constituting the second portion 42 is preferably the same as the metal constituting the second conductor layer 30, e.g., Cu.
  • the first portion 41 is a paste via and the second portion 42 is a plated via.
  • the content of the resin material in the first portion 41 is greater than the content of the resin material in the second portion 42.
  • the type and content of the resin material contained in the first portion 41 or the second portion 42 can be measured by methods such as Fourier transform infrared spectroscopy (FT-IR) and gas chromatography mass spectrometry (GC-MS). The same applies to the third portion 43 described below.
  • FT-IR Fourier transform infrared spectroscopy
  • GC-MS gas chromatography mass spectrometry
  • examples of the conductive material constituting the first portion 41 include Cu, Sn, Ag, Ni, Cr, Pt, Mo, Ga, Ge, Sb, In, Pb, and alloys containing at least one of these metals.
  • the conductive material constituting the first portion 41 may be the same as or different from the conductive material constituting the second portion 42.
  • the conductive material constituting the first portion 41 is, for example, an alloy containing Cu and Sn.
  • examples of the resin material constituting the first portion 41 include at least one thermosetting resin selected from the group consisting of epoxy resin, phenolic resin, polyimide resin or modified resin thereof, and acrylic resin, or at least one thermoplastic resin selected from the group consisting of polyamide resin, polystyrene resin, polymethacrylic resin, polycarbonate resin, and cellulose-based resin.
  • the content of the conductive material in the first portion 41 is less than the content of the conductive material in the second portion 42. It is also preferable that the content of the conductive material in the first portion 41 is greater than the content of the resin material in the first portion 41.
  • the combination of materials for the first portion 41 and the second portion 42 is not particularly limited.
  • first portion 41 it is preferable to use an alloy or a metal containing resin for the purpose of joining, while for the second portion 42, it is preferable to use a pure metal, resin, or a material with little alloy or no resin in order to increase electrical conductivity.
  • the conductive material constituting the first portion 41 can be, for example, Sn.
  • Sn which has a low melting point
  • the first portion 41 can easily function as a bonding material.
  • the combination may be plated vias made of different metals, for example, the conductive member constituting the first portion 41 being Sn and the conductive member constituting the second portion 42 being Cu.
  • the first conductor layer 20 is not in contact with the second portion 42. In the example shown in FIG. 1, the first conductor layer 20 is in contact with the first portion 41.
  • the second conductor layer 30 is in contact with the second portion 42. It is preferable that the second conductor layer 30 and the second portion 42 are made of the same material and are joined without a dissimilar material being between them.
  • the end on the first conductor layer 20 side is defined as the tip end
  • the end on the second conductor layer 30 side is defined as the base end
  • the end on the first conductor layer 20 side is defined as the base end.
  • the point of the tip of the second portion 42 that is the most distant in the direction perpendicular to the stacking direction is shown as a corner P21.
  • the point of the base end of the second portion 42 that is in contact with the second conductor layer 30 is shown as a corner P22. Furthermore, in FIG. 1, the point of the base end of the first portion 41 that is in contact with the first conductor layer 20 is shown as a corner P12.
  • the distance between the two corners P21 at the tip of the second portion 42 that are furthest apart in the direction perpendicular to the stacking direction (the length indicated by the double-headed arrow D21 in FIG. 1) is longer than the distance between the two corners P22 at which the base end of the second portion 42 contacts the second conductor layer 30 (the length indicated by the double-headed arrow D22 in FIG. 1), and part of the first portion 41 is present on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42.
  • the second portion 42 is connected to the first portion 41 in a concave shape that envelops the first portion 41, which increases the strength of the portion where the reaction product for joining the first portion 41 and the second portion 42 is formed, and therefore increases the strength of the interlayer connection conductor 40.
  • the first portion 41 that exists on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42 may be in one place as shown in FIG. 1, or in two or more places.
  • the distance D21 between the corners P21 at the tip of the second portion 42 is, for example, 60 ⁇ m or more and 80 ⁇ m or less.
  • the distance D22 between the corners P22 at the base end of the second portion 42 is, for example, 40 ⁇ m or more and 60 ⁇ m or less.
  • the ratio of D22/D21 is, for example, 0.67 or more and 0.75 or less.
  • the maximum thickness in the stacking direction between the straight line connecting the corners P21 at the tips of the second portion 42 and the first conductor layer 20 is T11, and the maximum thickness T11 is, for example, 5 ⁇ m or more and 15 ⁇ m or less.
  • the maximum thickness in the stacking direction between the straight line connecting the corners P21 at the tips of the second portion 42 and the second conductor layer 30 is T21, and the maximum thickness T21 is, for example, 20 ⁇ m or more and 30 ⁇ m or less. It is preferable that the maximum thickness T21 is greater than the maximum thickness T11.
  • the maximum thickness in the stacking direction between a straight line connecting the corners P21 at the tips of the second portion 42 and the end of the first portion 41 located on the second conductor layer 30 side is T12, and the maximum thickness T12 is, for example, 1 ⁇ m or more and 10 ⁇ m or less.
  • the maximum thickness T12 may be the same as the maximum thickness T11, or may be smaller than the maximum thickness T11, or may be larger than the maximum thickness T11.
  • the ratio of T12/(T11+T21) is, for example, 0.03 or more and 0.29 or less.
  • the ratio of T12/(T11+T12) is, for example, 0.17 or more and 0.40 or less.
  • the ratio of T12/T11 is, for example, 0.2 or more and 0.6 or less.
  • the ratio of T12/T21 is, for example, 0.03 or more and 0.50 or less.
  • the area of the first portion 41 existing on the second conductor layer 30 side of the straight line connecting the corners P21 of the tips of the second portion 42 is preferably 10% or more, more preferably 20% or more, and even more preferably 50% or more of the total cross section area of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portion 42.
  • the area of the first portion 41 existing on the second conductor layer 30 side of the straight line connecting the corners P21 of the tips of the second portion 42 may be 100%, 90% or less, or 80% or less of the total cross section area of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portion 42.
  • the shape of the corner P21 at the tip of the second portion 42 is not particularly limited, and may be, for example, flat as shown in FIG. 1 or pointed as shown in FIG. 3 described below.
  • the corner P21 at the tip of the second portion 42 may or may not be parallel to the first conductor layer 20 or the second conductor layer 30.
  • the second portion 42 When viewed in cross section in a direction perpendicular to the stacking direction, the second portion 42 may not be present on the first conductor layer 20 side of the straight line connecting the corners P21 at the tips of the second portion 42.
  • the straight line connecting the corners P21 at the tip of the second portion 42 may be parallel to the second conductor layer 30.
  • the outer angle (indicated by ⁇ 2 in FIG. 1) between the interlayer connection conductor 40 and the second conductor layer 30 at the corner P22 at the base end of the second portion 42 may be an acute angle.
  • the distance between the corners P21 at the tip end of the second portion 42 (the length indicated by the double-headed arrow D21 in FIG. 1) is shorter than the distance between the corners P12 at the base end of the first portion 41 (the length indicated by the double-headed arrow D12 in FIG. 1), but may be the same as the distance D12 between the corners P12 at the base end of the first portion 41.
  • the distance D12 between the corners P12 at the base end of the first portion 41 is, for example, 80 ⁇ m or more and 100 ⁇ m or less.
  • the ratio of D12/D21 is, for example, 1.25 or more and 1.33 or less. Also, the ratio of D12/D22 is, for example, 1.67 or more and 2 or less.
  • the straight line connecting the corners P21 at the tip of the second portion 42 may be parallel to the first conductor layer 20.
  • the outer angle (indicated by ⁇ 1 in FIG. 1) between the interlayer connection conductor 40 and the first conductor layer 20 at corner P12 at the base end of the first portion 41 may be an obtuse angle, an acute angle, or a right angle.
  • the resin multilayer substrate 1 shown in FIG. 1 has multiple interlayer connection conductors 40, at least one of the interlayer connection conductors 40 needs to have the structure shown in FIG. 1.
  • the resin multilayer substrate 1 shown in FIG. 1 is manufactured, for example, by the following method.
  • FIGS. 2A to 2F are cross-sectional views that show a schematic example of a method for manufacturing a resin multilayer substrate 1.
  • the resin multilayer substrate 1 may be manufactured in the form of a single chip (individual piece), or may be manufactured by producing an aggregate substrate and then separating it into individual pieces.
  • An aggregate substrate here refers to a substrate that includes multiple resin multilayer substrates 1.
  • a first substrate 61 is prepared, in which a second conductor layer 30 is formed on one surface of a resin insulating layer 10.
  • a metal foil such as Cu foil is laminated onto one main surface of the resin insulating layer 10, and the metal foil is patterned by photolithography to form the second conductor layer 30.
  • the resin insulating layer 10 is, for example, a resin sheet whose main component is a thermoplastic resin such as a liquid crystal polymer.
  • a via hole 70 is formed in the first substrate 61, which penetrates the resin insulating layer 10 and exposes a portion of the upper surface of the second conductor layer 30.
  • the via hole 70 preferably has a tapered shape in which the hole diameter decreases toward the second conductor layer 30.
  • a via hole 70 is formed in the resin insulating layer 10 using a laser or the like so that the top surface of the second conductor layer 30 is exposed.
  • the via hole 70 is filled with the second material 72.
  • the second material 72 is filled halfway into the via hole 70. There are no particular limitations on the height of the second material 72, so long as it does not exceed the thickness of the resin insulation layer 10.
  • a plating process such as electrolytic plating is used to fill the via hole 70 with a plating metal such as Cu as the second material 72.
  • the second material 72 forms the second portion 42 (see FIG. 2F).
  • the first material 71 is filled into the via hole 70 after it has been filled with the second material 72.
  • the space in the via hole 70 is filled with the first material 71 and the second material 72.
  • a conductive paste containing a metal material such as Cu or Sn and a resin material is filled as the first material 71 into the via hole 70.
  • the first material 71 is solidified by a heating press, which will be described later, to form the first portion 41 (see FIG. 2F).
  • FIG. 2E shows an example in which a first substrate 61 filled with a first material 71 and a second material 72 and a second substrate 62 filled with a first material 71 and a second material 72 are laminated, but there is no particular limitation as long as the substrate includes a first substrate 61 filled with a first material 71 and a second material 72.
  • plating solution Cu 50g/L H2SO4 150g /L Cl - 130 ppm SPS (bis(3-sulfopropyl)disulfide) 1 ppm PEG (polyethylene glycol, average molecular weight 4000) 300 ppm JGB (Janus Green B) 10 ppm (Electrolysis conditions) 30A/ dm2
  • the resin multilayer substrate 1 is manufactured.
  • the circuit board 1A can be easily manufactured by pressing the resin insulation layer 10 all at once. This reduces the number of manufacturing steps for the circuit board 1A, and keeps manufacturing costs low.
  • FIG. 3 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a second embodiment of the present invention.
  • the resin multilayer board 2 comprises at least one resin insulating layer 10, a first conductor layer 20 laminated on the resin insulating layer 10, a second conductor layer 30 laminated on the resin insulating layer 10 on the opposite side to the first conductor layer 20 (the lower side in Figure 3), and an interlayer connection conductor 40 that penetrates the resin insulating layer 10 in the lamination direction of the first conductor layer 20 and the second conductor layer 30 (the up-down direction in Figure 3) and connects the first conductor layer 20 and the second conductor layer 30.
  • the distance between the two corners P21 at the tip of the second portion 42 that are furthest apart in the direction perpendicular to the stacking direction (the length indicated by the double-headed arrow D21 in FIG. 3) is longer than the distance between the two corners P22 at which the base end of the second portion 42 contacts the second conductor layer 30 (the length indicated by the double-headed arrow D22 in FIG. 3), and part of the first portion 41 is present on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42.
  • the second portion 42 is connected to the first portion 41 in a concave shape so as to encase the first portion 41. This increases the strength of the portion where the reaction product for joining the first portion 41 and the second portion 42 is formed, and therefore increases the strength of the interlayer connection conductor 40.
  • the surface area of the boundary surface between the second portion 42 and the first portion 41 is larger than in the resin multilayer substrate 1 shown in FIG. 1, which further increases the strength of the interlayer connection conductor 40.
  • the first portion 41 that exists on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42 may be located in two or more places as shown in FIG. 3, or may be located in one place.
  • the second portion 42 that exists on the first conductor layer 20 side of the straight line connecting the corners P21 at the tip of the second portion 42 may be in one place as shown in FIG. 3, or in two or more places.
  • the maximum thickness in the stacking direction between the straight line connecting the corners P21 at the tips of the second portion 42 and the end of the second portion 42 located on the first conductor layer 20 side is T22, and the maximum thickness T22 is, for example, 1 ⁇ m or more and 10 ⁇ m or less.
  • the maximum thickness T22 may be the same as the maximum thickness T12, may be greater than the maximum thickness T12, or may be less than the maximum thickness T12.
  • the ratio of T22/(T11+T21) is, for example, 0.03 or more and 0.29 or less.
  • the ratio of T22/(T21+T22) is, for example, 0.03 or more and 0.33 or less.
  • the ratio of T22/T11 is, for example, 0.20 or more and 0.67 or less.
  • the ratio of T22/T21 is, for example, 0.2 or more and 0.6 or less.
  • the area of the first portion 41 located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tips of the second portion 42 is preferably 10% or more, and more preferably 20% or more, of the area of the entire cross section of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portion 42.
  • the area of the first portion 41 located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tips of the second portion 42 may be 50% or less of the area of the entire cross section of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portion 42.
  • the area of the second portions 42 that is located on the first conductor layer 20 side of the straight line connecting the corners P21 of the tips of the second portions 42 is preferably 10% or more, and more preferably 20% or more, of the total cross section of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portions 42.
  • the area of the second portions 42 that is located on the first conductor layer 20 side of the straight line connecting the corners P21 of the tips of the second portions 42 may be 50% or less of the total cross section of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portions 42.
  • the proportion of the area of the second portion 42 that is located on the first conductor layer 20 side of the straight line connecting the corners P21 of the tip portions of the second portion 42 may be the same as the proportion of the area of the first portion 41 that is located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tip portions of the second portion 42, may be greater than the proportion of the area of the first portion 41 that is located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tip portions of the second portion 42, or may be smaller than the proportion of the area of the first portion 41 that is located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tip portions of the second portion 42.
  • the shape of the corner P21 at the tip of the second portion 42 is not particularly limited, and may be, for example, pointed as shown in FIG. 3, or flat as shown in FIG. 1 above.
  • the corner P21 at the tip of the second portion 42 may or may not be parallel to the first conductor layer 20 or the second conductor layer 30.
  • the resin multilayer substrate 2 shown in FIG. 3 has multiple interlayer connection conductors 40, at least one of the interlayer connection conductors 40 needs to have the structure shown in FIG. 3.
  • the first portion when viewed in cross section in a direction perpendicular to the stacking direction, covers a corner of the tip of the second portion, wrapping around to part of the side surface of the second portion.
  • FIG. 4 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a third embodiment of the present invention.
  • the resin multilayer board 3 comprises at least one resin insulating layer 10, a first conductor layer 20 laminated on the resin insulating layer 10, a second conductor layer 30 laminated on the resin insulating layer 10 on the opposite side to the first conductor layer 20 (the lower side in Figure 4), and an interlayer connection conductor 40 that penetrates the resin insulating layer 10 in the lamination direction of the first conductor layer 20 and the second conductor layer 30 (the up-down direction in Figure 4) and connects the first conductor layer 20 and the second conductor layer 30.
  • the distance between the two corners P21 at the tip of the second portion 42 that are furthest apart in the direction perpendicular to the stacking direction (the length indicated by the double-headed arrow D21 in FIG. 4) is longer than the distance between the two corners P22 at which the base end of the second portion 42 contacts the second conductor layer 30 (the length indicated by the double-headed arrow D22 in FIG. 4), and part of the first portion 41 is present on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42.
  • the second portion 42 is connected to the first portion 41 in a concave shape so as to encase the first portion 41. This increases the strength of the portion where the reaction product for joining the first portion 41 and the second portion 42 is formed, and therefore increases the strength of the interlayer connection conductor 40.
  • the first portion 41 when viewed in cross section in a direction perpendicular to the stacking direction, covers the corner P21 at the tip of the second portion 42 so as to wrap around to a part of the side surface of the second portion 42.
  • the first portion 41 may cover at least a part of the corner P21 at the tip of the second portion 42.
  • the first portion 41 covers the corner portion P21 at the tip of the second portion 42, which further increases the strength of the interlayer connection conductor 40 compared to the resin multilayer substrate 1 shown in FIG. 1.
  • the resin multilayer substrate 3 shown in FIG. 4 has multiple interlayer connection conductors 40, at least one of the interlayer connection conductors 40 needs to have the structure shown in FIG. 4.
  • the rest of the configuration is the same as the first or second embodiment.
  • the outer angle formed between the interlayer connection conductor and the second conductor layer at the corner of the base end of the second portion is an obtuse angle.
  • FIG. 5 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a fourth embodiment of the present invention.
  • the resin multilayer board 4 comprises at least one resin insulating layer 10, a first conductor layer 20 laminated on the resin insulating layer 10, a second conductor layer 30 laminated on the resin insulating layer 10 on the opposite side to the first conductor layer 20 (the lower side in Figure 5), and an interlayer connection conductor 40 that penetrates the resin insulating layer 10 in the lamination direction of the first conductor layer 20 and the second conductor layer 30 (the up-down direction in Figure 5) and connects the first conductor layer 20 and the second conductor layer 30.
  • the distance between the two corners P21 at the tip of the second portion 42 that are furthest apart in the direction perpendicular to the stacking direction (the length indicated by the double-headed arrow D21 in FIG. 5) is longer than the distance between the two corners P22 at which the base end of the second portion 42 contacts the second conductor layer 30 (the length indicated by the double-headed arrow D22 in FIG. 5), and part of the first portion 41 is present on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42.
  • the second portion 42 is connected to the first portion 41 in a concave shape so as to encase the first portion 41. This increases the strength of the portion where the reaction product for joining the first portion 41 and the second portion 42 is formed, and therefore increases the strength of the interlayer connection conductor 40.
  • the outer angle (angle indicated by ⁇ 2 in FIG. 5) between the interlayer connection conductor 40 and the second conductor layer 30 at corner P22 of the base end of the second portion 42 is an obtuse angle.
  • the second portion 42 has a constricted portion between the tip end and the base end. Note that at least a portion of the outer angle ⁇ 2 between the interlayer connection conductor 40 and the second conductor layer 30 may be an obtuse angle.
  • the outer angle ⁇ 2 between the interlayer connection conductor 40 and the second conductor layer 30 is an obtuse angle, which allows the area of the joint between the second portion 42 and the second conductor layer 30 to be increased, resulting in an even higher strength of the interlayer connection conductor 40 compared to the resin multilayer substrate 1 shown in FIG. 1.
  • the resin multilayer substrate 4 shown in FIG. 5 has multiple interlayer connection conductors 40, at least one of the interlayer connection conductors 40 needs to have the structure shown in FIG. 5.
  • the interlayer connection conductor further includes a third portion, and the first conductor layer contacts the third portion, thereby making it possible to increase the wiring density.
  • FIG. 6 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a fifth embodiment of the present invention.
  • the resin multilayer board 5 comprises at least two resin insulating layers 10, a first conductor layer 20 laminated on the resin insulating layer 10, a second conductor layer 30 laminated on the resin insulating layer 10 on the opposite side to the first conductor layer 20 (the lower side in Figure 6), and an interlayer connection conductor 40 that penetrates the resin insulating layer 10 in the lamination direction of the first conductor layer 20 and the second conductor layer 30 (the up-down direction in Figure 6) and connects the first conductor layer 20 and the second conductor layer 30.
  • Two resin insulation layers 10 may be provided between the first conductor layer 20 and the second conductor layer 30, or three or more resin insulation layers 10 may be provided.
  • the configurations of the resin insulation layers 10 may be the same as each other or may be different.
  • the thicknesses of the resin insulation layers 10 may be the same as each other or may be different.
  • one resin insulation layer 10 is provided on the first conductor layer 20 side, and one resin insulation layer 10 is provided on the second conductor layer 30 side.
  • the boundary between the resin insulation layers 10 is indicated by a dashed line. It is sufficient that at least one resin insulation layer 10 is provided on the first conductor layer 20 side, and at least one resin insulation layer 10 is provided on the second conductor layer 30 side.
  • the number of resin insulation layers 10 provided on the first conductor layer 20 side may be the same as or different from the number of resin insulation layers 10 provided on the second conductor layer 30 side.
  • the interlayer connection conductor 40 includes a first portion 41 and a second portion 42 located closer to the second conductor layer 30 than the first portion 41.
  • the first part 41 and the second part 42 are similar to those in the first embodiment.
  • the interlayer connection conductor 40 further includes a third portion 43 located closer to the first conductor layer 20 than the first portion 41.
  • the first portion 41 has a lower conductivity than the third portion 43.
  • the third portion 43 may be a paste via or a plated via, but is preferably a plated via.
  • the third portion 43 When the third portion 43 is a plated via, it is preferable that the third portion 43 does not contain a resin material.
  • the conductive material content of the third portion 43 is 90.0 volume % or more and 100 volume % or less.
  • the conductive material constituting the third portion 43 is preferably the same as the metal constituting the first conductor layer 20, for example, Cu.
  • the conductive material constituting the third portion 43 may be the same as the conductive material constituting the second portion 42, or may be different.
  • the first portion 41 is a paste via, and the second portion 42 and the third portion 43 are plated vias.
  • the content of the resin material in the first portion 41 is greater than the content of the resin material in the second portion 42 and the third portion 43.
  • the conductive material constituting the first portion 41 may be the same as or different from the conductive materials constituting the second portion 42 and the third portion 43.
  • the conductive material constituting the first portion 41 is, for example, an alloy containing Cu and Sn.
  • the combination of materials for the first part 41, the second part 42, and the third part 43 is not particularly limited.
  • the first part 41 it is preferable to use an alloy or a metal containing resin for the purpose of joining, while for the second part 42 and the third part 43, it is preferable to use a pure metal, resin, or a material with little alloy or no resin in order to increase electrical conductivity.
  • the combination may be made of plated vias made of different metals, for example, the conductive member constituting the first portion 41 is Sn, and the conductive member constituting the second portion 42 and the third portion 43 is Cu.
  • the first conductor layer 20 is not in contact with the second portion 42.
  • the first conductor layer 20 is in contact with the third portion 43. It is desirable that the first conductor layer 20 and the third portion 43 are made of the same material and are joined without a dissimilar material being interposed therebetween.
  • the second conductor layer 30 is in contact with the second portion 42. It is preferable that the second conductor layer 30 and the second portion 42 are made of the same material and are joined without a dissimilar material being between them.
  • the distance between the two corners P21 at the tip of the second portion 42 that are furthest apart in the direction perpendicular to the stacking direction (the length indicated by the double-headed arrow D21 in FIG. 6) is longer than the distance between the two corners P22 at which the base end of the second portion 42 contacts the second conductor layer 30 (the length indicated by the double-headed arrow D22 in FIG. 6), and part of the first portion 41 is present on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42.
  • the second portion 42 is connected to the first portion 41 in a concave shape so as to encase the first portion 41. This increases the strength of the portion where the reaction product for joining the first portion 41 and the second portion 42 is formed, and therefore increases the strength of the interlayer connection conductor 40.
  • the end on the second conductor layer 30 side is defined as the tip end
  • the end on the first conductor layer 20 side is defined as the base end.
  • the point of the tip end of the third portion 43 that is furthest away in the direction perpendicular to the stacking direction (left-right direction in Figure 6) is shown as corner P31.
  • the point of the base end of the third portion 43 that is in contact with the first conductor layer 20 is shown as corner P32.
  • the distance between the two corners P31 at the tip of the third portion 43 that are furthest apart in the direction perpendicular to the stacking direction (the length indicated by the double-headed arrow D31 in FIG. 6) is longer than the distance between the two corners P32 at which the base end of the third portion 43 contacts the first conductor layer 20 (the length indicated by the double-headed arrow D32 in FIG. 6), and part of the first portion 41 may be present on the first conductor layer 20 side of the straight line connecting the corners P31 at the tip of the third portion 43.
  • the strength of the portion where the reaction product for joining the second portion 42 and the third portion 43 is formed can be increased, and the strength of the interlayer connection conductor 40 is further increased.
  • the first portion 41 that exists on the second conductor layer 30 side of the straight line connecting the corners P21 at the tip of the second portion 42 may be in one place as shown in FIG. 6, or in two or more places.
  • the first portion 41 that exists on the first conductor layer 20 side of the straight line connecting the corners P31 at the tip of the third portion 43 may be one location as shown in FIG. 6, or may be two or more locations.
  • the distance D21 between the corners P21 at the tip of the second portion 42 is, for example, 60 ⁇ m or more and 80 ⁇ m or less.
  • the distance D22 between the corners P22 at the base end of the second portion 42 is, for example, 40 ⁇ m or more and 60 ⁇ m or less.
  • the ratio of D22/D21 is, for example, 0.67 or more and 0.75 or less.
  • the distance D31 between the corners P31 at the tip of the third portion 43 is, for example, 60 ⁇ m or more and 80 ⁇ m or less.
  • the value of D31 may be the same as or different from the value of D21.
  • the distance D32 between the corners P32 of the base end of the third portion 43 is, for example, 40 ⁇ m or more and 60 ⁇ m or less.
  • the value of D32 may be the same as or different from the value of D22.
  • the ratio of D32/D31 is, for example, 0.67 or more and 0.75 or less.
  • the value of D32/D31 may be the same as or different from the value of D22/D21.
  • the maximum thickness in the stacking direction between the straight line connecting the corners P21 at the tip of the second portion 42 and the straight line connecting the corners P31 at the tip of the third portion 43 is t11, and the maximum thickness t11 is, for example, 10 ⁇ m or more and 30 ⁇ m or less.
  • the maximum thickness in the stacking direction between the straight line connecting the corners P21 at the tips of the second portion 42 and the second conductor layer 30 is T21, and the maximum thickness T21 is, for example, 20 ⁇ m or more and 30 ⁇ m or less. It is preferable that the maximum thickness T21 is greater than half the maximum thickness t11 (i.e., t11/2).
  • the maximum thickness in the stacking direction between the straight line connecting the corners P21 at the tips of the second portion 42 and the end of the first portion 41 located on the second conductor layer 30 side is T12, and the maximum thickness T12 is, for example, 1 ⁇ m or more and 10 ⁇ m or less.
  • the maximum thickness T12 may be equal to half the maximum thickness t11, may be less than half the maximum thickness t11, or may be greater than half the maximum thickness t11.
  • the ratio of T12/((t11/2)+T21) is, for example, 0.03 or more and 0.29 or less.
  • the ratio of T12/((t11/2)+T12) is, for example, 0.17 or more and 0.40 or less.
  • the ratio of T12/(t11/2) is, for example, 0.2 or more and 0.6 or less.
  • the ratio of T12/T21 is, for example, 0.03 or more and 0.50 or less.
  • the maximum thickness in the stacking direction between the straight line connecting the corners P31 at the tips of the third portion 43 and the first conductor layer 20 is T31, and the maximum thickness T31 is, for example, 20 ⁇ m or more and 30 ⁇ m or less. It is preferable that the maximum thickness T31 is greater than half the maximum thickness t11.
  • the value of T31 may be the same as or different from the value of T21.
  • the maximum thickness in the stacking direction between a straight line connecting the corners P31 at the tips of the third portion 43 and the end of the first portion 41 located on the first conductor layer 20 side is T13, and is, for example, 1 ⁇ m or more and 10 ⁇ m or less.
  • the maximum thickness T13 may be the same as half the maximum thickness t11, may be less than half the maximum thickness t11, or may be greater than half the maximum thickness t11.
  • the value of T13 may be the same as or different from the value of T12.
  • the ratio of T13/((t11/2)+T31) is, for example, 0.03 or more and 0.29 or less.
  • the value of T13/((t11/2)+T31) may be the same as or different from the value of T12/((t11/2)+T21).
  • the ratio of T13/((t11/2)+T13) is, for example, 0.17 or more and 0.40 or less.
  • the value of T13/((t11/2)+T13) may be the same as or different from the value of T12/((t11/2)+T12).
  • the ratio of T13/(t11/2) is, for example, 0.2 or more and 0.6 or less.
  • the value of T13/(t11/2) may be the same as or different from the value of T12/(t11/2).
  • the ratio of T13/T31 is, for example, 0.03 or more and 0.50 or less.
  • the value of T13/T31 may be the same as or different from the value of T12/T21.
  • the area of the first portion 41 existing on the second conductor layer 30 side of the straight line connecting the corners P21 of the tips of the second portion 42 is preferably 10% or more, more preferably 20% or more, and even more preferably 50% or more of the total cross section area of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portion 42.
  • the area of the first portion 41 existing on the second conductor layer 30 side of the straight line connecting the corners P21 of the tips of the second portion 42 may be 100%, 90% or less, or 80% or less of the total cross section area of the interlayer connection conductor 40 passing through the straight line connecting the corners P21 of the tips of the second portion 42.
  • the area of the first portion 41 existing on the first conductor layer 20 side of the straight line connecting the corners P31 of the tips of the third portion 43 is preferably 10% or more, more preferably 20% or more, and even more preferably 50% or more of the total cross section area of the interlayer connection conductor 40 passing through the straight line connecting the corners P31 of the tips of the third portion 43.
  • the area of the first portion 41 existing on the first conductor layer 20 side of the straight line connecting the corners P31 of the tips of the third portion 43 may be 100%, 90% or less, or 80% or less of the total cross section area of the interlayer connection conductor 40 passing through the straight line connecting the corners P31 of the tips of the third portion 43.
  • the proportion of the area of the first portion 41 that is located on the first conductor layer 20 side of the straight line connecting the corners P31 of the tip of the third portion 43 may be the same as the proportion of the area of the first portion 41 that is located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tip of the second portion 42, may be greater than the proportion of the area of the first portion 41 that is located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tip of the second portion 42, or may be smaller than the proportion of the area of the first portion 41 that is located on the second conductor layer 30 side of the straight line connecting the corners P21 of the tip of the second portion 42.
  • the shape of the corner P21 at the tip of the second portion 42 is not particularly limited, and may be flat, for example, as shown in FIG. 6, or may be pointed, as shown in FIG. 3 above.
  • the corner P21 at the tip of the second portion 42 may or may not be parallel to the first conductor layer 20 or the second conductor layer 30.
  • the second portion 42 When viewed in cross section perpendicular to the stacking direction, the second portion 42 may not be present on the first conductor layer 20 side of the straight line connecting the corners P21 at the tips of the second portion 42, or a part of the second portion 42 may be present.
  • the straight line connecting the corners P21 at the tip of the second portion 42 may be parallel to the second conductor layer 30.
  • the outer angle (indicated by ⁇ 2 in FIG. 6) between the interlayer connection conductor 40 and the second conductor layer 30 at corner P22 at the base end of the second portion 42 may be an acute angle, an obtuse angle, or a right angle.
  • the shape of the corner P31 at the tip of the third portion 43 is not particularly limited, and may be flat, for example, as shown in FIG. 6, or may be pointed, as shown in FIG. 3 above. If the corner P31 at the tip of the third portion 43 is flat, the corner P31 at the tip of the third portion 43 may or may not be parallel to the first conductor layer 20 or the second conductor layer 30.
  • the third portion 43 When viewed in cross section perpendicular to the stacking direction, the third portion 43 may not be present on the second conductor layer 30 side of the straight line connecting the corners P31 at the tips of the third portion 43, or a part of the third portion 43 may be present.
  • the straight line connecting the corners P31 at the tip of the third portion 43 may be parallel to the first conductor layer 20.
  • the outer angle (indicated by ⁇ 1 in FIG. 6) between the interlayer connection conductor 40 and the first conductor layer 20 at corner P32 at the base end of the third portion 43 may be an acute angle, an obtuse angle, or a right angle.
  • the resin multilayer substrate 5 shown in FIG. 6 has multiple interlayer connection conductors 40, at least one of the interlayer connection conductors 40 needs to have the structure shown in FIG. 6.
  • the resin multilayer substrate 5 shown in FIG. 6 is manufactured, for example, by a method similar to that shown in FIG. 2A to FIG. 2F.
  • the first substrate 61 and the second substrate 62 are stacked so that the first materials 71 face each other, thereby forming an interlayer connection conductor 40 having the structure shown in FIG. 6.
  • FIG. 7 is a cross-sectional view showing a schematic example of a resin multilayer substrate according to a sixth embodiment of the present invention.
  • the straight line connecting the corners P21 at the tips of the second portion 42 does not have to be parallel to the second conductor layer 30.
  • the resin multilayer board 6 shown in FIG. 7 also provides the same effect as the resin multilayer board 1 shown in FIG. 1.
  • the resin multilayer substrate 6 shown in FIG. 7 has multiple interlayer connection conductors 40, at least one of the interlayer connection conductors 40 needs to have the structure shown in FIG. 7.
  • the interlayer connection conductor 40 when the interlayer connection conductor 40 includes the third portion 43, when viewed in cross section in a direction perpendicular to the stacking direction, the straight line connecting the corners P21 at the tip of the second portion 42 may not be parallel to the second conductor layer 30, and the straight line connecting the corners P31 at the tip of the third portion 43 may be parallel to the first conductor layer 20, or may not be parallel to the first conductor layer 20.
  • the straight line connecting the corners P31 at the tip of the third portion 43 may not be parallel to the first conductor layer 20, and the straight line connecting the corners P21 at the tip of the second portion 42 may be parallel to the second conductor layer 30, or may not be parallel to the second conductor layer 30.
  • the resin multilayer board of the present invention is not limited to the above-described embodiment, and various applications and modifications can be made within the scope of the present invention with respect to the configuration, manufacturing conditions, and the like of the resin multilayer board.
  • an alloy layer having a different composition from both the first and second parts may be formed on at least a portion of the interface between the first and second parts of the interlayer connection conductor.
  • an alloy layer is formed on the interface between the first and second parts, the connectivity between the first and second parts is improved.
  • the alloy layer may be one layer or two or more layers.
  • the alloy layer formed at the interface between the first and second parts of the interlayer connection conductor can be confirmed, for example, by observing a cross section of the resin insulation layer cut in a direction parallel to the thickness direction using a scanning electron microscope (SEM).
  • SEM scanning electron microscope
  • compositions such as Cu5Sn , Cu3Sn , and Cu6Sn5 all contain Cu and Sn as metal species, but the content ratios of the metal species are different, so they can be said to have different compositions.
  • an alloy layer having a composition different from both the first portion and the third portion may be formed on at least a portion of the interface between the first portion and the third portion of the interlayer connection conductor.
  • an alloy layer is formed on the interface between the first portion and the third portion, the connectivity between the first portion and the third portion is improved.
  • the alloy layer may be one layer or two or more layers.
  • an alloy layer having a composition different from both the first portion and the first conductor layer may be formed on at least a portion of the interface between the first portion of the interlayer connection conductor and the first conductor layer.
  • an alloy layer is formed on the interface between the first portion and the first conductor layer, the connectivity between the first portion and the first conductor layer is improved.
  • the alloy layer may be one layer or two or more layers.
  • the resin multilayer substrate of the present invention has multiple interlayer connection conductors
  • at least one of the interlayer connection conductors may have the structure of the present invention.
  • the resin multilayer substrate of the present invention may have two or more types of interlayer connection conductors, an interlayer connection conductor having the structure described in one embodiment and an interlayer connection conductor having the structure described in another embodiment.
  • the resin multilayer substrate of the present invention may include, for example, an interlayer connection conductor consisting only of plated vias, or an interlayer connection conductor consisting only of paste vias.
  • the resin multilayer board of the present invention may include an insulating layer different from the resin insulating layer provided between the first conductor layer and the second conductor layer.
  • the resin multilayer board of the present invention may include a resin insulating layer or a ceramic insulating layer having a different dielectric constant from the resin insulating layer provided between the first conductor layer and the second conductor layer. In that case, it is preferable that the dielectric constant is higher than that of the resin insulating layer provided between the first conductor layer and the second conductor layer.
  • the resin multilayer substrate of the present invention may be a rigid substrate or a flexible substrate.
  • the flexible substrate may have a bent portion.
  • the resin multilayer substrate of the present invention can be used, for example, as a substrate for a circuit module.
  • a circuit module also constitutes the present invention.
  • FIG. 8 is a cross-sectional view showing a schematic example of a circuit module including a resin multilayer substrate according to the present invention.
  • the circuit module 100 shown in FIG. 8 includes a resin multilayer substrate 110 and an electronic component 120 disposed on the resin multilayer substrate 110.
  • the resin multilayer substrate 110 is a resin multilayer substrate of the present invention.
  • the resin multilayer substrate 110 may be a rigid substrate or a flexible substrate.
  • the resin multilayer substrate 110 may have a bent portion.
  • the electronic component 120 is not particularly limited, and may be, for example, an integrated circuit (IC), a connector, etc.
  • One or more electronic components 120 may be arranged on one of the main surfaces of the resin multilayer substrate 110, or one or more electronic components 120 may be arranged on each of the main surfaces of the resin multilayer substrate 110.
  • an interlayer connection conductor 40 including the first and second parts (both not shown) described in the first embodiment and the like is provided inside the resin insulating layer 10 located on the surface of the resin multilayer substrate 110 on the side where the electronic component 120 is arranged (the lower side in FIG. 8). This ensures the connectivity of the interlayer connection conductor even in the fine wiring portion located on the surface.
  • an interlayer connection conductor 40 including a first portion and a second portion is provided inside the resin insulating layer 10 located on both surface layers of the resin multilayer substrate 110.
  • interlayer connection conductors 40 When multiple interlayer connection conductors 40 are provided inside the resin insulating layer 10 located on the surface of the resin multilayer substrate 110 on the side where the electronic component 120 is arranged, it is sufficient that at least one interlayer connection conductor 40 includes a first portion and a second portion, and all interlayer connection conductors 40 may include a first portion and a second portion.
  • the interlayer connection conductor 40 provided inside the resin insulating layer 10 located on the surface of the resin multilayer substrate 110 on the side where the electronic component 120 is not arranged may be configured to include a first portion and a second portion, may be configured only of plated vias, may be configured only of paste vias, or may be a mixture of these.
  • the interlayer connection conductor 40 provided inside the resin insulation layer 10 located in the inner layer of the resin multilayer substrate 110 may be configured to include a first portion and a second portion, may be configured only of plated vias, may be configured only of paste vias, or may be a mixture of these.
  • a protective layer 50 may be provided on the surface of the resin multilayer substrate 110.
  • the protective layer 50 may be, for example, a coverlay, a resist layer, or the like.
  • the protective layer 50 may be provided on both main surfaces of the resin multilayer substrate 110, or on one of the main surfaces.
  • circuit module of the present invention is not limited to the above embodiment, and various applications and modifications can be made within the scope of the present invention with respect to the configuration of the resin multilayer board and electronic components, manufacturing conditions, etc.
  • the interlayer connection conductor includes a first portion and a second portion located closer to the second conductor layer than the first portion; the first portion has a lower electrical conductivity than the second portion; the first conductor layer is not in contact with the second portion, the second conductor layer is in contact with the second portion;
  • ⁇ 5> The resin multilayer substrate according to any one of ⁇ 1> to ⁇ 4>, wherein the first conductor layer is in contact with the first portion.
  • the interlayer connection conductor further includes a third portion located closer to the first conductor layer than the first portion; the first portion has a lower electrical conductivity than the third portion;
  • the resin multilayer board according to any one of ⁇ 1> to ⁇ 4>, wherein the first conductor layer is in contact with the third portion.
  • ⁇ 7> When viewed cross-sectionally in a direction perpendicular to the lamination direction, a distance between two corners at which a tip end of the third portion is furthest apart in a direction perpendicular to the stacking direction is longer than a distance between two corners at which a base end of the third portion is in contact with the first conductor layer; and
  • Resin multilayer board 10 Resin insulating layer 20 First conductor layer 30 Second conductor layer 40 Interlayer connection conductor 41 First portion of interlayer connection conductor 42 Second portion of interlayer connection conductor 43 Third portion of interlayer connection conductor 50 Protective layer 61 First substrate 62 Second substrate 70 Via hole 71 First material 72 Second material 100 Circuit module 120 Electronic board D12 Distance between corners of base end of first portion D21 Distance between corners of tip end of second portion D22 Distance between corners of base end of second portion D31 Distance between corners of tip end of third portion D32 Distance between corners of base end of third portion T11 Maximum thickness in stacking direction between a straight line connecting corners of tip ends of second portion and the first conductor layer t11 Maximum thickness in the stacking direction between the straight line connecting the corners of the tip of the second portion and the straight line connecting the corners of the tip of the third portion T12 Maximum thickness in the stacking direction between the straight line connecting the corners of the tip of the second portion and the end of the first portion located on the second conductor layer side T13 Maximum thickness in the

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
PCT/JP2024/014345 2023-04-20 2024-04-09 樹脂多層基板及び回路モジュール Ceased WO2024219286A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN202480026901.XA CN120982217A (zh) 2023-04-20 2024-04-09 树脂多层基板以及电路模块
DE112024001581.6T DE112024001581T5 (de) 2023-04-20 2024-04-09 Harzmehrschichtsubstrat und schaltungsmodul
JP2025515178A JP7798237B2 (ja) 2023-04-20 2024-04-09 樹脂多層基板及び回路モジュール
US19/343,274 US20260032818A1 (en) 2023-04-20 2025-09-29 Resin multilayer substrate and circuit module

Applications Claiming Priority (2)

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JP2023069293 2023-04-20
JP2023-069293 2023-04-20

Related Child Applications (1)

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US19/343,274 Continuation US20260032818A1 (en) 2023-04-20 2025-09-29 Resin multilayer substrate and circuit module

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WO2024219286A1 true WO2024219286A1 (ja) 2024-10-24

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008085098A (ja) * 2006-09-28 2008-04-10 Kyocera Corp 配線基板および電子装置
JP2015119073A (ja) * 2013-12-19 2015-06-25 日本シイエムケイ株式会社 多層プリント配線板および、その製造方法
WO2018079198A1 (ja) * 2016-10-28 2018-05-03 株式会社村田製作所 樹脂回路基板
JP2019080039A (ja) * 2017-10-20 2019-05-23 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
JP2019080034A (ja) * 2017-10-20 2019-05-23 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
WO2022202322A1 (ja) * 2021-03-26 2022-09-29 株式会社村田製作所 配線基板、積層基板及び配線基板の製造方法
JP2022150717A (ja) * 2021-03-26 2022-10-07 株式会社村田製作所 配線基板、積層基板及び配線基板の製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008085098A (ja) * 2006-09-28 2008-04-10 Kyocera Corp 配線基板および電子装置
JP2015119073A (ja) * 2013-12-19 2015-06-25 日本シイエムケイ株式会社 多層プリント配線板および、その製造方法
WO2018079198A1 (ja) * 2016-10-28 2018-05-03 株式会社村田製作所 樹脂回路基板
JP2019080039A (ja) * 2017-10-20 2019-05-23 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
JP2019080034A (ja) * 2017-10-20 2019-05-23 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
WO2022202322A1 (ja) * 2021-03-26 2022-09-29 株式会社村田製作所 配線基板、積層基板及び配線基板の製造方法
JP2022150717A (ja) * 2021-03-26 2022-10-07 株式会社村田製作所 配線基板、積層基板及び配線基板の製造方法

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JPWO2024219286A1 (https=) 2024-10-24
CN120982217A (zh) 2025-11-18
US20260032818A1 (en) 2026-01-29
DE112024001581T5 (de) 2026-01-29

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