WO2024207668A1 - 故障检测电路、显示面板和故障检测方法 - Google Patents

故障检测电路、显示面板和故障检测方法 Download PDF

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Publication number
WO2024207668A1
WO2024207668A1 PCT/CN2023/117487 CN2023117487W WO2024207668A1 WO 2024207668 A1 WO2024207668 A1 WO 2024207668A1 CN 2023117487 W CN2023117487 W CN 2023117487W WO 2024207668 A1 WO2024207668 A1 WO 2024207668A1
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WIPO (PCT)
Prior art keywords
unit
detection unit
scan
data
test
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Ceased
Application number
PCT/CN2023/117487
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English (en)
French (fr)
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WO2024207668A9 (zh
Inventor
李泽尧
李荣荣
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HKC Co Ltd
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HKC Co Ltd
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Publication of WO2024207668A1 publication Critical patent/WO2024207668A1/zh
Publication of WO2024207668A9 publication Critical patent/WO2024207668A9/zh
Priority to US19/336,168 priority Critical patent/US20260018093A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3433—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
    • G09G3/344—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on particles moving in a fluid or in a gas, e.g. electrophoretic devices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/10—Dealing with defective pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof

Definitions

  • the present application relates to the field of display technology, and in particular to a fault detection circuit, a display panel and a fault detection method.
  • EPD Electronic Paper Display
  • Its display principle is to encapsulate black and white charged particles in a microcapsule structure, and control the rise and fall of black and white particles with different charges by an external electric field to present a black and white monochrome display effect.
  • the two different black and white ink droplets keep moving.
  • the white ink droplets rise to the upper surface, all the ambient light irradiating the upper surface is completely reflected, so that it appears white.
  • the two different ink droplets are mixed in proportion to form different colors of black and white and gray levels.
  • the abnormality detection of electronic paper display panels is mainly carried out by setting transistors to drive the data lines and scan lines respectively, and judging whether the entire display area is normal based on the display effect of the display panel.
  • this detection is directly carried out on the electronic paper display area after the product is finished.
  • the pixel unit of the electronic paper film in the display area and the driving integrated circuit for driving the pixel unit will be damaged during reassembly, thus causing a waste of resources. Therefore, how to perform detection before the electronic paper is finished to improve the detection accuracy is an urgent problem to be solved.
  • the present application proposes a fault detection circuit, a display panel and a fault detection method which can effectively improve the detection accuracy.
  • the present application provides a fault detection circuit, which is applied to a display panel including a plurality of pixel units for performing image display, and includes a first detection unit, a second detection unit and a control unit.
  • the control unit is connected to the first detection unit and the second detection unit.
  • the first detection unit is used to perform short circuit or open circuit detection on the pixel units in the display panel under the control of the control unit. If at least one pixel unit displays abnormality and determines that When it is the first abnormal pixel unit, the control unit controls the second detection unit to re-execute the detection. If the second detection unit detects that the first abnormal pixel unit displays normally, it indicates that the first detection unit is faulty. If the second detection unit detects that the first abnormal pixel unit displays abnormally, it indicates that the first abnormal pixel unit is faulty.
  • a pixel unit that displays abnormality when the second detection unit performs detection is determined as a second abnormal pixel unit.
  • the first abnormal pixel unit is different from the second abnormal pixel unit detected by the second detection unit, it indicates that the first detection unit and the second abnormal pixel unit are faulty.
  • the display panel includes a scan test terminal, a data test terminal, a plurality of scan lines extending along a first direction, and a plurality of data lines extending along a second direction, wherein the first direction is different from the second direction, and a first detection unit is connected to a first control signal output terminal, a scan test terminal, a data test terminal, a plurality of data lines, and a plurality of scan lines of a control unit, and is used to receive a first control signal from the first control signal output terminal, and receive and transmit a test scan signal from the scan test terminal according to the first control signal, and receive and transmit a test data signal from the data test terminal to a pixel unit, so as to control the pixel unit to display an image.
  • a second detection unit is connected to a second control signal output terminal, a scan test terminal, a data test terminal, a plurality of data lines, and a plurality of scan lines of the control unit, and is used to receive a second control signal from the second control signal output terminal, and receive and transmit a test scan signal from the scan test terminal according to the second control signal, and receive and transmit a test data signal from the data test terminal to a pixel unit, so as to control the pixel unit to display an image.
  • the display panel includes a first data test terminal, a second data test terminal, a first scan test terminal, a second scan test terminal, a plurality of scan lines extending along a first direction, and a plurality of data lines extending along a second direction, wherein the first direction is different from the second direction, and a first detection unit is connected to the first scan test terminal, the first data test terminal, the plurality of data lines, and the plurality of scan lines, and is used to receive and transmit a first test scan signal from the first scan test terminal and to receive and transmit a first test data signal from the first data test terminal to a pixel unit according to a control signal output by a control unit, so as to control the pixel unit to display an image.
  • a second detection unit is connected to the second scan test terminal, the second data test terminal, the plurality of data lines, and the plurality of scan lines, and is used to receive and transmit a second test scan signal from the second scan test terminal and to receive and transmit a second test data signal from the second data test terminal to a pixel unit according to a control signal, so as to control the pixel unit to display an image.
  • the first detection unit includes a plurality of first switch tubes and a plurality of second switch tubes, the gates of the plurality of first switch tubes are connected to the first control signal output terminal, the sources of the plurality of first switch tubes are connected to the scan test terminal, and the drains of the plurality of first switch tubes are respectively connected to a plurality of scan lines, and are used to be turned on according to the first control signal and receive the test scan signal from the scan test terminal and transmit it to the pixel unit.
  • the gate of the plurality of second switch tubes is connected to the first control signal output terminal, the source of the plurality of second switch tubes is connected to the data test terminal, and the drain of the plurality of second switch tubes is respectively connected to the plurality of data lines, and is used to be turned on according to the first control signal and receive the test data signal from the data test terminal and transmit it to the pixel unit.
  • the second detection unit includes multiple third switch tubes and multiple fourth switch tubes, the gates of the multiple third switch tubes are connected to the second control signal output end, the sources of the multiple third switch tubes are connected to the scan test end, and the drains of the multiple third switch tubes are respectively connected to multiple scan lines, which are used to be turned on according to the second control signal and receive test scan signals from the scan test end and transmit them to the pixel unit, the gates of the multiple fourth switch tubes are connected to the second control signal output end, the sources of the multiple fourth switch tubes are connected to the data test end, and the drains of the multiple fourth switch tubes are respectively connected to multiple data lines, which are used to be turned on according to the second control signal and receive test data signals from the data test end and transmit them to the pixel unit.
  • the display panel includes a display area and a non-display area that are adjacent to each other, the first detection unit and the second detection unit are adjacent to each other and are arranged in the non-display area on the same side of the display area, multiple first switching tubes and multiple third switching tubes are arranged in sequence one by one, and the source of any corresponding first switching tube and the third switching tube is connected to the scan test end, and the drain is connected to the same scan line for transmitting test scan signals at different times, and multiple second switching tubes and multiple fourth switching tubes are arranged in sequence one by one, and the source of any corresponding second switching tube and the fourth switching tube is connected to the data test end, and the drain is connected to the same data line for transmitting test data signals at different times.
  • the first detection unit and the second detection unit are arranged opposite to each other, and are respectively arranged in non-display areas at different sides of the display area.
  • the pixel unit includes a plurality of micro liquid capsules, which are sealed spheres that encapsulate white particles, black particles and a transparent dispersion medium.
  • the white particles and the black particles are two types of particles with different charges.
  • the white particles and the black particles are completely immersed in the transparent dispersion medium and move accordingly in the transparent dispersion medium according to the action of the electric field force.
  • the present application also discloses a display panel, including a data driving circuit, a scanning driving circuit, a plurality of pixel units arranged in an array, and the aforementioned fault detection circuit, wherein the scanning driving circuit is used to output a scanning signal to the pixel unit, the data driving circuit is used to output a data signal to the pixel unit, the pixel unit is used to receive the data signal under the control of the scanning signal to display an image, and the fault detection circuit is used to detect short circuit or open circuit of the pixel unit.
  • the present application also provides a fault detection method, which is applied to the above-mentioned fault detection circuit, comprising: controlling a first detection unit to perform short circuit or open circuit detection on pixel units in a display panel, and if all pixel units display normally, it indicates that the pixel units are not faulty; if the first detection unit detects that at least one pixel unit displays normally, If the second detection unit detects that the first abnormal pixel unit is normal, it indicates that the first detection unit is faulty; if the second detection unit detects that the first abnormal pixel unit is abnormal, it indicates that the first abnormal pixel unit is faulty.
  • controlling the second detection unit to re-detect includes: controlling the second detection unit to re-detect the pixel units in the display area; "if the second detection unit detects that the first abnormal pixel unit displays normally, it indicates that the first detection unit is faulty” includes: if the second detection unit detects that all pixel units display normally, it indicates that the first abnormal pixel unit is not faulty, and the first detection unit is faulty.
  • “if the second detection unit detects that the first abnormal pixel unit displays abnormally, it indicates that the first abnormal pixel unit is faulty” includes: if a pixel unit that displays abnormally when the second detection unit performs detection is determined to be a second abnormal pixel unit, when the first abnormal pixel unit is different from the second abnormal pixel unit detected by the second detection unit, it indicates that the first detection unit and the second abnormal pixel unit are faulty.
  • the fault detection quality of the display panel can be effectively improved by respectively performing fault detection on the pixel units in the display panel through the first detection unit and the second detection unit, and the second detection unit can be controlled to re-inspect the abnormal pixel units, thereby effectively reducing the material waste caused by excessive screening of the display panel due to the failure of the first detection unit, and saving the production cost of the display panel.
  • FIG1 is a schematic diagram of a side structure of a display panel provided in an embodiment of the present application.
  • FIG2 is a schematic diagram of a planar layout of an array substrate in the display panel shown in FIG1 ;
  • FIG3 is a schematic diagram showing the structure of the dielectric layer in FIG2 ;
  • FIG4 is a schematic diagram of a circuit structure of a fault detection circuit provided in a second embodiment of the present application.
  • FIG5 is a schematic diagram of a circuit structure of a fault detection circuit as shown in FIG4 provided in a third embodiment of the present application;
  • FIG6 is a schematic diagram of a planar layout of the fault detection circuit in FIG5 ;
  • FIG7 is a schematic diagram of a planar layout of a fault detection circuit as shown in FIG4 according to a fourth embodiment of the present application;
  • FIG8 is a schematic diagram of a circuit structure of a fault detection circuit provided in a fifth embodiment of the present application.
  • FIG9 is a schematic diagram of the layout of the fault detection circuit in FIG8 ;
  • FIG10 is a schematic diagram of a planar layout of a fault detection circuit as shown in FIG8 provided in a sixth embodiment of the present application;
  • FIG. 11 is a flow chart of a fault detection method provided in the seventh embodiment of the present application.
  • connection and “coupling” mentioned in the present application, unless otherwise specified, include direct and indirect connections (couplings).
  • the directional terms mentioned in the present application, such as “upper”, “lower”, “front”, “back”, “left”, “right”, “inside”, “outside”, “side”, etc., are only with reference to the directions of the attached drawings.
  • the terms “including”, “may include”, “include”, or “may include” used in this application indicate the existence of the corresponding functions, operations, elements, etc. disclosed, and do not limit one or more other functions, operations, elements, etc.
  • the terms “including” or “include” indicate the existence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, and do not exclude the existence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusions.
  • a display device may generally include a display panel and a backlight assembly, wherein the display panel is mounted to the light emitting side of the backlight assembly, and the backlight assembly is used to provide backlight to the display panel to adjust the display panel to display different images.
  • FIG. 1 is a schematic diagram of the side structure of a display panel provided in an embodiment of the present application.
  • the display panel 10 includes an image display area 10a and a non-display area 10b.
  • the display area 10a is used to perform image display
  • the non-display area 10b is arranged around the display area 10a to set other auxiliary components or modules.
  • the display panel 10 includes an array substrate (AS) 10c and an opposing substrate 10d, and a display medium layer 10e sandwiched between the array substrate 10c and the opposing substrate 10d.
  • Driving elements are arranged on the array substrate 10c and the opposing substrate 10d to generate corresponding electric fields according to data signals (Data), thereby driving the light of corresponding grayscale transmitted in the display medium layer 10e to perform image display.
  • Data data signals
  • Fig. 2 is a schematic diagram of the planar layout of the array substrate in the display panel shown in Fig. 1.
  • the array substrate 10c corresponding to the image display area 10a includes a plurality of m*n pixel units P arranged in a matrix, m data lines S1-Sm, and n scanning lines G1-Gn, where m and n are natural numbers greater than 1.
  • the n scan lines G1-Gn extend along the first direction F1 and are insulated from each other and arranged in parallel along the second direction F2.
  • the m data lines S1-Sm extend along the second direction F2 and are insulated from each other and arranged in parallel along the first direction F1.
  • the first direction F1 is perpendicular to the second direction F2.
  • a timing control circuit 11 for driving the pixel units to display images, a data driving circuit 12 and a scanning driving circuit 13 disposed on the array substrate 10c are further included.
  • the timing control circuit 11 is electrically connected to the data driving circuit 12 and the scan driving circuit 13, and is used to control the working timing of the data driving circuit 12 and the scan driving circuit 13, that is, outputting corresponding timing control signals to the data driving circuit 12 to the scan driving circuit 13 to control when to output corresponding scan signals and data signals.
  • the data driving circuit 12 is electrically connected to the m data lines S1 ⁇ Sm, and is used to transmit the data signals (Data) to be displayed to the plurality of pixel units P in the form of data voltages through the m data lines S1 ⁇ Sm.
  • the scan driving circuit 13 is used to be electrically connected to the n scan lines G1 to Gn and to The scan lines G1-Gn output scan signals for controlling when the pixel unit P receives the data signal.
  • the scan driving circuit 13 outputs scan signals from the n scan lines G1-Gn in sequence according to the scan cycle.
  • the circuit elements in the scan driving circuit 13 are manufactured in the array substrate 10c by the same process as the pixel units P in the array substrate 10c, which is the GOA (Gate Driver on Array) technology.
  • FIG. 3 is a schematic structural diagram of the dielectric layer shown in FIG. 2 .
  • the display medium layer 10e is an electronic paper film, including a plurality of micro liquid capsules e, and the micro liquid capsules e are sealed spheres, and white particles a, black particles b and transparent dispersion medium c are encapsulated inside.
  • the white particles a and the black particles b are two kinds of particles with different charges.
  • the white particles a are positively charged
  • the black particles b are negatively charged
  • the white particles a are negatively charged
  • the black particles b are positively charged.
  • the white particles a and the black particles b are completely immersed in the transparent dispersion medium c, and can move freely in the transparent dispersion medium c.
  • the positively charged white particles a and the slightly negatively charged black particles b move accordingly under the action of the electric field force, and each micro liquid capsule e will present a certain degree of black or white on the side close to the opposite substrate 10d, and finally all the micro liquid capsules e form a certain image together on the side of the opposite substrate 10d.
  • FIG4 is a schematic diagram of the circuit structure of a fault detection circuit provided in the second embodiment of the present application.
  • the fault detection circuit 20 is arranged in the non-display area 10 b of the display panel 10 , and the fault detection circuit 20 includes a first detection unit 21 and a control unit 23 , wherein the control unit 23 is connected to the first detection unit 21 , and the first detection unit 21 is connected to the data test terminal 14 , the scan test terminal 15 , m data lines S1 to Sm and n scan lines G1 to Gn , and is used to receive a first control signal from the control unit 23 , and under the control of the first control signal, the m data lines S1 to Sm and the n scan lines G1 to Gn are electrically connected at the intersection position, and is used to receive a test data signal from the data test terminal 14 and a test scan signal from the scan test terminal 15 , and the pixel unit P in the display panel 10 displays an image according to the test scan signal and the
  • the first detection unit 21 is used to detect and identify short circuits or open circuits of pixel units in the display area under the control of the control unit 23. If at least one pixel unit displays an abnormality and is determined to be a first abnormal pixel unit, the control unit 23 controls the second detection unit 22 to re-execute the detection. If the second detection unit 22 If the first abnormal pixel unit is detected to be displayed normally, it indicates that the first detection unit 21 is faulty. If the second detection unit 22 detects that the first abnormal pixel unit is displayed abnormally, it indicates that the first abnormal pixel unit is faulty. The pixel unit that displays abnormally when the second detection unit 22 performs detection is determined to be the second abnormal pixel unit. When the first abnormal pixel unit is different from the second abnormal pixel unit detected by the second detection unit 22, it indicates that the first detection unit 21 and the second abnormal pixel unit are faulty.
  • the first detection unit 21 includes multiple first switching tubes T1 and multiple second switching tubes T2, the gate of the first switching tube T1 is connected to the control unit 23, the source of the first switching tube T1 is connected to the scan test end 15, and the drain of the first switching tube T1 is connected to the scan line G in the display panel 10, and is used to be turned on according to the first control signal output by the control unit 23, and transmit the test scan signal output by the scan test end 15 to the pixel unit P in the display panel 10.
  • the gate of the second switch tube T2 is connected to the control unit 23, the source of the second switch tube T2 is connected to the data test terminal 14, and the drain of the second switch tube T2 is connected to the data line S in the display panel 10, and is used to be turned on according to the second control signal output by the control unit 23, and transmit the test data signal output by the data test terminal 14 to the pixel unit P in the display panel 10.
  • the pixel unit P displays an image according to the received test data signal and the test scan signal.
  • the first detection unit 21 includes n first switch tubes T1 and m second switch tubes T2, the n first switch tubes T1 are respectively connected to the n scan lines G1 ⁇ Gn, and the m second switch tubes T2 are respectively connected to the m data lines S1 ⁇ Sm.
  • FIG5 is a schematic diagram of the circuit structure of the fault detection circuit shown in FIG4 provided in the third embodiment of the present application.
  • the display panel 10 further includes a data test terminal 14 and a scan test terminal 15, and the fault detection circuit 20 includes a first detection unit 21, a second detection unit 22 and a control unit 23, wherein the control unit 23 is connected to the first detection unit 21 and the second detection unit 22, and is used to control the first detection unit 21 or the second detection unit 22 to perform fault detection on the pixel unit P in the display area 10a.
  • the first detection unit 21 is connected to the first control signal output terminal 231 of the control unit 23, the m data
  • the display panel 10 is provided with a plurality of scanning lines S1 to Sm, n scanning lines G1 to Gn, and connected to the data test terminal 14 through the data signal line 140, and connected to the scanning test terminal 15 through the scanning signal line 150, and is used to receive the first control signal from the first control signal output terminal 231, and electrically connect the m data lines S1 to Sm and the n scanning lines G1 to Gn at the cross position under the control of the first control signal, and is used to receive the test data signal from the data test terminal 14, and the test scan signal from the scan test terminal 15, and the pixel unit P in the display panel 10 displays the image according to the test scan signal and the test data signal, and determines whether a certain row or multiple rows of scanning lines or data lines have an open circuit or short circuit fault according to the image display result.
  • the data test terminal 14 and the scan test terminal 15 are used to connect to the external signal output unit, and are used
  • the second detection unit 22 is connected to the second control signal output terminal 232 of the control unit 23, m data lines S1 ⁇ Sm and n scan lines G1 ⁇ Gn, and is connected to the data test terminal 14 via the data signal line 140 and is connected to the scan test terminal 15 via the scan signal line 150. It is used to receive the second control signal from the second control signal output terminal 232, and electrically connect the m data lines S1 ⁇ Sm and the n scan lines G1 ⁇ Gn at the cross position under the control of the second control signal, and is used to receive the test data signal from the data test terminal 14 and the test scan signal from the scan test terminal 15.
  • the pixel unit P in the display panel 10 displays an image based on the test scan signal and the test data signal, and determines whether a certain row or multiple rows of scan lines or data lines have an open circuit or short circuit fault based on the image display result.
  • the detection results of the first detection unit 21 and the second detection unit 22 on the display panel 10 are both normal, it indicates that the display panel 10 has no short circuit or open circuit fault.
  • the detection results of the first detection unit 21 and the second detection unit 22 on the display panel 10 are abnormalities in the pixel units in the same row or column, it indicates that the display panel 10 has a short circuit or a short circuit fault.
  • the detection result of the first detection unit 21 on the display panel is abnormal
  • the detection result of the second detection unit on the display panel 10 is also abnormal, but the abnormal pixel units are located in different rows or columns, indicating that both the display panel 10 and the first detection unit 21 are faulty.
  • the fault detection quality of the display panel 10 can be effectively improved, and the second detection unit 22 can be controlled to re-inspect the abnormal pixel units, thereby effectively reducing the material waste caused by excessive screening of the display panel 10 due to the failure of the first detection unit 21, and saving the production cost of the display panel 10.
  • the first detection unit 21 includes multiple first switch tubes T1 and multiple second switch tubes T2, the gate of the first switch tube T1 is connected to the first control signal output terminal 231, the source of the first switch tube T1 is connected to the scan test terminal 15 via the scan signal line 150, and the drain of the first switch tube T1 is connected to the scan line G in the display panel 10, and is used to be turned on according to the first control signal output by the control unit 23, and transmit the test scan signal output by the scan test terminal 15 to the pixel unit P in the display panel 10.
  • the gate of the second switch tube T2 is connected to the first control signal output terminal 231, the source of the second switch tube T2 is connected to the data test terminal 14 via the data signal line 140, and the drain of the second switch tube T2 is connected to the data line S in the display panel 10, and is used to be turned on according to the second control signal output by the control unit 23, and transmit the test data signal output by the data test terminal 14 to the pixel unit P in the display panel 10.
  • the pixel unit P displays an image according to the received test data signal and the test scan signal.
  • the first detection unit 21 includes n first switch tubes T1 and m second switch tubes T2, the n first switch tubes T1 are respectively connected to the n scan lines G1 ⁇ Gn, and the m second switch tubes T2 are respectively connected to the m data lines S1 ⁇ Sm.
  • the second detection unit 22 includes a plurality of third switch tubes T3 and a plurality of fourth switch tubes T4, wherein the gate of the third switch tube T3 is connected to the second control signal output terminal 232, the source of the third switch tube T3 is connected to the scan test terminal 15 via the scan signal line 150, and the drain of the third switch tube T3 is connected to the scan line G in the display panel 10, and is used for being turned on according to the second control signal output by the control unit 23, and transmitting the test scan signal output by the scan test terminal 15 to the pixel unit P in the display panel 10.
  • the gate of the fourth switch tube T4 is connected to the second control signal output terminal 232, the source of the fourth switch tube T4 is connected to the data test terminal 14 via the data signal line 140, and the drain of the fourth switch tube T4 is connected to the data line S in the display panel 10, and is used to be turned on according to the second control signal output by the control unit 23, and transmit the test data signal output by the data test terminal 14 to the pixel unit P in the display panel 10.
  • the pixel unit P displays an image according to the received test data signal and the test scan signal.
  • the second detection unit 22 includes n third switch tubes T3 and m fourth switch tubes T4 , the n third switch tubes T3 are respectively connected to the n scan lines G1 -Gn, and the m fourth switch tubes T4 are respectively connected to the m data lines S1 -Sm.
  • FIG. 6 is a schematic diagram of the planar layout of the fault detection circuit in FIG. 5 .
  • the first detection unit 21 and the second detection unit 22 are adjacent to each other and are arranged on the same side of the adjacent display area 10a.
  • n first switch tubes T1 are arranged in sequence along the first direction F1, and are respectively connected to the scan signal line 150, the control unit 23, and the n scan lines G1 to Gn.
  • m second switch tubes T2 are arranged in sequence along the first direction F1, and are arranged in the same row as the n first switch tubes T1, and are respectively connected to the data signal line 140, the control unit 23, and the m data lines S1 to Sm.
  • the n third switch tubes T3 and the n first switch tubes T1 are arranged one by one in sequence at a preset distance along the second direction F2, and are respectively connected to the scan signal line 150, the control unit 23 and the n scan lines G1 to Gn.
  • the m fourth switch tubes T4 and the m second switch tubes T2 are arranged one by one at a preset distance along the second direction F2, and are arranged in the same row as the n third switch tubes T3, and are respectively connected to the data signal line 140, the control unit 23 and the m data lines S1 to Sm.
  • the first switch tube T1 and the third switch tube T3 which are separated by a preset distance and arranged in sequence one by one are regarded as a switch tube group TB, and the sources of the first switch tube T1 and the third switch tube T3 in the switch tube group TB are connected to the scan driving circuit 13 via the same scan signal line 150, and the drains are connected to the same scan line, so as to receive the test scan signal from the scan driving circuit 13 and transmit it to the pixel unit P at different times, that is, when the control unit 23 outputs the first control signal to the first switch tube T1, the first switch tube T1 is turned on and transmits the test scan signal, and when the control unit outputs the second control signal to the third switch tube T3, the third switch tube T3 is turned on and transmits the test scan signal.
  • the second switch tube T2 and the fourth switch tube T4 which are separated by a preset distance and arranged one by one in sequence are regarded as a switch tube group TB.
  • the sources of the second switch tube T2 and the fourth switch tube T4 in the switch tube group TB are connected to the data driving circuit 12 via the same data signal line 140, and the drains are connected to the same data line, so as to receive the test data signal and transmit it to the pixel unit P at different times, that is, when the control unit 23 outputs the first control signal to the second switch tube T2, the second switch tube T2 is turned on and transmits the test data signal, and when the control unit outputs the second control signal to the fourth switch tube T4, the fourth switch tube T4 is turned on and transmits the test data signal.
  • FIG. 7 is a schematic diagram of the plane layout of the fault detection circuit in FIG. 4 provided in the fourth embodiment of the present application.
  • the first detection unit 21 and the second detection unit 22 are arranged opposite to each other, respectively.
  • n first switch tubes T1 are arranged in sequence along the first direction F1, and are respectively connected to the scan signal line 150, the control unit 23 and the n scan lines G1 to Gn.
  • the m second switch tubes T2 are arranged in sequence along the first direction F1, and are arranged in the same row as the n first switch tubes T1, and are respectively connected to the data signal line 140, the control unit 23 and the m data lines S1 to Sm.
  • Fig. 8 is a schematic diagram of the circuit structure of a fault detection circuit provided in the fifth embodiment of the present application.
  • the display panel 10 further includes a first data test terminal 14a, a second data test terminal 14b, a first scan test terminal 15a and a second scan test terminal 15b
  • the fault detection circuit 20 includes a first detection unit 21, a second detection unit 22 and a control unit 23, wherein the control unit 23 is connected to the first detection unit 21 and the second detection unit 22, and is used to control the first detection unit 21 or the second detection unit 22 to perform fault detection on the pixel unit P in the display area 10a.
  • the first detection unit 21 is connected to the first data test terminal 14a via the first data signal line 141, connected to the first scan test terminal 15a via the first scan signal line 151, and connected to m data lines S1 ⁇ Sm and n scan lines G1 ⁇ Gn, and is used to receive a control signal from the control unit 23, and electrically connect the m data lines S1 ⁇ Sm and the n scan lines G1 ⁇ Gn at the intersection position according to the control signal, and is used to receive a first test data signal from the first data test terminal 14a and a first test scan signal from the first scan test terminal 15a.
  • the pixel unit P in the display panel 10 displays an image according to the first test scan signal and the first test data signal, and determines whether a certain row or multiple rows of scan lines or data lines have an open circuit or short circuit fault according to the image display result.
  • the first data test terminal 14a, the second data test terminal 14b, the first scan test terminal 15a and the second scan test terminal 15b are used to connect to the external signal output unit, and are used to receive the first test data signal, the second test data signal, the first test scan signal and the second test scan signal from the external signal output unit and transmit them to the pixel unit P.
  • the second detection unit 22 is connected to the second data test terminal 14b via the second data signal line 142, is connected to the second scan test terminal 15b via the second scan signal line 152, and is connected to m data lines S1 ⁇ Sm and n scan lines G1 ⁇ Gn, and is used to receive a control signal from the control unit 23, and electrically connect the m data lines S1 ⁇ Sm and the n scan lines G1 ⁇ Gn at the intersection according to the control signal, and is used to receive a second test data signal from the second data test terminal 14b and a second test scan signal from the second scan test terminal 15b.
  • the pixel unit P in the display panel 10 displays an image according to the second test scan signal and the second test data signal, and determines whether a certain row or multiple rows of scan lines or data lines have an open circuit or short circuit fault according to the image display result.
  • the first detection unit 21 includes a plurality of first switch tubes T1 and a plurality of second switch tubes T2.
  • the gate of the first switch tube T1 is connected to the control unit 23, the source of the first switch tube T1 is connected to the first scan test end 15a via the first scan signal line 151, and the drain of the first switch tube T1 is connected to the scan line G in the display panel 10, and is used to be turned on according to the control signal output by the control unit 23, and transmit the output first test scan signal to the pixel unit P in the display panel 10.
  • the gate of the second switch tube T2 is connected to the control unit 23, the source of the second switch tube T2 is connected to the first data test terminal 14a via the first data signal line 141, and the drain of the second switch tube T2 is connected to the data line S in the display panel 10, and is used to be turned on according to the control signal output by the control unit 23, and transmit the output first test data signal to the pixel unit P in the display panel 10.
  • the pixel unit P displays an image according to the received first test data signal and the first test scan signal.
  • the first detection unit 21 includes n first switch tubes T1 and m second switch tubes T2, the n first switch tubes T1 are respectively connected to the n scan lines G1 ⁇ Gn, and the m second switch tubes T2 are respectively connected to the m data lines S1 ⁇ Sm.
  • the second detection unit 22 includes a plurality of third switch tubes T3 and a plurality of fourth switch tubes T4, the gate of the third switch tube T3 is connected to the control unit 23, the source of the third switch tube T3 is connected to the second scan test end 15b via the second scan signal line 152, and the drain of the third switch tube T3 is connected to the scan line G in the display panel 10, and is used to be turned on according to the control signal output by the control unit 23, and transmit the output second test scan signal to the pixel unit P in the display panel 10.
  • the gate of the fourth switch tube T4 is connected to the control unit 23, the source of the fourth switch tube T4 is connected to the second data test terminal 14b via the second data signal line 142, and the drain of the fourth switch tube T4 is connected to the data line S in the display panel 10, and is used to be turned on according to the control signal output by the control unit 23, so as to transmit the output second test data signal to the pixel unit P in the display panel 10.
  • the pixel unit P displays an image according to the received second test data signal and the second test scan signal.
  • the second detection unit 22 includes n third switch tubes T3 and m fourth switch tubes T4 , the n third switch tubes T3 are respectively connected to the n scan lines G1 -Gn, and the m fourth switch tubes T4 are respectively connected to the m data lines S1 -Sm.
  • FIG. 9 is a schematic diagram of the layout of the fault detection circuit in FIG. 8 .
  • the first detection unit 21 and the second detection unit 22 are adjacent to each other and are arranged on the same side of the adjacent display area 10a.
  • n first switch tubes T1 are arranged in sequence along the first direction F1, and are respectively connected to the first scan signal line 151, the control unit 23, and the n scan lines G1 to Gn.
  • m second switch tubes T2 are arranged in sequence along the first direction F1, and are arranged in the same row as the n first switch tubes T1, and are respectively connected to the first data signal line 141, the control unit 23, and the m data lines S1 to Sm.
  • the gates of the first switch tube T1 and the second switch tube T2 are connected to the same line.
  • the n third switch tubes T3 and the n first switch tubes T1 are arranged one by one in sequence at a preset distance along the second direction F2, and are respectively connected to the second scan signal line 152, the control unit 23, and the n scan lines G1 to Gn.
  • the m fourth switch tubes T4 and the m second switch tubes T2 are arranged one by one at a preset distance along the second direction F2, and are arranged in the same row as the n third switch tubes T3, and are respectively connected to the second data signal line 142, the control unit 23, and the m data lines S1 to Sm.
  • the first switch tube T1 and the third switch tube T3 which are separated by a preset distance and arranged in sequence one by one are regarded as a switch tube group TB, and the sources of the first switch tube T1 and the third switch tube T3 in the switch tube group TB are respectively connected to the scan driving circuit 13 via the first scan signal line 151 and the second scan signal line 152, and the drains are connected to the same scan line, so as to receive the test scan signal from the scan driving circuit 13 and transmit it to the pixel unit P at different times, that is, when the control unit 23 outputs the first control signal to the first switch tube T1, the first switch tube T1 is turned on to receive the test scan signal from the first scan signal line 151 and transmit it to the pixel unit P, and when the control unit outputs the second control signal to the third switch tube T3, the third switch tube T3 is turned on to receive the test scan signal from the second scan signal line 152 and transmit it to the pixel unit P.
  • the second switch tube T2 and the fourth switch tube T4 which are separated by a preset distance and arranged in sequence one by one, are regarded as a switch tube group TB.
  • the sources of the second switch tube T2 and the fourth switch tube T4 in the switch tube group TB are respectively connected to the data driving circuit 12 via the first data signal line 141 and the second data signal line 142, and the drains are connected to the same data line, so as to receive the test data signal and transmit it to the pixel unit P at different times. That is, when the control unit 23 outputs the first control signal to the second switch tube T2, the second switch tube T2 is turned on and receives the test data signal from the first data signal line 141 and transmits it to the pixel unit P. When the control unit outputs the second control signal to the fourth switch tube T4, the fourth switch tube T4 is turned on and receives the test data signal from the second data signal line 142 and transmits it to the pixel unit P.
  • FIG. 10 is a schematic diagram of the plane layout of the fault detection circuit shown in FIG. 8 provided in the sixth embodiment of the present application.
  • the first detection unit 21 and the second detection unit 22 are arranged opposite to each other and are respectively arranged on different sides of the display area 10a.
  • the n first switch tubes T1 are arranged in sequence along the first direction F1 and are respectively connected to the first scan signal line 151 , the control unit 23 and the n scan lines G1 to Gn.
  • the m second switch tubes T2 are arranged in sequence along the first direction F1 and are arranged in the same row as the n first switch tubes T1 and are respectively connected to the first data signal line 141 , the control unit 23 and the m data lines S1 to Sm.
  • n third switch tubes T3 are arranged in sequence along the first direction F1, respectively
  • the m fourth switch tubes T4 are arranged in sequence along the first direction F1 and are arranged in the same row as the n third switch tubes T3, and are respectively connected to the second data signal line 142, the control unit 23 and the m data lines S1 to Sm.
  • FIG11 is a flow chart of a fault detection method provided in the seventh embodiment of the present application.
  • the display panel 10 is short-circuited or short-circuited by the fault detection circuit 20, and the specific steps are as follows:
  • S101 controlling a first detection unit to perform short circuit or open circuit detection on pixel units in a display panel, and if all pixel units display normally, it indicates that the pixel units are not faulty.
  • the control unit 23 outputs a first control signal to the first detection unit 21.
  • the first detection unit 21 turns on all the first switch tubes T1 and all the second switch tubes T2 according to the first control signal, so that the scan test end 15 is connected to the n scan lines G1 ⁇ Gn through the n first switch tubes T1, and the data test end 14 is connected to the m data lines S1 ⁇ Sm through the m second switch tubes T2.
  • the n scan lines G1 ⁇ Gn and the m data lines S1 ⁇ Sm are short-circuited with each other in the display area 10a.
  • the scan test end 15 outputs a test scan signal to a plurality of pixel units P via a plurality of first switch tubes T1, and the data test end 14 outputs a test data signal to a plurality of pixel units P via a plurality of second switch tubes T2.
  • the display panel 10 displays a pure color picture, that is, all black or all white, it indicates that there is no short circuit or open circuit fault in the pixel unit P in the display panel 10.
  • the control unit 23 When the first detection unit 21 detects the first abnormal pixel unit, that is, when it detects that the display panel 10 has a fault, the control unit 23 outputs a second control signal to the second detection unit 22.
  • the second detection unit 22 turns on all the third switch tubes T3 and all the fourth switch tubes T4 according to the second control signal, so that the scan test end 15 is connected to the n scan lines G1 ⁇ Gn through the n third switch tubes T3, and the data test end 14 is connected to the m data lines S1 ⁇ Sm through the m fourth switch tubes T4.
  • the n scan lines G1 ⁇ Gn and the m data lines S1 ⁇ Sm are short-circuited with each other in the display area 10a.
  • the scan test terminal 15 outputs a test scan signal to a plurality of pixel units P via a plurality of third switch tubes T3.
  • the data test terminal 14 outputs the test data signal to the multiple pixel units P through the multiple fourth switch tubes T4.
  • the display panel 10 displays a pure color picture, that is, all black or all white, it indicates that the display panel 10 has no short circuit or open circuit fault, which indicates that the first detection unit 21 has a fault, and the pixel unit P in the display panel 10 has no fault, that is, the first abnormal pixel unit has no fault.
  • the second detection unit 22 controls the display panel 10 to display white stripes or black stripes and the positions of the stripes are the same as the positions of the stripes detected by the display panel 10 for the first time, it indicates that the first abnormal pixel unit is faulty and the first detection unit 21 is not faulty.
  • a pixel unit that displays abnormality when the second detection unit 22 performs detection is determined to be a second abnormal pixel unit, when the first abnormal pixel unit is different from the second abnormal pixel unit detected by the second detection unit, it indicates that the first detection unit and the second abnormal pixel unit are faulty. That is, when the second detection unit 22 controls the display panel 10 to display white stripes or black stripes and the position of the stripes is different from the position of the stripes that appeared in the first detection of the display panel 10, it indicates that both the first detection unit 21 and the display panel 10 are faulty.
  • Re-testing the display panel 10 that has been tested by the first testing unit 21 by the second testing unit 22 can effectively improve the testing quality of the first testing unit 21, solve the material waste caused by excessive screening of the display panel 10 due to the failure of the first testing unit 21, and effectively save the waste of display panel 10 materials.

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Abstract

一种故障检测电路(20)、显示面板(10)和故障检测方法，包括第一检测单元(21)、第二检测单元(22)，第一检测单元(21)对像素单元(P)进行短路检测，若像素单元(P)异常，则第二检测单元(22)对像素单元(P)进行检测，通过两个检测单元进行检测，可提升检测准确率。

Description

故障检测电路、显示面板和故障检测方法
本申请要求于2023年04月04日提交中国专利局，申请号CN202310350800.5，申请名称为“故障检测电路、显示面板和故障检测方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及故障检测电路、显示面板和故障检测方法。
背景技术
电子墨水技术(Electronic Paper Display，EPD)是借助环境光显示的新技术。其显示原理是将黑、白两色的带电颗粒封装于微胶囊结构中，由外加电场控制不同电荷的黑白颗粒升降移动，以呈现出黑白单色的显示效果，在电场的作用下，黑白两种不同的墨滴不停运动，当白色的墨滴上升到上表面时，所有的环境光照射到上表面被完全反射，这样就呈现白色状态，两种不同的墨滴成比例混合，就可以形成黑白及有灰度层次的不同颜色。
目前，对电子纸显示面板异常检测主要是通过设置晶体管来分别驱动数据线和扫描线，并依据显示面板的显示效果来判断整个显示区是否正常，但是这样检测是直接对成品后的电子纸显示区进行检测，在检测出现异常时，重新拆装会损坏显示区内电子纸膜的像素单元和驱动像素单元的驱动用集成电路，从而造成资源的浪费。因此，如何在电子纸成品之前进行检测以提升检测准确性是亟需解决的问题。
发明内容
鉴于上述现有技术的不足，本申请提出一种可有效提升检测准确性的故障检测电路、显示面板和故障检测方法。
本申请提供一种故障检测电路，应用于包括多个像素单元以执行图像显示的显示面板，包括第一检测单元、第二检测单元和控制单元，控制单元连接于第一检测单元和第二检测单元，第一检测单元用于在控制单元的控制下对显示面板中的像素单元进行短路或断路检测，若至少一个像素单元显示异常并确定 为第一异常像素单元时，控制单元控制第二检测单元重新执行检测，若第二检测单元检测到第一异常像素单元显示正常，则表征第一检测单元出现故障，若第二检测单元检测到第一异常像素单元显示异常，则表征第一异常像素单元出现故障。
可选地，第二检测单元执行检测时出现显示异常的像素单元即确定为第二异常像素单元，当第一异常像素单元与第二检测单元检测到的第二异常像素单元不相同时，表征第一检测单元以及第二异常像素单元出现故障。
可选地，显示面板包括扫描测试端、数据测试端、沿第一方向延伸的多条扫描线和沿第二方向延伸的多条数据线，其中第一方向不同于第二方向，第一检测单元连接于控制单元的第一控制信号输出端、扫描测试端、数据测试端、多条数据线和多条扫描线，用于自第一控制信号输出端接收的第一控制信号并依据第一控制信号自扫描测试端接收并传输测试扫描信号以及自数据测试端接收并传输测试数据信号至像素单元，以控制像素单元进行图像显示。第二检测单元连接于控制单元的第二控制信号输出端、扫描测试端、数据测试端、多条数据线和多条扫描线，用于自第二控制信号输出端接收第二控制信号并依据第二控制信号自扫描测试端接收并传输测试扫描信号以及自数据测试端接收并传输测试数据信号至像素单元，以控制像素单元进行图像显示。
可选地，显示面板包括第一数据测试端、第二数据测试端、第一扫描测试端、第二扫描测试端、沿第一方向延伸的多条扫描线和沿第二方向延伸的多条数据线，其中，第一方向不同于第二方向，第一检测单元连接于第一扫描测试端、第一数据测试端、多条数据线和多条扫描线，用于依据控制单元输出控制信号自第一扫描测试端接收并传输第一测试扫描信号以及自第一数据测试端接收并传输第一测试数据信号至像素单元，以控制像素单元进行图像显示。第二检测单元连接于第二扫描测试端、第二数据测试端、多条数据线和多条扫描线，用于依据控制信号自第二扫描测试端接收并传输第二测试扫描信号以及自第二数据测试端接收并传输第二测试数据信号至像素单元，以控制像素单元进行图像显示。
可选地，第一检测单元包括多个第一开关管和多个第二开关管，多个第一开关管的栅极连接于第一控制信号输出端，多个第一开关管的源极连接于扫描测试端，多个第一开关管的漏极分别连接于多条扫描线，用于依据第一控制信号导通并自扫描测试端接收测试扫描信号并传输至像素单元。多个第二开关管 的栅极连接于第一控制信号输出端，多个第二开关管的源极连接于数据测试端，多个第二开关管的漏极分别连接于多条数据线，用于依据第一控制信号导通并自数据测试端接收测试数据信号并传输至像素单元。
可选地，第二检测单元包括多个第三开关管和多个第四开关管，多个第三开关管的栅极连接于第二控制信号输出端，多个第三开关管的源极连接于扫描测试端，多个第三开关管的漏极分别连接于多条扫描线，用于依据第二控制信号导通并自扫描测试端接收测试扫描信号并传输至像素单元，多个第四开关管的栅极连接于第二控制信号输出端，多个第四开关管的源极连接于数据测试端，多个第四开关管的漏极分别连接于多条数据线，用于依据第二控制信号导通并自数据测试端接收测试数据信号并传输至像素单元。
可选地，显示面板包括相邻设置的显示区域与非显示区域，第一检测单元与第二检测单元相邻设置并设置于显示区域同一侧的非显示区域，多个第一开关管与多个第三开关管依序一一对应设置，任意对应设置的第一开关管与第三开关管的源极连接于扫描测试端，漏极连接于同一条扫描线，用于不同时传输测试扫描信号，多个第二开关管与多个第四开关管依序一一对应设置，任意对应设置的第二开关管与第四开关管的源极连接于数据测试端，漏极连接于相同的数据线，用于不同时传输测试数据信号。
可选地，第一检测单元与第二检测单元相对设置，分别设置于显示区域不同侧边的非显示区域。
可选地，像素单元包括多个微型液态胶囊，微型液态胶囊为密封的球体，内部封装有白色颗粒、黑色颗粒和透明分散媒，其中，白色颗粒和黑色颗粒为两种带有不同电荷的颗粒，白色颗粒和黑色颗粒完全浸泡于透明分散媒内，并依据电场力的作用在透明分散媒内进行相应的移动。
本申请还公开一种显示面板，包括数据驱动电路、扫描驱动电路呈阵列排布的多个像素单元和前述的故障检测电路，扫描驱动电路用于输出扫描信号至像素单元，数据驱动电路用于输出数据信号至像素单元，像素单元用于在扫描信号的控制下接收数据信号进行图像显示，故障检测电路用于对像素单元进行短路或断路检测。
本申请还提供一种故障检测方法，应用于前述故障检测电路，包括：控制第一检测单元对显示面板内的像素单元进行短路或断路检测，若所有像素单元显示正常则表征像素单元无故障；若第一检测单元检测到至少一个像素单元显 示异常，确定为第一异常像素单元，且控制第二检测单元重新进行检测；若第二检测单元检测到第一异常像素单元显示正常，表征第一检测单元出现故障；若第二检测单元检测到第一异常像素单元显示异常，则表征第一异常像素单元出现故障。
可选地，“控制第二检测单元重新进行检测”包括：控制第二检测单元对显示区域内的像素单元重新进行检测；“若第二检测单元检测到第一异常像素单元显示正常，则表征第一检测单元出现故障”包括：若第二检测单元检测到所有像素单元显示正常，表征第一异常像素单元无故障，且第一检测单元出现故障。
可选地，“若第二检测单元检测到第一异常像素单元显示异常，则表征第一异常像素单元出现故障”包括：若第二检测单元执行检测时出现显示异常的像素单元即确定为第二异常像素单元，当第一异常像素单元与第二检测单元检测到的第二异常像素单元不相同时，表征第一检测单元以及第二异常像素单元出现故障。
相较于现有技术问题，通过第一检测单元与第二检测单元分别对显示面板中的像素单元进行故障检测，可有效提升显示面板的故障检测质量，并控制第二检测单元对异常像素单元进行复检，有效降低了由于第一检测单元故障导致对显示面板的过度筛选而造成的材料浪费，节省了显示面板生产成本。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的一种显示面板的侧面结构示意图；
图2为图1所示显示面板中阵列基板的平面布局示意图；
图3为图2中显示介质层的结构示意图；
图4为本申请第二实施例提供的一种故障检测电路的电路结构示意图；
图5为本申请第三实施例提供的如图4中故障检测电路的电路结构示意图；
图6为图5中故障检测电路的平面布局示意图；
图7为本申请第四实施例提供如图4中故障检测电路的平面布局示意图；
图8为本申请第五实施例提供的一种故障检测电路的电路结构示意图；
图9为图8中故障检测电路的布局示意图；
图10为本申请第六实施例提供的如图8中故障检测电路平面布局示意图；
图11为本申请第七实施例提供的一种故障检测方法流程图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳实施方式。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施方式。相反地，提供这些实施方式的目的是使对本申请的公开内容理解的更加透彻全面。
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本文中为部件所编序号本身，例如“第一”、“第二”等，仅用于区分所描述的对象，不具有任何顺序或技术含义。而本申请所说“连接”、“联接”，如无特别说明，均包括直接和间接连接(联接)。本申请中所提到的方向用语，例如，“上”、“下”、“前”、“后”、“左”、“右”、“内”、“外”、“侧面”等，仅是参考附加图式的方向，因此，使用的方向用语是为了更好、更清楚地说明及理解本申请，而不是指示或暗指所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸地连接，或者一体地连接；可以是机械连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。需要说明的是，本申请的说明书和权利要求书及所述附图中的术语“第一”、“第二”等是用于区别不同对象，而不是用于描述特定顺序。此外，本申请中使用的术语“包括”、“可以包括”、“包含”、或“可以包含”表示公开的相应功能、操作、元件等的存在，并不限制其他的一个或多个更多功能、操作、元件等。此外，术语“包括”或“包含”表示存在说明书中公开的相应特征、数目、步骤、操作、元素、部件或其组合，而并不排除存在或添加一个或多个其他特征、数目、步骤、操作、元素、部件或其组合，意图在于覆盖不排他的包含。还需要理解的是，本文中描述的“至少一个”的含义是一个及其以上，例如一个、两个或三个等，而“多个”的含义是至少两个，例如两个或三个等，除非另有明确具体的限定。本申请的说明书和权 利要求书及所述附图中的术语“步骤1”、“步骤2”等是用于区别不同对象，而不是用于描述特定顺序。
在显示技术领域中，显示装置通常可以包括显示面板和背光组件，其中，所述显示面板安装至所述背光组件的出光侧，所述背光组件用于给所述显示面板提供背光，以调节显示面板显示不同画面。
请参阅图1，图1为本申请实施例提供的一种显示面板的侧面结构示意图。如图1所示，显示面板10包括图像用显示区域10a与非显示区域10b。显示区域10a用于执行图像显示，非显示区域10b环绕设置于显示区域10a周围以设置其他辅助部件或者模组。具体地，显示面板10包括有阵列基板(Array substrate,AS)10c与对向基板10d，以及夹设于阵列基板10c与对向基板10d之间的显示介质层10e。阵列基板10c与对向基板10d上设置驱动元件依据数据信号(Data)产生相应的电场，从而驱动显示介质层10e中透射相应灰度的光线，以执行图像显示。
请参阅图2，图2为图1所示显示面板中阵列基板的平面布局示意图。如图2所示，阵列基板10c中对应图像显示区域10a包括多个呈矩阵排列的m*n像素单元P、m条数据线S1～Sm、n条扫描线G1～Gn，m、n为大于1的自然数。
其中，该n条扫描线G1～Gn沿第一方向F1延伸且沿第二方向F2相互绝缘且平行排列，该m条数据线S1～Sm沿第二方向F2延伸且沿第一方向F1相互绝缘且平行排列，所述第一方向F1与第二方向F2相互垂直。
对应显示面板10的非显示区域10b(图1)，进一步包括的用于驱动像素单元进行图像显示的时序控制电路11、数据驱动电路12以及设置于阵列基板10c的扫描驱动电路13。
其中，时序控制电路11电性连接于数据驱动电路12与扫描驱动电路13，用于控制数据驱动电路12与扫描驱动电路13的工作时序，也即是输出对应的时序控制信号至数据驱动电路12至扫描驱动电路13，以控制何时输出对应的扫描信号以及数据信号。
数据驱动电路12与该m条数据线S1～Sm电性连接，用于将待显示用的数据信号(Data)通过该m条数据线S1～Sm以数据电压的形式传输至该多个像素单元P。
扫描驱动电路13用于与该n条扫描线G1～Gn电性连接，用于通过该n条 扫描线G1～Gn输出扫描信号用于控制像素单元P何时接收数据信号。其中，扫描驱动电路13按照位置排列顺序自n条扫描线G1～Gn按照扫描周期依次自扫描线G1、G2、……，Gn输出扫描信号。
本实施例中，扫描驱动电路13中的电路元件与阵列基板10c中的像素单元P同一制程制作于阵列基板10c中，也即是GOA(Gate Driver on Array)技术。
请参阅图3，图3为图2中显示介质层的结构示意图。
如图3所示，显示介质层10e为电子纸膜片，包括多个微型液态胶囊e，微型液态胶囊e为密封的球体，内部封装有白色颗粒a、黑色颗粒b和透明分散媒c。其中，白色颗粒a和黑色颗粒b为两种带有不同电荷的颗粒。例如，白色颗粒a带正电，黑色颗粒b带负电或者白色颗粒a带负电，黑色颗粒b带正电。白色颗粒a和黑色颗粒b完全浸泡于透明分散媒c内，并能够在透明分散媒c内自由移动。当微型液态胶囊e两端的电极形成电场时，带正电的白色颗粒a和点负电的黑色颗粒b在电场力的作用下进行相应的移动，每一个微型液态胶囊e靠近对向基板10d一侧会呈现一定程度的黑色或者白色，最后所有微型液态胶囊e在对向基板10d一侧共同形成一定图像。
请参阅图4，图4为本申请第二实施例提供的一种故障检测电路的电路结构示意图。如图4所示，故障检测电路20设置于显示面板10的非显示区域10b，故障检测电路20包括第一检测单元21和控制单元23，其中，控制单元23连接于第一检测单元21，第一检测单元21连接于数据测试端14、扫描测试端15、m条数据线S1～Sm和n条扫描线G1～Gn，用于自控制单元23接收第一控制信号，并在第一控制信号的控制下将m条数据线S1～Sm与n条扫描线G1～Gn在交叉位置出电性连接，并用于自数据测试端14接收测试数据信号、自扫描测试端15接收测试扫描信号，显示面板10中像素单元P依据测试扫描信号与测试数据信号进行图像显示，依据图像显示结果判断某一行或多行扫描线或数据线出现断路或短路故障。其中，数据测试端14和扫描测试端15用于连接外部信号输出单元，用于自外部信号输出单元接收测试扫描信号和测试数据信号并传输至像素单元P。
第一检测单元21用于在控制单元23的控制下对显示区域内的像素单元进行短路或断路检测识别，若至少一个像素单元显示异常并确定为第一异常像素单元时，控制单元23控制第二检测单元22重新执行检测，若第二检测单元22 检测到第一异常像素单元显示正常，则表征第一检测单元21出现故障，若第二检测单元22检测到第一异常像素单元显示异常，则表征第一异常像素单元出现故障。第二检测单元22执行检测时出现显示异常的像素单元即确定为第二异常像素单元，当第一异常像素单元与第二检测单元22检测到的第二异常像素单元不相同时，表征第一检测单元21以及第二异常像素单元出现故障。
在进行检测时，当某一行像素单元P显示的颜色与相邻像素单元显示颜色明显不同时，表征控制该行像素单元P进行图像显示的扫描线G出现故障，当某一列像素单元P显示的颜色与相邻像素单元显示的颜色明显不同时，表征控制该列像素单元P进行图像显示的数据线S出现故障。例如当某一行像素单元显示为纯白色而相邻的多行像素单元显示为黑色时，表征该行像素单元P对应的扫描线G断路或短路。当某一列像素单元显示为纯白色而相邻的多列像素单元显示为黑色时，表征该列像素单元P对应的扫描线G断路或短路。
具体地，第一检测单元21包括多个第一开关管T1和多个第二开关管T2，第一开关管T1的栅极连接于控制单元23，第一开关管T1的源极连接于扫描测试端15，第一开关管T1的漏极连接于显示面板10中的扫描线G，用于依据控制单元23输出的第一控制信号导通，将扫描测试端15输出的测试扫描信号传输至显示面板10中的像素单元P。
第二开关管T2的栅极连接于控制单元23，第二开关管T2的源极连接于数据测试端14，第二开关管T2的漏极连接于显示面板10中的数据线S，用于依据控制单元23输出的第二控制信号导通，将数据测试端14输出的测试数据信号传输至显示面板10中的像素单元P。像素单元P依据接收的测试数据信号与测试扫描信号进行图像显示。其中，第一检测单元21包括n个第一开关管T1和m个第二开关管T2，n个第一开关管T1分别与n条扫描线G1～Gn连接，m个第二开关管T2分别与m条数据线S1～Sm连接。
请参阅图5，图5为本申请第三实施例提供的如图4中故障检测电路的电路结构示意图。如图5所示，显示面板10还包括数据测试端14和扫描测试端15，故障检测电路20包括第一检测单元21、第二检测单元22和控制单元23，其中，控制单元23连接于第一检测单元21和第二检测单元22，用于控制第一检测单元21或第二检测单元22对显示区域10a中的像素单元P进行故障检测。
第一检测单元21连接于控制单元23的第一控制信号输出端231、m条数据 线S1～Sm、n条扫描线G1～Gn，并经数据信号线140连接于数据测试端14、经扫描信号线150连接于扫描测试端15，用于自第一控制信号输出端231接收第一控制信号，并在第一控制信号的控制下将m条数据线S1～Sm与n条扫描线G1～Gn在交叉位置出电性连接，并用于自数据测试端14接收测试数据信号、自扫描测试端15接收测试扫描信号，显示面板10中像素单元P依据测试扫描信号与测试数据信号进行图像显示，依据图像显示结果判断某一行或多行扫描线或数据线出现断路或短路故障。其中，数据测试端14和扫描测试端15用于连接外部信号输出单元，用于自外部信号输出单元接收测试扫描信号和测试数据信号并传输至像素单元P。
第二检测单元22连接于控制单元23的第二控制信号输出端232、m条数据线S1～Sm和n条扫描线G1～Gn，并经数据信号线140连接于数据测试端14、经扫描信号线150连接于扫描测试端15，用于自第二控制信号输出端232接收第二控制信号，并在第二控制信号的控制下将m条数据线S1～Sm与n条扫描线G1～Gn在交叉位置出电性连接，并用于自数据测试端14接收测试数据信号、自扫描测试端15接收测试扫描信号，显示面板10中像素单元P依据测试扫描信号与测试数据信号进行图像显示，依据图像显示结果判断某一行或多行扫描线或数据线出现断路或短路故障。
当某一行像素单元P显示的颜色与相邻像素单元显示颜色明显不同时，表征控制该行像素单元P进行图像显示的扫描线G出现故障，当某一列像素单元P显示的颜色与相邻像素单元显示的颜色明显不同时，表征控制该列像素单元P进行图像显示的数据线S出现故障。例如当某一行像素单元显示为纯白色而相邻的多行像素单元显示为黑色时，表征该行像素单元P对应的扫描线G断路或短路。当某一列像素单元显示为纯白色而相邻的多列像素单元显示为黑色时，表征该列像素单元P对应的扫描线G断路或短路。
当第一检测单元21与第二检测单元22对显示面板10的检测结果均为无异常时，表征显示面板10无短路或断路故障，当第一检测单元21与第二检测单元22对显示面板10的检测结果为相同行或列的像素单元出现异常时，表征显示面板10有短路或短路故障。
当第一检测单元21对显示面板10的检测结果为异常，第二检测单元22对显示面板的检测结果为无异常时，表征第一检测单元21出现故障，显示面板10 无故障。
当第一检测单元21对显示面板的检测结果为异常，第二检测单元对显示面板10的检测结果也为异常，但是异常的像素单元位于不同行或不同列，表征显示面板10与第一检测单元21均出现故障。
通过第一检测单元21与第二检测单元22分别对显示面板10中的像素单元进行故障检测，可有效提升显示面板10的故障检测质量，并控制第二检测单元22对异常像素单元进行复检，有效降低了由于第一检测单元21故障导致对显示面板10的过度筛选而造成的材料浪费，节省了显示面板10生产成本。
具体地，第一检测单元21包括多个第一开关管T1和多个第二开关管T2，第一开关管T1的栅极连接于第一控制信号输出端231，第一开关管T1的源极经扫描信号线150连接于扫描测试端15，第一开关管T1的漏极连接于显示面板10中的扫描线G，用于依据控制单元23输出的第一控制信号导通，将扫描测试端15输出的测试扫描信号传输至显示面板10中的像素单元P。
第二开关管T2的栅极连接于第一控制信号输出端231，第二开关管T2的源极经数据信号线140连接于数据测试端14，第二开关管T2的漏极连接于显示面板10中的数据线S，用于依据控制单元23输出的第二控制信号导通，将数据测试端14输出的测试数据信号传输至显示面板10中的像素单元P。像素单元P依据接收的测试数据信号与测试扫描信号进行图像显示。其中，第一检测单元21包括n个第一开关管T1和m个第二开关管T2，n个第一开关管T1分别与n条扫描线G1～Gn连接，m个第二开关管T2分别与m条数据线S1～Sm连接。
第二检测单元22包括多个第三开关管T3和多个第四开关管T4，第三开关管T3的栅极连接于第二控制信号输出端232，第三开关管T3的源极经扫描信号线150连接于扫描测试端15，第三开关管T3的漏极连接于显示面板10中的扫描线G，用于依据控制单元23输出的第二控制信号导通，将扫描测试端15输出的测试扫描信号传输至显示面板10中的像素单元P。
第四开关管T4的栅极连接于第二控制信号输出端232，第四开关管T4的源极经数据信号线140连接于数据测试端14，第四开关管T4的漏极连接于显示面板10中的数据线S，用于依据控制单元23输出的第二控制信号导通，将数据测试端14输出的测试数据信号传输至显示面板10中的像素单元P。像素单元P依据接收的测试数据信号与测试扫描信号进行图像显示。
其中，第二检测单元22包括n个第三开关管T3和m个第四开关管T4，n个第三开关管T3分别与n条扫描线G1～Gn连接，m个第四开关管T4分别与m条数据线S1～Sm连接。
请参阅图6，图6为图5中故障检测电路的平面布局示意图。
如图6所示，第一检测单元21与第二检测单元22相邻且设置于邻近显示区域10a的同一侧。在第一检测单元21中，n个第一开关管T1沿第一方向F1依次排列，分别连接于扫描信号线150、控制单元23和n条扫描线G1～Gn。m个第二开关管T2沿第一方向F1依次排列，且与n个第一开关管T1设置于同一行，分别连接于数据信号线140、控制单元23和m条数据线S1～Sm。
在第二检测单元22中，n个第三开关管T3与n个第一开关管T1沿第二方向F2间隔预设距离并依序一一对应设置，分别连接于扫描信号线150、控制单元23和n条扫描线G1～Gn。m个第四开关管T4与m个第二开关管T2沿第二方向F2间隔预设距离一一对应设置，且与n个第三开关管T3设置于同一行，分别连接于数据信号线140、控制单元23和m条数据线S1～Sm。
其中，将间隔预设距离并依序一一对应设置的第一开关管T1与第三开关管T3视为一个开关管组TB，开关管组TB中的第一开关管T1与第三开关管T3的源极经同一条扫描信号线150连接于扫描驱动电路13，漏极连接于同一条扫描线，用于不同时自扫描驱动电路13接收测试扫描信号并传输至像素单元P，即当控制单元23输出第一控制信号至第一开关管T1时，第一开关管T1导通并传输测试扫描信号，当控制单元输出第二控制信号至第三开关管T3时，第三开关管T3导通并传输测试扫描信号。
将间隔预设距离并依序一一对应设置的第二开关管T2与第四开关管T4视为一个开关管组TB，开关管组TB中的第二开关管T2与第四开关管T4的源极经同一条数据信号线140连接于数据驱动电路12，漏极连接于同一条数据线，用于不同时接收测试数据信号并传输至像素单元P，即当控制单元23输出第一控制信号至第二开关管T2时，第二开关管T2导通并传输测试数据信号，当控制单元输出第二控制信号至第四开关管T4时，第四开关管T4导通并传输测试数据信号。
请参阅图7，图7为本申请第四实施例提供如图4中故障检测电路的平面布局示意图。如图7所示，第一检测单元21和第二检测单元22相对设置，分别 设置于显示区域10a的不同侧。在第一检测单元21中，n个第一开关管T1沿第一方向F1依次排列，分别连接于扫描信号线150、控制单元23和n条扫描线G1～Gn。m个第二开关管T2沿第一方向F1依次排列，且与n个第一开关管T1设置于同一行，分别连接于数据信号线140、控制单元23和m条数据线S1～Sm。
请参阅图8，图8为本申请第五实施例提供的一种故障检测电路的电路结构示意图。如图8所示，显示面板10还包括第一数据测试端14a、第二数据测试端14b、第一扫描测试端15a和第二扫描测试端15b，故障检测电路20包括第一检测单元21、第二检测单元22和控制单元23，其中，控制单元23连接于第一检测单元21和第二检测单元22，用于控制第一检测单元21或第二检测单元22对显示区域10a中的像素单元P进行故障检测。
具体地，第一检测单元21经第一数据信号线141连接于第一数据测试端14a，经第一扫描信号线151连接于第一扫描测试端15a，并连接于m条数据线S1～Sm和n条扫描线G1～Gn，用于自控制单元23接收控制信号，并在依据控制信号将m条数据线S1～Sm与n条扫描线G1～Gn在交叉位置处电性连接，并用于自第一数据测试端14a接收第一测试数据信号、自第一扫描测试端15a接收第一测试扫描信号，显示面板10中像素单元P依据第一测试扫描信号与第一测试数据信号进行图像显示，依据图像显示结果判断某一行或多行扫描线或数据线出现断路或短路故障。其中，第一数据测试端14a、第二数据测试端14b、第一扫描测试端15a和第二扫描测试端15b用于连接外部信号输出单元，用于自外部信号输出单元接收第一测试数据信号第二测试数据信号、第一测试扫描信号和第二测试扫描信号并传输至像素单元P。
第二检测单元22经第二数据信号线142连接于的第二数据测试端14b、经第二扫描信号线152连接于的第二扫描测试端15b，并连接于m条数据线S1～Sm和n条扫描线G1～Gn，用于自控制单元23接收控制信号，并依据控制信号将m条数据线S1～Sm与n条扫描线G1～Gn在交叉位置处电性连接，并用于自第二数据测试端14b接收第二测试数据信号、自第二扫描测试端15b接收第二测试扫描信号，显示面板10中像素单元P依据第二测试扫描信号与第二测试数据信号进行图像显示，依据图像显示结果判断某一行或多行扫描线或数据线出现断路或短路故障。
具体地，第一检测单元21包括多个第一开关管T1和多个第二开关管T2， 第一开关管T1的栅极连接于控制单元23，第一开关管T1的源极经第一扫描信号线151连接于第一扫描测试端15a，第一开关管T1的漏极连接于显示面板10中的扫描线G，用于依据控制单元23输出的控制信号导通，将输出的第一测试扫描信号传输至显示面板10中的像素单元P。
第二开关管T2的栅极连接于控制单元23，第二开关管T2的源极经第一数据信号线141连接于第一数据测试端14a，第二开关管T2的漏极连接于显示面板10中的数据线S，用于依据控制单元23输出的控制信号导通，将输出的第一测试数据信号传输至显示面板10中的像素单元P。像素单元P依据接收的第一测试数据信号与第一测试扫描信号进行图像显示。其中，第一检测单元21包括n个第一开关管T1和m个第二开关管T2，n个第一开关管T1分别与n条扫描线G1～Gn连接，m个第二开关管T2分别与m条数据线S1～Sm连接。
第二检测单元22包括多个第三开关管T3和多个第四开关管T4，第三开关管T3的栅极连接于控制单元23，第三开关管T3的源极经第二扫描信号线152连接于第二扫描测试端15b，第三开关管T3的漏极连接于显示面板10中的扫描线G，用于依据控制单元23输出的控制信号导通，将输出的第二测试扫描信号传输至显示面板10中的像素单元P。
第四开关管T4的栅极连接于控制单元23，第四开关管T4的源极经第二数据信号线142连接于第二数据测试端14b，第四开关管T4的漏极连接于显示面板10中的数据线S，用于依据控制单元23输出的控制信号导通，以将输出的第二测试数据信号传输至显示面板10中的像素单元P。像素单元P依据接收的第二测试数据信号与第二测试扫描信号进行图像显示。
其中，第二检测单元22包括n个第三开关管T3和m个第四开关管T4，n个第三开关管T3分别与n条扫描线G1～Gn连接，m个第四开关管T4分别与m条数据线S1～Sm连接。
请参阅图9，图9为图8中故障检测电路的布局示意图。
如图9所示，第一检测单元21与第二检测单元22相邻且设置于邻近显示区域10a的同一侧。在第一检测单元21中，n个第一开关管T1沿第一方向F1依次排列，分别连接于第一扫描信号线151、控制单元23和n条扫描线G1～Gn。m个第二开关管T2沿第一方向F1依次排列，且与n个第一开关管T1设置于同一行，分别连接于第一数据信号线141、控制单元23和m条数据线S1～Sm。第 一开关管T1和第二开关管T2的栅极连接于同一条线。
在第二检测单元22中，n个第三开关管T3与n个第一开关管T1沿第二方向F2间隔预设距离并依序一一对应设置，分别连接于第二扫描信号线152、控制单元23和n条扫描线G1～Gn。m个第四开关管T4与m个第二开关管T2沿第二方向F2间隔预设距离一一对应设置，且与n个第三开关管T3设置于同一行，分别连接于第二数据信号线142、控制单元23和m条数据线S1～Sm。
其中，将间隔预设距离并依序一一对应设置的第一开关管T1与第三开关管T3视为一个开关管组TB，开关管组TB中的第一开关管T1与第三开关管T3的源极分别经第一扫描信号线151和第二扫描信号线152连接于扫描驱动电路13，漏极连接于同一条扫描线，用于不同时自扫描驱动电路13接收测试扫描信号并传输至像素单元P，即当控制单元23输出第一控制信号至第一开关管T1时，第一开关管T1导通自第一扫描信号线151接收测试扫描信号并传输至像素单元P，当控制单元输出第二控制信号至第三开关管T3时，第三开关管T3导通并自第二扫描信号线152接收测试扫描信号并传输像素单元P。
将间隔预设距离并依序一一对应设置的第二开关管T2与第四开关管T4视为一个开关管组TB，开关管组TB中的第二开关管T2与第四开关管T4的源极分别经第一数据信号线141和第二数据信号线142连接于数据驱动电路12，漏极连接于同一条数据线，用于不同时接收测试数据信号并传输至像素单元P，即当控制单元23输出第一控制信号至第二开关管T2时，第二开关管T2导通并自第一数据信号线141接收测试数据信号并传输至像素单元P，当控制单元输出第二控制信号至第四开关管T4时，第四开关管T4导通自第二数据信号线142接收测试数据信号并传输像素单元P。
请参阅图10，图10为本申请第六实施例提供的如图8中故障检测电路平面布局示意图。如图10所示，第一检测单元21和第二检测单元22相对设置，分别设置于显示区域10a的不同侧。在第一检测单元21中，n个第一开关管T1沿第一方向F1依次排列，分别连接于第一扫描信号线151、控制单元23和n条扫描线G1～Gn。m个第二开关管T2沿第一方向F1依次排列，且与n个第一开关管T1设置于同一行，分别连接于第一数据信号线141、控制单元23和m条数据线S1～Sm。
在第二检测单元22中，n个第三开关管T3沿第一方向F1依次排列，分别 连接于第二扫描信号线152、控制单元23和n条扫描线G1～Gn。m个第四开关管T4沿第一方向F1依次排列，且与n个第三开关管T3设置于同一行，分别连接于第二数据信号线142、控制单元23和m条数据线S1～Sm。
请参阅图11，图11为本申请第七实施例提供的一种故障检测方法流程图。如图11所示，通过故障检测电路20对显示面板10进行短路或短路检测，具体步骤如下：
S101，控制第一检测单元对显示面板内的像素单元进行短路或断路检测，若所有像素单元显示正常则表征像素单元无故障。
通过控制单元23输出第一控制信号至第一检测单元21，第一检测单元21依据第一控制信号将所有第一开关管T1与所有第二开关管T2打开，使扫描测试端15经n个第一开关管T1连接到n条扫描线G1～Gn，使数据测试端14经m个第二开关管T2连接到m条数据线S1～Sm，n条扫描线G1～Gn和m条数据线S1～Sm在显示区域10a相互短接。
扫描测试端15经多个第一开关管T1输出测试扫描信号至多个像素单元P，数据测试端14经多个第二开关管T2输出测试数据信号至多个像素单元P，当显示面板10显示纯色画面即全为黑色或全为白色时，表征显示面板10中像素单元P无短路或断路故障。
S102，若第一检测单元检测到至少一个像素单元显示异常，确定为第一异常像素单元，且控制第二检测单元重新进行检测。
当显示面板10显示出现白色条纹或黑色条纹时，表征显示面板10中像素单元P可能出现故障。
S103，若第二检测单元检测到第一异常像素单元显示正常，表征第一检测单元出现故障。
当第一检测单元21检测到第一异常像素单元时即检测到显示面板10出现故障时，控制单元23输出第二控制信号至第二检测单元22，第二检测单元22依据第二控制信号将所有第三开关管T3与所有第四开关管T4打开，使扫描测试端15经n个第三开关管T3连接到n条扫描线G1～Gn，使数据测试端14经m个第四开关管T4连接到m条数据线S1～Sm，n条扫描线G1～Gn和m条数据线S1～Sm在显示区域10a相互短接。
扫描测试端15经多个第三开关管T3输出测试扫描信号至多个像素单元P， 数据测试端14经多个第四开关管T4输出测试数据信号至多个像素单元P，当显示面板10显示纯色画面即全为黑色或全为白色时，表征显示面板10无短路或断路故障，则表征第一检测单元21出现故障，显示面板10中像素单元P无故障，也即是第一异常像素单元无故障。
S104，若第二检测单元检测到第一异常像素单元显示异常，则表征第一异常像素单元出现故障。
当第二检测单元22控制显示面板10显示出现白色条纹或黑色条纹且条纹的位置与显示面板10第一次检测出现条纹位置相同时，表征第一异常像素单元出现故障，第一检测单元21无故障。
若第二检测单元22执行检测时出现显示异常的像素单元即确定为第二异常像素单元，当第一异常像素单元与第二检测单元检测到的第二异常像素单元不相同时，表征第一检测单元以及第二异常像素单元出现故障，也即是当第二检测单元22控制显示面板10显示出现白色条纹或黑色条纹且条纹的位置与显示面板10第一次检测出现条纹位置不同时，表征第一检测单元21和显示面板10均出现故障。
通过第二检测单元22对第一检测单元21检测过的显示面板10再进行检测可有效提升第一检测单元21的检测质量，解决了由于第一检测单元21故障导致对显示面板10的过度筛选而造成的材料浪费，有效节省了显示面板10材料的浪费。
应当理解的是，本申请的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本申请所附权利要求的保护范围。

Claims (16)

  1. 一种故障检测电路，应用于包括多个像素单元以执行图像显示的显示面板，其中，包括第一检测单元、第二检测单元和控制单元，所述控制单元连接于所述第一检测单元和所述第二检测单元，所述第一检测单元用于在所述控制单元的控制下对所述显示面板中的所述像素单元进行短路或断路检测，若至少一个所述像素单元显示异常并确定为第一异常像素单元时，所述控制单元控制所述第二检测单元重新执行检测，若所述第二检测单元检测到所述第一异常像素单元显示正常，则表征所述第一检测单元出现故障，若所述第二检测单元检测到所述第一异常像素单元显示异常，则表征所述第一异常像素单元出现故障。
  2. 如权利要求1所述的故障检测电路，其中，所述第二检测单元执行检测时出现显示异常的像素单元即确定为第二异常像素单元，当所述第一异常像素单元与所述第二检测单元检测到的第二异常像素单元不相同时，表征所述第一检测单元以及所述第二异常像素单元出现故障。
  3. 如权利要求2所述的故障检测电路，其中，所述显示面板包括扫描测试端、数据测试端、沿第一方向延伸的多条扫描线和沿第二方向延伸的多条数据线，其中所述第一方向不同于所述第二方向；
    所述第一检测单元连接于所述控制单元的第一控制信号输出端、所述扫描测试端、所述数据测试端、所述多条数据线和所述多条扫描线，用于自所述第一控制信号输出端接收第一控制信号并依据所述第一控制信号自所述扫描测试端接收并传输测试扫描信号以及自所述数据测试端接收并传输测试数据信号至所述像素单元，以控制所述像素单元进行图像显示；
    所述第二检测单元连接于所述控制单元的第二控制信号输出端、所述扫描测试端、所述数据测试端、所述多条数据线和所述多条扫描线，用于自所述第二控制信号输出端接收第二控制信号并依据所述第二控制信号自所述扫描测试端接收并传输所述测试扫描信号以及自所述数据测试端接收并传输所述测试数据信号至所述像素单元，以控制所述像素单元进行图像显示。
  4. 如权利要求2所述的故障检测电路，其中，所述显示面板包括第一数据测试端、第二数据测试端、第一扫描测试端、第二扫描测试端、沿第一方向延伸的多条扫描线和沿第二方向延伸的多条数据线，其中，所述第一方向不同于所述第二方向；
    所述第一检测单元连接于第一扫描测试端、第一数据测试端、所述多条数据线和所述多条扫描线，用于依据控制单元输出的控制信号自所述第一扫描测试端接收并传输第一测试扫描信号以及自所述第一数据测试端接收并传输第一测试数据信号至所述像素单元，以控制所述像素单元进行图像显示；
    所述第二检测单元连接于第二扫描测试端、第二数据测试端、所述多条数据线和所述多条扫描线，用于依据所述控制信号自所述第二扫描测试端接收并传输第二测试扫描信号以及自所述第二数据测试端接收并传输第二测试数据信号至所述像素单元，以控制所述像素单元进行图像显示。
  5. 如权利要求3所述的故障检测电路，其中，所述第一检测单元包括多个第一开关管和多个第二开关管，所述多个第一开关管的栅极连接于所述第一控制信号输出端，所述多个第一开关管的源极连接于所述扫描测试端，所述多个第一开关管的漏极分别连接于所述多条扫描线，用于依据所述第一控制信号导通并自所述扫描测试端接收所述测试扫描信号并传输至所述像素单元；
    所述多个第二开关管的栅极连接于所述第一控制信号输出端，所述多个第二开关管的源极连接于所述数据测试端，所述多个第二开关管的漏极分别连接于所述多条数据线，用于依据所述第一控制信号导通并自所述数据测试端接收所述测试数据信号并传输至所述像素单元。
  6. 如权利要求5所述的故障检测电路，其中，所述第二检测单元包括多个第三开关管和多个第四开关管，所述多个第三开关管的栅极连接于所述第二控制信号输出端，所述多个第三开关管的源极连接于扫描测试端，所述多个第三开关管的漏极分别连接于所述多条扫描线，用于依据所述第二控制信号导通并自所述扫描测试端接收所述测试扫描信号并传输至所述像素单元；
    所述多个第四开关管的栅极连接于所述第二控制信号输出端，所述多个第四开关管的源极连接于数据测试端，所述多个第四开关管的漏极分别连接于所述多条数据线，用于依据所述第二控制信号导通并自所述数据测试端接收所述测试数据信号并传输至所述像素单元。
  7. 如权利要求6所述的故障检测电路，其中，所述显示面板包括相邻设置的显示区域与非显示区域，所述第一检测单元与所述第二检测单元相邻设置且设置于所述显示区域同一侧的所述非显示区域，所述多个第一开关管与所述多个第三开关管依序一一对应设置，任意对应设置的所述第一开关管与所述第三开关管的源极连接于所述扫描测试端，漏极连接于同一条所述扫描线，用于不同 时传输所述测试扫描信号；
    所述多个第二开关管与所述多个第四开关管依序一一对应设置，任意对应设置的所述第二开关管与所述第四开关管的源极连接于所述数据测试端，漏极连接于相同的所述数据线，用于不同时传输所述测试数据信号。
  8. 如权利要求7所述的故障检测电路，其中，第一检测单元与第二检测单元相对设置，分别设置于显示区域不同侧边的非显示区域。
  9. 如权利要求1所述的故障检测电路，其中，所述像素单元包括多个微型液态胶囊，所述微型液态胶囊为密封的球体，内部封装有白色颗粒、黑色颗粒和透明分散媒，其中，所述白色颗粒和所述黑色颗粒为两种带有不同电荷的颗粒，所述白色颗粒和所述黑色颗粒完全浸泡于所述透明分散媒内，并依据电场力的作用在所述透明分散媒内进行相应的移动。
  10. 一种显示面板，其中，包括数据驱动电路、扫描驱动电路、呈阵列排布的多个所述像素单元和故障检测电路，所述扫描驱动电路用于输出扫描信号至所述像素单元，所述数据驱动电路用于输出数据信号至所述像素单元，所述像素单元用于在所述扫描信号的控制下接收所述数据信号进行图像显示，所述故障检测电路用于对所述像素单元进行短路或断路检测；
    所述故障检测电路包括第一检测单元、第二检测单元和控制单元，所述控制单元连接于所述第一检测单元和所述第二检测单元，所述第一检测单元用于在所述控制单元的控制下对所述显示面板中的所述像素单元进行短路或断路检测，若至少一个所述像素单元显示异常并确定为第一异常像素单元时，所述控制单元控制所述第二检测单元重新执行检测，若所述第二检测单元检测到所述第一异常像素单元显示正常，则表征所述第一检测单元出现故障，若所述第二检测单元检测到所述第一异常像素单元显示异常，则表征所述第一异常像素单元出现故障。
  11. 如权利要求10所述的显示面板，其中，所述第二检测单元执行检测时出现显示异常的像素单元即确定为第二异常像素单元，当所述第一异常像素单元与所述第二检测单元检测到的第二异常像素单元不相同时，表征所述第一检测单元以及所述第二异常像素单元出现故障。
  12. 如权利要求11所述的显示面板，其中，所述显示面板包括扫描测试端、数据测试端、沿第一方向延伸的多条扫描线和沿第二方向延伸的多条数据线，其中所述第一方向不同于所述第二方向；
    所述第一检测单元连接于所述控制单元的第一控制信号输出端、所述扫描测试端、所述数据测试端、所述多条数据线和所述多条扫描线，用于自所述第一控制信号输出端接收第一控制信号并依据所述第一控制信号自所述扫描测试端接收并传输测试扫描信号以及自所述数据测试端接收并传输测试数据信号至所述像素单元，以控制所述像素单元进行图像显示；
    所述第二检测单元连接于所述控制单元的第二控制信号输出端、所述扫描测试端、所述数据测试端、所述多条数据线和所述多条扫描线，用于自所述第二控制信号输出端接收第二控制信号并依据所述第二控制信号自所述扫描测试端接收并传输所述测试扫描信号以及自所述数据测试端接收并传输所述测试数据信号至所述像素单元，以控制所述像素单元进行图像显示。
  13. 如权利要求11所述的显示面板，其中，包括第一数据测试端、第二数据测试端、第一扫描测试端、第二扫描测试端、沿第一方向延伸的多条扫描线和沿第二方向延伸的多条数据线，其中，所述第一方向不同于所述第二方向；
    所述第一检测单元连接于第一扫描测试端、第一数据测试端、所述多条数据线和所述多条扫描线，用于依据控制单元输出的控制信号自所述第一扫描测试端接收并传输第一测试扫描信号以及自所述第一数据测试端接收并传输第一测试数据信号至所述像素单元，以控制所述像素单元进行图像显示；
    所述第二检测单元连接于第二扫描测试端、第二数据测试端、所述多条数据线和所述多条扫描线，用于依据所述控制信号自所述第二扫描测试端接收并传输第二测试扫描信号以及自所述第二数据测试端接收并传输第二测试数据信号至所述像素单元，以控制所述像素单元进行图像显示。
  14. 一种故障检测方法，应用于故障检测电路，所述故障检测电路包括第一检测单元、第二检测单元和控制单元，所述控制单元连接于所述第一检测单元和所述第二检测单元，所述第一检测单元用于在所述控制单元的控制下对所述显示面板中的所述像素单元进行短路或断路检测，若至少一个所述像素单元显示异常并确定为第一异常像素单元时，所述控制单元控制所述第二检测单元重新执行检测，若所述第二检测单元检测到所述第一异常像素单元显示正常，则表征所述第一检测单元出现故障，若所述第二检测单元检测到所述第一异常像素单元显示异常，则表征所述第一异常像素单元出现故障；
    其中，包括：
    控制第一检测单元对显示面板内的像素单元进行短路或断路检测，若所有 所述像素单元显示正常则表征所述像素单元无故障；
    若所述第一检测单元检测到至少一个所述像素单元显示异常，确定为第一异常像素单元，且控制所述第二检测单元重新进行检测；
    若所述第二检测单元检测到所述第一异常像素单元显示正常，表征所述第一检测单元出现故障；
    若所述第二检测单元检测到所述第一异常像素单元显示异常，则表征所述第一异常像素单元出现故障。
  15. 如权利要求14所述的故障检测方法，其中，“控制第二检测单元重新进行检测”包括：控制第二检测单元对显示区域内的像素单元重新进行检测；“若第二检测单元检测到第一异常像素单元显示正常，则表征第一检测单元出现故障”包括：若第二检测单元检测到所有像素单元显示正常，表征第一异常像素单元无故障，且第一检测单元出现故障。
  16. 如权利要求14所述的故障检测方法，其中，
    若所述第二检测单元执行检测时出现显示异常的像素单元即确定为第二异常像素单元，当所述第一异常像素单元与所述第二检测单元检测到的第二异常像素单元不相同时，表征所述第一检测单元以及所述第二异常像素单元出现故障。
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