WO2024197880A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2024197880A1
WO2024197880A1 PCT/CN2023/085651 CN2023085651W WO2024197880A1 WO 2024197880 A1 WO2024197880 A1 WO 2024197880A1 CN 2023085651 W CN2023085651 W CN 2023085651W WO 2024197880 A1 WO2024197880 A1 WO 2024197880A1
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WO
WIPO (PCT)
Prior art keywords
display
area
sub
line
waveform adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2023/085651
Other languages
English (en)
French (fr)
Inventor
李明月
田超
艾飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to US18/038,717 priority Critical patent/US20240363047A1/en
Priority to DE112023000097.2T priority patent/DE112023000097T5/de
Publication of WO2024197880A1 publication Critical patent/WO2024197880A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0283—Arrangement of drivers for different directions of scanning
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes

Definitions

  • the present application relates to the field of display technology, and in particular to a display panel and a display device.
  • the present application provides a display panel and a display device to alleviate the technical problem of large and uneven delay of the end edge of a scan signal in a display area.
  • the present application provides a display panel, which includes multiple waveform adjustment modules in a display area, at least one gate driving circuit is arranged on both sides of the display area, and the distribution density of the waveform adjustment modules in an area far away from the gate driving circuit is greater than the distribution density of the waveform adjustment modules in an area close to the gate driving circuit.
  • the display area includes a first display partition and a second display partition, the effective display width of the first display partition is greater than the effective display width of the second display partition; the first display partition includes multiple first sub-areas; and the second display partition includes multiple second sub-areas.
  • gate driving circuits are respectively arranged on both sides of the display area, and the width of the first display partition from left to right is consistent with the width of the second display partition from left to right; the distribution density of the waveform adjustment module in the first sub-area farthest from the gate driving circuit is greater than the distribution density of the waveform adjustment module in the second sub-area farthest from the gate driving circuit.
  • gate driving circuits are respectively arranged on both sides of the first display partition, and a gate driving circuit is arranged on one of the two sides of the second display partition; and the distribution density of the waveform adjustment module in the first sub-region farthest from the gate driving circuit is less than the distribution density of the waveform adjustment module in the second sub-region farthest from the gate driving circuit.
  • the difference between the distribution density of the waveform adjustment module in a first sub-area away from the gate driving circuit and the distribution density in a first sub-area close to the gate driving circuit is a first difference
  • the difference between the distribution density of the waveform adjustment module in a second sub-area away from the gate driving circuit and the distribution density in a second sub-area close to the gate driving circuit is a second difference
  • the first difference is greater than the second difference
  • the display panel also includes a scan line, a forward scan control line, a reverse scan control line, and a potential transmission line electrically connected to the waveform adjustment module, the scan line extends from the gate drive circuit to the display area, and at least one of the forward scan control line, the reverse scan control line, and the potential transmission line extends from a non-display area on a different side from the gate drive circuit to the display area.
  • the distribution density of the waveform adjustment module in the first sub-area is greater than the distribution density of the waveform adjustment module in the second sub-area;
  • the display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line, and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line, and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the first display partition to the corresponding first sub-area.
  • the distribution density of the waveform adjustment module in the first sub-area is less than the distribution density of the waveform adjustment module in the second sub-area;
  • the display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line, and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line, and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the second display partition to the corresponding first sub-area.
  • the second display partition is located between two first display partitions; in the same width range, the distribution density of the waveform adjustment module in the first sub-region is less than the distribution density of the waveform adjustment module in the second sub-region; the display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the first display partition through the first display partition to the corresponding second sub-region; wherein the number of branches of at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line in the first display partition is less than the number of branches in the second display partition.
  • the present application provides a display device, which includes a display panel in at least one of the above-mentioned embodiments, and a waveform adjustment module is used to improve the verticality of the end edge of the scanning signal during forward scanning or reverse scanning.
  • the display panel and display device provided by the present application can not only improve the technical problem of large delay of the scanning signal in the display panel by constructing a waveform adjustment module with a higher distribution density in the display area farther away from the gate driving circuit, but also enable the scanning signal to have the same or similar delay at different positions in the display area, which is beneficial to improving the uniformity of the display.
  • FIG. 1 is a schematic diagram of a first structure of a display panel provided in an embodiment of the present application.
  • FIG. 2 is a circuit schematic diagram of the waveform adjustment module in FIG. 1 .
  • FIG. 3 is a schematic diagram of a second structure of a display panel provided in an embodiment of the present application.
  • FIG. 4 is a circuit schematic diagram of the waveform adjustment module in FIG. 3 .
  • FIG. 5 is a schematic diagram showing the comparison of the non-irregular-shaped display panel before and after improvement provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a first structure of a special-shaped display panel provided in an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a second structure of a special-shaped display panel provided in an embodiment of the present application.
  • FIG. 8 is a schematic diagram of a third structure of a special-shaped display panel provided in an embodiment of the present application.
  • FIG. 9 is a schematic diagram of a fourth structure of a special-shaped display panel provided in an embodiment of the present application.
  • FIG. 10 is a schematic diagram of a first distribution of waveform adjustment modules in a special-shaped display panel provided in an embodiment of the present application.
  • FIG. 11 is a schematic diagram showing the specific distribution of the waveform adjustment module shown in FIG. 10 .
  • FIG. 12 is a schematic diagram of a second distribution of waveform adjustment modules in a special-shaped display panel provided in an embodiment of the present application.
  • FIG. 13 is a schematic diagram showing the specific distribution of the waveform adjustment module shown in FIG. 12 .
  • FIG. 14 is a schematic diagram of a third distribution of waveform adjustment modules in a special-shaped display panel provided in an embodiment of the present application.
  • FIG. 15 is a schematic diagram showing the specific distribution of the waveform adjustment module shown in FIG. 14 .
  • FIG. 16 is a schematic diagram of a third structure of a display panel provided in an embodiment of the present application.
  • FIG. 17 is a schematic diagram of a fourth structure of a display panel provided in an embodiment of the present application.
  • FIG. 18 is a fifth structural schematic diagram of the display panel provided in an embodiment of the present application.
  • the present embodiment provides a display panel, please refer to Figures 1 to 15.
  • the display panel includes a plurality of scanning lines arranged in sequence along the first direction DR1, a waveform adjustment module 100, a potential transmission line VL, a forward scanning control line U2D, and a reverse scanning control line D2U.
  • the plurality of scanning lines include the N-1th scanning line G (N-1), the Nth scanning line G (N), and the N+1th scanning line G (N+1), where N is an integer greater than or equal to 2.
  • the output end of the waveform adjustment module 100 is electrically connected to the N+1th scanning line G (N+1), the first control end of the waveform adjustment module 100 is electrically connected to the N-1th scanning line G (N-1), the second control end of the waveform adjustment module 100 is electrically connected to the N+1th scanning line G (N+1), and the waveform adjustment module 100 is located in the display area AA of the display panel.
  • the potential transmission line VL is electrically connected to the first input terminal of the waveform adjustment module 100.
  • the forward scanning control line U2D is electrically connected to the second input terminal of the waveform adjustment module 100 or the third control terminal of the waveform adjustment module 100.
  • the reverse scanning control line D2U is electrically connected to the third input terminal of the waveform adjustment module 100 or the fourth control terminal of the waveform adjustment module 100.
  • the display panel provided in this embodiment can reduce the duration of the end edge of the scanning signal during the forward scanning or reverse scanning process through the control of the waveform adjustment module 100 by the N-1th scanning line G (N-1), the N+1th scanning line G (N+1), the potential transmission line VL, the forward scanning control line U2D and the reverse scanning control line D2U, thereby improving the technical problem of the large delay of the scanning signal in the display panel; this is conducive to increasing the charging time of each pixel in the display panel or increasing the refresh frequency of the display panel, and is conducive to promoting the development of high-frequency display and/or high resolution of the display panel.
  • the display panel and the display device can improve the delay problem of the scanning signal during the forward scanning process, and can also improve the delay problem of the scanning signal during the reverse scanning process, thereby providing greater freedom for the assembly of the display panel.
  • first direction DR1 may be an arrangement direction of a plurality of scan lines
  • second direction DR2 may be an extension direction of each scan line
  • the reverse scanning control line D2U, the potential transmission line VL and the forward scanning control line U2D electrically connected to the same waveform adjustment module 100 can be arranged in sequence along the second direction DR2, which is beneficial to reduce the transmission distance from the reverse scanning control line D2U, the potential transmission line VL and the forward scanning control line U2D to the waveform adjustment module 100.
  • the display panel may further include a plurality of data lines arranged in sequence along the second direction DR2, for example, a first data line datar, a second data line datag, and a third data line datab.
  • Each scan line intersects with each data line to form an array of sub-pixels 200.
  • the first data line datar may be electrically connected to a column of red sub-pixels 200 (R).
  • the second data line datag may be electrically connected to a column of green sub-pixels 200 (G).
  • the third data line datab may be electrically connected to a column of blue sub-pixels 200 (B).
  • the reverse scan control line D2U is adjacent to and parallel to the first data line datar, and the reverse scan control line D2U is located on the left side of the first data line datar.
  • the potential transmission line VL is adjacent to and parallel to the second data line datag, and the potential transmission line VL is located on the left side of the second data line datag.
  • the forward scan control line U2D is adjacent to and parallel to the third data line datab, and the forward scan control line U2D is located on the left side of the third data line datab. This can reduce the loss of the pixel aperture ratio.
  • the display panel when there is no adjacent and parallel reverse scan control line D2U, potential transmission line VL and forward scan control line U2D on the left side of the corresponding data line, the display panel will also configure a virtual routing line Dummy adjacent to and parallel to the corresponding data line to balance the consistent coupling effect on each data line.
  • each sub-pixel 200 can be a sub-pixel of passive display, such as a sub-pixel using liquid crystal display.
  • each sub-pixel 200 can include a thin film transistor, one of the drain or source of the thin film transistor is connected to the corresponding data line, the other of the drain or source of the thin film transistor is connected to the common voltage line con, and the gate of the thin film transistor is connected to the corresponding scan line.
  • the waveform adjustment module 100 includes a first transistor NTA, a second transistor NTB, and a third transistor NTC.
  • the first electrode of the first transistor NTA is electrically connected to the reverse scan control line D2U, and the gate of the first transistor NTA is electrically connected to the N-1th scan line G (N-1);
  • the first electrode of the second transistor NTB is electrically connected to the forward scan control line U2D, and the gate of the second transistor NTB is electrically connected to the N+1th scan line G (N+1);
  • the gate of the third transistor NTC is electrically connected to the second electrode of the first transistor NTA and the second electrode of the second transistor NTB, the first electrode of the third transistor NTC is electrically connected to the potential transmission line VL, and the second electrode of the third transistor NTC is electrically connected to the Nth scan line G (N).
  • the first electrode can be one of the source and the drain, and the second electrode can be the other of the source and the drain.
  • the first electrode when the first electrode is the source, the second electrode is the drain; or when the first electrode is the drain, the second electrode is the source.
  • the forward scanning control line U2D also controls the third transistor NTC to turn on. At this time, the potential in the Nth scanning line G(N) is adjusted to the potential of the potential transmission line VL.
  • the reverse scanning control line D2U also controls the third transistor NTC to be turned on.
  • the potential in the Nth scanning line G(N) is also adjusted to the potential of the potential transmission line VL.
  • the verticality of the end edge of the Nth level scanning signal in the Nth scanning line G (N) can be improved during the forward scanning process, and the verticality of the end edge of the Nth level scanning signal in the Nth scanning line G (N) can be improved during the reverse scanning process.
  • the end edge of the positive pulse refers to the falling edge of the pulse
  • the end edge of the negative pulse refers to the rising edge of the pulse.
  • the first transistor NTA, the second transistor NTB and the third transistor NTC are all N-channel thin film transistors; the potential transmission line VL is used to transmit a low potential signal, and the low potential signal is used to control the N-channel thin film transistor to be in a cut-off state.
  • this embodiment can make the positive pulse of each scanning signal have a steeper or vertical falling edge to be closer to the ideal waveform of the pulse.
  • the first transistor NTA and the second transistor NTB are both P-channel thin film transistors
  • the third transistor NTC is an N-channel thin film transistor
  • the potential transmission line VL is used to transmit a high potential signal
  • the high potential signal is used to control the P-channel thin film transistor to be in a cut-off state.
  • this embodiment can make the negative pulse of each scanning signal have a steeper or vertical rising edge to be closer to the ideal waveform of the pulse.
  • the waveform adjustment module 100 includes a fourth transistor T1, a fifth transistor T2, a sixth transistor T3 and a seventh transistor T4, wherein a first electrode of the fourth transistor T1 is electrically connected to the potential transmission line VL, and a gate of the fourth transistor T1 is electrically connected to the forward scanning control line U2D; a first electrode of the fifth transistor T2 is electrically connected to a second electrode of the fourth transistor T1, a gate of the fifth transistor T2 is electrically connected to the N+1th scanning line G(N+1), and a second electrode of the fifth transistor T2 is electrically connected to the Nth scanning line G(N); a first electrode of the sixth transistor T3 is electrically connected to a first electrode of the fourth transistor T1, and a gate of the sixth transistor T3 is electrically connected to a reverse scanning control line D2U; a first electrode of the seventh transistor T4 is electrically connected to a second electrode of the sixth transistor T3, a gate of the seventh transistor T4 is electrically connected
  • the forward scanning line controls the fourth transistor T1 to be in the on state.
  • the N+1th scanning line G(N+1) controls the fifth transistor T2 to be turned on
  • the potential in the Nth scanning line G(N) is adjusted to the potential of the potential transmission line VL.
  • the reverse scanning line controls the sixth transistor T3 to be in the on state.
  • the N-1th scanning line G(N-1) controls the seventh transistor T4 to be turned on
  • the potential in the Nth scanning line G(N) is adjusted to the potential of the potential transmission line VL.
  • this can improve the verticality of the ending edge of the Nth level scanning signal in the Nth scanning line G (N) during the forward scanning process, and can also improve the verticality of the ending edge of the Nth level scanning signal in the Nth scanning line G (N) during the reverse scanning process.
  • the fourth transistor T1, the fifth transistor T2, the sixth transistor T3 and the seventh transistor T4 are all N-channel thin film transistors; the potential transmission line VL is used to transmit a low potential signal, and the low potential signal is used to control the N-channel thin film transistor to be in a cut-off state.
  • this embodiment can make the positive pulse of each scanning signal have a steeper or vertical falling edge to be closer to the ideal waveform of the pulse.
  • the fourth transistor T1 and the sixth transistor T3 are both N-channel thin film transistors, and the fifth transistor T2 and the seventh transistor T4 are both P-channel thin film transistors; the potential transmission line VL is used to transmit a high potential signal, and the high potential signal is used to control the P-channel thin film transistor to be in a cut-off state.
  • this embodiment can make the negative pulse of each scanning signal have a steeper or vertical rising edge to be closer to the ideal waveform of the pulse.
  • FIG5 is a schematic diagram of the comparison before and after improvement of the non-special-shaped display panel provided by the embodiment of the present application, wherein the non-special-shaped display panel may be, but is not limited to, a display panel whose display area AA is a rectangular area.
  • the display area AA can be divided into four areas: area A, area B, area C, and area D.
  • area A and area B are areas close to the first gate drive circuit GOA1/the second gate drive circuit GOA2, and are symmetrical about the center of the display area AA;
  • area C and area D are areas away from the first gate drive circuit GOA1/the second gate drive circuit GOA2, and are symmetrical about the center of the display area AA.
  • a corresponding number of waveform adjustment modules 100 are placed in area A, area B, area C, and area D, respectively.
  • one waveform adjustment module 100 is configured for every M sub-pixels 200 in area A and area B
  • one waveform adjustment module 100 is configured for every N sub-pixels 200 in area C and area D, where M and N are integers, and M is less than or equal to N.
  • the falling edges of the corresponding scanning signals in the areas A, B, C and D are shown in a row of waveforms corresponding to the "ultra-wide screen" in FIG. 5 . It can be seen that the delay of each falling edge is relatively large.
  • the falling edges of the corresponding scanning signals in areas A, B, C, and D are shown in a row of waveforms corresponding to the "ultra-wide screen + waveform adjustment module" in Figure 5. It can be seen that the delay of each falling edge is smaller and each falling edge is steeper or vertical.
  • the IC is a data driver or a data driver chip, which can provide corresponding data signals for each data line.
  • FIG. 6 , FIG. 7 , FIG. 8 and FIG. 9 respectively show a form of a special-shaped display panel.
  • the display areas AA shown in FIG. 6 to FIG. 9 are all non-rectangular areas.
  • the display area AA shown in Figure 6 has its lower left corner hollowed out.
  • the first gate drive circuit GOA1 provides corresponding scan signals for each scan line from the right side
  • the second gate drive circuit GOA2 provides corresponding scan signals for each scan line in the normal display area AA domain from the left side
  • the third gate drive circuit GOA3 provides corresponding scan signals for each scan line in the special-shaped display area AA domain from the left side.
  • the bottom edge area of the display area AA shown in FIG. 7 is hollowed out.
  • the first gate driving circuit GOA1 provides corresponding scanning signals for each scanning line from the right side
  • the second gate driving circuit GOA2 provides corresponding scanning signals for each scanning line from the left side.
  • the display area AA shown in FIG8 is hollowed out in the center.
  • the first gate driving circuit GOA1 provides corresponding scanning signals for each scanning line from the right side
  • the second gate driving circuit GOA2 provides corresponding scanning signals for each scanning line from the left side.
  • the display area AA shown in Figure 9 has its left edge area hollowed out.
  • the first gate drive circuit GOA1 provides corresponding scan signals for each scan line from the right side
  • the second gate drive circuit GOA2 provides corresponding scan signals for each scan line in the upper part from the left side
  • the third gate drive circuit GOA3 provides corresponding scan signals for each scan line in the middle part from the left side
  • the fourth gate drive circuit GOA4 provides corresponding scan signals for each scan line in the lower part from the left side.
  • the display panel includes a waveform adjustment module 100 configured to improve the ending edge of the scanning signal in the display area AA
  • the display area AA includes a first display partition AA1 and a second display partition AA2 arranged in a first direction DR1
  • the second display partition AA2 is located within the projection of the first display partition AA1 on the first direction DR1
  • the second display partition AA2 covers a portion of the projection of the first display partition AA1 on the first direction DR1.
  • a first gate driving circuit GOA1 and a second gate driving circuit GOA2 are respectively disposed on both sides of the first display partition AA1 , and each scanning line in the first display partition AA1 is electrically connected to the first gate driving circuit GOA1 and the second gate driving circuit GOA2 .
  • One or two of the first gate drive circuit GOA1, the second gate drive circuit GOA2, the third gate drive circuit GOA3 and the fourth gate drive circuit GOA4 are arranged on both sides of the second display partition AA2, and each scan line in the second display partition AA2 is electrically connected to one or two of the first gate drive circuit GOA1, the second gate drive circuit GOA2, the third gate drive circuit GOA3 and the fourth gate drive circuit GOA4.
  • the first display area AA1 includes a plurality of first display sub-areas sequentially arranged along the second direction DR2 , and the density of the waveform adjustment module 100 in each first display sub-area increases as the distance from the first gate driving circuit GOA1 and the second gate driving circuit GOA2 increases.
  • the second display partition AA2 includes a plurality of second display sub-areas arranged in sequence along the second direction DR2, and the density of the waveform adjustment module 100 in each second display sub-area increases as the distance from the first gate driving circuit GOA1, the second gate driving circuit GOA2, the third gate driving circuit GOA3 and the fourth gate driving circuit GOA4 increases.
  • the display panel provided in this embodiment can not only improve the technical problem of large delay of the scanning signal in the display panel by constructing differentiated density of the waveform adjustment module 100 in each display partition with different gate drive circuit configurations, but also enable the scanning signal to have the same or similar delay at different positions of the display area AA, which is beneficial to improving the uniformity of the display.
  • the density of the waveform adjustment module 100 in each first display sub-area increases as the distance from the first gate drive circuit GOA1 and the second gate drive circuit GOA2 increases
  • the density of the waveform adjustment module 100 in each second display sub-area increases as the distance from the first gate drive circuit GOA1, the second gate drive circuit GOA2, the third gate drive circuit GOA3 and the fourth gate drive circuit GOA4 increases.
  • Such a density arrangement of the waveform adjustment module 100 is conducive to achieving the same end edge delay of the scanning signal at different positions of the display area AA, and thus is conducive to achieving a uniform display effect in the display area AA.
  • the first side of the first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1
  • the second side of the first display partition AA1 is not aligned with the second side of the second display partition AA2 in the first direction DR1
  • the first side and the second side are respectively located on both sides of the display area AA in the second direction DR2.
  • the first gate driving circuit GOA1 is located at the second side of the first display subarea AA1
  • the second gate driving circuit GOA2 is located at the first side of the first display subarea AA1
  • the third gate driving circuit GOA3 is located at the first side of the second display subarea AA2 .
  • the first density change rate of the waveform adjustment module 100 in the plurality of second display sub-areas is greater than the second density change rate
  • the second density change rate is the density change rate of the waveform adjustment module 100 in the plurality of first display sub-areas.
  • the plurality of first display sub-areas may be A display sub-area AA11, B display sub-area AA12, C display sub-area AA13, D display sub-area AA14, U display sub-area AA15, etc.
  • the plurality of second display sub-areas may be branch display sub-area AA21, ground display sub-area AA22, trunk display sub-area AA23, top display sub-area AA24, etc.
  • the first display sub-area AA11, the second display sub-area AA15 and the third display sub-area AA21 are each configured with a waveform adjustment module 100 for H sub-pixels 200
  • the second display sub-area AA12, the third display sub-area AA14 and the fourth display sub-area AA22 are each configured with a waveform adjustment module 100 for J sub-pixels 200
  • the third display sub-area AA13 is configured with a waveform adjustment module 100 for K sub-pixels 200, wherein H, J and K are all integers, and the sizes of H, J and K decrease in sequence.
  • the fourth display sub-area AA23 is configured with a waveform adjustment module 100 for K1 sub-pixels 200
  • the fourth display sub-area AA24 is configured with a waveform adjustment module 100 for J1 sub-pixels 200, wherein J1 and K1 are both integers, and J1 is greater than K1.
  • K1 may be greater than K
  • J1 may be greater than J
  • the plurality of first display sub-areas include display sub-area A AA11, display sub-area B AA12, display sub-area C AA13, display sub-area D AA14, and display sub-area U AA15 arranged in sequence in the second direction DR2;
  • the width of display sub-area A AA11 in the second direction DR2 is equal to the width of display sub-area U AA15 in the second direction DR2, and the density of waveform adjustment modules 100 in display sub-area A AA11 is equal to the density of waveform adjustment modules 100 in display sub-area U AA15;
  • the width of display sub-area B AA12 in the second direction DR2 is equal to the width of display sub-area D AA14 in the second direction DR2, and the density of waveform adjustment modules 100 in display sub-area B AA12 is equal to the density of waveform adjustment modules 100 in display sub-area D AA14; and the density of waveform adjustment modules 100 in display sub-area A AA11, the density of waveform adjustment modules
  • the plurality of second display sub-areas include a top display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22, and a branch display sub-area AA21 arranged sequentially in the second direction DR2; the density of the waveform adjustment modules 100 in the top display sub-area AA24, the density of the waveform adjustment modules 100 in the trunk display sub-area AA23, the density of the waveform adjustment modules 100 in the ground display sub-area AA22, and the density of the waveform adjustment modules 100 in the branch display sub-area AA21 decrease sequentially.
  • the width of the support display sub-area AA21 in the second direction DR2 is equal to the width of the lower display sub-area AA15 in the second direction DR2, and the density of the waveform adjustment module 100 in the support display sub-area AA21 is equal to the density of the waveform adjustment module 100 in the lower display sub-area AA15;
  • the width of the ground display sub-area AA22 in the second direction DR2 is equal to the width of the lower display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment module 100 in the ground display sub-area AA22 is equal to the density of the waveform adjustment module 100 in the lower display sub-area AA14;
  • the width of the upper display sub-area AA23 in the second direction DR2 is smaller than the width of the C display sub-area AA13 in the second direction DR2, and the density of the waveform adjustment module 100 in the upper display sub-area AA23 is greater than the density of the waveform adjustment module 100 in the C display sub-area AA
  • the first side of the first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1
  • the second side of the first display partition AA1 is not aligned with the second side of the second display partition AA2 in the first direction DR1
  • the first side and the second side are respectively located on both sides of the display area AA in the second direction DR2.
  • the first gate driving circuit GOA1 is located at the second side of the first display partition AA1
  • the second gate driving circuit GOA2 is located at the first side of the first display partition AA1
  • the third gate driving circuit GOA3 is located at the first side of the second display partition AA2
  • the fourth gate driving circuit GOA4 is located at the second side of the second display partition AA2.
  • the first density change rate of the waveform adjustment module 100 in the plurality of second display sub-areas is equal to the second density change rate
  • the second density change rate is the density change rate of the waveform adjustment module 100 in the plurality of first display sub-areas.
  • the fourth gate driving circuit GOA4 is configured on the left side of the second display subarea AA2 in this embodiment.
  • the first display subarea AA11, the second display subarea AA15 and the third display subarea AA21 are configured with one waveform adjustment module 100 for H sub-pixels 200
  • the second display subarea AA12, the third display subarea AA14 and the fourth display subarea AA22 are configured with one waveform adjustment module 100 for J sub-pixels 200
  • the third display subarea AA13 is configured with one waveform adjustment module 100 for K sub-pixels 200, wherein H, J and K are all integers, and the sizes of H, J and K decrease in sequence.
  • the fourth display subarea AA23 is configured with one waveform adjustment module 100 for K1 sub-pixels 200
  • the fourth display subarea AA24 is configured with one waveform adjustment module 100 for J1 sub-pixels 200, wherein J1 and K1 are both integers, and J1 is less than K1.
  • J1 may be greater than or equal to J, or J1 may be less than J.
  • K1 may be greater than or equal to K, or K1 may be less than K.
  • the plurality of first display sub-areas include a display sub-area AA11, a display sub-area AA12, a display sub-area AA13, a display sub-area AA14, and a display sub-area AA15 arranged in sequence in the second direction DR2;
  • the width of the display sub-area AA11 in the second direction DR2 is equal to the width of the display sub-area AA15 in the second direction DR2
  • the density of the waveform adjustment modules 100 in the display sub-area AA11 is equal to the density of the waveform adjustment modules 100 in the display sub-area AA15;
  • the density of the whole module 100 in the C display sub-area AA13 increases sequentially;
  • the multiple second display sub-areas include a top display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22 and a branch display sub-area AA21 arranged sequentially in the second direction DR2;
  • the width of the top display sub-area AA24 in the second direction DR2 is equal to the width of the branch display sub-area AA21 in the second direction DR2, and the density of the waveform adjustment module 100 in the top display sub-area AA24 is equal to the density of the waveform adjustment module 100 in the branch display sub-area AA21;
  • the width of the trunk display sub-area AA23 in the second direction DR2 is equal to the width of the ground display sub-area AA22 in the second direction DR2, and the density of the waveform adjustment module 100 in the trunk display sub-area AA23 is equal to the density of the waveform adjustment module 100 in the ground display sub-
  • the width of the support display sub-area AA21 in the second direction DR2 is equal to the width of the lower display sub-area AA15 in the second direction DR2, and the density of the waveform adjustment module 100 in the support display sub-area AA21 is equal to the density of the waveform adjustment module 100 in the lower display sub-area AA15;
  • the width of the ground display sub-area AA22 in the second direction DR2 is equal to the width of the lower display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment module 100 in the ground display sub-area AA22 is equal to the density of the waveform adjustment module 100 in the lower display sub-area AA14;
  • the width of the display sub-area AA23 in the second direction DR2 is smaller than the width of the display sub-area AA13 in the second direction DR2, and the density of the waveform adjustment module 100 in the display sub-area AA23 is smaller than or equal to the density of the waveform adjustment module 100 in the display sub-area AA13
  • the first side of the first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1
  • the second side of the first display partition AA1 is aligned with the second side of the second display partition AA2 in the first direction DR1
  • the first side and the second side are respectively located on both sides of the display area AA in the second direction DR2.
  • the second display partition AA2 is located on one side of all the first display partitions AA1 in the first direction DR1, or the second display partition AA2 is located between two first display partitions AA1 in the first direction DR1;
  • the first gate drive circuit GOA1 is located at the second side of the display area AA
  • the second gate drive circuit GOA2 is located at the first side of the display area AA.
  • Each scan line in the first display subarea AA1 is electrically connected to the first gate drive circuit GOA1 and the second gate drive circuit GOA2.
  • each scan line in the second display subarea AA2 is electrically connected to the first gate drive circuit GOA1 and the second gate drive circuit GOA2.
  • the first density change rate of the waveform adjustment module 100 in the plurality of second display sub-areas is equal to the second density change rate
  • the second density change rate is the density change rate of the waveform adjustment module 100 in the plurality of first display sub-areas.
  • the A display sub-area AA11, the C display sub-area AA15, the B display sub-area AA21 and the D display sub-area AA24 are each configured with a waveform adjustment module 100 for H sub-pixels 200
  • the B display sub-area AA12, the D display sub-area AA14, the D display sub-area AA22 and the D display sub-area AA23 are each configured with a waveform adjustment module 100 for J sub-pixels 200
  • the C display sub-area AA13 is configured with a waveform adjustment module 100 for K sub-pixels 200, wherein H, J and K are all integers, and the sizes of H, J and K decrease in sequence.
  • the first density change rate can be the ratio of the density of the waveform adjustment modules 100 in the B display sub-area AA12 to the density of the waveform adjustment modules 100 in the A display sub-area AA11, or the ratio of the density of the waveform adjustment modules 100 in the C display sub-area AA13 to the density of the waveform adjustment modules 100 in the B display sub-area AA12, or the ratio of the density of the waveform adjustment modules 100 in the C display sub-area AA13 to the density of the waveform adjustment modules 100 in the A display sub-area AA11.
  • the second density change rate may be a ratio of the density of the waveform adjustment modules 100 in the ground display sub-area AA22 to the density of the waveform adjustment modules 100 in the branch display sub-area AA21, or a ratio of the density of the waveform adjustment modules 100 in the trunk display sub-area AA23 to the density of the waveform adjustment modules 100 in the ground display sub-area AA22, or a ratio of the density of the waveform adjustment modules 100 in the sky display sub-area AA24 to the density of the waveform adjustment modules 100 in the trunk display sub-area AA23, or a ratio of the density of the waveform adjustment modules 100 in the sky display sub-area AA24 to the density of the waveform adjustment modules 100 in the branch display sub-area AA21.
  • the forward scan control line U2D is used to transmit a forward scan control signal, which is used to control the display panel to perform a forward scan driving mode. Specifically, the present application performs a forward scan driving mode when the forward scan control signal has a positive pulse.
  • the reverse scan control line D2U is used to transmit a reverse scan control signal, which is used to control the display panel to perform a reverse scan driving mode. Specifically, the present application performs a reverse scan driving mode when the reverse scan control signal has a positive pulse.
  • the second display subarea AA2 is located on one side of all the first display subareas AA1 in the first direction DR1; the plurality of first display subareas include a display subarea AA11, a display subarea AA12, a display subarea AA13, a display subarea AA14, and a display subarea AA15 arranged in sequence in the second direction DR2; wherein, in the second display subarea AA2, there is a non-display area between the first display subarea AA23 and the second display subarea AA22; the width of the display subarea AA11 in the second direction DR2 is equal to that of the display subarea AA15 in the second direction
  • the widths of the waveform adjustment modules 100 in the A display sub-area AA11 and the density of the waveform adjustment modules 100 in the U display sub-area AA15 are equal; the width of the B display sub-area AA12 in the second direction DR2 is equal to the width of the D display sub-area AA14 in the
  • the density of the waveform adjustment module 100 in the sub-area AA12 and the density of the waveform adjustment module 100 in the C display sub-area AA13 are increased sequentially;
  • the plurality of second display sub-areas include a top display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22 and a branch display sub-area AA21 arranged sequentially in the second direction DR2;
  • the width of the top display sub-area AA24 in the second direction DR2 is equal to the width of the A display sub-area AA11 in the second direction DR2 and the width of the branch display sub-area AA21 in the second direction DR2, and the density of the waveform adjustment module 100 in the top display sub-area AA24 is increased sequentially;
  • the plurality of second display sub-areas include a top display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22 and a branch display sub-area AA21
  • non-display area in this embodiment is the hollowed-out area.
  • the second display subarea AA2 is located between the two first display subareas AA1 in the first direction DR1; each first display subarea includes a display subarea A AA11, a display subarea B AA12, a display subarea C AA13, a display subarea D AA14 and a display subarea U AA15 arranged in sequence in the second direction DR2; the width of the display subarea A AA11 in the second direction DR2 is equal to the width of the display subarea U AA15 in the second direction DR2, and the density of the waveform adjustment module 100 in the display subarea A AA11 is equal to the density of the waveform adjustment module 100 in the waveform adjustment module The density of the waveform adjustment modules 100 in the U display sub-area AA15 is equal; the width of the B display sub-area AA12 in the second direction DR2 is equal to the width of the D display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment modules 100 in the B display sub-
  • the second display partition AA2 is located between two first display partitions AA1 in the first direction DR1; the first side of each first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1, the second side of the first display partition AA1 is not aligned with the second side of the second display partition AA2 in the first direction DR1, and the first side and the second side are respectively located on both sides of the display area AA in the second direction DR2; the first gate driving circuit GOA1 is located on the second side of the display area AA, the second gate driving circuit GOA2 is located on the first side of a first display partition AA1, the third gate driving circuit GOA3 is located on the first side of the second display partition AA2, and the fourth gate driving circuit GOA4 is located on the first side of another first display partition AA1; each scan line in a first display partition AA1 is aligned with the first gate driving circuit
  • the first display sub-area AA2 is electrically connected to the first display
  • the multiple second display sub-areas include a top display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22 and a branch display sub-area AA21 arranged sequentially in the second direction DR2;
  • the width of the top display sub-area AA24 in the second direction DR2 is equal to the width of the branch display sub-area AA21 in the second direction DR2, and the density of the waveform adjustment module 100 in the top display sub-area AA24 is equal to the density of the waveform adjustment module 100 in the branch display sub-area AA21;
  • the width of the trunk display sub-area AA23 in the second direction DR2 is equal to the width of the ground display sub-area AA22 in the second direction DR2, and the density of the waveform adjustment module 100 in the trunk display sub-area AA23 is equal to the density of the waveform adjustment module 100 in the ground display sub-area AA23
  • the width of the support display sub-area AA21 in the second direction DR2 is greater than the width of the lower display sub-area AA15 in the second direction DR2, and the density of the waveform adjustment module 100 in the support display sub-area AA21 is greater than the density of the waveform adjustment module 100 in the lower display sub-area AA15; the width of the ground display sub-area AA22 in the second direction DR2 is greater than the width of the lower display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment module 100 in the ground display sub-area AA22 is greater than the density of the waveform adjustment module 100 in the lower display sub-area AA14.
  • the present embodiment provides a display device, which includes a display panel in at least one embodiment, each scanning line is used to transmit a corresponding scanning signal, and the waveform adjustment module 100 is used to improve the verticality of the end edge of the scanning signal during forward scanning or reverse scanning.
  • the display device provided in this embodiment can not only improve the technical problem of large delay of the scanning signal in the display panel by constructing differentiated density of the waveform adjustment module 100 in each display partition with different gate drive circuit configurations, but also enable the scanning signal to have the same or similar delay at different positions of the display area AA, which is beneficial to improving the uniformity of the display.
  • the display device provided in this embodiment includes the display panel of at least one of the above-mentioned embodiments, it can also control the waveform adjustment module 100 through the N-1th scan line G (N-1), the N+1th scan line G (N+1), the potential transmission line VL, the forward scan control line U2D and the reverse scan control line D2U, so as to reduce the duration of the end edge of the scan signal during the forward scan or reverse scan, thereby improving the technical problem of the large delay of the scan signal in the display panel; this is conducive to increasing the charging time of each pixel in the display panel or to increasing the refresh frequency of the display panel, thereby promoting the development of high-frequency display and/or high resolution of the display panel.
  • the display panel and the display device can improve the delay problem of the scanning signal during the forward scanning process, and can also improve the delay problem of the scanning signal during the reverse scanning process, thereby providing greater freedom for the assembly of the display panel.
  • the above-mentioned display panel can be a liquid crystal display panel or a self-luminous display panel, for example, an organic light emitting diode display panel, a mini light emitting diode display panel, a micro light emitting diode display panel or a quantum dot light emitting diode display panel.
  • the present embodiment further provides a display panel, please refer to Figures 1 to 18, the display panel includes a plurality of waveform adjustment modules 100 in the display area AA, at least one gate driving circuit is arranged on both sides of the display area AA, and the distribution density of the waveform adjustment module 100 in the area away from the gate driving circuit is greater than the distribution density of the waveform adjustment module 100 in the area close to the gate driving circuit.
  • the display panel provided in this embodiment by constructing a waveform adjustment module 100 with a higher distribution density in the display area AA which is farther away from the gate driving circuit, can not only improve the technical problem of large delay of the scanning signal in the display panel, but also enable the scanning signal to have the same or similar delay at different positions in the display area AA, which is beneficial to improving the uniformity of the display.
  • the distribution density refers to the ratio of the number of waveform adjustment modules 100 in a certain area to the area of the area.
  • the display area AA includes a first display partition AA1 and a second display partition AA2, the effective display width of the first display partition AA1 is greater than the effective display width of the second display partition AA2; the first display partition AA1 includes multiple first sub-areas AA19; the second display partition AA2 includes multiple second sub-areas AA29.
  • the effective display width refers to the width of the area that the display panel can be used for display.
  • Each first sub-area AA19 can be displayed and is arranged continuously in the direction of the effective display width.
  • Multiple second sub-areas AA29 can be arranged continuously or discontinuously in the direction of the effective display width.
  • the waveform adjustment modules 100 have the same distribution density in different areas of the same first sub-area AA19 or the second sub-area AA29, that is, the waveform adjustment modules 100 are evenly distributed in the same first sub-area AA19 or the second sub-area AA29.
  • gate driving circuits are respectively arranged on both sides of the display area AA, and the width of the first display partition AA1 from left to right is consistent with the width of the second display partition AA2 from left to right; the distribution density of the waveform adjustment module 100 in the first sub-area AA19 farthest from the gate driving circuit is greater than the distribution density of the waveform adjustment module 100 in the second sub-area AA29 farthest from the gate driving circuit.
  • the hollowed-out area in FIG. 8 may also be used as a second sub-area AA29.
  • the distribution density of the waveform adjustment module 100 in the hollowed-out area may be zero.
  • gate driving circuits are respectively provided on both sides of the first display partition AA1, and a gate driving circuit is provided on one of the two sides of the second display partition AA2; the distribution density of the waveform adjustment module 100 in the first sub-area AA19 farthest from the gate driving circuit is less than the distribution density of the waveform adjustment module 100 in the second sub-area AA29 farthest from the gate driving circuit.
  • the delay of the scanning signal is more serious in the area farther away from the gate driving circuit. Therefore, configuring a waveform adjustment module 100 with a larger distribution density can better correct the delay of the scanning signal and better adjust the waveform of the scanning signal in the display area AA to be consistent.
  • the difference between the distribution density of the waveform adjustment module 100 in the first sub-area AA19 away from the gate driving circuit and the distribution density in the first sub-area AA19 close to the gate driving circuit is a first difference
  • the difference between the distribution density of the waveform adjustment module 100 in the second sub-area AA29 away from the gate driving circuit and the distribution density in the second sub-area AA29 close to the gate driving circuit is a second difference
  • the first difference is greater than the second difference.
  • this embodiment can make the delay of the scan signal in the first display subarea AA1 and the second display subarea AA2 more consistent, which is beneficial to improving display uniformity.
  • the display panel also includes a scan line, a forward scan control line U2D, a reverse scan control line D2U and a potential transmission line VL electrically connected to the waveform adjustment module 100, the scan line extends from the gate drive circuit to the display area AA, and at least one of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL extends from a non-display area on a different side from the gate drive circuit to the display area AA.
  • the non-display area may include at least one of the left frame area NA1, the right frame area NA2, the upper frame area NA3 and the lower frame area NA4.
  • Each gate drive circuit may be located in the left frame area NA1 and/or the frame area.
  • at least one of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL extends from the upper frame area NA3 and/or the lower frame area NA4 to the display area AA, which can avoid affecting the original distribution of the scan lines.
  • at least one of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL can extend at least partially around the display area AA in the non-display area.
  • the distribution density of the waveform adjustment module 100 in the first sub-area AA19 is greater than the distribution density of the waveform adjustment module 100 in the second sub-area AA29;
  • the display panel also includes a forward scan control supplementary line 41, a reverse scan control supplementary line 43 and a potential transmission supplementary line 42 electrically connected to the waveform adjustment module 100, and at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 extends from a non-display area on a different side from the gate drive circuit and close to the first display partition AA1 to the corresponding first sub-area AA19.
  • the number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL fixedly configured in the display panel will not be able to meet the demand, which requires the addition of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 to respectively make up for the insufficient number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL.
  • the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 can extend from the upper frame area NA3 to the corresponding first sub-area AA19, which not only reduces the transmission path of the corresponding signal, but also does not affect the second display partition AA2.
  • the distribution density of the waveform adjustment module 100 in the first sub-area AA19 is less than the distribution density of the waveform adjustment module 100 in the second sub-area AA29;
  • the display panel also includes a forward scan control supplementary line 41, a reverse scan control supplementary line 43 and a potential transmission supplementary line 42 electrically connected to the waveform adjustment module 100, and at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 extends from a non-display area on a different side from the gate drive circuit and close to the second display partition AA2 to the corresponding first sub-area AA19.
  • the number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL fixedly configured in the display panel will not be able to meet the demand, which requires the addition of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 to respectively make up for the insufficient number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL.
  • the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 can extend from the lower frame area NA4 to the corresponding second sub-area AA29, which not only reduces the transmission path of the corresponding signal, but also does not affect the first display partition AA1.
  • the second display partition AA2 is located between the two first display partitions AA1; in the same width range WF, the distribution density of the waveform adjustment module 100 in the first sub-area AA19 is less than the distribution density of the waveform adjustment module 100 in the second sub-area AA29; the display panel also includes a forward scan control supplementary line 41, a reverse scan control supplementary line 43 and a potential transmission supplementary line 42 electrically connected to the waveform adjustment module 100, and at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 extends from a non-display area on a different side from the gate drive circuit and close to the first display partition AA1 through the first display partition AA1 to the corresponding second sub-area AA29; wherein, the number of branches of at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 in the first display partition AA1 is
  • the number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL fixedly configured in the display panel will not be able to meet the demand, which requires the addition of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 to respectively make up for the insufficient number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL.
  • the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 are not convenient to extend from the left border area NA1 and/or the right border area NA2 to the second display partition AA2, in this case, they can only extend from the upper border area NA3 and/or the lower border area NA4 through the first display partition AA1 to the corresponding second sub-area AA29.
  • the forward scan control supplementary line 41/reverse scan control supplementary line 43/potential transmission supplementary line 42 are divided from one branch in the first display partition AA1 into multiple branches in the second display partition AA2, which can minimize the impact on the first display partition AA1 and meet the needs of the corresponding second sub-area AA29.
  • different waveform adjustment modules 100 in the second sub-area AA29 may share at least one of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL, which can also meet the needs of more waveform adjustment modules 100 .
  • the display panel shown in FIG. 16 to FIG. 18 can be a rectangular display screen or various special-shaped screens, for example, the display screen with a hollowed-out area or missing corners as described above.

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Abstract

一种显示面板及显示装置，该显示面板通过在距离栅极驱动电路更远的显示区中构造分布密度更大的波形调整模块（100），不仅能够改善扫描信号在显示面板内延迟较大的技术问题，还能够使得扫描信号在显示区的不同位置具有相同或者相似的延迟，这有利于提高显示的均匀性。

Description

显示面板及显示装置 技术领域
本申请涉及显示技术领域，具体涉及一种显示面板及显示装置。
 背景技术
随着显示技术的飞速发展，为了给客户更完美的生活体验，更高分辨率是显示面板发展的重要方向。然而，随着分辨率的不断增大，扫描信号在显示面板内的延迟也越来越大。
 技术问题
本申请提供一种显示面板及显示装置，以缓解在显示区中扫描信号的结束沿延迟较大且延迟不均的技术问题。
 技术解决方案
第一方面，本申请提供一种显示面板，该显示面板包括在显示区中的多个波形调整模块，显示区的两侧设置有至少一个栅极驱动电路，波形调整模块在远离栅极驱动电路的区域中的分布密度大于波形调整模块在靠近栅极驱动电路的区域中的分布密度。
在其中一些实施方式中，显示区包括第一显示分区和第二显示分区，第一显示分区的有效显示宽度大于第二显示分区的有效显示宽度；第一显示分区包括多个第一子区；第二显示分区包括多个第二子区。
在其中一些实施方式中，显示区的两侧分别设置栅极驱动电路，第一显示分区从左至右的宽度与第二显示分区从左至右的宽度一致；波形调整模块在最远离栅极驱动电路的第一子区中的分布密度大于波形调整模块在最远离栅极驱动电路的第二子区中的分布密度。
在其中一些实施方式中，第一显示分区的两侧分别设置栅极驱动电路，第二显示分区的两侧中的一个设置栅极驱动电路；波形调整模块在最远离栅极驱动电路的第一子区中的分布密度小于波形调整模块在最远离栅极驱动电路的第二子区中的分布密度。
在其中一些实施方式中，波形调整模块在远离栅极驱动电路的第一子区中的分布密度与在靠近栅极驱动电路的第一子区中的分布密度之差为第一差值，波形调整模块在远离栅极驱动电路的第二子区中的分布密度与在靠近栅极驱动电路的第二子区中的分布密度之差为第二差值，第一差值大于第二差值。
在其中一些实施方式中，显示面板还包括与波形调整模块电连接的扫描线、正向扫描控制线、反向扫描控制线以及电位传输线，扫描线自栅极驱动电路延伸至显示区，正向扫描控制线、反向扫描控制线以及电位传输线中的至少一种从与栅极驱动电路的不同侧的非显示区延伸至显示区。
在其中一些实施方式中，在同一宽度范围中，波形调整模块在第一子区中的分布密度大于波形调整模块在第二子区中的分布密度；显示面板还包括与波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近第一显示分区的非显示区延伸至对应的第一子区中。
在其中一些实施方式中，在同一宽度范围中，波形调整模块在第一子区中的分布密度小于波形调整模块在第二子区中的分布密度；显示面板还包括与波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近第二显示分区的非显示区延伸至对应的第一子区中。
在其中一些实施方式中，第二显示分区位于两个第一显示分区之间；在同一宽度范围中，波形调整模块在第一子区中的分布密度小于波形调整模块在第二子区中的分布密度；显示面板还包括与波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近第一显示分区的非显示区经第一显示分区延伸至对应的第二子区中；其中，正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种在第一显示分区中的分支数量少于在第二显示分区中的分支数量。
第二方面，本申请提供一种显示装置，该显示装置包括上述至少一实施方式中的显示面板，波形调整模块用于在正向扫描或者反向扫描的过程中提高扫描信号的结束沿的垂直度。
 有益效果
本申请提供的显示面板及显示装置，通过在距离栅极驱动电路更远的显示区中构造分布密度更大的波形调整模块，不仅能够改善扫描信号在显示面板内延迟较大的技术问题，还能够使得扫描信号在显示区的不同位置具有相同或者相似的延迟，这有利于提高显示的均匀性。
 附图说明
图1为本申请实施例提供的显示面板的第一种结构示意图。
图2为图1中波形调整模块的电路原理图。
图3为本申请实施例提供的显示面板的第二种结构示意图。
图4为图3中波形调整模块的电路原理图。
图5为本申请实施例提供的非异形显示面板的改善前后的对比示意图。
图6为本申请实施例提供的异形显示面板的第一种结构示意图。
图7为本申请实施例提供的异形显示面板的第二种结构示意图。
图8为本申请实施例提供的异形显示面板的第三种结构示意图。
图9为本申请实施例提供的异形显示面板的第四种结构示意图。
图10为本申请实施例提供的异形显示面板中波形调整模块的第一种分布示意图。
图11为图10所示波形调整模块的具体分布示意图。
图12为本申请实施例提供的异形显示面板中波形调整模块的第二种分布示意图。
图13为图12所示波形调整模块的具体分布示意图。
图14为本申请实施例提供的异形显示面板中波形调整模块的第三种分布示意图。
图15为图14所示波形调整模块的具体分布示意图。
图16为本申请实施例提供的显示面板的第三种结构示意图。
图17为本申请实施例提供的显示面板的第四种结构示意图。
图18为本申请实施例提供的显示面板的第五种结构示意图。
 本发明的实施方式
为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
有鉴于正向扫描或者反向扫描的过程中扫描信号的结束沿延迟较大的技术问题，本实施例提供了一种显示面板，请参阅图1至图15，如图1、图3所示，该显示面板包括沿第一方向DR1依次排布的多条扫描线、波形调整模块100、电位传输线VL、正向扫描控制线U2D以及反向扫描控制线D2U。多条扫描线包括第N-1条扫描线G（N-1）、第N条扫描线G（N）以及第N+1条扫描线G（N+1），N为大于或者等于2的整数。波形调整模块100的输出端与第N+1条扫描线G（N+1）电连接，波形调整模块100的第一控制端与第N-1条扫描线G（N-1）电连接，波形调整模块100的第二控制端与第N+1条扫描线G（N+1）电连接，且波形调整模块100位于显示面板的显示区AA中。电位传输线VL与波形调整模块100的第一输入端电连接。正向扫描控制线U2D与波形调整模块100的第二输入端或者波形调整模块100的第三控制端电连接。反向扫描控制线D2U与波形调整模块100的第三输入端或者波形调整模块100的第四控制端电连接。
可以理解的是，本实施例提供的显示面板，通过第N-1条扫描线G（N-1）、第N+1条扫描线G（N+1）、电位传输线VL、正向扫描控制线U2D以及反向扫描控制线D2U对波形调整模块100的控制，可以在正向扫描或者反向扫描的过程中减小扫描信号的结束沿的持续时长，进而能够改善扫描信号在显示面板内延迟较大的技术问题；这有利于提高显示面板中各像素的充电时间或者有利于提高显示面板的刷新频率，进而有利于推进显示面板的高频显示和/或高分辨率的发展。
又，该显示面板及显示装置既可以在正向扫描的过程中改善扫描信号的延迟问题，还可以在反向扫描的过程中改善扫描信号的延迟问题，为显示面板的装配提供了更大的自由度。
需要进行说明的是，第一方向DR1可以为多条扫描线的排布方向，第二方向DR2可以为每条扫描线的延伸方向。
其中，与同一波形调整模块100电连接的反向扫描控制线D2U、电位传输线VL以及正向扫描控制线U2D可以沿第二方向DR2依次排布，如此有利于减少反向扫描控制线D2U、电位传输线VL以及正向扫描控制线U2D至波形调整模块100的传输距离。
上述显示面板还可以包括沿第二方向DR2依次排布的多条数据线，例如，第一数据线datar、第二数据线datag以及第三数据线datab等。各扫描线与各数据线交叉形成阵列分布的子像素200。其中，第一数据线datar可以与一列的红色子像素200（R）电连接。第二数据线datag可以与一列的绿色子像素200（G）电连接。第三数据线datab可以与一列的蓝色子像素200（B）电连接。
具体地，反向扫描控制线D2U与第一数据线datar相邻、平行，且反向扫描控制线D2U位于第一数据线datar的左侧。电位传输线VL与第二数据线datag相邻、平行，且电位传输线VL位于第二数据线datag的左侧。正向扫描控制线U2D与第三数据线datab相邻、平行，且正向扫描控制线U2D位于第三数据线datab的左侧。这样可以减小像素的开口率的损失。其中，如图3所示，对应数据线的左侧没有相邻、平行的反向扫描控制线D2U、电位传输线VL以及正向扫描控制线U2D的情况下，该显示面板还会为对应数据线配置与其相邻、平行的虚拟走线Dummy，以平衡各数据线受到一致的耦合作用。
其中，每个子像素200既可以为被动型显示的子像素，例如采用液晶显示的子像素，此时，每个子像素200可以包括一个薄膜晶体管，该薄膜晶体管的漏极或者源极中的一个与对应的数据线连接，该薄膜晶体管的漏极或者源极中的另一个与公共电压线con连接，该薄膜晶体管的栅极与对应的扫描线连接。
在其中一个实施例中，如图2所示，波形调整模块100包括第一晶体管NTA、第二晶体管NTB以及第三晶体管NTC，第一晶体管NTA的第一极与反向扫描控制线D2U电连接，第一晶体管NTA的栅极与第N-1条扫描线G（N-1）电连接；第二晶体管NTB的第一极与正向扫描控制线U2D电连接，第二晶体管NTB的栅极与第N+1条扫描线G（N+1）电连接；第三晶体管NTC的栅极与第一晶体管NTA的第二极、第二晶体管NTB的第二极电连接，第三晶体管NTC的第一极与电位传输线VL电连接，第三晶体管NTC的第二极与第N条扫描线G（N）电连接。
需要进行说明的是，第一极可以为源极或者漏极中的一个，第二极可以为源极或者漏极中的另一个。例如，第一极为源极时，第二极为漏极；或者，第一极为漏极时，第二极为源极。
在正向扫描过程中，当第N+1条扫描线G（N+1）控制第二晶体管NTB导通时，正向扫描控制线U2D也会控制第三晶体管NTC导通，此时，第N条扫描线G（N）中的电位被调整至电位传输线VL所具有的电位。
在反向扫描过程中，当第N-1条扫描线G（N-1）控制第一晶体管NTA导通时，反向扫描控制线D2U也会控制第三晶体管NTC导通，此时，第N条扫描线G（N）中的电位同样被调整至电位传输线VL所具有的电位。
这样既可以在正向扫描的过程中改善第N条扫描线G（N）中的第N级扫描信号的结束沿的垂直度，也可以在反向扫描的过程中改善第N条扫描线G（N）中的第N级扫描信号的结束沿的垂直度。其中，正脉冲的结束沿是指脉冲的下降沿，负脉冲的结束沿是指脉冲的上升沿。
在其中一个实施例中，第一晶体管NTA、第二晶体管NTB以及第三晶体管NTC均为N沟道型薄膜晶体管；电位传输线VL用于传输低电位信号，低电位信号用于控制N沟道型薄膜晶体管处于截止状态。
需要进行说明的是，当各扫描线中传输的扫描信号均具有正脉冲时，本实施例可以使得各扫描信号的正脉冲具有更为陡峭或者垂直的下降沿，以更接近脉冲的理想波形。
在其中一个实施例中，第一晶体管NTA、第二晶体管NTB均为P沟道型薄膜晶体管，第三晶体管NTC为N沟道型薄膜晶体管；电位传输线VL用于传输高电位信号，高电位信号用于控制P沟道型薄膜晶体管处于截止状态。
需要进行说明的是，当各扫描线中传输的扫描信号均具有负脉冲时，本实施例可以使得各扫描信号的负脉冲具有更为陡峭或者垂直的上升沿，以更接近脉冲的理想波形。
在其中一个实施例中，如图4所示，波形调整模块100包括第四晶体管T1、第五晶体管T2、第六晶体管T3以及第七晶体管T4，第四晶体管T1的第一极与电位传输线VL电连接，第四晶体管T1的栅极与正向扫描控制线U2D电连接；第五晶体管T2的第一极与第四晶体管T1的第二极电连接，第五晶体管T2的栅极与第N+1条扫描线G（N+1）电连接，第五晶体管T2的第二极与第N条扫描线G（N）电连接；第六晶体管T3的第一极与第四晶体管T1的第一极电连接，第六晶体管T3的栅极与反向扫描控制线D2U电连接；第七晶体管T4的第一极与第六晶体管T3的第二极电连接，第七晶体管T4的栅极与第N-1条扫描线G（N-1）电连接，第七晶体管T4的第二极与第N条扫描线G（N）电连接。
需要进行说明的是，在正向扫描过程中，正向扫描线控制第四晶体管T1处于导通状态，当第N+1条扫描线G（N+1）控制第五晶体管T2导通时，第N条扫描线G（N）中的电位被调整至电位传输线VL所具有的电位。
在反向扫描过程中，反向扫描线控制第六晶体管T3处于导通状态，当第N-1条扫描线G（N-1）控制第七晶体管T4导通时，第N条扫描线G（N）中的电位被调整至电位传输线VL所具有的电位。
可以理解的是，这样既可以在正向扫描的过程中改善第N条扫描线G（N）中的第N级扫描信号的结束沿的垂直度，也可以在反向扫描的过程中改善第N条扫描线G（N）中的第N级扫描信号的结束沿的垂直度。
在其中一个实施例中，第四晶体管T1、第五晶体管T2、第六晶体管T3以及第七晶体管T4均为N沟道型薄膜晶体管；电位传输线VL用于传输低电位信号，低电位信号用于控制N沟道型薄膜晶体管处于截止状态。
需要进行说明的是，当各扫描线中传输的扫描信号均具有正脉冲时，本实施例可以使得各扫描信号的正脉冲具有更为陡峭或者垂直的下降沿，以更接近脉冲的理想波形。
在其中一个实施例中，第四晶体管T1、第六晶体管T3均为N沟道型薄膜晶体管，第五晶体管T2、第七晶体管T4均为P沟道型薄膜晶体管；电位传输线VL用于传输高电位信号，高电位信号用于控制P沟道型薄膜晶体管处于截止状态。
需要进行说明的是，当各扫描线中传输的扫描信号均具有负脉冲时，本实施例可以使得各扫描信号的负脉冲具有更为陡峭或者垂直的上升沿，以更接近脉冲的理想波形。
图5为本申请实施例提供的非异形显示面板的改善前后的对比示意图，其中，非异形显示面板可以但不限于显示区AA为矩形区域的显示面板。具体地，显示区AA可分为A区、B区、C区、D区这四个区域。其中，A区、B区为靠近第一栅极驱动电路GOA1/第二栅极驱动电路GOA2的区域，且关于显示区AA的中心对称；C区、D区为远离第一栅极驱动电路GOA1/第二栅极驱动电路GOA2的区域，且关于显示区AA的中心对称。为了改善扫描信号的结束沿在显示区AA中的延迟，A区、B区、C区、D区分别放置了对应数量的波形调整模块100。其中，A区、B区中每M个子像素200配置一个波形调整模块100，C区、D区中每N个子像素200配置一个波形调整模块100，M和N为整数，且M小于或者等于N。
在显示区AA中未配置波形调整模块100之前，A区、B区、C区、D区中对应扫描信号的下降沿如图5中“超宽屏”所对应的一行波形所示，可以看出，各下降沿的延迟较大。
而在显示区AA中配置波形调整模块100之后，A区、B区、C区、D区中对应扫描信号的下降沿如图5中“超宽屏+波形调整模块”所对应的一行波形所示，可以看出，各下降沿的延迟较小，各下降沿也更为陡峭或者垂直。
其中，IC为数据驱动器或者数据驱动芯片，可以为各数据线提供对应的数据信号。
图6、图7、图8以及图9所示分别为异形显示面板的一种形态，与图5相比，图6至图9所示的显示区AA均为非矩形区域。
例如，图6所示的显示区AA是左下角被挖空了，此种情况下，第一栅极驱动电路GOA1为各扫描线从右侧提供对应的扫描信号，第二栅极驱动电路GOA2为正常显示区AA域中的各扫描线从左侧提供对应的扫描信号，第三栅极驱动电路GOA3为异形显示区AA域中的各扫描线从左侧提供对应的扫描信号。
图7所示的显示区AA是底部边缘区域被挖空了，此种情况下，第一栅极驱动电路GOA1为各扫描线从右侧提供对应的扫描信号，第二栅极驱动电路GOA2为各扫描线从左侧提供对应的扫描信号。
图8所示的显示区AA是中心区域被挖空了，此种情况下，第一栅极驱动电路GOA1为各扫描线从右侧提供对应的扫描信号，第二栅极驱动电路GOA2为各扫描线从左侧提供对应的扫描信号。
图9所示的显示区AA是左侧边缘区域被挖空了，此种情况下，第一栅极驱动电路GOA1为各扫描线从右侧提供对应的扫描信号，第二栅极驱动电路GOA2为上部中各扫描线从左侧提供对应的扫描信号，第三栅极驱动电路GOA3为中部中各扫描线从左侧提供对应的扫描信号，第四栅极驱动电路GOA4为下部中各扫描线从左侧提供对应的扫描信号。
在其中一个实施例中，如图8至图15所示，显示面板包括被配置为在显示区AA中改善扫描信号的结束沿的波形调整模块100，显示区AA包括在第一方向DR1上排布的第一显示分区AA1和第二显示分区AA2，第二显示分区AA2位于第一显示分区AA1在第一方向DR1上的投影内，且第二显示分区AA2覆盖第一显示分区AA1在第一方向DR1上投影的部分。
第一显示分区AA1的两侧分别设置有第一栅极驱动电路GOA1和第二栅极驱动电路GOA2，第一显示分区AA1中的每一扫描线均与第一栅极驱动电路GOA1、第二栅极驱动电路GOA2电连接。
第二显示分区AA2的两侧设置有第一栅极驱动电路GOA1、第二栅极驱动电路GOA2、第三栅极驱动电路GOA3以及第四栅极驱动电路GOA4中一个或者两个，第二显示分区AA2中的每一扫描线均与第一栅极驱动电路GOA1、第二栅极驱动电路GOA2、第三栅极驱动电路GOA3以及第四栅极驱动电路GOA4中一个或者两个电连接。
第一显示分区AA1包括沿第二方向DR2依次排布的多个第一显示子区，波形调整模块100在每个第一显示子区中的密度随着距离第一栅极驱动电路GOA1、第二栅极驱动电路GOA2越远越大。
第二显示分区AA2包括沿第二方向DR2依次排布的多个第二显示子区，波形调整模块100在每个第二显示子区中的密度随着距离第一栅极驱动电路GOA1、第二栅极驱动电路GOA2、第三栅极驱动电路GOA3以及第四栅极驱动电路GOA4中一个或者两个越远越大。
可以理解的是，本实施例提供的显示面板，通过在栅极驱动电路配置不同的各显示分区中构造波形调整模块100的差异化密度，不仅能够改善扫描信号在显示面板内延迟较大的技术问题，还能够使得扫描信号在显示区AA的不同位置具有相同或者相似的延迟，这有利于提高显示的均匀性。
需要进行说明的是，波形调整模块100在每个第一显示子区中的密度随着距离第一栅极驱动电路GOA1、第二栅极驱动电路GOA2越远越大，波形调整模块100在每个第二显示子区中的密度随着距离第一栅极驱动电路GOA1、第二栅极驱动电路GOA2、第三栅极驱动电路GOA3以及第四栅极驱动电路GOA4中一个或者两个越远越大，波形调整模块100这样的密度排布有利于实现扫描信号在显示区AA的不同位置具有相同的结束沿的延迟情况，进而有利于实现显示区AA的显示效果均一化。
在其中一个实施例中，如图10、图11所示，第一显示分区AA1的第一侧与第二显示分区AA2的第一侧在第一方向DR1上对齐，第一显示分区AA1的第二侧与第二显示分区AA2的第二侧在第一方向DR1上未对齐，第一侧、第二侧在第二方向DR2上分别位于显示区AA的两侧。
第一栅极驱动电路GOA1位于第一显示分区AA1的第二侧，第二栅极驱动电路GOA2位于第一显示分区AA1的第一侧，第三栅极驱动电路GOA3位于第二显示分区AA2的第一侧。
波形调整模块100在多个第二显示子区中的第一密度变化速率大于第二密度变化速率，第二密度变化速率为波形调整模块100在多个第一显示子区中的密度变化速率。
需要进行说明的是，多个第一显示子区可以为甲显示子区AA11、乙显示子区AA12、丙显示子区AA13、丁显示子区AA14、丑显示子区AA15等。多个第二显示子区可以为支显示子区AA21、地显示子区AA22、干显示子区AA23、天显示子区AA24等。
其中，甲显示子区AA11、丑显示子区AA15以及支显示子区AA21均为H个子像素200配置一个波形调整模块100，乙显示子区AA12、丁显示子区AA14以及地显示子区AA22均为J个子像素200配置一个波形调整模块100，丙显示子区AA13为K个子像素200配置一个波形调整模块100，其中，H、J、K均为整数，且H、J、K的大小依次减小。干显示子区AA23为K1个子像素200配置一个波形调整模块100，天显示子区AA24为J1个子像素200配置一个波形调整模块100，J1、K1均为整数，且J1大于K1。
可以理解的是，如此配置能够实现扫描信号在显示区AA的不同位置具有相同的结束沿的延迟情况，进而有利于实现显示区AA的显示效果均一化。
在其他的实施例中，K1也可以大于K，J1也可以大于J，如此配置能够进一步实现扫描信号在显示区AA的不同位置具有相同的结束沿的延迟情况，进而有利于进一步实现显示区AA的显示效果均一化。
在其中一个实施例中，多个第一显示子区包括在第二方向DR2上依次排列的甲显示子区AA11、乙显示子区AA12、丙显示子区AA13、丁显示子区AA14以及丑显示子区AA15；甲显示子区AA11在第二方向DR2上的宽度与丑显示子区AA15在第二方向DR2上的宽度相等，波形调整模块100在甲显示子区AA11中的密度与波形调整模块100在丑显示子区AA15中的密度相等；乙显示子区AA12在第二方向DR2上的宽度与丁显示子区AA14在第二方向DR2上的宽度相等，波形调整模块100在乙显示子区AA12中的密度与波形调整模块100在丁显示子区AA14中的密度相等；且波形调整模块100在甲显示子区AA11中的密度、波形调整模块100在乙显示子区AA12中的密度以及波形调整模块100在丙显示子区AA13中的密度依次增加。
在其中一个实施例中，多个第二显示子区包括在第二方向DR2上依次排列的天显示子区AA24、干显示子区AA23、地显示子区AA22以及支显示子区AA21；波形调整模块100在天显示子区AA24中的密度、波形调整模块100在干显示子区AA23中的密度、波形调整模块100在地显示子区AA22中的密度以及波形调整模块100在支显示子区AA21中的密度依次减小。
在其中一个实施例中，支显示子区AA21在第二方向DR2上的宽度与丑显示子区AA15在第二方向DR2上的宽度相等，波形调整模块100在支显示子区AA21中的密度与波形调整模块100在丑显示子区AA15中的密度相等；地显示子区AA22在第二方向DR2上的宽度与丁显示子区AA14在第二方向DR2上的宽度相等，波形调整模块100在地显示子区AA22中的密度与波形调整模块100在丁显示子区AA14中的密度相等；干显示子区AA23在第二方向DR2上的宽度小于丙显示子区AA13在第二方向DR2上的宽度，波形调整模块100在干显示子区AA23中的密度大于波形调整模块100在丙显示子区AA13中的密度；且波形调整模块100在干显示子区AA23中的密度小于波形调整模块100在天显示子区AA24中的密度。
在其中一个实施例中，如图12、图13所示，第一显示分区AA1的第一侧与第二显示分区AA2的第一侧在第一方向DR1上对齐，第一显示分区AA1的第二侧与第二显示分区AA2的第二侧在第一方向DR1上未对齐，第一侧、第二侧在第二方向DR2上分别位于显示区AA的两侧。
第一栅极驱动电路GOA1位于第一显示分区AA1的第二侧，第二栅极驱动电路GOA2位于第一显示分区AA1的第一侧，第三栅极驱动电路GOA3位于第二显示分区AA2的第一侧，第四栅极驱动电路GOA4位于第二显示分区AA2的第二侧。
波形调整模块100在多个第二显示子区中的第一密度变化速率等于第二密度变化速率，第二密度变化速率为波形调整模块100在多个第一显示子区中的密度变化速率。
需要进行说明的是，与图10、图11相比，本实施例在第二显示分区AA2的左侧配置了第四栅极驱动电路GOA4，此种情况下，甲显示子区AA11、丑显示子区AA15以及支显示子区AA21均为H个子像素200配置一个波形调整模块100，乙显示子区AA12、丁显示子区AA14以及地显示子区AA22均为J个子像素200配置一个波形调整模块100，丙显示子区AA13为K个子像素200配置一个波形调整模块100，其中，H、J、K均为整数，且H、J、K的大小依次减小。干显示子区AA23为K1个子像素200配置一个波形调整模块100，天显示子区AA24为J1个子像素200配置一个波形调整模块100，J1、K1均为整数，且J1小于K1。其中，J1可以大于或者等于J，或者，J1也可以小于J。K1可以大于或者等于K，或者，K1也可以小于K。
可以理解的是，如此配置能够实现扫描信号在显示区AA的不同位置具有相同的结束沿的延迟情况，进而有利于实现显示区AA的显示效果均一化。
在其中一个实施例中，多个第一显示子区包括在第二方向DR2上依次排列的甲显示子区AA11、乙显示子区AA12、丙显示子区AA13、丁显示子区AA14以及丑显示子区AA15；甲显示子区AA11在第二方向DR2上的宽度与丑显示子区AA15在第二方向DR2上的宽度相等，波形调整模块100在甲显示子区AA11中的密度与波形调整模块100在丑显示子区AA15中的密度相等；乙显示子区AA12在第二方向DR2上的宽度与丁显示子区AA14在第二方向DR2上的宽度相等，波形调整模块100在乙显示子区AA12中的密度与波形调整模块100在丁显示子区AA14中的密度相等；且波形调整模块100在甲显示子区AA11中的密度、波形调整模块100在乙显示子区AA12中的密度以及波形调整模块100在丙显示子区AA13中的密度依次增加；多个第二显示子区包括在第二方向DR2上依次排列的天显示子区AA24、干显示子区AA23、地显示子区AA22以及支显示子区AA21；天显示子区AA24在第二方向DR2上的宽度与支显示子区AA21在第二方向DR2上的宽度相等，波形调整模块100在天显示子区AA24中的密度与波形调整模块100在支显示子区AA21中的密度相等；干显示子区AA23在第二方向DR2上的宽度与地显示子区AA22在第二方向DR2上的宽度相等，波形调整模块100在干显示子区AA23中的密度等于波形调整模块100在地显示子区AA22中的密度；且波形调整模块100在天显示子区AA24中的密度小于波形调整模块100在干显示子区AA23中的密度。
在其中一个实施例中，支显示子区AA21在第二方向DR2上的宽度与丑显示子区AA15在第二方向DR2上的宽度相等，波形调整模块100在支显示子区AA21中的密度与波形调整模块100在丑显示子区AA15中的密度相等；地显示子区AA22在第二方向DR2上的宽度与丁显示子区AA14在第二方向DR2上的宽度相等，波形调整模块100在地显示子区AA22中的密度与波形调整模块100在丁显示子区AA14中的密度相等；干显示子区AA23在第二方向DR2上的宽度小于丙显示子区AA13在第二方向DR2上的宽度，波形调整模块100在干显示子区AA23中的密度小于或者等于波形调整模块100在丙显示子区AA13中的密度；且波形调整模块100在天显示子区AA24中的密度大于或者等于波形调整模块100在甲显示子区AA11中的密度，或者，波形调整模块100在天显示子区AA24中的密度小于波形调整模块100在甲显示子区AA11中的密度。
在其中一个实施例中，如图8、图14、图15所示，第一显示分区AA1的第一侧与第二显示分区AA2的第一侧在第一方向DR1上对齐，第一显示分区AA1的第二侧与第二显示分区AA2的第二侧在第一方向DR1上对齐，第一侧、第二侧在第二方向DR2上分别位于显示区AA的两侧。第二显示分区AA2在第一方向DR1上位于所有第一显示分区AA1的一侧，或者，第二显示分区AA2在第一方向DR1上位于两个第一显示分区AA1之间；
第一栅极驱动电路GOA1位于显示区AA的第二侧，第二栅极驱动电路GOA2位于显示区AA的第一侧。第一显示分区AA1中的每一扫描线均与第一栅极驱动电路GOA1、第二栅极驱动电路GOA2电连接。且第二显示分区AA2中的每一扫描线均与第一栅极驱动电路GOA1、第二栅极驱动电路GOA2电连接。
波形调整模块100在多个第二显示子区中的第一密度变化速率等于第二密度变化速率，第二密度变化速率为波形调整模块100在多个第一显示子区中的密度变化速率。
需要进行说明的是，在本实施例中，甲显示子区AA11、丑显示子区AA15、支显示子区AA21以及天显示子区AA24均为H个子像素200配置一个波形调整模块100，乙显示子区AA12、丁显示子区AA14、地显示子区AA22以及干显示子区AA23均为J个子像素200配置一个波形调整模块100，丙显示子区AA13为K个子像素200配置一个波形调整模块100，其中，H、J、K均为整数，且H、J、K的大小依次减小。
可以理解的是，如此配置能够实现扫描信号在显示区AA的不同位置具有相同的结束沿的延迟情况，进而有利于实现显示区AA的显示效果均一化。
其中，第一密度变化速率可以为乙显示子区AA12中波形调整模块100的密度与甲显示子区AA11中波形调整模块100的密度之比，或者，丙显示子区AA13中波形调整模块100的密度与乙显示子区AA12中波形调整模块100的密度之比，又或者，丙显示子区AA13中波形调整模块100的密度与甲显示子区AA11中波形调整模块100的密度之比。第二密度变化速率可以为地显示子区AA22中波形调整模块100的密度与支显示子区AA21中波形调整模块100的密度之比，或者，干显示子区AA23中波形调整模块100的密度与地显示子区AA22中波形调整模块100的密度之比，又或者，天显示子区AA24中波形调整模块100的密度与干显示子区AA23中波形调整模块100的密度之比，又或者，天显示子区AA24中波形调整模块100的密度与支显示子区AA21中波形调整模块100的密度之比。
需要进行说明的是，正向扫描控制线U2D用于传输正向扫描控制信号，该正向扫描控制信号用于控制显示面板进行正向扫描的驱动模式。具体地，本申请以正向扫描控制信号具有正脉冲的情况下，执行正向扫描的驱动模式。反向扫描控制线D2U用于传输反向扫描控制信号，该反向扫描控制信号用于控制显示面板进行反向扫描的驱动模式。具体地，本申请以反向扫描控制信号具有正脉冲的情况下，执行反向扫描的驱动模式。
在其中一个实施例中，第二显示分区AA2在第一方向DR1上位于所有第一显示分区AA1的一侧；多个第一显示子区包括在第二方向DR2上依次排列的甲显示子区AA11、乙显示子区AA12、丙显示子区AA13、丁显示子区AA14以及丑显示子区AA15；其中，在第二显示分区AA2中干显示子区AA23与地显示子区AA22之间具有非显示区；甲显示子区AA11在第二方向DR2上的宽度与丑显示子区AA15在第二方向DR2上的宽度相等，波形调整模块100在甲显示子区AA11中的密度与波形调整模块100在丑显示子区AA15中的密度相等；乙显示子区AA12在第二方向DR2上的宽度与丁显示子区AA14在第二方向DR2上的宽度相等，波形调整模块100在乙显示子区AA12中的密度与波形调整模块100在丁显示子区AA14中的密度相等；且波形调整模块100在甲显示子区AA11中的密度、波形调整模块100在乙显示子区AA12中的密度以及波形调整模块100在丙显示子区AA13中的密度依次增加；多个第二显示子区包括在第二方向DR2上依次排列的天显示子区AA24、干显示子区AA23、地显示子区AA22以及支显示子区AA21；天显示子区AA24在第二方向DR2上的宽度与甲显示子区AA11在第二方向DR2上的宽度、支显示子区AA21在第二方向DR2上的宽度均相等，波形调整模块100在天显示子区AA24中的密度与波形调整模块100在甲显示子区AA11中的密度、波形调整模块100在支显示子区AA21中的密度均相等；干显示子区AA23在第二方向DR2上的宽度与乙显示子区AA12在第二方向DR2上的宽度、地显示子区AA22在第二方向DR2上的宽度均相等，波形调整模块100在干显示子区AA23中的密度与波形调整模块100在乙显示子区AA12中的密度、波形调整模块100在地显示子区AA22中的密度均相等。
需要进行说明的是，本实施例中的非显示区即为挖空区域。
在其中一个实施例中，第二显示分区AA2在第一方向DR1上位于两个第一显示分区AA1之间；每个第一显示子区均包括在第二方向DR2上依次排列的甲显示子区AA11、乙显示子区AA12、丙显示子区AA13、丁显示子区AA14以及丑显示子区AA15；甲显示子区AA11在第二方向DR2上的宽度与丑显示子区AA15在第二方向DR2上的宽度相等，波形调整模块100在甲显示子区AA11中的密度与波形调整模块100在丑显示子区AA15中的密度相等；乙显示子区AA12在第二方向DR2上的宽度与丁显示子区AA14在第二方向DR2上的宽度相等，波形调整模块100在乙显示子区AA12中的密度与波形调整模块100在丁显示子区AA14中的密度相等；且波形调整模块100在甲显示子区AA11中的密度、波形调整模块100在乙显示子区AA12中的密度以及波形调整模块100在丙显示子区AA13中的密度依次增加；多个第二显示子区包括在第二方向DR2上依次排列的天显示子区AA24、干显示子区AA23、地显示子区AA22以及支显示子区AA21；其中，在第二显示分区AA2中干显示子区AA23与地显示子区AA22之间具有非显示区；天显示子区AA24在第二方向DR2上的宽度与甲显示子区AA11在第二方向DR2上的宽度、支显示子区AA21在第二方向DR2上的宽度均相等，波形调整模块100在天显示子区AA24中的密度与波形调整模块100在甲显示子区AA11中的密度、波形调整模块100在支显示子区AA21中的密度均相等；干显示子区AA23在第二方向DR2上的宽度与乙显示子区AA12在第二方向DR2上的宽度、地显示子区AA22在第二方向DR2上的宽度均相等，波形调整模块100在干显示子区AA23中的密度与波形调整模块100在乙显示子区AA12中的密度、波形调整模块100在地显示子区AA22中的密度均相等。
在其中一个实施例中，第二显示分区AA2在第一方向DR1上位于两个第一显示分区AA1之间；每个第一显示分区AA1的第一侧与第二显示分区AA2的第一侧在第一方向DR1上对齐，第一显示分区AA1的第二侧与第二显示分区AA2的第二侧在第一方向DR1上未对齐，第一侧、第二侧在第二方向DR2上分别位于显示区AA的两侧；第一栅极驱动电路GOA1位于显示区AA的第二侧，第二栅极驱动电路GOA2位于一第一显示分区AA1的第一侧，第三栅极驱动电路GOA3位于第二显示分区AA2的第一侧，第四栅极驱动电路GOA4位于另一第一显示分区AA1的第一侧；一第一显示分区AA1中的每一扫描线均与第一栅极驱动电路GOA1、第二栅极驱动电路GOA2电连接，第二显示分区AA2中的每一扫描线均与第一栅极驱动电路GOA1、第三栅极驱动电路GOA3电连接，且另一第一显示分区AA1中的每一扫描线均与第一栅极驱动电路GOA1、第四栅极驱动电路GOA4电连接；其中，第二栅极驱动电路GOA2在第二方向DR2上至第一栅极驱动电路GOA1的距离等于第四栅极驱动电路GOA4在第二方向DR2上至第一栅极驱动电路GOA1的距离，且第二栅极驱动电路GOA2在第二方向DR2上至第一栅极驱动电路GOA1的距离大于第三栅极驱动电路GOA3在第二方向DR2上至第一栅极驱动电路GOA1的距离；每个第一显示子区均包括在第二方向DR2上依次排列的甲显示子区AA11、乙显示子区AA12、丙显示子区AA13、丁显示子区AA14以及丑显示子区AA15；甲显示子区AA11在第二方向DR2上的宽度与丑显示子区AA15在第二方向DR2上的宽度相等，波形调整模块100在甲显示子区AA11中的密度与波形调整模块100在丑显示子区AA15中的密度相等；乙显示子区AA12在第二方向DR2上的宽度与丁显示子区AA14在第二方向DR2上的宽度相等，波形调整模块100在乙显示子区AA12中的密度与波形调整模块100在丁显示子区AA14中的密度相等；且波形调整模块100在甲显示子区AA11中的密度、波形调整模块100在乙显示子区AA12中的密度以及波形调整模块100在丙显示子区AA13中的密度依次增加；多个第二显示子区包括在第二方向DR2上依次排列的天显示子区AA24、干显示子区AA23、地显示子区AA22以及支显示子区AA21；天显示子区AA24在第二方向DR2上的宽度与支显示子区AA21在第二方向DR2上的宽度相等，波形调整模块100在天显示子区AA24中的密度与波形调整模块100在支显示子区AA21中的密度相等；干显示子区AA23在第二方向DR2上的宽度与地显示子区AA22在第二方向DR2上的宽度相等，波形调整模块100在干显示子区AA23中的密度与波形调整模块100在地显示子区AA22中的密度相等。
在其中一个实施例中，支显示子区AA21在第二方向DR2上的宽度大于丑显示子区AA15在第二方向DR2上的宽度，波形调整模块100在支显示子区AA21中的密度大于波形调整模块100在丑显示子区AA15中的密度；地显示子区AA22在第二方向DR2上的宽度大于丁显示子区AA14在第二方向DR2上的宽度，波形调整模块100在地显示子区AA22中的密度大于波形调整模块100在丁显示子区AA14中的密度。
在其中一个实施例中，本实施例提供一种显示装置，该显示装置包括至少一实施例中的显示面板，每条扫描线用于传输对应的扫描信号，波形调整模块100用于在正向扫描或者反向扫描的过程中提高扫描信号的结束沿的垂直度。
可以理解的是，本实施例提供的显示装置，通过在栅极驱动电路配置不同的各显示分区中构造波形调整模块100的差异化密度，不仅能够改善扫描信号在显示面板内延迟较大的技术问题，还能够使得扫描信号在显示区AA的不同位置具有相同或者相似的延迟，这有利于提高显示的均匀性。
可以理解的是，由于本实施例提供的显示装置包括了上述至少一实施例中的显示面板，同样能够通过第N-1条扫描线G（N-1）、第N+1条扫描线G（N+1）、电位传输线VL、正向扫描控制线U2D以及反向扫描控制线D2U对波形调整模块100的控制，可以在正向扫描或者反向扫描的过程中减小扫描信号的结束沿的持续时长，进而能够改善扫描信号在显示面板内延迟较大的技术问题；这有利于提高显示面板中各像素的充电时间或者有利于提高显示面板的刷新频率，进而有利于推进显示面板的高频显示和/或高分辨率的发展。
又，该显示面板及显示装置既可以在正向扫描的过程中改善扫描信号的延迟问题，还可以在反向扫描的过程中改善扫描信号的延迟问题，为显示面板的装配提供了更大的自由度。
需要进行说明的是，上述显示面板可以为液晶显示面板，也可以为自发光型显示面板，例如，有机发光二极管显示面板、迷你发光二极管显示面板、微发光二极管显示面板或者量子点发光二极管显示面板等。
基于上述分析，本实施例又提供一种显示面板，请参阅图1至图18，该显示面板包括在显示区AA中的多个波形调整模块100，显示区AA的两侧设置有至少一个栅极驱动电路，波形调整模块100在远离栅极驱动电路的区域中的分布密度大于波形调整模块100在靠近栅极驱动电路的区域中的分布密度。
可以理解的是，本实施例提供的显示面板，通过在距离栅极驱动电路更远的显示区AA中构造分布密度更大的波形调整模块100，不仅能够改善扫描信号在显示面板内延迟较大的技术问题，还能够使得扫描信号在显示区AA的不同位置具有相同或者相似的延迟，这有利于提高显示的均匀性。
需要进行说明的是，分布密度是指某一区域中波形调整模块100的数量与该区域的面积之比。
在其中一个实施例中，显示区AA包括第一显示分区AA1和第二显示分区AA2，第一显示分区AA1的有效显示宽度大于第二显示分区AA2的有效显示宽度；第一显示分区AA1包括多个第一子区AA19；第二显示分区AA2包括多个第二子区AA29。
需要进行说明的是，有效显示宽度是指显示面板可以用于显示的区域的宽度。其中，每个第一子区AA19均可以进行显示且在有效显示宽度的方向上连续排布。多个第二子区AA29在有效显示宽度的方向上可以是连续排布的，也可以是非连续排布的。
其中，波形调整模块100在同一第一子区AA19或者第二子区AA29中的不同区域中具有相同的分布密度，也就是说，波形调整模块100在同一第一子区AA19或者第二子区AA29中是均匀分布的。
在其中一个实施例中，如图8所示，显示区AA的两侧分别设置栅极驱动电路，第一显示分区AA1从左至右的宽度与第二显示分区AA2从左至右的宽度一致；波形调整模块100在最远离栅极驱动电路的第一子区AA19中的分布密度大于波形调整模块100在最远离栅极驱动电路的第二子区AA29中的分布密度。
需要进行说明的是，图8中的挖空区域也可以作为一个第二子区AA29，此种情况下，波形调整模块100在该挖空区域中的分布密度可以为零。
在其中一个实施例中，如图10、图11所示，第一显示分区AA1的两侧分别设置栅极驱动电路，第二显示分区AA2的两侧中的一个设置栅极驱动电路；波形调整模块100在最远离栅极驱动电路的第一子区AA19中的分布密度小于波形调整模块100在最远离栅极驱动电路的第二子区AA29中的分布密度。
需要进行说明的是，距离栅极驱动电路越远的区域中扫描信号的延迟越严重，因此，配置分布密度更大的波形调整模块100，可以更好的校正扫描信号的延迟情况，也可以更好地将扫描信号在显示区AA中的波形调整为一致。
在其中一个实施例中，波形调整模块100在远离栅极驱动电路的第一子区AA19中的分布密度与在靠近栅极驱动电路的第一子区AA19中的分布密度之差为第一差值，波形调整模块100在远离栅极驱动电路的第二子区AA29中的分布密度与在靠近栅极驱动电路的第二子区AA29中的分布密度之差为第二差值，第一差值大于第二差值。
需要进行说明的是，由于第一显示分区AA1、第二显示分区AA2的有效显示宽度不一致，因此，本实施例可以使得扫描信号在第一显示分区AA1、第二显示分区AA2中的延迟更为一致，有利于提高显示均一性。
在其中一个实施例中，如图16至图18所示，显示面板还包括与波形调整模块100电连接的扫描线、正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL，扫描线自栅极驱动电路延伸至显示区AA，正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL中的至少一种从与栅极驱动电路的不同侧的非显示区延伸至显示区AA。
需要进行说明的是，非显示区可以包括左边框区NA1、右边框区NA2、上边框区NA3以及下边框区NA4中的至少一个。各栅极驱动电路可以位于左边框区NA1和/或边框区。本实施构造正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL中的至少一种从上边框区NA3和/或下边框区NA4延伸至显示区AA，可以避免影响扫描线的原有分布情况。其中，正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL中的至少一种在非显示区中可以至少部分地环绕显示区AA进行延伸。
在其中一个实施例中，如图16所示，在同一宽度范围WF中，波形调整模块100在第一子区AA19中的分布密度大于波形调整模块100在第二子区AA29中的分布密度；显示面板还包括与波形调整模块100电连接的正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42，正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42中的至少一种从与栅极驱动电路的不同侧且靠近第一显示分区AA1的非显示区延伸至对应的第一子区AA19中。
需要进行说明的是，在波形调整模块100在第一子区AA19中的分布密度足够大的情况下，显示面板中固定配置的正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL在数量上会无法满足需求，这需要增加正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42以分别弥补正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL的数量不足的问题。
本实施例中的正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42可以从上边框区NA3延伸至对应的第一子区AA19中，既减少了对应信号的传输路径，也不会对第二显示分区AA2造成影响。
在其中一个实施例中，如图17所示，在同一宽度范围WF中，波形调整模块100在第一子区AA19中的分布密度小于波形调整模块100在第二子区AA29中的分布密度；显示面板还包括与波形调整模块100电连接的正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42，正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42中的至少一种从与栅极驱动电路的不同侧且靠近第二显示分区AA2的非显示区延伸至对应的第一子区AA19中。
需要进行说明的是，在波形调整模块100在第二子区AA29中的分布密度足够大的情况下，显示面板中固定配置的正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL在数量上会无法满足需求，这需要增加正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42以分别弥补正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL的数量不足的问题。
本实施例中的正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42可以从下边框区NA4延伸至对应的第二子区AA29中，既减少了对应信号的传输路径，也不会对第一显示分区AA1造成影响。
在其中一个实施例中，如图9、图18所示，第二显示分区AA2位于两个第一显示分区AA1之间；在同一宽度范围WF中，波形调整模块100在第一子区AA19中的分布密度小于波形调整模块100在第二子区AA29中的分布密度；显示面板还包括与波形调整模块100电连接的正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42，正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42中的至少一种从与栅极驱动电路的不同侧且靠近第一显示分区AA1的非显示区经第一显示分区AA1延伸至对应的第二子区AA29中；其中，正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42中的至少一种在第一显示分区AA1中的分支数量少于在第二显示分区AA2中的分支数量。
需要进行说明的是，在波形调整模块100在第二子区AA29中的分布密度足够大的情况下，显示面板中固定配置的正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL在数量上会无法满足需求，这需要增加正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42以分别弥补正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL的数量不足的问题。
然而，由于正向扫描控制增补线41、反向扫描控制增补线43以及电位传输增补线42不便于从左边框区NA1和/或右边框区NA2延伸至第二显示分区AA2，这种情况下，只有从上边框区NA3和/或下边框区NA4经第一显示分区AA1延伸至对应的第二子区AA29中，本实施例将正向扫描控制增补线41/反向扫描控制增补线43/电位传输增补线42从在第一显示分区AA1中的一个分支分为在第二显示分区AA2中的多个分支，这可以对第一显示分区AA1造成的影响最小化，并满足对应第二子区AA29的需求。
在另外一个实施例中，第二子区AA29中不同波形调整模块100之间可以共用正向扫描控制线U2D、反向扫描控制线D2U以及电位传输线VL中的至少一种，同样可以满足更多个波形调整模块100的需要。
需要进行说明的是，图16至图18所示的显示面板既可以是矩形的显示屏，也可以是各种异形屏，例如，上述记载的具有挖空区域或者缺角的显示屏。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (20)

  1. 一种显示面板，所述显示面板包括在显示区中的多个波形调整模块，所述显示区的两侧设置有至少一个栅极驱动电路，所述波形调整模块在远离所述栅极驱动电路的区域中的分布密度大于所述波形调整模块在靠近所述栅极驱动电路的区域中的分布密度。
  2. 根据权利要求1所述的显示面板，其中，所述显示区包括第一显示分区和第二显示分区，所述第一显示分区的有效显示宽度大于所述第二显示分区的有效显示宽度；所述第一显示分区包括多个第一子区；所述第二显示分区包括多个第二子区。
  3. 根据权利要求2所述的显示面板，其中，所述显示区的两侧分别设置栅极驱动电路，所述第一显示分区从左至右的宽度与所述第二显示分区从左至右的宽度一致；
    所述波形调整模块在最远离所述栅极驱动电路的第一子区中的分布密度大于所述波形调整模块在最远离所述栅极驱动电路的第二子区中的分布密度。
  4. 根据权利要求2所述的显示面板，其中，所述第一显示分区的两侧分别设置栅极驱动电路，所述第二显示分区的两侧中的一个设置栅极驱动电路；
    所述波形调整模块在最远离所述栅极驱动电路的第一子区中的分布密度小于所述波形调整模块在最远离所述栅极驱动电路的第二子区中的分布密度。
  5. 根据权利要求2所述的显示面板，其中，所述波形调整模块在远离栅极驱动电路的第一子区中的分布密度与在靠近栅极驱动电路的第一子区中的分布密度之差为第一差值，所述波形调整模块在远离栅极驱动电路的第二子区中的分布密度与在靠近栅极驱动电路的第二子区中的分布密度之差为第二差值，所述第一差值大于所述第二差值。
  6. 根据权利要求2所述的显示面板，其中，所述显示面板还包括与所述波形调整模块电连接的扫描线、正向扫描控制线、反向扫描控制线以及电位传输线，所述扫描线自栅极驱动电路延伸至所述显示区，所述正向扫描控制线、所述反向扫描控制线以及所述电位传输线中的至少一种从与栅极驱动电路的不同侧的非显示区延伸至所述显示区。
  7. 根据权利要求6所述的显示面板，其中，在同一宽度范围中，所述波形调整模块在第一子区中的分布密度大于所述波形调整模块在第二子区中的分布密度；
    所述显示面板还包括与所述波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近所述第一显示分区的非显示区延伸至对应的第一子区中。
  8. 根据权利要求6所述的显示面板，其中，在同一宽度范围中，所述波形调整模块在第一子区中的分布密度小于所述波形调整模块在第二子区中的分布密度；
    所述显示面板还包括与所述波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近所述第二显示分区的非显示区延伸至对应的第一子区中。
  9. 根据权利要求6所述的显示面板，其中，所述第二显示分区位于两个所述第一显示分区之间；在同一宽度范围中，所述波形调整模块在第一子区中的分布密度小于所述波形调整模块在第二子区中的分布密度；
    所述显示面板还包括与所述波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近所述第一显示分区的非显示区经所述第一显示分区延伸至对应的第二子区中；
    其中，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种在所述第一显示分区中的分支数量少于在所述第二显示分区中的分支数量。
  10. 一种显示装置，所述显示装置包括如权利要求1所述的显示面板，所述波形调整模块用于在正向扫描或者反向扫描的过程中提高扫描信号的结束沿的垂直度。
  11. 根据权利要求10所述的显示装置，其中，所述显示区包括第一显示分区和第二显示分区，所述第一显示分区的有效显示宽度大于所述第二显示分区的有效显示宽度；所述第一显示分区包括多个第一子区；所述第二显示分区包括多个第二子区。
  12. 根据权利要求11所述的显示装置，其中，所述显示区的两侧分别设置栅极驱动电路，所述第一显示分区从左至右的宽度与所述第二显示分区从左至右的宽度一致；
    所述波形调整模块在最远离所述栅极驱动电路的第一子区中的分布密度大于所述波形调整模块在最远离所述栅极驱动电路的第二子区中的分布密度。
  13. 根据权利要求11所述的显示装置，其中，所述第一显示分区的两侧分别设置栅极驱动电路，所述第二显示分区的两侧中的一个设置栅极驱动电路；
    所述波形调整模块在最远离所述栅极驱动电路的第一子区中的分布密度小于所述波形调整模块在最远离所述栅极驱动电路的第二子区中的分布密度。
  14. 根据权利要求11所述的显示装置，其中，所述波形调整模块在远离栅极驱动电路的第一子区中的分布密度与在靠近栅极驱动电路的第一子区中的分布密度之差为第一差值，所述波形调整模块在远离栅极驱动电路的第二子区中的分布密度与在靠近栅极驱动电路的第二子区中的分布密度之差为第二差值，所述第一差值大于所述第二差值。
  15. 根据权利要求11所述的显示装置，其中，所述显示面板还包括与所述波形调整模块电连接的扫描线、正向扫描控制线、反向扫描控制线以及电位传输线，所述扫描线自栅极驱动电路延伸至所述显示区，所述正向扫描控制线、所述反向扫描控制线以及所述电位传输线中的至少一种从与栅极驱动电路的不同侧的非显示区延伸至所述显示区。
  16. 根据权利要求15所述的显示装置，其中，在同一宽度范围中，所述波形调整模块在第一子区中的分布密度大于所述波形调整模块在第二子区中的分布密度；
    所述显示面板还包括与所述波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近所述第一显示分区的非显示区延伸至对应的第一子区中。
  17. 根据权利要求15所述的显示装置，其中，在同一宽度范围中，所述波形调整模块在第一子区中的分布密度小于所述波形调整模块在第二子区中的分布密度；
    所述显示面板还包括与所述波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近所述第二显示分区的非显示区延伸至对应的第一子区中。
  18. 根据权利要求15所述的显示装置，其中，所述第二显示分区位于两个所述第一显示分区之间；在同一宽度范围中，所述波形调整模块在第一子区中的分布密度小于所述波形调整模块在第二子区中的分布密度；
    所述显示面板还包括与所述波形调整模块电连接的正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种从与栅极驱动电路的不同侧且靠近所述第一显示分区的非显示区经所述第一显示分区延伸至对应的第二子区中；
    其中，所述正向扫描控制增补线、反向扫描控制增补线以及电位传输增补线中的至少一种在所述第一显示分区中的分支数量少于在所述第二显示分区中的分支数量。
  19. 根据权利要求10所述的显示装置，其中，所述波形调整模块包括第一晶体管、第二晶体管以及第三晶体管，所述第一晶体管的第一极与反向扫描控制线电连接，所述第一晶体管的栅极与第N-1条扫描线电连接；所述第二晶体管的第一极与正向扫描控制线电连接，所述第二晶体管的栅极与第N+1条扫描线电连接；所述第三晶体管的栅极与所述第一晶体管的第二极、所述第二晶体管的第二极电连接，所述第三晶体管的第一极与电位传输线电连接，所述第三晶体管的第二极与第N条扫描线电连接。
  20. 根据权利要求10所述的显示装置，其中，所述波形调整模块包括第四晶体管、第五晶体管、第六晶体管以及第七晶体管，所述第四晶体管的第一极与电位传输线电连接，所述第四晶体管的栅极与正向扫描控制线电连接；所述第五晶体管的第一极与第四晶体管的第二极电连接，所述第五晶体管的栅极与第N+1条扫描线电连接，所述第五晶体管的第二极与第N条扫描线电连接；所述第六晶体管的第一极与所述第四晶体管的第一极电连接，所述第六晶体管的栅极与反向扫描控制线电连接；所述第七晶体管的第一极与所述第六晶体管的第二极电连接，所述第七晶体管的栅极与第N-1条扫描线电连接，所述第七晶体管的第二极与第N条扫描线电连接。
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