WO2020034380A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2020034380A1
WO2020034380A1 PCT/CN2018/110140 CN2018110140W WO2020034380A1 WO 2020034380 A1 WO2020034380 A1 WO 2020034380A1 CN 2018110140 W CN2018110140 W CN 2018110140W WO 2020034380 A1 WO2020034380 A1 WO 2020034380A1
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WO
WIPO (PCT)
Prior art keywords
sub
driving circuit
pixels
display panel
width
Prior art date
Application number
PCT/CN2018/110140
Other languages
English (en)
French (fr)
Inventor
刘婕
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/326,205 priority Critical patent/US20200143764A1/en
Publication of WO2020034380A1 publication Critical patent/WO2020034380A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a display device.
  • GOA Gate Driver On Array
  • the driving process of the horizontal scanning lines can be made on the substrate around the display area by using the array process of the display panel, so that it can replace the external chip to complete the driving of the horizontal scanning lines.
  • each group of driving circuits on the display panel controls one row of pixels by scanning lines.
  • each group of driving circuits controls fewer pixels and has a smaller load.
  • each group of driving circuits controls more pixels and has a larger load.
  • the present application provides a display panel and a display device to solve the problem of abnormal display caused by different pixels of different rows of the display panel and improve the display effect.
  • the present application provides a display panel including:
  • each of the driving circuits is connected to the corresponding sub-pixel through a scanning line, and each of the driving circuits includes at least one enable An output transistor, the enable output transistor is configured to provide an enable scan signal to the sub-pixel corresponding to the driving circuit;
  • the driving circuit includes a first driving circuit and a second driving circuit.
  • a width of the enable output transistor corresponding to the first drive circuit is smaller than a width of the enable output transistor corresponding to the second drive circuit;
  • the display area includes a shaped area and a non-shaped area, and a width of an enable output transistor of the driving circuit corresponding to a sub-pixel of the shaped area is smaller than that of the driving circuit corresponding to a sub-pixel of the non-shaped area.
  • the width of the transistor can be output; the driving circuit is located on two opposite sides of the non-display area.
  • the widths of the enable output transistors in each of the driving circuits corresponding to the sub-pixels in the non-shaped region are equal.
  • each of the driving circuits is sequentially arranged along the second direction;
  • the special-shaped area includes a plurality of sub-shaped areas, and along the second direction, the number of rows of sub-pixels in each of the sub-shaped areas increases from area to area, and in the driving circuit corresponding to each of the sub-shaped areas, The width of the enable output transistors increases in sequence.
  • the display panel is a closed graphic including at least one of a circle, an oval, a polygon, and a graphic including an arc.
  • a ratio of the number of the sub-pixels driven by the first driving circuit to the number of the sub-pixels driven by the second driving circuit is equal to that corresponding to the first driving circuit.
  • the enable output transistor is an N-type thin film transistor or a P-type thin film transistor.
  • the display panel further includes: a plurality of data lines located in a display area, the plurality of data lines extending along the second direction and arranged along the first direction, and a plurality of the data lines A data line is connected to a plurality of the sub-pixels.
  • the present application also provides a display panel, which includes:
  • each of the driving circuits is connected to the corresponding sub-pixel through a scanning line, and each of the driving circuits includes at least one enable An output transistor, the enable output transistor is configured to provide an enable scan signal to the sub-pixel corresponding to the driving circuit;
  • the driving circuit includes a first driving circuit and a second driving circuit.
  • the width of the enable output transistor corresponding to the first drive circuit is smaller than the width of the enable output transistor corresponding to the second drive circuit.
  • the display area includes a shaped area and a non-shaped area, and a width of an enable output transistor of the driving circuit corresponding to a sub-pixel of the shaped area is smaller than that of the non-shaped area.
  • the width of the corresponding enable output transistor of the driving circuit is smaller than that of the non-shaped area.
  • the widths of the enable output transistors in each of the driving circuits corresponding to the sub-pixels in the non-shaped region are equal.
  • each of the driving circuits is sequentially arranged along the second direction;
  • the special-shaped area includes a plurality of sub-shaped areas, and along the second direction, the number of rows of sub-pixels in each of the sub-shaped areas increases from area to area, and in the driving circuit corresponding to each of the sub-shaped areas, The width of the enable output transistors increases in sequence.
  • the display panel is a closed graphic including at least one of a circle, an oval, a polygon, and a graphic including an arc.
  • a ratio of the number of the sub-pixels driven by the first driving circuit to the number of the sub-pixels driven by the second driving circuit is equal to that corresponding to the first driving circuit.
  • the driving circuit is located on two opposite sides of the non-display area.
  • the enable output transistor is an N-type thin film transistor or a P-type thin film transistor.
  • the display panel further includes: a plurality of data lines located in a display area, the plurality of data lines extending along the second direction and arranged along the first direction, and a plurality of the data lines A data line is connected to a plurality of the sub-pixels.
  • the present application further provides a display device including a display panel, the display panel including:
  • each of the driving circuits is connected to the corresponding sub-pixel through a scanning line, and each of the driving circuits includes at least one enable An output transistor, the enable output transistor is configured to provide an enable scan signal to the sub-pixel corresponding to the driving circuit;
  • the driving circuit includes a first driving circuit and a second driving circuit.
  • the width of the enable output transistor corresponding to the first drive circuit is smaller than the width of the enable output transistor corresponding to the second drive circuit.
  • the display region includes a shaped region and a non-shaped region, and a width of an enable output transistor of the driving circuit corresponding to a sub-pixel of the shaped region is smaller than a sub-pixel of the non-shaped region. The width of the corresponding enable output transistor of the driving circuit.
  • the widths of the enable output transistors in each of the driving circuits corresponding to the sub-pixels in the non-shaped region are equal.
  • each of the driving circuits is sequentially arranged along the second direction;
  • the special-shaped area includes a plurality of sub-shaped areas, and along the second direction, the number of rows of sub-pixels in each of the sub-shaped areas increases from area to area, and in the driving circuit corresponding to each of the sub-shaped areas, The width of the enable output transistors increases in sequence.
  • the beneficial effect of the present application is that the number of sub-pixels driven by the first driving circuit is smaller than the number of sub-pixels driven by the second driving circuit, and the width of the enable output transistor corresponding to the first driving circuit is smaller than that of the second driving circuit.
  • the width of the corresponding enable output transistor, the scan signals output by the different drive circuits are loaded on the pixels through the scan lines, and the delay time (ie, the delay time with load) of the scan signals output by the first drive circuit to the corresponding scan lines and the The delay time (that is, the delay time with a load) of the scanning signals output by the two driving circuits to the corresponding scanning lines is equal, or nearly equal, that is, the delay time of the scanning signals received by each row of pixels on the display panel is close, which can solve the scanning of different areas.
  • the delay time of the scanning signals on the line is relatively large, and problems such as display abnormalities occur, improving the display effect.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of another display panel according to an embodiment of the present application.
  • FIG. 3 is a specific circuit diagram of a first sub-driving circuit in a driving circuit according to an embodiment of the present application
  • FIG. 4 is another specific circuit diagram of a second sub-driving circuit in a driving circuit according to an embodiment of the present application.
  • An embodiment of the present application provides a display panel including: a plurality of scan lines located in a display area, the plurality of scan lines extending in a first direction and aligned in a second direction, and a plurality of sub-pixels connected to the plurality of scan lines , The first direction and the second direction intersect; multiple driving circuits located in the non-display area surrounding the display area, each driving circuit is connected to the corresponding sub-pixel through a scanning line, and each driving circuit includes at least one enable An output transistor is used to provide an enable scanning signal to a sub-pixel corresponding to the driving circuit.
  • the driving circuit includes a first driving circuit and a second driving circuit.
  • the width of the enabled output transistor corresponding to the first driving circuit is smaller than the width of the enabled output transistor corresponding to the second driving circuit.
  • the first driving circuit and the second driving circuit in the embodiment of the present application are only used to distinguish the number of driven sub-pixels; that is, essentially, the driving circuit mentioned in the embodiment of the present application may be It is a first driving circuit, and it may be a second driving circuit.
  • the width of the enable transistor mentioned in the embodiment of the present application refers to the width of the conductive channel of the enable transistor.
  • the ratio of the number of sub-pixels driven by the first driving circuit to the number of sub-pixels driven by the second driving circuit is equal to the width of the enable output transistor corresponding to the first driving circuit and the enabling corresponding to the second driving circuit The ratio of the width of the output transistor.
  • the width of the enable output transistor corresponding to different driving circuits is controlled, so as to solve the problem caused by the display.
  • the pixels of different rows of the panel are different, which causes the problem of abnormal display and improves the display effect.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • the display panel 10 includes:
  • the plurality of scan lines 101 extend along the first direction X and are arranged along the second direction Y.
  • the plurality of data lines 102 extend along the second direction Y and follow
  • the first direction X is aligned and a plurality of sub-pixels connected to the plurality of scanning lines 101 and the plurality of data lines 102; wherein the first direction X intersects the second direction Y; for example, the first direction X and the second direction Y are perpendicular .
  • each driving circuit 13 is connected to a corresponding sub-pixel through a scanning line 101;
  • the display area 11 includes a shaped area 111 and a non-shaped area 112, and a shaped area 111
  • the width of the enabled output transistor of the driving circuit 13 corresponding to the sub-pixel is smaller than the width of the enabled output transistor of the driving circuit 13 corresponding to the sub-pixel of the non-shaped region 112.
  • the ratio of the number of sub-pixels driven by a driving circuit 13 of the special-shaped region 111 to the number of sub-pixels of a driving circuit 13 of the non-shaped region 112 is equal to the corresponding enable of a driving circuit 13 of the special-shaped region 111.
  • the widths of the enabled output transistors in each driving circuit 13 corresponding to the sub-pixels in the non-shaped region 112 are equal. .
  • each driving circuit 13 is sequentially arranged along the second direction Y;
  • the special-shaped area 111 includes a plurality of sub-shaped areas, and along the second direction Y, the number of rows of sub-pixels in each sub-shaped area increases from area to area, The widths of the enable output transistors in the driving circuit 13 corresponding to the sub-pixels in each sub-shaped area are sequentially increased.
  • FIG. 2 is a schematic structural diagram of another display panel according to an embodiment of the present application.
  • FIG. 2 shows a partial structure of the display panel. Based on the above embodiment, along the second direction Y, each driving circuit 13 is arranged in sequence;
  • the special-shaped area 111 includes a plurality of sub-shaped areas, such as a first sub-shaped area 201, a second sub-shaped area 202, and a third sub-shaped area 203.
  • the number of rows of sub-pixels in each sub-shaped region increases from region to region, and the width of the enable output transistor in the driving circuit 13 corresponding to the sub-pixel in each sub-shaped region increases sequentially.
  • the number of sub-pixels in each row of the third sub-shaped area 203 is greater than the number of sub-pixels in each line in the second sub-shaped area 202, and the number of sub-pixels in each row in the second sub-shaped area 202 is greater than The number of sub-pixels in each row in the first sub-shaped area 201.
  • the width of the enabled output transistor in the driving circuit corresponding to the third sub-shaped area 203 sub-pixel is greater than the width of the enabled output transistor in the driving circuit corresponding to the second sub-shaped area 202 sub-pixel; the second sub-shaped area 202 sub-pixel
  • the width of the enable output transistor in the corresponding drive circuit is greater than the width of the enable output transistor in the drive circuit corresponding to the first sub-shaped region 201 sub-pixel. In this way, the delay time of the driving circuit corresponding to the sub-pixel in the first sub-shaped area 201 can be greater than the delay time of the driving circuit corresponding to the sub-pixel in the second sub-shaped area 202, and the driving corresponding to the sub-pixel in the second sub-shaped area 202 can be realized.
  • the delay time of the circuit is greater than the delay time of the driving circuit corresponding to the sub-pixels of the third sub-shaped area 203, and the number of sub-pixels per line of the first sub-shaped area 201, the number of sub-pixels per line of the second sub-shaped area 202, and The third sub-shaped area 203 has a different number of sub-pixels in each row and causes a display abnormality problem, which improves the uniformity of the display and the display effect.
  • one row of sub-pixels in the shaped region may constitute a sub-shaped region, or a plurality of adjacent rows of sub-pixels with the same number of sub-pixels in each row may form a sub-shaped region. It can be divided according to the structure of the display panel.
  • each driving circuit 13 includes at least one enable output transistor, and the enable output transistor is configured to provide a scanning signal to a sub-pixel corresponding to the drive circuit 13.
  • the width of the enable output transistor of the driving circuit 13 corresponding to the sub-pixel of the special-shaped region 111 is smaller than the width of the enable output transistor of the driving circuit 13 corresponding to the sub-pixel of the non-shaped region 112.
  • the width of the transistor is the width of the conductive channel of the transistor.
  • the larger the width of the transistor the stronger the driving ability, that is, the stronger the ability to carry a load, the less easily the output signal is affected by the load.
  • the driving circuit provided in the implementation of the present application includes a first sub-driving circuit and a second sub-driving circuit, and the first sub-driving circuit and the second sub-driving circuit are configured to jointly drive the display panel to work.
  • the driving circuit mentioned in the embodiment of the present application includes a first sub-driving circuit and a second sub-driving circuit; that is, the first sub-driving circuit and the second sub-driving circuit in the embodiment of the present application are both driving circuits. a part of.
  • FIG. 3 is a specific circuit diagram of a first sub-driving circuit in a driving circuit provided by an embodiment of the present application.
  • the first sub-driving circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and an eighth transistor.
  • the sixth transistor T6 and the seventh transistor T7 are output transistors of the driving circuit.
  • the sixth transistor T6 and the seventh transistor T7 are turned on or off according to the voltage of the gate. When the sixth transistor T6 is turned on, a clock signal is input.
  • the signal input from the terminal CK is transmitted to the output terminal of the driving circuit, and the seventh transistor T7 will not be turned on at this time. Because only when the sixth transistor T6 is turned on, the signal input from the clock signal input terminal is transmitted to the output terminal of the driving circuit, and then to the scanning line, and the sub-pixels connected to the scanning line are charged, so the sixth transistor T6 is the driving circuit. When the sixth transistor T6 is turned on, the first transistor is output to the scan line control sub-pixel for charging.
  • the width of the enable output transistor of the first sub-driving circuit corresponding to the sub-pixel in the special-shaped region 111 is smaller than that of the first sub-driving circuit corresponding to the sub-pixel in the non-shaped region 112. The width of the output transistor.
  • FIG. 4 is a specific circuit diagram of a second sub-driving circuit in a driving circuit according to an embodiment of the present application.
  • the second sub-driving circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and an eighth transistor.
  • the ninth transistor T9 and the tenth transistor T10 are output transistors of the driving circuit.
  • the ninth transistor T9 and the tenth transistor T10 are turned on or off according to the voltage of their gates.
  • the ninth transistor T9 When the ninth transistor T9 is turned on, the low level The signal input from the signal input terminal L is transmitted to the output terminal of the driving circuit.
  • the tenth transistor T10 When the tenth transistor T10 is turned on, the signal input from the high-level signal input terminal H is transmitted to the output terminal of the driving circuit. Because only when the tenth transistor T10 is turned on, the signal input from the high-level signal input terminal is transmitted to the output terminal of the driving circuit, and then to the scanning line, and the sub-pixels connected to the scanning line are charged, so the tenth transistor T10 is When the enable transistor of the driving circuit is turned on, the tenth transistor T10 outputs a second enable scan signal to the scan line control sub-pixel for charging.
  • the width of the enable output transistor of the second sub-driving circuit corresponding to the sub-pixel of the special-shaped region 111 and the second sub-driving circuit corresponding to the sub-pixel of the non-shaped region 112 are enabled.
  • the width of the output transistor is not limited here, but it is preferred that the width of the enable sub-pixel corresponding to the second sub-driving circuit of the sub-pixel of the special-shaped region 111 is smaller than that of the second sub-driving circuit corresponding to the sub-pixel of the non-shaped region 112. Can output the width of the transistor.
  • the enable output transistor in the embodiment of the present application may be an N-type thin film transistor or a P-type thin film transistor.
  • the driving circuit 13 of the first region 21 corresponds to the sub-pixels of the special-shaped region 111; the driving circuit 13 of the second region 22 corresponds to the sub-pixels of the non-shaped region 112.
  • the width of the enable output transistor of the driving circuit 13 corresponding to the sub-pixel of the special-shaped region 111 is smaller than the width of the enable output transistor of the driving circuit 13 corresponding to the sub-pixel of the non-shaped region 112. That is, the width of the sixth transistor T6 in the driving circuit 13 of the first region 21 is smaller than the width of the sixth transistor T6 in the driving circuit 13 of the second region 22.
  • the width of the driving circuit 13 of the first region 21 is relatively small, so the output driving capability of the driving circuit of the first region 21 is relatively weak. In this way, the delay time of the driving circuit 13 corresponding to the sub-pixel of the irregular region 111 is large, and the irregular region The delay time of the driving circuit 12 corresponding to the sub-pixel of 111 will be greater than the delay time of the driving circuit 13 corresponding to the sub-pixel of the non-shaped region 112. It can solve the problem of uneven display caused by the different number of sub-pixels in each row of the irregular-shaped area and the non-shaped area, and improve the display effect.
  • the driving circuit may be located on opposite sides of the non-display area.
  • the irregular-shaped area 111 shown in FIG. 1 is notched, and the scanning line 101 is disconnected at the notch.
  • the shift register 13 is disposed on two opposite sides of the non-display area 12 to provide a scanning signal to the irregular-shaped area 111 scanning line 101.
  • the display panel is a closed graphic including at least one of a circle, an oval, a polygon, and a graphic including an arc.
  • the special-shaped display panel in the embodiment of the present application may be a display panel with an R angle, a notch, a notch, or a circle.
  • An embodiment of the present application further provides a display device.
  • the display device includes the display panel described above. For details, refer to the foregoing, and details are not described herein.

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种显示面板（10）及显示装置，包括：多条扫描线（101）；多个子像素；多个驱动电路（13），每个驱动电路（13）均包括使能输出晶体管；驱动电路包括第一驱动电路和第二驱动电路，当第一驱动电路驱动的子像素小于第二驱动电路驱动的子像素时，第一驱动电路对应的使能输出晶体管的宽度小于第二驱动电路对应的使能输出晶体管的宽度。

Description

显示面板及显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及显示装置。
 背景技术
GOA(Gate Driver on Array )技术即阵列基板行驱动技术，可以运用显示面板的阵列制程将水平扫描线的驱动电路制作在显示区周围的基板上，使之能替代外接芯片来完成水平扫描线的驱动。另外，随着用户对显示面板显示需求越来越多样化，对显示面板的外形有了更高的要求。
现有出现的异形显示面板，比如对于带R角，槽口或切口(notch)，圆形等异形显示装置。例如在notch处每行像素个数与非notch处每行像素个数不同，不同行像素的连接的扫描线上的负载(电阻电容负载)不同。显示面板上的每组驱动电路通过扫描线控制一行像素，在notch处，每组驱动电路控制较少的像素个数，负载较小。而非notch处，每组驱动电路控制较多的像素个数，负载较大。当扫描线上的扫描信号向显示区的像素传递时，对应每一行像素的驱动信号延迟存在差异，造成显示异常，例如由于驱动信号延迟存在差异，异形显示区的像素的充电时长和非异形显示区的充电时长不一致，造成显示不均。
 技术问题
本申请提供一种显示面板及显示装置，以解决因显示面板的不同行的像素不同，引起显示异常的问题，提高显示效果。
 技术解决方案
本申请提供一种显示面板，其包括：
位于显示区的多条扫描线，多条所述扫描线沿第一方向延伸并沿第二方向排列，以及连接到多条所述扫描线上的多个子像素，所述第一方向和所述第二方向交叉；
位于围绕所述显示区的非显示区的多个驱动电路，每个所述驱动电路通过一条所述扫描线与对应的所述子像素连接，且每个所述驱动电路均包括至少一使能输出晶体管，所述使能输出晶体管用于向所述驱动电路对应的所述子像素提供使能扫描信号；其中，
所述驱动电路包括一第一驱动电路和一第二驱动电路，当所述第一驱动电路驱动的所述子像素的个数小于所述第二驱动电路驱动的所述子像素的个数时，所述第一驱动电路对应的使能输出晶体管的宽度小于所述第二驱动电路对应的使能输出晶体管的宽度；
所述显示区包括异形区域和非异形区域，且所述异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度小于所述非异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度；所述驱动电路位于所述非显示区相对的两侧。
在本申请的显示面板中，所述非异形区域的子像素对应的各个所述驱动电路中的所述使能输出晶体管的宽度相等。
在本申请的显示面板中，各所述驱动电路沿所述第二方向依次排布；
所述异形区域包括多个子异形区域，沿所述第二方向，各所述子异形区域中的行子像素个数逐区增多，与各所述子异形区域子像素对应的所述驱动电路中的所述使能输出晶体管的宽度依次增大。
在本申请的显示面板中，所述显示面板为包括圆形、椭圆形、多边形以及包括圆弧的图形中的至少一种的封闭图形。
在本申请的显示面板中，所述第一驱动电路驱动的所述子像素的个数与所述第二驱动电路驱动的所述子像素的个数的比值等于所述第一驱动电路对应的所述使能输出晶体管的宽度与所述第二驱动电路对应的所述使能输出晶体管的宽度的比值。
在本申请的显示面板中，所述使能输出晶体管为N型薄膜晶体管或P型薄膜晶体管。
在本申请的显示面板中，所述显示面板还包括：位于显示区的多条数据线，多条所述数据线沿所述第二方向延伸并沿所述第一方向排列，多条所述数据线与多个所述子像素连接。
本申请还提供一种显示面板，其包括：
位于显示区的多条扫描线，多条所述扫描线沿第一方向延伸并沿第二方向排列，以及连接到多条所述扫描线上的多个子像素，所述第一方向和所述第二方向交叉；
位于围绕所述显示区的非显示区的多个驱动电路，每个所述驱动电路通过一条所述扫描线与对应的所述子像素连接，且每个所述驱动电路均包括至少一使能输出晶体管，所述使能输出晶体管用于向所述驱动电路对应的所述子像素提供使能扫描信号；其中，
所述驱动电路包括一第一驱动电路和一第二驱动电路，当所述第一驱动电路驱动的所述子像素的个数小于所述第二驱动电路驱动的所述子像素的个数时，所述第一驱动电路对应的使能输出晶体管的宽度小于所述第二驱动电路对应的使能输出晶体管的宽度。
在本申请的显示面板中，所述显示区包括异形区域和非异形区域，且所述异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度小于所述非异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度。
在本申请的显示面板中，所述非异形区域的子像素对应的各个所述驱动电路中的所述使能输出晶体管的宽度相等。
在本申请的显示面板中，各所述驱动电路沿所述第二方向依次排布；
所述异形区域包括多个子异形区域，沿所述第二方向，各所述子异形区域中的行子像素个数逐区增多，与各所述子异形区域子像素对应的所述驱动电路中的所述使能输出晶体管的宽度依次增大。
在本申请的显示面板中，所述显示面板为包括圆形、椭圆形、多边形以及包括圆弧的图形中的至少一种的封闭图形。
在本申请的显示面板中，所述第一驱动电路驱动的所述子像素的个数与所述第二驱动电路驱动的所述子像素的个数的比值等于所述第一驱动电路对应的所述使能输出晶体管的宽度与所述第二驱动电路对应的所述使能输出晶体管的宽度的比值。
在本申请的显示面板中，所述驱动电路位于所述非显示区相对的两侧。
在本申请的显示面板中，所述使能输出晶体管为N型薄膜晶体管或P型薄膜晶体管。
在本申请的显示面板中，所述显示面板还包括：位于显示区的多条数据线，多条所述数据线沿所述第二方向延伸并沿所述第一方向排列，多条所述数据线与多个所述子像素连接。
本申请还提供一种显示装置，其包括显示面板，所述显示面板包括：
位于显示区的多条扫描线，多条所述扫描线沿第一方向延伸并沿第二方向排列，以及连接到多条所述扫描线上的多个子像素，所述第一方向和所述第二方向交叉；
位于围绕所述显示区的非显示区的多个驱动电路，每个所述驱动电路通过一条所述扫描线与对应的所述子像素连接，且每个所述驱动电路均包括至少一使能输出晶体管，所述使能输出晶体管用于向所述驱动电路对应的所述子像素提供使能扫描信号；其中，
所述驱动电路包括一第一驱动电路和一第二驱动电路，当所述第一驱动电路驱动的所述子像素的个数小于所述第二驱动电路驱动的所述子像素的个数时，所述第一驱动电路对应的使能输出晶体管的宽度小于所述第二驱动电路对应的使能输出晶体管的宽度。
在本申请的显示装置中，所述显示区包括异形区域和非异形区域，且所述异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度小于所述非异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度。
在本申请的显示装置中，所述非异形区域的子像素对应的各个所述驱动电路中的所述使能输出晶体管的宽度相等。
在本申请的显示装置中，各所述驱动电路沿所述第二方向依次排布；
所述异形区域包括多个子异形区域，沿所述第二方向，各所述子异形区域中的行子像素个数逐区增多，与各所述子异形区域子像素对应的所述驱动电路中的所述使能输出晶体管的宽度依次增大。
 有益效果
本申请的有益效果为：由于第一驱动电路驱动的子像素的个数小于第二驱动电路驱动的子像素的个数，而第一驱动电路对应的使能输出晶体管的宽度小于第二驱动电路对应的使能输出晶体管的宽度，在不同驱动电路输出的扫描信号通过扫描线加载到像素上，第一驱动电路输出至相应扫描线的扫描信号的延迟时间(即带负载的延迟时间)和第二驱动电路输出至相应扫描线的扫描信号的延迟时间(即带负载的延迟时间)相等，或者接近相等，即显示面板上每行像素接收到的扫描信号的延迟时间接近，可以解决不同区域扫描线上的扫描信号延迟时间相差比较大，而出现的显示异常等问题，提高显示效果。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的一种显示面板的结构示意图；
图2为本申请实施例提供的另一种显示面板的结构示意图；
图3为本申请实施例提供的一种驱动电路中第一子驱动电路的具体电路图；
图4为本申请实施例提供的一种驱动电路中第二子驱动电路的另一具体电路图。
 本发明的实施方式
以上对本申请实施例提供的液晶显示组件进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请。同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
本申请实施例提供一种显示面板，其包括：位于显示区的多条扫描线，多条扫描线沿第一方向延伸并沿第二方向排列，以及连接到多条扫描线上的多个子像素，第一方向和第二方向交叉；位于围绕显示区的非显示区的多个驱动电路，每个驱动电路通过一条扫描线与对应的子像素连接，且每个驱动电路均包括至少一使能输出晶体管，使能输出晶体管用于向驱动电路对应的子像素提供使能扫描信号；其中，驱动电路包括一第一驱动电路和一第二驱动电路，当第一驱动电路驱动的子像素的个数小于第二驱动电路驱动的子像素的个数时，第一驱动电路对应的使能输出晶体管的宽度小于第二驱动电路对应的使能输出晶体管的宽度。需要说明的是，本申请实施例中的第一驱动电路和第二驱动电路仅仅只是用于区别驱动的子像素的个数不同；也即，本质上，本申请实施例提及的驱动电路可以是第一驱动电路，也可以是第二驱动电路。
其中，在本申请实施例中提及的使能晶体管的宽度指的是该使能晶体管的导电沟道的宽度。
进一步的，第一驱动电路驱动的子像素的个数与第二驱动电路驱动的子像素的个数的比值等于第一驱动电路对应的使能输出晶体管的宽度与第二驱动电路对应的使能输出晶体管的宽度的比值。
需要说明的是，本申请实施例根据显示面板中各个驱动电路驱动的子像素的个数，在显示面板的阵列制程中，控制不同驱动电路对应的使能输出晶体管的宽度，从而可以解决因显示面板的不同行的像素不同，引起显示异常的问题，提高显示效果。
请参阅图1，图1为本申请实施例提供的一种显示面板的结构示意图。如图1所示，该显示面板10包括：
位于显示区11的多条扫描线101和多条数据线102，多条扫描线101沿第一方向X延伸并沿第二方向Y排列的，多条数据线102沿第二方向Y延伸并沿第一方向X排列，以及连接到多条扫描线101和多条数据线102上的多个子像素；其中，第一方向X与第二方向Y交叉；例如第一方向X和第二方向Y垂直。
位于围绕显示区11的非显示区12的多个驱动电路13，每个驱动电路13通过一条扫描线101与对应的子像素连接；显示区11包括异形区域111和非异形区域112，异形区域111的子像素对应的驱动电路13的使能输出晶体管的宽度小于非异形区域112的子像素对应的驱动电路13的使能输出晶体管的宽度。
进一步的，异形区域111的一驱动电路13驱动的子像素的个数与非异形区域112的一驱动电路驱动13的子像素的个数的比值等于异形区域111的一驱动电路13对应的使能输出晶体管的宽度与非异形区域112的一驱动电路13对应的使能输出晶体管的宽度的比值。
在本申请实施例中，由于非异形区域112中的各个驱动电路13驱动的子像素的个数相同，故非异形区域112的子像素对应的各个驱动电路13中的使能输出晶体管的宽度相等。
在本申请实施例中，各驱动电路13沿第二方向Y依次排布；异形区域111包括多个子异形区域，沿第二方向Y，各子异形区域中的行子像素个数逐区增多，与各子异形区域子像素对应的驱动电路13中的使能输出晶体管的宽度依次增大。
具体的，请参照图2，图2为本申请实施例提供的另一种显示面板的结构示意图，图2中示出了显示面板的部分结构，在上述实施例的基础上，沿第二方向Y，各驱动电路13依次排布；
异形区域111包括多个子异形区域，例如包括第一子异形区域201、第二子异形区域202和第三子异形区域203。沿第二方向Y，各子异形区域中的行子像素个数逐区增多，与各子异形区域子像素对应的驱动电路13中的使能输出晶体管的宽度依次增大。其中，第三子异形区域203每行子像素的个数多于第二子异形区域202中的每行子像素的个数，第二子异形区域202中的每行子像素的个数多于第一子异形区域201中的每行子像素的个数。第三子异形区域203子像素对应的驱动电路中的使能输出晶体管的宽度大于第二子异形区域202 子像素对应的驱动电路中的使能输出晶体管的宽度；第二子异形区域202子像素对应的驱动电路中的使能输出晶体管的宽度大于第一子异形区域201子像素对应的驱动电路中的使能输出晶体管的宽度。如此，可以实现第一子异形区域201的子像素对应的驱动电路的延迟时间大于第二子异形区域202的子像素对应的驱动电路的延迟时间，第二子异形区域 202的子像素对应的驱动电路的延迟时间大于第三子异形区域203的子像素对应的驱动电路的延迟时间，解决第一子异形区域201每行子像素个数、第二子异形区域202每行子像素个数、和第三子异形区域203每行子像素个数不同而造成显示异常的问题，提高显示的均一性，提高显示效果。
需要说明的是，异形区域中一行子像素可构成一个子异形区域，也可以是每行子像素个数相等的若干相邻行子像素构成一个子异形区域。可以根据显示面板的结构进行划分。
在本申请实施例中，每个驱动电路13包括至少一使能输出晶体管，使能输出晶体管用于向驱动电路13对应的子像素提供扫描信号。异形区域111的子像素对应的驱动电路13的使能输出晶体管的宽度小于非异形区域112的子像素对应的驱动电路13的使能输出晶体管的宽度。其中，晶体管的宽度是晶体管的导电沟道的宽度值，一般晶体管的宽度越大，驱动能力，即带负载的能力越强，输出的信号越不容易受到负载的影响。
示例性地，本申请实施提供的驱动电路包括第一子驱动电路和第二子驱动电路，该第一子驱动电路和第二子驱动电路用于共同驱动显示面板工作。需要说明的是，本申请实施例提及的驱动电路包括第一子驱动电路和第二子驱动电路；也即，本申请实施例的第一子驱动电路和第二子驱动电路均为驱动电路的一部分。
请参考图3，图3为本申请实施例提供的一种驱动电路中第一子驱动电路的具体电路图。如图3所示，该第一子驱动电路包括第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6、第七晶体管T7、第八晶体管T8、第一电容C1和第二电容C2。其中第六晶体管T6和第七晶体管T7为驱动电路的输出晶体管，第六晶体管T6和第七晶体管T7根据其栅极的电压导通或者关断，第六晶体管T6导通时，将时钟信号输入端CK输入的信号传输至驱动电路的输出端，第七晶体管T7此时不会导通。由于只有当第六晶体管T6导通，时钟信号输入端输入的信号传输至驱动电路的输出端，进而传输至扫描线，与扫描线连接的子像素才进行充电，故第六晶体管T6为驱动电路的使能晶体管，第六晶体管T6导通时，输出第一使能扫描信号至扫描线控制子像素进行充电。
其中，结合图1、图2、图3，异形区域111的子像素对应的第一子驱动电路的使能输出晶体管的宽度小于非异形区域112的子像素对应的第一子驱动电路的使能输出晶体管的宽度。
请参考图4。图4为本申请实施例提供的一种驱动电路中第二子驱动电路的具体电路图。如图4所示，该第二子驱动电路包括第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6、第七晶体管T7、第八晶体管T8、第九晶体管T9、第十晶体管T10、第一电容C1和第二电容C2。其中第九晶体管T9和第十晶体管T10为驱动电路的输出晶体管，第九晶体管T9和第十晶体管T10根据其栅极的电压导通或者关断，第九晶体管T9导通时，将低电平信号输入端L输入的信号传输至驱动电路的输出端，第十晶体管T10导通时，将高电平信号输入端H输入的信号传输至驱动电路的输出端。由于只有当第十晶体管T10导通，高电平信号输入端输入的信号传输至驱动电路的输出端，进而传输至扫描线，与扫描线连接的子像素才进行充电，故第十晶体管T10为驱动电路的使能晶体管，第十晶体管T10导通时，输出第二使能扫描信号至扫描线控制子像素进行充电。
其中，结合图1、图2、图4，异形区域111的子像素对应的第二子驱动电路的使能输出晶体管的宽度与非异形区域112的子像素对应的第二子驱动电路的使能输出晶体管的宽度在此不做限制，但优选为异形区域111的子像素对应的第二子驱动电路的使能输出晶体管的宽度小于非异形区域112的子像素对应的第二子驱动电路的使能输出晶体管的宽度。
需要说明的是，本申请实施例中的使能输出晶体管可以为N型薄膜晶体管或P型薄膜晶体管。
继续参考图1和图3，其中，第一区域21的驱动电路13与异形区域111的子像素对应；第二区域22的驱动电路13与非异形区域112的子像素对应。异形区域111的子像素对应的驱动电路13的使能输出晶体管宽度小于非异形区域112的子像素对应的驱动电路13的使能输出晶体管的宽度。即第一区域21的驱动电路13中的第六晶体管T6的宽度小于第二区域22的驱动电路13中的第六晶体管T6的宽度。第一区域21的驱动电路13的宽度比较小，则第一区域21的驱动电路的输出驱动能力相对较弱，如此，异形区域 111的子像素对应的驱动电路13的延迟时间较大，异形区域111的子像素对应的驱动电路12的延迟时间将大于非异形区域112的子像素对应的驱动电路13的延迟时间。可解决异形区域和非异形区域每行子像素个数不同，而造成的显示不均一的问题，提高显示效果。
继续参考图1，驱动电路可位于非显示区相对的两侧。如图1所示的异形区域111 是有缺口，扫描线101在缺口处断开，移位寄存器13设置于非显示区12相对的两侧，可以实现对异形区域111扫描线101提供扫描信号。
在本申请实施例中，显示面板为包括圆形、椭圆形、多边形以及包括圆弧的图形中的至少一种的封闭图形。例如本申请实施例中的异形显示面板可以是带R角、槽口或切口 (notch)或圆形的显示面板。
本申请实施例还提供了一种显示装置，该显示装置包括以上所述的显示面板，具体可参照以上，在此不做赘述。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板，其包括：
    位于显示区的多条扫描线，多条所述扫描线沿第一方向延伸并沿第二方向排列，以及连接到多条所述扫描线上的多个子像素，所述第一方向和所述第二方向交叉；
    位于围绕所述显示区的非显示区的多个驱动电路，每个所述驱动电路通过一条所述扫描线与对应的所述子像素连接，且每个所述驱动电路均包括至少一使能输出晶体管，所述使能输出晶体管用于向所述驱动电路对应的所述子像素提供使能扫描信号；其中，
    所述驱动电路包括一第一驱动电路和一第二驱动电路，当所述第一驱动电路驱动的所述子像素的个数小于所述第二驱动电路驱动的所述子像素的个数时，所述第一驱动电路对应的使能输出晶体管的宽度小于所述第二驱动电路对应的使能输出晶体管的宽度；
    所述显示区包括异形区域和非异形区域，且所述异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度小于所述非异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度；所述驱动电路位于所述非显示区相对的两侧。
  2. 根据权利要求1所述的显示面板，其中，所述非异形区域的子像素对应的各个所述驱动电路中的所述使能输出晶体管的宽度相等。
  3. 根据权利要求1所述的显示面板，其中，各所述驱动电路沿所述第二方向依次排布；
    所述异形区域包括多个子异形区域，沿所述第二方向，各所述子异形区域中的行子像素个数逐区增多，与各所述子异形区域子像素对应的所述驱动电路中的所述使能输出晶体管的宽度依次增大。
  4. 根据权利要求1所述的显示面板，其中，所述显示面板为包括圆形、椭圆形、多边形以及包括圆弧的图形中的至少一种的封闭图形。
  5. 根据权利要求4所述的显示面板，其中，所述第一驱动电路驱动的所述子像素的个数与所述第二驱动电路驱动的所述子像素的个数的比值等于所述第一驱动电路对应的所述使能输出晶体管的宽度与所述第二驱动电路对应的所述使能输出晶体管的宽度的比值。
  6. 根据权利要求1所述的显示面板，其中，所述使能输出晶体管为N型薄膜晶体管或P型薄膜晶体管。
  7. 根据权利要求1所述的显示面板，其中，所述显示面板还包括：位于显示区的多条数据线，多条所述数据线沿所述第二方向延伸并沿所述第一方向排列，多条所述数据线与多个所述子像素连接。
  8. 一种显示面板，其包括：
    位于显示区的多条扫描线，多条所述扫描线沿第一方向延伸并沿第二方向排列，以及连接到多条所述扫描线上的多个子像素，所述第一方向和所述第二方向交叉；
    位于围绕所述显示区的非显示区的多个驱动电路，每个所述驱动电路通过一条所述扫描线与对应的所述子像素连接，且每个所述驱动电路均包括至少一使能输出晶体管，所述使能输出晶体管用于向所述驱动电路对应的所述子像素提供使能扫描信号；其中，
    所述驱动电路包括一第一驱动电路和一第二驱动电路，当所述第一驱动电路驱动的所述子像素的个数小于所述第二驱动电路驱动的所述子像素的个数时，所述第一驱动电路对应的使能输出晶体管的宽度小于所述第二驱动电路对应的使能输出晶体管的宽度。
  9. 根据权利要求8所述的显示面板，其中，所述显示区包括异形区域和非异形区域，且所述异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度小于所述非异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度。
  10. 根据权利要求9所述的显示面板，其中，所述非异形区域的子像素对应的各个所述驱动电路中的所述使能输出晶体管的宽度相等。
  11. 根据权利要求9所述的显示面板，其中，各所述驱动电路沿所述第二方向依次排布；
    所述异形区域包括多个子异形区域，沿所述第二方向，各所述子异形区域中的行子像素个数逐区增多，与各所述子异形区域子像素对应的所述驱动电路中的所述使能输出晶体管的宽度依次增大。
  12. 根据权利要求9所述的显示面板，其中，所述显示面板为包括圆形、椭圆形、多边形以及包括圆弧的图形中的至少一种的封闭图形。
  13. 根据权利要求12所述的显示面板，其中，所述第一驱动电路驱动的所述子像素的个数与所述第二驱动电路驱动的所述子像素的个数的比值等于所述第一驱动电路对应的所述使能输出晶体管的宽度与所述第二驱动电路对应的所述使能输出晶体管的宽度的比值。
  14. 根据权利要求8所述的显示面板，其中，所述驱动电路位于所述非显示区相对的两侧。
  15. 根据权利要求8所述的显示面板，其中，所述使能输出晶体管为N型薄膜晶体管或P型薄膜晶体管。
  16. 根据权利要求8所述的显示面板，其中，所述显示面板还包括：位于显示区的多条数据线，多条所述数据线沿所述第二方向延伸并沿所述第一方向排列，多条所述数据线与多个所述子像素连接。
  17. 一种显示装置，其包括显示面板，所述显示面板包括：
    位于显示区的多条扫描线，多条所述扫描线沿第一方向延伸并沿第二方向排列，以及连接到多条所述扫描线上的多个子像素，所述第一方向和所述第二方向交叉；
    位于围绕所述显示区的非显示区的多个驱动电路，每个所述驱动电路通过一条所述扫描线与对应的所述子像素连接，且每个所述驱动电路均包括至少一使能输出晶体管，所述使能输出晶体管用于向所述驱动电路对应的所述子像素提供使能扫描信号；其中，
    所述驱动电路包括一第一驱动电路和一第二驱动电路，当所述第一驱动电路驱动的所述子像素的个数小于所述第二驱动电路驱动的所述子像素的个数时，所述第一驱动电路对应的使能输出晶体管的宽度小于所述第二驱动电路对应的使能输出晶体管的宽度。
  18. 根据权利要求17所述的显示装置，其中，所述显示区包括异形区域和非异形区域，且所述异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度小于所述非异形区域的子像素对应的所述驱动电路的使能输出晶体管的宽度。
  19. 根据权利要求18所述的显示装置，其中，所述非异形区域的子像素对应的各个所述驱动电路中的所述使能输出晶体管的宽度相等。
  20. 根据权利要求18所述的显示装置，其中，各所述驱动电路沿所述第二方向依次排布；
    所述异形区域包括多个子异形区域，沿所述第二方向，各所述子异形区域中的行子像素个数逐区增多，与各所述子异形区域子像素对应的所述驱动电路中的所述使能输出晶体管的宽度依次增大。
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