WO2024130724A1 - 发光元件、显示基板和显示装置 - Google Patents

发光元件、显示基板和显示装置 Download PDF

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Publication number
WO2024130724A1
WO2024130724A1 PCT/CN2022/141541 CN2022141541W WO2024130724A1 WO 2024130724 A1 WO2024130724 A1 WO 2024130724A1 CN 2022141541 W CN2022141541 W CN 2022141541W WO 2024130724 A1 WO2024130724 A1 WO 2024130724A1
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Prior art keywords
pad
light
emitting structure
electrode
emitting element
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PCT/CN2022/141541
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English (en)
French (fr)
Inventor
孙一丁
王康丽
康萍
程阿梅
吕超忍
高亮
Original Assignee
京东方科技集团股份有限公司
合肥京东方瑞晟科技有限公司
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Application filed by 京东方科技集团股份有限公司, 合肥京东方瑞晟科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2022/141541 priority Critical patent/WO2024130724A1/zh
Priority to CN202280005239.0A priority patent/CN118556288A/zh
Publication of WO2024130724A1 publication Critical patent/WO2024130724A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits

Definitions

  • Embodiments of the present disclosure relate to a light emitting element, a display substrate, and a display device.
  • Micro-LED display technology uses self-luminous micro-light-emitting structures as light-emitting units, and sets these micro-light-emitting structure arrays on a driving substrate. Since micro-light-emitting structures are directly used as light-emitting units, micro-light-emitting structure display technology has the advantages of high brightness, high resolution, high contrast, low energy consumption, fast response speed, and good thermal stability.
  • Mini LED Minimum Light Emitting Diode
  • Micro LED Micro Light Emitting Diode
  • the disclosed embodiments provide a light-emitting element, a display substrate, and a display device.
  • the light-emitting element includes a substrate, a plurality of light-emitting structures, a leveling layer, a connecting electrode layer, an insulating layer, and a plurality of pads; the plurality of light-emitting structures are located on the substrate; the leveling layer is located between the plurality of light-emitting structures; the connecting electrode layer is located on a side of the leveling layer away from the substrate; the insulating layer is located on a side of the connecting electrode layer away from the leveling layer; a plurality of pads are located on a side of the insulating layer away from the connecting electrode layer; each light-emitting structure includes a first pole and a second pole, the connecting electrode layer includes a plurality of connecting electrodes, each connecting electrode is connected to a first pole or a second pole of at least one light-emitting structure; the light-emitting element also includes a plurality of openings located
  • the light-emitting element encapsulates multiple light-emitting structures together, so only one bonding process is required, and there is no need to perform multiple bonding processes for micro-light-emitting structures of different colors; on the one hand, the light-emitting element can avoid the interference problems caused by multiple bonding processes, thereby improving or even avoiding missing parts defects; on the other hand, the light-emitting element can also effectively reduce the bonding time of a single display substrate and improve the bonding efficiency; in addition, the size of a single light-emitting element is large enough, so that bad pixels can be repaired through vacuum adsorption holes.
  • At least one embodiment of the present disclosure provides a light-emitting element, which includes: a substrate; a plurality of light-emitting structures located on the substrate; a leveling layer located between the plurality of light-emitting structures; a connecting electrode layer located on a side of the leveling layer away from the substrate; an insulating layer located on a side of the connecting electrode layer away from the leveling layer; and a plurality of solder pads located on a side of the insulating layer away from the connecting electrode layer, each of the light-emitting structures including a first pole and a second pole, the connecting electrode layer including a plurality of connecting electrodes, each of the connecting electrodes being connected to the first pole or the second pole of at least one of the light-emitting structures; the light-emitting element also includes a plurality of openings located in the insulating layer, and the plurality of solder pads are connected to the plurality of connecting electrodes through the plurality of openings.
  • the number of the plurality of light-emitting structures is N, and the number of the plurality of pads ranges from N+1 to 2N.
  • the height of each pad relative to the substrate is greater than the height of the insulating layer relative to the substrate.
  • the substrate includes a sapphire substrate.
  • the distance between two adjacent light-emitting structures is less than 100 micrometers.
  • the orthographic projection of the connecting electrode on the substrate is larger than the orthographic projection of the pad connected to the connecting electrode on the substrate.
  • the plurality of light-emitting structures include a first light-emitting structure, a second light-emitting structure, and a third light-emitting structure, the first light-emitting structure is configured to emit light of a first color, the second light-emitting structure is configured to emit light of a second color, and the third light-emitting structure is configured to emit light of a third color.
  • the plurality of connecting electrodes include a first connecting electrode, a second connecting electrode, a third connecting electrode, a fourth connecting electrode, a fifth connecting electrode and a sixth connecting electrode
  • the plurality of soldering pads include a first soldering pad, a second soldering pad, a third soldering pad, a fourth soldering pad, a fifth soldering pad and a sixth soldering pad
  • the first connecting electrode and the second connecting electrode respectively connect the first pole and the second pole of the first light-emitting structure to the first soldering pad and the second soldering pad
  • the third connecting electrode and the fourth connecting electrode respectively connect the first pole and the second pole of the second light-emitting structure to the third soldering pad and the fourth soldering pad
  • the fifth connecting electrode and the sixth connecting electrode respectively connect the first pole and the second pole of the third light-emitting structure to the fifth soldering pad and the sixth soldering pad.
  • the first pad and the second pad are arranged along a first direction
  • the fifth pad and the sixth pad are arranged along the first direction
  • the first pad and the fifth pad are relatively spaced apart in a second direction intersecting the first direction
  • the second pad and the sixth pad are relatively spaced apart in the second direction
  • the third pad is located on a side of the fifth pad away from the sixth pad
  • the fourth pad is located on a side of the first pad away from the second pad
  • the third pad and the fourth pad are relatively spaced apart in the second direction
  • the first light-emitting structure, the second light-emitting structure and the third light-emitting structure are located between a first line between the center of the second pad and the center of the sixth pad and a second line between the center of the third pad and the center of the fourth pad.
  • the light-emitting element provided in one embodiment of the present disclosure, there is a first interval between the first pad and the fifth pad, and a second interval between the second pad and the sixth pad; there is a third interval between the third pad and the fourth pad, and the first light-emitting structure, the second light-emitting structure and the third light-emitting structure are located in the area between the second interval and the third interval.
  • the area of the first pad is smaller than the area of the second pad
  • the area of the fifth pad is smaller than the area of the sixth pad
  • the first light-emitting structure and the third light-emitting structure are located between the first pad and the fifth pad.
  • the second light-emitting structure is located between a third connecting line between the center of the first light-emitting structure and the center of the third light-emitting structure and the second connecting line.
  • the lines connecting the center of the first light-emitting structure, the center of the second light-emitting structure, and the center of the third light-emitting structure form a triangle.
  • the first pad, the third pad and the fifth pad are arranged along a first direction
  • the second pad, the fourth pad and the sixth pad are arranged along the first direction
  • the first pad and the second pad are relatively spaced apart in a second direction intersecting the first direction
  • the third pad and the fourth pad are relatively spaced apart in the second direction
  • the fifth pad and the sixth pad are relatively spaced apart in the second direction
  • the first light-emitting structure is located between the first pad and the second pad
  • the second light-emitting structure is located between the third pad and the fourth pad
  • the third light-emitting structure is located between the fifth pad and the sixth pad.
  • the sizes of the orthographic projections of the first pad, the second pad, the third pad, the fourth pad, the fifth pad and the sixth pad on the substrate are substantially the same.
  • the first solder pad is connected to the first pole of the first light-emitting structure
  • the third solder pad is connected to the first pole of the second light-emitting structure
  • the fifth solder pad is connected to the first pole of the third light-emitting structure
  • the second solder pad is connected to the second pole of the first light-emitting structure
  • the fourth solder pad is connected to the second pole of the second light-emitting structure
  • the sixth solder pad is connected to the second pole of the third light-emitting structure.
  • a size of the light-emitting element in the first direction is less than or equal to 500 micrometers.
  • the plurality of connecting electrodes include a first connecting electrode, a second connecting electrode, a third connecting electrode, a fourth connecting electrode, a fifth connecting electrode and a sixth connecting electrode
  • the plurality of soldering pads include a first soldering pad, a second soldering pad, a third soldering pad, a fourth soldering pad and a fifth soldering pad
  • the first connecting electrode and the second connecting electrode respectively connect the first pole and the second pole of the first light-emitting structure to the first soldering pad and the second soldering pad
  • the third connecting electrode and the fourth connecting electrode respectively connect the first pole and the second pole of the second light-emitting structure to the third soldering pad and the fourth soldering pad
  • the fifth connecting electrode and the sixth connecting electrode respectively connect the first pole and the second pole of the third light-emitting structure to the third soldering pad and the fifth soldering pad.
  • the first pad and the second pad are arranged along the first direction and are relatively spaced apart
  • the fourth pad and the fifth pad are arranged along the first direction and are relatively spaced apart
  • the fourth pad and the first pad are relatively spaced apart in a second direction intersecting the first direction
  • the third pad is arranged in an area surrounded by the first pad, the second pad, the fourth pad and the fifth pad
  • the first light-emitting structure is located between the first pad and the second pad
  • the second light-emitting structure is located between the first pad and the fourth pad
  • the third light-emitting structure is located between the fourth pad and the fifth pad.
  • the first light emitting structure and the third light emitting structure are respectively located on both sides of the third pad in the second direction.
  • a size of the light-emitting element in the first direction is less than or equal to 250 micrometers.
  • the first pad and the second pad are arranged along the first direction and are relatively spaced apart
  • the third pad and the fifth pad are arranged along the first direction and are relatively spaced apart
  • the third pad and the first pad are relatively spaced apart in a second direction intersecting the first direction
  • the fourth pad is arranged in an area surrounded by the first pad, the second pad, the third pad and the fifth pad
  • the first light-emitting structure is located between the first pad and the second pad
  • the second light-emitting structure is located between the first pad and the third pad
  • the third light-emitting structure is located between the third pad and the fifth pad.
  • the first color is green
  • the second color is red
  • the third color is blue
  • At least one embodiment of the present disclosure further provides a display substrate, which includes: a driving substrate; and a plurality of light-emitting elements arranged in an array on the driving substrate, wherein the plurality of light-emitting elements include any one of the light-emitting elements described above.
  • a display substrate provided in an embodiment of the present disclosure, it also includes: a plurality of micro-driving chips, which are arranged corresponding to the plurality of light-emitting elements, and each of the micro-driving chips is configured to drive the corresponding light-emitting element to perform light-emitting display.
  • the driving substrate includes a ground line, and the orthographic projection of the light emitting element on the driving substrate overlaps with the ground line.
  • the driving substrate includes a first signal line, a second signal line, a working voltage line and a data line
  • each of the micro-driving chips includes a data signal terminal, a working voltage terminal, a ground terminal, a first output terminal, a second output terminal and a third output terminal
  • the data signal terminal is connected to the data line through a first connecting line
  • the working voltage terminal is connected to the working voltage line through a second connecting line
  • the ground terminal is connected to the ground terminal through a third connecting line
  • the first output terminal is connected to the second pole of the first light-emitting structure
  • the second output terminal is connected to the second pole of the second light-emitting structure
  • the third output terminal is connected to the second pole of the third light-emitting structure
  • the first signal line is connected to the first pole of the first light-emitting structure through a fourth connecting line
  • the second signal line is connected to the first pole of the second light-emitting structure through a fifth connecting line
  • At least one embodiment of the present disclosure further provides a display device, which includes any of the display substrates described above.
  • FIG1 is a schematic diagram of a driving method of a single pixel in a display substrate
  • FIG3 shows an interference phenomenon of a display substrate in a die bonding process
  • FIG4 is a schematic plan view of a light emitting element provided in one embodiment of the present disclosure.
  • FIG5 is a schematic cross-sectional view of a light emitting element provided by an embodiment of the present disclosure along the AB direction in FIG4 ;
  • FIG6 is a schematic plan view of another light emitting element provided by an embodiment of the present disclosure.
  • FIG7 is a schematic plan view of another light emitting element provided by an embodiment of the present disclosure.
  • FIG8 is a schematic plan view of another light emitting element provided by an embodiment of the present disclosure.
  • FIG9 is a schematic plan view of a display substrate provided in one embodiment of the present disclosure.
  • FIG10 is a partial schematic diagram of a display substrate provided in one embodiment of the present disclosure.
  • FIG11 is a partial schematic diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG12 is a partial schematic diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG13 is a partial schematic diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 14 is a schematic diagram of a display device provided according to an embodiment of the present disclosure.
  • the features such as “parallel”, “perpendicular” and “same” used in the embodiments of the present disclosure include the situations of “parallel”, “perpendicular”, “same” in a strict sense, as well as the situations of “approximately parallel”, “approximately perpendicular”, “approximately the same” and the like which contain certain errors.
  • the above-mentioned “approximately” may mean that the difference of the compared objects is within 10% or 5% of the average value of the compared objects.
  • the component or element may be one or more, or may be understood as at least one. "At least one” means one or more, and “more than one” means at least two.
  • FIG1 is a schematic diagram of a driving method of a single pixel in a display substrate.
  • a single pixel 10 in the display substrate may be composed of three micro-light emitting structures, which may include a red light micro-light emitting structure 11 (R-LED), a green light micro-light emitting structure 12 (G-LED) and a blue light emitting structure 13 (B-LED);
  • a single pixel 10 may be controlled by a micro-drive chip 20, which includes three input terminals and three output terminals;
  • the three input terminals include a data terminal 21, a working voltage terminal 22 and a ground terminal 23, the data terminal 21 may be connected to a data line 21, the working voltage terminal 22 may be connected to a working voltage line 32, and the ground terminal 23 may be connected to a ground line 33;
  • the three output terminals include a first output terminal 24, a second output terminal 25 and a third output terminal 26, the first output terminal 24 may provide a low voltage for the red light micro-light emitting structure 11, the second output terminal 25 may provide
  • Each micro-light emitting structure may include two pins, one of which may be connected to one of the three output terminals mentioned above, and the other may be connected to a signal line providing a high voltage.
  • the red light emitting structure 11 is connected to the first signal line 51
  • the green light emitting structure 12 and the blue light emitting structure 13 are connected to the second signal line 52.
  • the micro-driving chip can control the brightness of the red light micro-light emitting structure (R-LED), the green light micro-light emitting structure (G-LED), and the blue light emitting structure (B-LED) by controlling the voltage signals of the three output terminals, thereby realizing the display function.
  • the size of a single micro-luminescent structure is set to about 150*90 ⁇ m, and the interval between the micro-luminescent structures in a single pixel is about 100 ⁇ m (because the minimum size of the RW vacuum adsorption hole is 100 ⁇ m).
  • This size is prone to missing parts in the needle-piercing die bonding process, and the bad situation is shown in Figures 2A-2C. As shown in Figures 2A-2C, all three pixels have part of the micro-luminescent structure missing.
  • the above-mentioned missing parts defects are mainly caused by the small spacing between the micro-luminescent structures, which leads to interference in the die bonding process.
  • the red micro-luminescent structure is bonded first, and then the green micro-luminescent structure and the blue micro-luminescent structure are bonded, the micro-luminescent structure chip on the wafer will interfere with the red micro-luminescent structure on the driving substrate, and the micro-luminescent structure chip on the driving substrate will be carried away, resulting in missing parts defects.
  • the die bonding time of a single display substrate exceeds 16 hours, which also becomes a bottleneck limiting production capacity.
  • the size of the micro-luminescent structure chip is small, for example, 150*90 microns, the minimum diameter of the vacuum adsorption hole is 100 microns, and it is impossible to repair the bad pixels.
  • the embodiments of the present disclosure provide a light-emitting element, a display substrate, and a display device.
  • the light-emitting element includes a substrate, a plurality of light-emitting structures, a leveling layer, a connecting electrode layer, an insulating layer, and a plurality of pads; the plurality of light-emitting structures are located on the substrate; the leveling layer is located between the plurality of light-emitting structures; the connecting electrode layer is located on a side of the leveling layer away from the substrate; the insulating layer is located on a side of the connecting electrode layer away from the leveling layer; a plurality of pads are located on a side of the insulating layer away from the connecting electrode layer; each light-emitting structure includes a first pole and a second pole, the connecting electrode layer includes a plurality of connecting electrodes, each connecting electrode is connected to a first pole or a second pole of at least one light-emitting structure; the light-emitting element also includes a plurality
  • the light-emitting element encapsulates multiple light-emitting structures together, so only one bonding process is required, and there is no need to perform multiple bonding processes for micro-light-emitting structures of different colors; on the one hand, the light-emitting element can avoid the interference problems caused by multiple bonding processes, thereby improving or even avoiding missing parts defects; on the other hand, the light-emitting element can also effectively reduce the bonding time of a single display substrate and improve the bonding efficiency; in addition, the size of a single light-emitting element is large enough, so that bad pixels can be repaired through vacuum adsorption holes.
  • FIG. 4 is a schematic plan view of a light emitting element provided by an embodiment of the present disclosure
  • Figure 5 is a schematic cross-sectional view of a light emitting element provided by an embodiment of the present disclosure along the AB direction in Figure 4 .
  • the light emitting element 100 includes a substrate 110, a plurality of light emitting structures 120, a leveling layer 130, a connecting electrode layer 140, an insulating layer 150 and a plurality of pads 160; the plurality of light emitting structures 120 are located on the substrate 110; the leveling layer 130 is located between the plurality of light emitting structures 120; the connecting electrode layer 140 is located on a side of the leveling layer 130 away from the substrate 110; the insulating layer 150 is located on a side of the connecting electrode layer 140 away from the leveling layer 130; and the plurality of pads 160 are located on a side of the insulating layer 150 away from the connecting electrode layer 140.
  • Each light emitting structure 120 includes a first electrode 210 and a second electrode 220, and the connecting electrode layer 140 includes a plurality of connecting electrodes 145, each connecting electrode 145 is connected to the first electrode 210 or the second electrode 220 of at least one light emitting structure 120.
  • the light emitting element 100 further includes a plurality of openings 155 in the insulating layer 150, and a plurality of pads 160 are connected to a plurality of connection electrodes 145 through the plurality of openings 155.
  • the "light emitting structure” in this article generally refers to a micro light emitting structure; in addition, the “light emitting structure” in this article is not packaged, and only includes a PN junction, a light emitting layer and other functional layers that assist light emission, and is not a common single light emitting diode.
  • multiple light-emitting structures are located on the substrate and are packaged together by filling a leveling layer, a connecting electrode layer, an insulating layer and multiple pads. Therefore, when the light-emitting element is applied to a display substrate, only one solid crystal process is required to assemble all of them on the driving substrate, and there is no need to perform multiple solid crystal processes for micro-light-emitting structures of different colors.
  • the light-emitting element can avoid the interference problem caused by multiple solid crystal processes, thereby improving or even avoiding the defective parts; on the other hand, the light-emitting element includes multiple light-emitting structures, thereby reducing the number of transfers required, thereby effectively reducing the solid crystal time of a single display substrate and improving the solid crystal efficiency; in addition, the size of a single light-emitting element is also large enough, so that bad points can be repaired through vacuum adsorption holes.
  • three light-emitting structures 120 are located on the substrate 110; the connecting electrode layer 140 includes six connecting electrodes 145, and the six connecting electrodes 145 are respectively connected to the three first poles 210 and the three second poles 220 of the three light-emitting structures 120, and then connected to the six pads 160 through six openings 155.
  • electrical signals can be applied to the three first electrodes and the three second electrodes of the three light-emitting structures through the six pads.
  • one connecting electrode is only connected to one electrode of one light-emitting structure, but the present disclosure includes but is not limited to this. In some cases, one connecting electrode can also be connected to electrodes of multiple light-emitting structures to achieve multiple light-emitting structures sharing one electrical signal.
  • the number of the plurality of pads 160 ranges from N+1 to 2N; that is, electrodes of at least two of the plurality of light emitting structures may share one pad.
  • the orthographic projection of the connection electrode 145 on the substrate 110 is larger than the orthographic projection of the pad 160 connected to the connection electrode 145 on the substrate 110, thereby ensuring the reliability and durability of the electrical connection therebetween.
  • the height of each pad 160 relative to the substrate 110 is greater than the height of the insulating layer 150 relative to the substrate 110.
  • the thickness of the pad 160 may also be greater than the thickness of the insulating layer 150.
  • the substrate 110 may be a sapphire substrate.
  • the present disclosure includes but is not limited to this.
  • the distance between two adjacent light emitting structures 120 is less than 100 micrometers.
  • the light emitting element can further improve the integration degree, thereby improving the resolution of the display substrate using the light emitting structure package block.
  • the plurality of light emitting structures 120 included in a single light emitting element 100 include light emitting structures 120 that emit light of different colors.
  • the plurality of light emitting structures 120 include a first light emitting structure 121, a second light emitting structure 122, and a third light emitting structure 123; the first light emitting structure 121 is configured to emit light of a first color, the second light emitting structure 122 is configured to emit light of a second color, and the third light emitting structure 123 is configured to emit light of a third color. It should be noted that the first color, the second color, and the third color are different.
  • the first color is red
  • the second color is green
  • the third color is blue.
  • the present disclosure includes but is not limited to this, and the first color, the second color, and the third color may also be other colors.
  • the plurality of connecting electrodes 145 include a first connecting electrode 145A, a second connecting electrode 145B, a third connecting electrode 145C, a fourth connecting electrode 145D, a fifth connecting electrode 145E, and a sixth connecting electrode 145F;
  • the plurality of solder pads 160 include a first solder pad 160A, a second solder pad 160B, a third solder pad 160C, a fourth solder pad 160D, a fifth solder pad 160E, and a sixth solder pad 160F.
  • the first connecting electrode 145A and the second connecting electrode 145B respectively connect the first pole 210 and the second pole 220 of the first light emitting structure 121 to the first pad 160A and the second pad 160B;
  • the third connecting electrode 145C and the fourth connecting electrode 145D respectively connect the first pole 210 and the second pole 220 of the second light emitting structure 122 to the third pad 160C and the fourth pad 160D;
  • the fifth connecting electrode 145E and the sixth connecting electrode 145F respectively connect the first pole 210 and the second pole 220 of the third light emitting structure 123 to the fifth pad 160E and the sixth pad 160F.
  • the first pad 160A, the third pad 160C and the fifth pad 160E are arranged along the first direction
  • the second pad 160B, the fourth pad 160D and the sixth pad 160F are arranged along the first direction
  • the first pad 160A and the second pad 160B are relatively spaced apart in a second direction intersecting the first direction
  • the third pad 160C and the fourth pad 160D are relatively spaced apart in the second direction
  • the fifth pad 160E and the sixth pad 160F are relatively spaced apart in the second direction
  • the first light-emitting structure 121 is located between the first pad 160A and the second pad 160B
  • the second light-emitting structure 122 is located between the third pad 160C and the fourth pad 160D
  • the third light-emitting structure 123 is located between the fifth pad 160E and the sixth pad 160F.
  • the sizes of the orthographic projections of the first pad 160A, the second pad 160B, the third pad 160C, the fourth pad 160D, the fifth pad 160E, and the sixth pad 160F on the substrate 110 are approximately the same; for example, the difference between the areas of the orthographic projections of the first pad 160A, the second pad 160B, the third pad 160C, the fourth pad 160D, the fifth pad 160E, and the sixth pad 160F on the substrate 110 is less than 10% of the average of the areas of their orthographic projections on the substrate 110.
  • the first pad 160A is connected to the first pole of the first light-emitting structure 121
  • the third pad 160C is connected to the first pole of the second light-emitting structure 122
  • the fifth pad 160E is connected to the first pole of the third light-emitting structure 123
  • the second pad 160B is connected to the second pole of the first light-emitting structure 121
  • the fourth pad 160D is connected to the second pole of the second light-emitting structure 122
  • the sixth pad 160F is connected to the second pole of the third light-emitting structure 123.
  • the size of the light emitting element 100 in the first direction is less than or equal to 500 microns, for example, 400 microns. Therefore, the size of the three light emitting structures is usually 150*90 microns, and the interval between adjacent light emitting structures is about 100 microns, so the size of the three light emitting structures is usually 570 microns, and the size of the light emitting element provided in the embodiment of the present disclosure in the first direction is less than or equal to 500 microns, so the light emitting element improves the integration between multiple light emitting structures.
  • FIG. 6 is a schematic plan view of another light emitting element provided in an embodiment of the present disclosure.
  • the first pad 160A and the second pad 160B are arranged along the first direction
  • the fifth pad 160E and the sixth pad 160F are arranged along the first direction
  • the first pad 160A and the fifth pad 160E are arranged relatively spaced apart in a second direction intersecting the first direction
  • the second pad 160B and the sixth pad 160F are arranged relatively spaced apart in the second direction
  • the third pad 160C is located on the side of the fifth pad 160E away from the sixth pad 160F
  • the fourth pad 160D is located on the side of the first pad 160A away from the second pad 160B
  • the third pad 160C and the fourth pad 160D are arranged relatively spaced apart in the second direction
  • the first light-emitting structure 121, the second light-emitting structure 122 and the third light-emitting structure 123 are located between the first connecting line 201 between the center of the
  • the second direction and the first direction may be perpendicular to each other.
  • the present disclosure includes but is not limited to this.
  • the light emitting element can better avoid the ejector pin from damaging the light emitting structure during the die bonding process.
  • the area of the first pad 160A is smaller than the area of the second pad 160B, and the area of the fifth pad 160E is smaller than the area of the sixth pad 160F, so that the space between the first pad 160A and the fifth pad 160E is larger.
  • the first light emitting structure 121 and the third light emitting structure 123 are located between the first pad 160A and the fifth pad 160E.
  • the light emitting element can better avoid the ejector pin from damaging the light emitting structure during the die bonding process.
  • the second light emitting structure 122 is located between the third connecting line 203 and the second connecting line 202 between the center of the first light emitting structure 121 and the center of the third light emitting structure 123.
  • the light emitting element can better avoid the ejector pin from damaging the light emitting structure during the die bonding process.
  • the lines connecting the center of the first light emitting structure 121 , the center of the second light emitting structure 122 , and the center of the third light emitting structure 123 form a triangle.
  • the size of the light emitting element 100 in the first direction is less than or equal to 500 microns, for example, 400 microns. Therefore, the size of the three light emitting structures is usually 150*90 microns, and the interval between adjacent light emitting structures is about 100 microns, so the size of the three light emitting structures is usually 570 microns, and the size of the light emitting element provided in the embodiment of the present disclosure in the first direction is less than or equal to 500 microns, so the light emitting element has improved integration.
  • FIG7 is a schematic plan view of another light emitting element provided by an embodiment of the present disclosure.
  • the plurality of connection electrodes 145 include a first connection electrode 145A, a second connection electrode 145B, a third connection electrode 145C, a fourth connection electrode 145D, a fifth connection electrode 145E, and a sixth connection electrode 145F
  • the plurality of pads 160 include a first pad 160A, a second pad 160B, a third pad 160C, a fourth pad 160D, and a fifth pad 160E; the first connection electrode 145A and the second connection electrode 145B respectively connect the first light emitting structure 121 to the first light emitting structure 121.
  • the first electrode 210 and the second electrode 220 of the second light emitting structure 122 are connected to the first pad 160A and the second pad 160B; the third connection electrode 160C and the fourth connection electrode 160D respectively connect the first electrode 210 and the second electrode 220 of the second light emitting structure 122 to the third pad 160C and the fourth pad 160D; the fifth connection electrode 145E and the sixth connection electrode 145F respectively connect the first electrode 210 and the second electrode 220 of the third light emitting structure 123 to the third pad 160C and the fifth pad 160E.
  • the first electrode 210 of the second light emitting structure 122 and the first electrode 210 of the third light emitting structure 123 share the third pad 160C, so that the integration of the light emitting element can be further improved and the size of the light emitting element can be reduced.
  • connection electrode 145C and the fifth connection electrode 145E may be integrated into one body.
  • the anode of the green LED and the anode of the blue LED can use the same voltage, while the voltage of the anode of the red LED is different; therefore, they can share the same pad; at this time, the two connecting electrodes connected to the pad can also be integrated into one.
  • the size of the light-emitting element in the first direction is less than or equal to 250 microns, for example, 200 microns. Therefore, the size of the three light-emitting structures is usually 150*90 microns, and the interval between adjacent light-emitting structures is about 100 microns. Therefore, the size of the three light-emitting structures is usually 570 microns, and the size of the light-emitting element provided in the embodiment of the present disclosure in the first direction is less than or equal to 250 microns, so the light-emitting element greatly improves the integration and reduces the size of the light-emitting element.
  • the first pad 160A and the second pad 160B are arranged along the first direction and are relatively spaced; the fourth pad 160D and the fifth pad 160E are arranged along the first direction and are relatively spaced; the fourth pad 160D and the first pad 160A are relatively spaced in the second direction intersecting the first direction; the third pad 160C is arranged in the area surrounded by the first pad 160A, the second pad 160B, the fourth pad 160D and the fifth pad 160E, the first light emitting structure 121 is located between the first pad 160A and the second pad 160B, the second light emitting structure 122 is located between the first pad 160A and the fourth pad 160D, and the third light emitting structure 123 is located between the fourth pad 160D and the fifth pad 160E.
  • the light emitting element can avoid the ejector pin from directly contacting the light emitting structure during the die bonding process, thereby avoiding the ejector pin from damaging the light emitting structure, and further improving the product yield.
  • the first light emitting structure 121 and the third light emitting structure 123 are respectively located at both sides of the third pad 160C in the second direction.
  • FIG8 is a plan view of another light-emitting element provided by an embodiment of the present disclosure.
  • the first pad 160A and the second pad 160B are arranged along the first direction and are relatively spaced;
  • the third pad 160C and the fifth pad 160E are arranged along the first direction and are relatively spaced;
  • the third pad 160C and the first pad 160A are relatively spaced in the second direction intersecting the first direction;
  • the fourth pad 160D is arranged in the area surrounded by the first pad 160A, the second pad 160B, the third pad 160C and the fifth pad 160E, the first light-emitting structure 121 is located between the first pad 160A and the second pad 160B, the second light-emitting structure 122 is located between the first pad 160A and the third pad 160C, and the third light-emitting structure 123 is located between the third pad 160C and the fifth pad 160E.
  • the light-emitting element can prevent the ejector pin from directly contacting the light-emitting structure during the die bonding process, thereby preventing the ejector pin from damaging the light-emitting structure, thereby improving the product yield.
  • the light-emitting element is also convenient for wiring, reducing the area of the connecting wire, thereby improving the transmittance.
  • FIG9 is a schematic plan view of a display substrate provided by an embodiment of the present disclosure.
  • the display substrate 300 includes a driving substrate 310 and a plurality of light-emitting elements 100 arrayed on the driving substrate 310; the plurality of light-emitting elements 100 include the light-emitting elements 100 provided by any one of the above examples.
  • the display substrate since the multiple light-emitting structures in the light-emitting element are located on the substrate and are packaged together by a filling layer, a connecting electrode layer, an insulating layer and a plurality of pads, the display substrate can be fully assembled on the driving substrate with only one solid crystal process, and there is no need to perform multiple solid crystal processes for micro-light-emitting structures of different colors.
  • the display substrate can avoid the interference problem caused by multiple solid crystal processes, thereby improving or even avoiding missing parts defects; on the other hand, the display substrate includes multiple light-emitting structures, thereby reducing the number of transfers required, and thus effectively reducing the solid crystal time of a single display substrate and improving the solid crystal efficiency; in addition, the size of a single light-emitting element is also large enough, so that bad pixels can be repaired through vacuum adsorption holes. It should be noted that since the size of the light-emitting element provided in some of the above examples is also small, the display substrate can also improve pixel density or resolution.
  • the display substrate can improve or even eliminate the defect of missing parts, improve the efficiency of die bonding, and realize the repair of bad pixels. Therefore, the display substrate can effectively improve the product yield and production capacity.
  • the display substrate 300 further includes a plurality of micro-driving chips 320 , and the plurality of micro-driving chips 320 are disposed corresponding to the plurality of light-emitting elements 100 , and each micro-driving chip 320 is configured to drive the corresponding light-emitting element 100 to perform light-emitting display.
  • the display substrate 300 may further include a driving circuit board 330 and a chip-on-film 340 ; the driving circuit board 330 is connected to the driving substrate 310 via the chip-on-film 340 .
  • FIG10 is a partial schematic diagram of a display substrate provided by an embodiment of the present disclosure.
  • the driving substrate 310 includes a ground line GND, and the orthographic projection of the light-emitting element 100 on the driving substrate 510 overlaps with the ground line GND, thereby avoiding signal crosstalk and improving display quality.
  • the display substrate adopts the light-emitting element shown in FIG6 .
  • the orthographic projection of the micro-driving chip 320 on the driving substrate 510 also overlaps with the ground line GND.
  • the driving substrate 310 includes a first signal line VR, a second signal line VGB, an operating voltage line VCC and a data line DATA
  • each micro-driving chip 320 includes an operating voltage terminal 322, a ground terminal 323, a data signal terminal 321, a first output terminal 324, a second output terminal 325 and a third output terminal 326;
  • the data signal terminal 321 is connected to the data line DATA through a first connecting line 371
  • the operating voltage terminal 322 is connected to the operating voltage line VCC through a second connecting line 372
  • the ground terminal 323 is connected to the ground line GND through a third connecting line 373.
  • the orthographic projection of the light emitting element 100 on the driving substrate 510 overlaps with the interval between the ground line GND and the first signal line VR, thereby avoiding signal crosstalk and improving display quality.
  • the orthographic projection of the micro driving chip 320 on the driving substrate 510 also overlaps with the space between the ground line GND and the data line DATA.
  • the first output terminal 324 is connected to the second electrode of the first light emitting structure 121 (through the above-mentioned pad and connection electrode), the second output terminal 325 is connected to the second electrode of the second light emitting structure 122, and the third output terminal 326 is connected to the second electrode of the third light emitting structure 123.
  • the first signal line VR is connected to the first electrode of the first light emitting structure 121 through the fourth connection line 374, the second signal line VGB is connected to the first electrode of the second light emitting structure 122 through the fifth connection line 375, and the second signal line VGB is connected to the first electrode of the third light emitting structure 123 through the sixth connection line 376.
  • the operating voltage line VCC includes a first operating voltage line VCC1 and a second operating voltage line VCC2; the first operating voltage line VCC1, the first signal line VR, the second signal line VGB, the ground line GND and the data line DATA extend along a third direction, and the second operating voltage line VCC2 extends along a fourth direction intersecting the third direction.
  • the fifth connection line 375 and the sixth connection line 376 are connected to the second signal line VGB after they intersect, thereby saving materials.
  • Fig. 11 is a partial schematic diagram of another display substrate provided by an embodiment of the present disclosure. As shown in Fig. 11, different from Fig. 10, the display substrate adopts the light emitting element shown in Fig. 5.
  • the driving substrate 310 includes a first signal line VR, a second signal line VGB, an operating voltage line VCC and a data line DATA
  • each micro-driving chip 320 includes an operating voltage terminal 322, a ground terminal 323, a data signal terminal 321, a first output terminal 324, a second output terminal 325 and a third output terminal 326;
  • the data signal terminal 321 is connected to the data line DATA through a first connecting line 371
  • the operating voltage terminal 322 is connected to the operating voltage line VCC through a second connecting line 372
  • the ground terminal 323 is connected to the ground line GND through a third connecting line 373.
  • the orthographic projection of the light emitting element 100 on the driving substrate 510 overlaps with the interval between the ground line GND and the first signal line VR, thereby avoiding signal crosstalk and improving display quality.
  • the orthographic projection of the micro driving chip 320 on the driving substrate 510 also overlaps with the space between the ground line GND and the data line DATA.
  • the first output terminal 324 is connected to the second electrode of the first light emitting structure 121 (through the above-mentioned pad and connection electrode), the second output terminal 325 is connected to the second electrode of the second light emitting structure 122, and the third output terminal 326 is connected to the second electrode of the third light emitting structure 123.
  • the first signal line VR is connected to the first electrode of the first light emitting structure 121 through the fourth connection line 374, the second signal line VGB is connected to the first electrode of the second light emitting structure 122 through the fifth connection line 375, and the second signal line VGB is connected to the first electrode of the third light emitting structure 123 through the sixth connection line 376.
  • the operating voltage line VCC includes a first operating voltage line VCC1 and a second operating voltage line VCC2; the first operating voltage line VCC1, the first signal line VR, the second signal line VGB, the ground line GND and the data line DATA extend along a third direction, and the second operating voltage line VCC2 extends along a fourth direction intersecting the third direction.
  • Fig. 12 is a partial schematic diagram of another display substrate provided by an embodiment of the present disclosure. As shown in Fig. 12, different from Fig. 10, the display substrate adopts the light emitting element shown in Fig. 7.
  • the first output terminal 324 is connected to the second pole of the first light-emitting structure 121 (through the above-mentioned pad and connecting electrode), the second output terminal 325 is connected to the second pole of the second light-emitting structure 122, and the third output terminal 326 is connected to the second pole of the third light-emitting structure 123.
  • the first signal line VR is connected to the first pole of the first light-emitting structure 121 through the fourth connecting line 374
  • the second signal line VGB is connected to the first pole of the second light-emitting structure 122 and the first pole of the third light-emitting structure 123 through the fifth connecting line 375.
  • the display substrate can save a connecting line.
  • the first output terminal of the micro-drive chip needs to be wound to be connected to the second pole of the first light-emitting structure.
  • Fig. 13 is a partial schematic diagram of another display substrate provided by an embodiment of the present disclosure. As shown in Fig. 13, different from Fig. 12, the display substrate adopts the light emitting element shown in Fig. 8.
  • the first output terminal 324 is connected to the second pole of the first light emitting structure 121 (through the above-mentioned pad and connecting electrode), the second output terminal 325 is connected to the second pole of the second light emitting structure 122, and the third output terminal 326 is connected to the second pole of the third light emitting structure 123.
  • the first signal line VR is connected to the first pole of the first light emitting structure 121 through the fourth connecting line 374, and the second signal line VGB is connected to the first pole of the second light emitting structure 122 and the first pole of the third light emitting structure 123 through the fifth connecting line 375.
  • the first output terminal of the micro-driving chip and the second pole of the first light emitting structure do not need to be connected by winding, so the display substrate can reduce the area of the connecting line, thereby improving the transmittance.
  • FIG14 is a schematic diagram of a display device provided by an embodiment of the present disclosure.
  • the display device 500 includes the above-mentioned display substrate 3100.
  • the display device has a technical effect corresponding to the beneficial technical effect of the liquid crystal display panel included therein.
  • the display device may be an electronic product with a display function, such as a television, a monitor, an electronic picture frame, an electronic photo frame, a navigator, a notebook computer, a tablet computer, a smart phone, or the like.
  • a display function such as a television, a monitor, an electronic picture frame, an electronic photo frame, a navigator, a notebook computer, a tablet computer, a smart phone, or the like.

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Abstract

一种发光元件、显示基板和显示装置。该发光元件包括衬底、多个发光结构、填平层、连接电极层、绝缘层和多个焊盘;多个发光结构位于衬底上;填平层位于多个发光结构之间;连接电极层位于填平层远离衬底的一侧;绝缘层位于连接电极层远离填平层的一侧;多个焊盘位于绝缘层远离所述连接电极层的一侧;各发光结构包括第一极和第二极,连接电极层包括多个连接电极,各连接电极与至少一个发光结构的第一极或第二极相连;该发光元件还包括位于绝缘层中的多个开孔,多个焊盘通过多个开孔与多个连接电极相连。由此,该发光元件可改善甚至避免缺件不良、提高固晶效率。

Description

发光元件、显示基板和显示装置 技术领域
本公开的实施例涉及一种发光元件、显示基板和显示装置。
背景技术
微发光结构(Micro LED)显示技术是以可自发光的微发光结构作为发光单元,并将这些微发光结构阵列设置在驱动基板上的一种显示技术。由于直接采用微发光结构作为发光单元,因此微发光结构显示技术具有亮度高、分辨率高、对比度高、能耗低、响应速度快、热稳定性好等优势。
通常,次毫米发光二极管(Mini Light Emitting Diode,简称Mini LED)尺寸约为100-300μm;微型发光二极管(Micro Light Emitting Diode,简称Micro LED)尺寸为100μm以下。
发明内容
本公开实施例提供一种发光元件、显示基板和显示装置。该发光元件包括衬底、多个发光结构、填平层、连接电极层、绝缘层和多个焊盘;多个发光结构位于衬底上;填平层位于多个发光结构之间;连接电极层位于填平层远离衬底的一侧;绝缘层位于连接电极层远离填平层的一侧;多个焊盘位于绝缘层远离所述连接电极层的一侧;各发光结构包括第一极和第二极,连接电极层包括多个连接电极,各连接电极与至少一个发光结构的第一极或第二极相连;该发光元件还包括位于绝缘层中的多个开孔,多个焊盘通过多个开孔与多个连接电极相连。由此,该发光元件将多个发光结构封装在一起,因此仅需一次固晶工艺,无需针对不同颜色的微发光结构进行多次固晶工艺;一方面,该发光元件可避免多次固晶工艺中产生的干涉问题,从而可改善甚至避免缺件不良;另一方面,该发光元件还可有效降低单个显示基板的固晶时间,提高固晶效率;另外,单个发光元件的尺寸也足够大,从而可通过真空吸附孔进行坏点维修。
本公开至少一个实施例提供一种发光元件,其包括:衬底;多个发光结构,位于所述衬底上;填平层,位于所述多个发光结构之间;连接电极层,位于所述填平层远离所述衬底的一侧;绝缘层,位于所述连接电极层远离所述填平层的一侧;以及多个焊盘,位于所述绝缘层远离所述连接电极层的一侧,各所述 发光结构包括第一极和第二极,所述连接电极层包括多个连接电极,各所述连接电极与至少一个所述发光结构的第一极或第二极相连;所述发光元件还包括多个开孔,位于所述绝缘层中,所述多个焊盘通过所述多个开孔与所述多个连接电极相连。
例如,在本公开一实施例提供的发光元件中,所述多个发光结构的数量为N,所述多个焊盘的数量的取值范围为N+1至2N。例如,在本公开一实施例提供的发光元件中,各所述焊盘相对于所述衬底的高度大于所述绝缘层相对于所述衬底的高度。
例如,在本公开一实施例提供的发光元件中,所述衬底包括蓝宝石衬底。
例如,在本公开一实施例提供的发光元件中,相邻两个所述发光结构之间的距离小于100微米。
例如,在本公开一实施例提供的发光元件中,所述连接电极在所述衬底上的正投影大于与所述连接电极相连的所述焊盘在所述衬底上的正投影。例如,在本公开一实施例提供的发光元件中,所述多个发光结构包括第一发光结构、第二发光结构和第三发光结构,所述第一发光结构被配置为发第一颜色的光,所述第二发光结构被配置为发第二颜色的光,所述第三发光结构被配置为发第三颜色的光。
例如,在本公开一实施例提供的发光元件中,所述多个连接电极包括第一连接电极、第二连接电极、第三连接电极、第四连接电极、第五连接电极和第六连接电极,所述多个焊盘包括第一焊盘、第二焊盘、第三焊盘、第四焊盘、第五焊盘和第六焊盘;所述第一连接电极和所述第二连接电极分别将所述第一发光结构的第一极和第二极与所述第一焊盘和所述第二焊盘相连;所述第三连接电极和所述第四连接电极分别将所述第二发光结构的第一极和第二极与所述第三焊盘和所述第四焊盘相连;所述第五连接电极和所述第六连接电极分别将所述第三发光结构的第一极和第二极与所述第五焊盘和所述第六焊盘相连。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘和所述第二焊盘沿第一方向排列,所述第五焊盘和所述第六焊盘沿所述第一方向排列,所述第一焊盘和所述第五焊盘在与所述第一方向相交的第二方向上相对间隔设置,所述第二焊盘和所述第六焊盘在所述第二方向上相对间隔设置;所述第三焊盘位于所述第五焊盘远离所述第六焊盘的一侧,所述第四焊盘位于所述第一焊盘远离所述第二焊盘的一侧,所述第三焊盘和所述第四焊盘在所述第二方向上相 对间隔设置;所述第一发光结构、所述第二发光结构和所述第三发光结构位于所述第二焊盘的中心和所述第六焊盘的中心之间的第一连线和所述第三焊盘的中心和所述第四焊盘的中心之间的第二连线之间。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘和所述第五焊盘之间具有第一间隔,所述第二焊盘和所述第六焊盘之间具有第二间隔;所述第三焊盘和所述第四焊盘之间具有第三间隔,所述第一发光结构、所述第二发光结构和所述第三发光结构位于所述第二间隔和所述第三间隔之间的区域。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘的面积小于所述第二焊盘的面积,所述第五焊盘的面积小于所述第六焊盘的面积,所述第一发光结构和所述第三发光结构位于所述第一焊盘和所述第五焊盘之间。
例如,在本公开一实施例提供的发光元件中,所述第二发光结构位于所述第一发光结构的中心和所述第三发光结构的中心之间的第三连线与所述第二连线之间。
例如,在本公开一实施例提供的发光元件中,所述第一发光结构的中心、所述第二发光结构的中心和所述第三发光结构的中心之间的连线构成三角形。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘、所述第三焊盘和所述第五焊盘沿第一方向排列,所述第二焊盘,所述第四焊盘和所述第六焊盘沿所述第一方向排列;所述第一焊盘和所述第二焊盘在与所述第一方向相交的第二方向相对间隔设置,所述第三焊盘和所述第四焊盘在所述第二方向相对间隔设置,所述第五焊盘和所述第六焊盘在所述第二方向相对间隔设置;所述第一发光结构位于所述第一焊盘和所述第二焊盘之间,所述第二发光结构位于所述第三焊盘和所述第四焊盘之间,所述第三发光结构位于所述第五焊盘和所述第六焊盘之间。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘、所述第二焊盘、所述第三焊盘、所述第四焊盘、所述第五焊盘和所述第六焊盘在所述衬底上的正投影的尺寸大致相同。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘与所述第一发光结构的第一极相连,所述第三焊盘与所述第二发光结构的第一极相连,所述第五焊盘与所述第三发光结构的第一极相连;所述第二焊盘与所述第一发光结构的第二极相连,所述第四焊盘与所述第二发光结构的第二极相连,所述第六焊盘与所述第三发光结构的第二极相连。
例如,在本公开一实施例提供的发光元件中,所述发光元件在所述第一方向上的尺寸小于等于500微米。
例如,在本公开一实施例提供的发光元件中,所述多个连接电极包括第一连接电极、第二连接电极、第三连接电极、第四连接电极、第五连接电极和第六连接电极,所述多个焊盘包括第一焊盘、第二焊盘、第三焊盘、第四焊盘和第五焊盘;所述第一连接电极和所述第二连接电极分别将所述第一发光结构的第一极和第二极与所述第一焊盘和所述第二焊盘相连;所述第三连接电极和所述第四连接电极分别将所述第二发光结构的第一极和第二极与所述第三焊盘和所述第四焊盘相连;所述第五连接电极和所述第六连接电极分别将所述第三发光结构的第一极和第二极与所述第三焊盘和所述第五焊盘相连。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘和所述第二焊盘沿第一方向排列,且相对间隔设置,所述第四焊盘和所述第五焊盘沿所述第一方向排列,且相对间隔设置,所述第四焊盘和所述第一焊盘在与所述第一方向相交的第二方向上相对间隔设置,所述第三焊盘设置在所述第一焊盘、所述第二焊盘、所述第四焊盘和所述第五焊盘所围成的区域之中,所述第一发光结构位于所述第一焊盘和所述第二焊盘之间,所述第二发光结构位于所述第一焊盘和第四焊盘之间,所述第三发光结构位于所述第四焊盘和所述第五焊盘之间。
例如,在本公开一实施例提供的发光元件中,所述第一发光结构和所述第三发光结构分别位于所述第三焊盘在所述第二方向上的两侧。
例如,在本公开一实施例提供的发光元件中,所述发光元件在所述第一方向上的尺寸小于等于250微米。
例如,在本公开一实施例提供的发光元件中,所述第一焊盘和所述第二焊盘沿第一方向排列,且相对间隔设置,所述第三焊盘和所述第五焊盘沿所述第一方向排列,且相对间隔设置,所述第三焊盘和所述第一焊盘在与所述第一方向相交的第二方向上相对间隔设置,所述第四焊盘设置在所述第一焊盘、所述第二焊盘、所述第三焊盘和所述第五焊盘所围成的区域之中,所述第一发光结构位于所述第一焊盘和所述第二焊盘之间,所述第二发光结构位于所述第一焊盘和第三焊盘之间,所述第三发光结构位于所述第三焊盘和所述第五焊盘之间。
例如,在本公开一实施例提供的发光元件中,所述第一颜色为绿色,所述 第二颜色为红色,所述第三颜色为蓝色。
本公开至少一个实施例还提供一种显示基板,其包括:驱动基板;以及多个发光元件,阵列设置在所述驱动基板上,所述多个发光元件包括上述任一项所述的发光元件。
例如,在本公开一实施例提供的显示基板中,其还包括:多个微驱动芯片,与所述多个发光元件对应设置,各所述微驱动芯片被配置为驱动对应的发光元件进行发光显示。
例如,在本公开一实施例提供的显示基板中,所述驱动基板包括接地线,所述发光元件在所述驱动基板上的正投影与所述接地线交叠。
例如,在本公开一实施例提供的显示基板中,所述驱动基板包括第一信号线、第二信号线、工作电压线和数据线,各所述微驱动芯片包括数据信号端、工作电压端、接地端、第一输出端、第二输出端和第三输出端;所述数据信号端通过第一连接线与所述数据线相连,所述工作电压端通过第二连接线与所述工作电压线相连,所述接地端通过第三连接线与所述接地线相连,所述第一输出端与所述第一发光结构的第二极相连,所述第二输出端与所述第二发光结构的第二极相连,所述第三输出端与所述第三发光结构的第二极相连;所述第一信号线通过第四连接线与所述第一发光结构的第一极相连,所述第二信号线通过第五连接线与所述第二发光结构的第一极相连,所述第二信号线通过第五连接线与所述第二发光结构的第一极相连,所述第二信号线通过第六连接线与所述第三发光结构的第一极相连。
本公开至少一个实施例还提供一种显示装置,其包括上述任一项所述的显示基板。
附图说明
为了更清楚地说明本公开实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本公开的限制。
图1为一种显示基板中单个像素的驱动方式的示意图;
图2A-2C示出了显示基板的缺件不良;
图3示出了一种显示基板在固晶工艺中的干涉现象;
图4为本公开一实施例提供的一种发光元件的平面示意图;
图5为本公开一实施例提供的一种发光元件沿图4中AB方向的剖面示意图;
图6为本公开一实施例提供的另一种发光元件的平面示意图;
图7为本公开一实施例提供的另一种发光元件的平面示意图;
图8为本公开一实施例提供的另一种发光元件的平面示意图;
图9为本公开一实施例提供的一种显示基板的平面示意图;
图10为本公开一实施例提供的一种显示基板的局部示意图;
图11为本公开一实施例提供的另一种显示基板的局部示意图;
图12为本公开一实施例提供的另一种显示基板的局部示意图;
图13为本公开一实施例提供的另一种显示基板的局部示意图;
图14为本公开一实施例提供的一种显示装置的示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。
除非另外定义,本公开实施例中使用的“平行”、“垂直”和“相同”等特征均包括严格意义上的“平行”、“垂直”、“相同”等情况,以及“大致平行”、“大致垂直”、“大致相同”等包含一定误差的情况。例如,上述的“大致”可表示所比较的对象的差值为所比较的对象的平均值的10%,或者5%之内。在本公开实施例的下文中没有特别指出一个部件或元件的数量时,意味着该部件或元件可以是一个也可以是多个,或可理解为至少一个。“至少一个”指一个或多 个,“多个”指至少两个。
图1为一种显示基板中单个像素的驱动方式的示意图。如图1所示,该显示基板中的单个的像素10可由三颗微发光结构组成,这三颗微发光结构可包括红光微发光结构11(R-LED)、绿光微发光结构12(G-LED)和蓝光发光结构13(B-LED);单个像素10可由一个微驱动芯片20控制,该微驱动芯片20包括三个输入端和三个输出端;这三个输入端包括数据端21、工作电压端22和接地端23,数据端21可与数据线21相连,工作电压端22可与工作电压线32相连,接地端23可与接地线33相连;这三个输出端包括第一输出端24、第二输出端25和第三输出端26,第一输出端24可为红光微发光结构11提供低电压,第二输出端25可为绿光微发光结构12提供低电压,第三输出端25可为蓝光微发光结构13提供低电压。每个微发光结构可包括两个引脚,其中之一可与上述的三个输出端之一相连,另外一个可与提供高电压的信号线相连。例如,红光发光结构11与第一信号线51相连,绿色发光结构12和蓝色发光结构13与第二信号线52相连。由此,微驱动芯片可通过控制三个输出端的电压信号来控制红光微发光结构(R-LED)、绿光微发光结构(G-LED)和蓝光发光结构(B-LED)的亮度,从而实现显示功能。
然而,由于显示效果的要求,单颗微发光结构的尺寸设置为150*90μm左右,并且单个像素内部中的微发光结构之间的间隔约为100μm(由于RW真空吸附孔最小尺寸为100μm)。这种尺寸在针刺式固晶工艺中容易出现缺件不良,不良情况如图2A-图2C所示。如图2A-2C所示,这三个像素均出现部分微发光结构缺失的情况。
经过研究,如图3所示,上述的缺件不良主要是因为微发光结构之间的间距过小,导致在固晶工艺中出现干涉现象。例如,三种微发光结构依次固晶,先固晶红光微发光结构,然后在固晶绿色微发光结构和蓝光发光结构的过程中,晶圆(Wafer)上的微发光结构芯片会和驱动基板上的红光微发光结构发生干涉,驱动基板上的微发光结构芯片被带走,从而导致了缺件不良。
另一方面,由于单个显示基板中的微发光结构的数量较大,例如在50万颗以上,单个显示基板的固晶时间超过16h,因此也成为限制产能的瓶颈。并且,由于微发光结构芯片的尺寸较小,例如,150*90微米,真空吸附孔直径最小为100微米,无法实现针对坏点的维修。
综上所述,如何提高缺件不良、如何提高固晶效率、如何实现坏点维修是 提高产品良率和产能的关键问题。
对此,本公开实施例提供一种发光元件、显示基板和显示装置。该发光元件包括衬底、多个发光结构、填平层、连接电极层、绝缘层和多个焊盘;多个发光结构位于衬底上;填平层位于多个发光结构之间;连接电极层位于填平层远离衬底的一侧;绝缘层位于连接电极层远离填平层的一侧;多个焊盘位于绝缘层远离所述连接电极层的一侧;各发光结构包括第一极和第二极,连接电极层包括多个连接电极,各连接电极与至少一个发光结构的第一极或第二极相连;该发光元件还包括位于绝缘层中的多个开孔,多个焊盘通过多个开孔与多个连接电极相连。由此,该发光元件将多个发光结构封装在一起,因此仅需一次固晶工艺,无需针对不同颜色的微发光结构进行多次固晶工艺;一方面,该发光元件可避免多次固晶工艺中产生的干涉问题,从而可改善甚至避免缺件不良;另一方面,该发光元件还可有效降低单个显示基板的固晶时间,提高固晶效率;另外,单个发光元件的尺寸也足够大,从而可通过真空吸附孔进行坏点维修。
下面,结合附图对本公开实施例提供的发光元件、显示基板和显示装置进行详细的说明。
本公开一实施例提供一种发光元件。图4为本公开一实施例提供的一种发光元件的平面示意图;图5为本公开一实施例提供的一种发光元件沿图4中AB方向的剖面示意图。
如图4和图5所示,该发光元件100包括衬底110、多个发光结构120、填平层130、连接电极层140、绝缘层150和多个焊盘160;多个发光结构120位于衬底110上;填平层130位于多个发光结构120之间;连接电极层140位于填平层130远离衬底110的一侧;绝缘层150位于连接电极层140远离填平层130的一侧;多个焊盘160位于绝缘层150远离连接电极层140的一侧。各发光结构120包括第一极210和第二极220,连接电极层140包括多个连接电极145,各连接电极145与至少一个发光结构120的第一极210或第二极220相连。该发光元件100还包括位于绝缘层150中的多个开孔155,多个焊盘160通过多个开孔155与多个连接电极145相连。需要说明的是,本文中的“发光结构”通常指微发光结构;另外,本文中的“发光结构”未经封装,仅包括PN结、发光层和其他辅助发光的功能层,并非通常的单颗发光二极管。
在本公开实施例提供的发光元件中,多个发光结构位于衬底上,并通过填 平层、连接电极层、绝缘层和多个焊盘封装在一起,因此该发光元件在应用于显示基板时仅需一次固晶工艺便可全部组装在驱动基板上,无需针对不同颜色的微发光结构进行多次固晶工艺。在这种情况下,一方面,该发光元件可避免多次固晶工艺中产生的干涉问题,从而可改善甚至避免缺件不良;另一方面,该发光元件包括多个发光结构,从而可降低需要转移的次数,因此还可有效降低单个显示基板的固晶时间,提高固晶效率;另外,单个发光元件的尺寸也足够大,从而可通过真空吸附孔进行坏点维修。在一些示例中,如图4和图5所示,三个发光结构120位于衬底110上;连接电极层140包括六个连接电极145,这六个连接电极145分别与三个发光结构120的三个第一极210和三个第二极220相连,然后再通过六个开孔155与六个焊盘160相连。由此,可通过这六个焊盘向这三个发光结构的三个第一极和三个第二极施加电信号。需要说明的是,在该实施例中,一个连接电极仅连接一个发光结构的一个电极,但本公开包括但不限于此,在某些情况下,也可一个连接电极连接多个发光结构的电极,实现多个发光结构共用一个电信号。
在一些示例中,当多个发光结构120的数量为N时,多个焊盘160的数量的取值范围为N+1至2N;也就是说,多个发光结构中的至少两个发光结构的电极可共用一个焊盘。
在一些示例中,如图4所示,连接电极145在衬底110上的正投影大于与该连接电极145相连的焊盘160在衬底110上的正投影,从而可保证它们之间电连接的可靠性和耐用性。在一些示例中,如图4和图5所示,各焊盘160相对于衬底110的高度大于绝缘层150相对于衬底110的高度。例如,在垂直于衬底110的方向上,焊盘160的厚度也可大于绝缘层150的厚度。
在一些示例中,如图4和图5所示,衬底110可为蓝宝石衬底。当然,本公开包括但不限于此。
在一些示例中,如图4和图5所示,相邻两个发光结构120之间的距离小于100微米。由此,该发光元件还可进一步提高集成度,从而可提高采用该发光结构封装块的显示基板的分辨率。
在一些示例中,如图4和图5所示,单个发光元件100包括的多个发光结构120包括发不同颜色光的发光结构120。
在一些示例中,如图4和图5所示,多个发光结构120包括第一发光结构121、第二发光结构122和第三发光结构123;第一发光结构被121配置为发第 一颜色的光,第二发光结构122被配置为发第二颜色的光,第三发光结构123被配置为发第三颜色的光。需要说明的是,第一颜色、第二颜色和第三颜色不同。
在一些示例中,第一颜色为红色,第二颜色为绿色,第三颜色为蓝色。当然,本公开包括但不限于此,上述的第一颜色、第二颜色和第三颜色也可为其他颜色。
在一些示例中,如图4所示,多个连接电极145包括第一连接电极145A、第二连接电极145B、第三连接电极145C、第四连接电极145D、第五连接电极145E和第六连接电极145F;多个焊盘160包括第一焊盘160A、第二焊盘160B、第三焊盘160C、第四焊盘160D、第五焊盘160E和第六焊盘160F。第一连接电极145A和第二连接电极145B分别将第一发光结构121的第一极210和第二极220与第一焊盘160A和第二焊盘160B相连;第三连接电极145C和第四连接电极145D分别将第二发光结构122的第一极210和第二极220与第三焊盘160C和第四焊盘160D相连;第五连接电极145E和第六连接电极145F分别将第三发光结构123的第一极210和第二极220与第五焊盘160E和第六焊盘160F相连。
在一些示例中,如图4所示,第一焊盘160A、第三焊盘160C和第五焊盘160E沿第一方向排列,第二焊盘160B,第四焊盘160D和第六焊盘160F沿第一方向排列;第一焊盘160A和第二焊盘160B在与第一方向相交的第二方向相对间隔设置,第三焊盘160C和第四焊盘160D在第二方向相对间隔设置,第五焊盘160E和第六焊盘160F在第二方向相对间隔设置;第一发光结构121位于第一焊盘160A和第二焊盘160B之间,第二发光结构122位于第三焊盘160C和第四焊盘160D之间,第三发光结构123位于第五焊盘160E和第六焊盘160F之间。
在一些示例中,如图4所示,第一焊盘160A、第二焊盘160B、第三焊盘160C、第四焊盘160D、第五焊盘160E和第六焊盘160F在衬底110上的正投影的尺寸大致相同;例如,第一焊盘160A、第二焊盘160B、第三焊盘160C、第四焊盘160D、第五焊盘160E和第六焊盘160F在衬底110上的正投影的面积之间的差值小于它们在衬底110上的正投影的面积的平均值的10%。
在一些示例中,如图4所示,第一焊盘160A与第一发光结构121的第一极相连,第三焊盘160C与第二发光结构122的第一极相连,第五焊盘160E 与第三发光结构123的第一极相连;第二焊盘160B与第一发光结构121的第二极相连,第四焊盘160D与第二发光结构122的第二极相连,第六焊盘160F与第三发光结构123的第二极相连。
在一些示例中,如图4所示,发光元件100在第一方向上的尺寸小于等于500微米,例如400微米。由此,通常的三个发光结构的尺寸为150*90微米,相邻发光结构之间的间隔为100微米左右,因此通常的三个发光结构所占的尺寸为570微米,而本公开实施例提供的发光元件在第一方向的尺寸小于等于500微米,因此该发光元件提高了多个发光结构之间的集成度。
图6为本公开一实施例提供的另一种发光元件的平面示意图。与图4所示的发光元件不同的是,如图6所示,第一焊盘160A和第二焊盘160B沿第一方向排列,第五焊盘160E和第六焊盘160F沿所述第一方向排列,第一焊盘160A和第五焊盘160E在与第一方向相交的第二方向上相对间隔设置,第二焊盘160B和第六焊盘160F在第二方向上相对间隔设置;第三焊盘160C位于第五焊盘160E远离第六焊盘160F的一侧,第四焊盘160D位于第一焊盘160A远离第二焊盘160B的一侧,第三焊盘160C和第四焊盘160D在第二方向上相对间隔设置;第一发光结构121、第二发光结构122和第三发光结构123位于第二焊盘160B的中心和第六焊盘160F的中心之间的第一连线201和第三焊盘160C的中心和第四焊盘160D的中心之间的第二连线202之间。由此,该发光元件可在固晶工艺中避免顶针直接与发光结构接触,从而可避免顶针损伤发光结构,进而可提高产品良率。
例如,第二方向与第一方向可相互垂直。当然,本公开包括但不限于此。
在一些示例中,如图6所示,第一焊盘160A和第五焊盘160E之间具有第一间隔S1,第二焊盘160B和第六焊盘160F之间具有第二间隔S2;第三焊盘160C和第四焊盘160D之间具有第三间隔S3,第一发光结构121、第二发光结构122和第三发光结构123位于第二间隔S2和第三间隔S3之间的区域。由此,该发光元件可在固晶工艺中更好地避免顶针损伤发光结构。
在一些示例中,如图6所示,第一焊盘160A的面积小于第二焊盘160B的面积,第五焊盘160E的面积小于第六焊盘160F的面积,从而使得第一焊盘160A和第五焊盘160E之间的空间较大。此时,第一发光结构121和第三发光结构123位于第一焊盘160A和第五焊盘160E之间。由此,该发光元件可在固晶工艺中更好地避免顶针损伤发光结构。
在一些示例中,如图6所示,第二发光结构122位于第一发光结构121的中心和第三发光结构123的中心之间的第三连线203与第二连线202之间。由此,该发光元件可在固晶工艺中更好地避免顶针损伤发光结构。
在一些示例中,如图6所示,第一发光结构121的中心、第二发光结构122的中心和第三发光结构123的中心之间的连线构成三角形。
在一些示例中,如图6所示,发光元件100在第一方向上的尺寸小于等于500微米,例如400微米。由此,通常的三个发光结构的尺寸为150*90微米,相邻发光结构之间的间隔为100微米左右,因此通常的三个发光结构所占的尺寸为570微米,而本公开实施例提供的发光元件在第一方向的尺寸小于等于500微米,因此该发光元件提高了集成度。
图7为本公开一实施例提供的另一种发光元件的平面示意图。如图7所示,多个连接电极145包括第一连接电极145A、第二连接电极145B、第三连接电极145C、第四连接电极145D、第五连接电极145E和第六连接电极145F,多个焊盘160包括第一焊盘160A、第二焊盘160B、第三焊盘160C、第四焊盘160D和第五焊盘160E;第一连接电极145A和第二连接电极145B分别将第一发光结构121的第一极210和第二极220与第一焊盘160A和第二焊盘160B相连;第三连接电极160C和第四连接电极160D分别将第二发光结构122的第一极210和第二极220与第三焊盘160C和第四焊盘160D相连;第五连接电极145E和第六连接电极145F分别将第三发光结构123的第一极210和第二极220与第三焊盘160C和第五焊盘160E相连。由此,第二发光结构122的第一极210和第三发光结构123的第一极210共用第三焊盘160C,从而可进一步提高该发光元件的集成度,降低该发光元件的尺寸。
在一些示例中,如图7所示,第三连接电极145C和第五连接电极145E可集成为一体。
需要说明的是,通常绿色发光二极管的阳极和蓝色发光二极管的阳极可采用同样的电压,而红色发光二极管的阳极的电压不同;因此可共用同一个焊盘;此时,与该焊盘相连的连个连接电极也可集成为一体。
在一些示例中,发光元件在第一方向上的尺寸小于等于250微米,例如200微米。由此,通常的三个发光结构的尺寸为150*90微米,相邻发光结构之间的间隔为100微米左右,因此通常的三个发光结构所占的尺寸为570微米,而本公开实施例提供的发光元件在第一方向的尺寸小于等于250微米,因此该发 光元件大大提高了集成度,并降低了该发光元件的尺寸。
在一些示例中,如图7所示,第一焊盘160A和第二焊盘160B沿第一方向排列,且相对间隔设置;第四焊盘160D和第五焊盘160E沿第一方向排列,且相对间隔设置;第四焊盘160D和第一焊盘160A在与第一方向相交的第二方向上相对间隔设置;第三焊盘160C设置在第一焊盘160A、第二焊盘160B、第四焊盘160D和第五焊盘160E所围成的区域之中,第一发光结构121位于第一焊盘160A和第二焊盘160B之间,第二发光结构122位于第一焊盘160A和第四焊盘160D之间,第三发光结构123位于第四焊盘160D和第五焊盘160E之间。由此,该发光元件可在固晶工艺中避免顶针直接与发光结构接触,从而可避免顶针损伤发光结构,进而可提高产品良率。
在一些示例中,如图7所示,第一发光结构121和第三发光结构123分别位于第三焊盘160C在第二方向上的两侧。
图8为本公开一实施例提供的另一种发光元件的平面示意图。如图8所示,与图7不同的是,第一焊盘160A和第二焊盘160B沿第一方向排列,且相对间隔设置;第三焊盘160C和第五焊盘160E沿第一方向排列,且相对间隔设置;第三焊盘160C和第一焊盘160A在与第一方向相交的第二方向上相对间隔设置;第四焊盘160D设置在第一焊盘160A、第二焊盘160B、第三焊盘160C和第五焊盘160E所围成的区域之中,第一发光结构121位于第一焊盘160A和第二焊盘160B之间,第二发光结构122位于第一焊盘160A和第三焊盘160C之间,第三发光结构123位于第三焊盘160C和第五焊盘160E之间。由此,该发光元件可在固晶工艺中避免顶针直接与发光结构接触,从而可避免顶针损伤发光结构,进而可提高产品良率。另外,该发光元件还便于走线,降低连接线的面积,从而提高透过率。
本公开一实施例还提供一种显示基板。图9为本公开一实施例提供的一种显示基板的平面示意图。如图9所示,该显示基板300包括驱动基板310和阵列设置在驱动基板310的多个发光元件100;多个发光元件100包括上述示例中任一项提供的发光元件100。
在本公开实施例提供的显示基板中,由于发光元件中的多个发光结构位于衬底上,并通过填平层、连接电极层、绝缘层和多个焊盘封装在一起,因此该显示基板时仅需一次固晶工艺便可全部组装在驱动基板上,无需针对不同颜色的微发光结构进行多次固晶工艺。在这种情况下,一方面,该显示基板可避免 多次固晶工艺中产生的干涉问题,从而可改善甚至避免缺件不良;另一方面,该显示基板包括多个发光结构,从而可降低需要转移的次数,因此还可有效降低单个显示基板的固晶时间,提高固晶效率;另外,单个发光元件的尺寸也足够大,从而可通过真空吸附孔进行坏点维修。需要说明的是,由于上述一些示例提供的该发光元件的尺寸也较小,因此该显示基板还可提高像素密度或分辨率。
综上所述,该显示基板可改善甚至消除缺件不良、提高固晶效率、并可实现坏点维修。因此,该显示基板可有效地提高产品良率和产能。
在一些示例中,如图9所示,该显示基板300还包括多个微驱动芯片320,多个微驱动芯片320与多个发光元件100对应设置,各微驱动芯片320被配置为驱动对应的发光元件100进行发光显示。
在一些示例中,如图9所示,该显示基板300还可包括驱动电路板330和覆晶薄膜340;驱动电路板330通过覆晶薄膜340与驱动基板310相连。
图10为本公开一实施例提供的一种显示基板的局部示意图。如图10所示,驱动基板310包括接地线GND,发光元件100在驱动基板510上的正投影与接地线GND交叠,从而可避免信号串扰,提高显示品质。需要说明的是,该显示基板采用的图6所示的发光元件。
在一些示例中,如图10所示,微驱动芯片320在驱动基板510上的正投影也与接地线GND交叠。
在一些示例中,如图10所示,驱动基板310包括第一信号线VR、第二信号线VGB、工作电压线VCC和数据线DATA,各微驱动芯片320包括工作电压端322、接地端323、数据信号端321、第一输出端324、第二输出端325和第三输出端326;数据信号端321通过第一连接线371与数据线DATA相连,工作电压端322通过第二连接线372与工作电压线VCC相连,接地端323通过第三连接线373与接地线GND相连。
在一些示例中,如图10所示,发光元件100在驱动基板510上的正投影与接地线GND和第一信号线VR之间的间隔交叠,从而可避免信号串扰,提高显示品质。
在一些示例中,如图10所示,微驱动芯片320在驱动基板510上的正投影也与接地线GND和数据线DATA之间的间隔交叠。
在一些示例中,如图10所示,第一输出端324与第一发光结构121的第 二极相连(通过上述的焊盘和连接电极),第二输出端325与第二发光结构122的第二极相连,第三输出端326与第三发光结构123的第二极相连。第一信号线VR通过第四连接线374与第一发光结构121的第一极相连,第二信号线VGB通过第五连接线375与第二发光结构122的第一极相连,第二信号线VGB通过第六连接线376与第三发光结构123的第一极相连。
在一些示例中,如图10所示,工作电压线VCC包括第一工作电压线VCC1和第二工作电压线VCC2;第一工作电压线VCC1、第一信号线VR、第二信号线VGB、接地线GND和数据线DATA沿第三方向延伸,第二工作电压线VCC2沿与第三方向相交的第四方向延伸。
在一些示例中,如图10所示,第五连接线375和第六连接线376交汇之后再与第二信号线VGB相连,从而可节省材料。
图11为本公开一实施例提供的另一种显示基板的局部示意图。如图11所示,与图10不同的是,该显示基板采用的是图5所示的发光元件。
在一些示例中,如图11所示,驱动基板310包括第一信号线VR、第二信号线VGB、工作电压线VCC和数据线DATA,各微驱动芯片320包括工作电压端322、接地端323、数据信号端321、第一输出端324、第二输出端325和第三输出端326;数据信号端321通过第一连接线371与数据线DATA相连,工作电压端322通过第二连接线372与工作电压线VCC相连,接地端323通过第三连接线373与接地线GND相连。
在一些示例中,如图11所示,发光元件100在驱动基板510上的正投影与接地线GND和第一信号线VR之间的间隔交叠,从而可避免信号串扰,提高显示品质。
在一些示例中,如图11所示,微驱动芯片320在驱动基板510上的正投影也与接地线GND和数据线DATA之间的间隔交叠。
在一些示例中,如图11所示,第一输出端324与第一发光结构121的第二极相连(通过上述的焊盘和连接电极),第二输出端325与第二发光结构122的第二极相连,第三输出端326与第三发光结构123的第二极相连。第一信号线VR通过第四连接线374与第一发光结构121的第一极相连,第二信号线VGB通过第五连接线375与第二发光结构122的第一极相连,第二信号线VGB通过第六连接线376与第三发光结构123的第一极相连。
在一些示例中,如图11所示,工作电压线VCC包括第一工作电压线VCC1 和第二工作电压线VCC2;第一工作电压线VCC1、第一信号线VR、第二信号线VGB、接地线GND和数据线DATA沿第三方向延伸,第二工作电压线VCC2沿与第三方向相交的第四方向延伸。
图12为本公开一实施例提供的另一种显示基板的局部示意图。如图12所示,与图10不同的是,该显示基板采用的是图7所示的发光元件。
如图12所示,第一输出端324与第一发光结构121的第二极相连(通过上述的焊盘和连接电极),第二输出端325与第二发光结构122的第二极相连,第三输出端326与第三发光结构123的第二极相连。第一信号线VR通过第四连接线374与第一发光结构121的第一极相连,第二信号线VGB通过第五连接线375与第二发光结构122的第一极和第三发光结构123的第一极相连。由此,该显示基板可省掉一根连接线。需要说明的是,微驱动芯片的第一输出端需要绕线才能与第一发光结构的第二极相连。
图13为本公开一实施例提供的另一种显示基板的局部示意图。如图13所示,与图12不同的是,该显示基板采用的是图8所示的发光元件。
如图13所示,第一输出端324与第一发光结构121的第二极相连(通过上述的焊盘和连接电极),第二输出端325与第二发光结构122的第二极相连,第三输出端326与第三发光结构123的第二极相连。第一信号线VR通过第四连接线374与第一发光结构121的第一极相连,第二信号线VGB通过第五连接线375与第二发光结构122的第一极和第三发光结构123的第一极相连。并且,微驱动芯片的第一输出端和第一发光结构的第二极不需要绕线才能相连,因此该显示基板可降低连接线的面积,从而提高透过率。
本公开一实施例还提供一种显示装置。图14为本公开一实施例提供的一种显示装置的示意图。如图14所示,该显示装置500包括上述的显示基板3100。由此,该显示装置具有与其包括的液晶显示面板的有益技术效果对应的技术效果。
例如,该显示装置可为电视机、显示器、电子画框、电子相框、导航仪、笔记本电脑、平板电脑、智能手机等具有显示功能的电子产品。
有以下几点需要说明:
(1)本公开实施例附图中,只涉及到与本公开实施例涉及到的结构,其他结构可参考通常设计。
(2)在不冲突的情况下,本公开同一实施例及不同实施例中的特征可以 相互组合。
以上,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以权利要求的保护范围为准。

Claims (27)

  1. 一种发光元件,包括:
    衬底;
    多个发光结构,位于所述衬底上;
    填平层,位于所述多个发光结构之间;
    连接电极层,位于所述填平层远离所述衬底的一侧;
    绝缘层,位于所述连接电极层远离所述填平层的一侧;以及
    多个焊盘,位于所述绝缘层远离所述连接电极层的一侧,
    其中,各所述发光结构包括第一极和第二极,所述连接电极层包括多个连接电极,各所述连接电极与至少一个所述发光结构的第一极或第二极相连;多个
    所述发光元件还包括多个开孔,位于所述绝缘层中,所述多个焊盘通过所述多个开孔与所述多个连接电极相连。
  2. 根据权利要求1所述的发光元件,其中,所述多个发光结构的数量为N,所述多个焊盘的数量的取值范围为N+1至2N。
  3. 根据权利要求1所述的发光元件,其中,各所述焊盘相对于所述衬底的高度大于所述绝缘层相对于所述衬底的高度。
  4. 根据权利要求1所述的发光元件,其中,相邻两个所述发光结构之间的距离小于100微米。
  5. 根据权利要求1-4中任一项所述的发光元件,其中,所述连接电极在所述衬底上的正投影大于与所述连接电极相连的所述焊盘在所述衬底上的正投影。
  6. 根据权利要求1-4中任一项所述的发光元件,其中,所述多个发光结构包括第一发光结构、第二发光结构和第三发光结构,
    所述第一发光结构被配置为发第一颜色的光,所述第二发光结构被配置为发第二颜色的光,所述第三发光结构被配置为发第三颜色的光。
  7. 根据权利要求6所述的发光元件,其中,所述多个连接电极包括第一连接电极、第二连接电极、第三连接电极、第四连接电极、第五连接电极和第六连接电极,所述多个焊盘包括第一焊盘、第二焊盘、第三焊盘、第四焊盘、第五焊盘和第六焊盘;
    所述第一连接电极和所述第二连接电极分别将所述第一发光结构的第一极和第二极与所述第一焊盘和所述第二焊盘相连;
    所述第三连接电极和所述第四连接电极分别将所述第二发光结构的第一极和第二极与所述第三焊盘和所述第四焊盘相连;
    所述第五连接电极和所述第六连接电极分别将所述第三发光结构的第一极和第二极与所述第五焊盘和所述第六焊盘相连。
  8. 根据权利要求7所述的发光元件,其中,所述第一焊盘和所述第二焊盘沿第一方向排列,所述第五焊盘和所述第六焊盘沿所述第一方向排列,所述第一焊盘和所述第五焊盘在与所述第一方向相交的第二方向上相对间隔设置,所述第二焊盘和所述第六焊盘在所述第二方向上相对间隔设置;
    所述第三焊盘位于所述第五焊盘远离所述第六焊盘的一侧,所述第四焊盘位于所述第一焊盘远离所述第二焊盘的一侧,所述第三焊盘和所述第四焊盘在所述第二方向上相对间隔设置;
    所述第一发光结构、所述第二发光结构和所述第三发光结构位于所述第二焊盘的中心和所述第六焊盘的中心之间的第一连线和所述第三焊盘的中心和所述第四焊盘的中心之间的第二连线之间。
  9. 根据权利要求8所述的发光元件,其中,所述第一焊盘和所述第五焊盘之间具有第一间隔,所述第二焊盘和所述第六焊盘之间具有第二间隔;所述第三焊盘和所述第四焊盘之间具有第三间隔,
    所述第一发光结构、所述第二发光结构和所述第三发光结构位于所述第二间隔和所述第三间隔之间的区域。
  10. 根据权利要求8所述的发光元件,其中,所述第一焊盘的面积小于所述第二焊盘的面积,所述第五焊盘的面积小于所述第六焊盘的面积,所述第一发光结构和所述第三发光结构位于所述第一焊盘和所述第五焊盘之间。
  11. 根据权利要求10所述的发光元件,其中,所述第二发光结构位于所述第一发光结构的中心和所述第三发光结构的中心之间的第三连线与所述第二连线之间。
  12. 根据权利要求7所述的发光元件,其中,所述第一发光结构的中心、所述第二发光结构的中心和所述第三发光结构的中心之间的连线构成三角形。
  13. 根据权利要求7所述的发光元件,其中,所述第一焊盘、所述第三焊盘和所述第五焊盘沿第一方向排列,所述第二焊盘,所述第四焊盘和所述第六 焊盘沿所述第一方向排列;
    所述第一焊盘和所述第二焊盘在与所述第一方向相交的第二方向相对间隔设置,所述第三焊盘和所述第四焊盘在所述第二方向相对间隔设置,所述第五焊盘和所述第六焊盘在所述第二方向相对间隔设置;
    所述第一发光结构位于所述第一焊盘和所述第二焊盘之间,所述第二发光结构位于所述第三焊盘和所述第四焊盘之间,所述第三发光结构位于所述第五焊盘和所述第六焊盘之间。
  14. 根据权利要求13所述的发光元件,其中,所述第一焊盘、所述第二焊盘、所述第三焊盘、所述第四焊盘、所述第五焊盘和所述第六焊盘在所述衬底上的正投影的尺寸大致相同。
  15. 根据权利要求13所述的发光元件,其中,所述第一焊盘与所述第一发光结构的第一极相连,所述第三焊盘与所述第二发光结构的第一极相连,所述第五焊盘与所述第三发光结构的第一极相连;
    所述第二焊盘与所述第一发光结构的第二极相连,所述第四焊盘与所述第二发光结构的第二极相连,所述第六焊盘与所述第三发光结构的第二极相连。
  16. 根据权利要求8所述的发光元件,其中,所述发光元件在所述第一方向上的尺寸小于等于500微米。
  17. 根据权利要求6所述发光元件,其中,所述多个连接电极包括第一连接电极、第二连接电极、第三连接电极、第四连接电极、第五连接电极和第六连接电极,所述多个焊盘包括第一焊盘、第二焊盘、第三焊盘、第四焊盘和第五焊盘;
    所述第一连接电极和所述第二连接电极分别将所述第一发光结构的第一极和第二极与所述第一焊盘和所述第二焊盘相连;
    所述第三连接电极和所述第四连接电极分别将所述第二发光结构的第一极和第二极与所述第三焊盘和所述第四焊盘相连;
    所述第五连接电极和所述第六连接电极分别将所述第三发光结构的第一极和第二极与所述第三焊盘和所述第五焊盘相连。
  18. 根据权利要求17所述的发光元件,其中,所述第一焊盘和所述第二焊盘沿第一方向排列,且相对间隔设置,所述第四焊盘和所述第五焊盘沿所述第一方向排列,且相对间隔设置,所述第四焊盘和所述第一焊盘在与所述第一方向相交的第二方向上相对间隔设置,所述第三焊盘设置在所述第一焊盘、所 述第二焊盘、所述第四焊盘和所述第五焊盘所围成的区域之中,
    所述第一发光结构位于所述第一焊盘和所述第二焊盘之间,所述第二发光结构位于所述第一焊盘和第四焊盘之间,所述第三发光结构位于所述第四焊盘和所述第五焊盘之间。
  19. 根据权利要求18所述的发光元件,其中,所述第一发光结构和所述第三发光结构分别位于所述第三焊盘在所述第二方向上的两侧。
  20. 根据权利要求18所述的发光元件,其中,所述发光元件在所述第一方向上的尺寸小于等于250微米。
  21. 根据权利要求17所述的发光元件,其中,所述第一焊盘和所述第二焊盘沿第一方向排列,且相对间隔设置,所述第三焊盘和所述第五焊盘沿所述第一方向排列,且相对间隔设置,所述第三焊盘和所述第一焊盘在与所述第一方向相交的第二方向上相对间隔设置,所述第四焊盘设置在所述第一焊盘、所述第二焊盘、所述第三焊盘和所述第五焊盘所围成的区域之中,
    所述第一发光结构位于所述第一焊盘和所述第二焊盘之间,所述第二发光结构位于所述第一焊盘和第三焊盘之间,所述第三发光结构位于所述第三焊盘和所述第五焊盘之间。
  22. 根据权利要求6所述的发光元件,其中,所述第一颜色为绿色,所述第二颜色为红色,所述第三颜色为蓝色。
  23. 一种显示基板,包括:
    驱动基板;以及
    多个发光元件,阵列设置在所述驱动基板上,
    其中,所述多个发光元件包括根据权利要求1-22中任一项所述的发光元件。
  24. 根据权利要求23所述的显示基板,还包括:
    多个微驱动芯片,与所述多个发光元件对应设置,
    其中,各所述微驱动芯片被配置为驱动对应的发光元件进行发光显示。
  25. 根据权利要求24所述的显示基板,其中,所述驱动基板包括接地线,所述发光元件在所述驱动基板上的正投影与所述接地线交叠。
  26. 根据权利要求25所述的显示基板,其中,所述驱动基板包括第一信号线、第二信号线、工作电压线和数据线,各所述微驱动芯片包括数据信号端、工作电压端、接地端、第一输出端、第二输出端和第三输出端;
    所述数据信号端通过第一连接线与所述数据线相连,所述工作电压端通过第二连接线与所述工作电压线相连,所述接地端通过第三连接线与所述接地线相连,所述第一输出端与所述第一发光结构的第二极相连,所述第二输出端与所述第二发光结构的第二极相连,所述第三输出端与所述第三发光结构的第二极相连;
    所述第一信号线通过第四连接线与所述第一发光结构的第一极相连,所述第二信号线通过第五连接线与所述第二发光结构的第一极相连,所述第二信号线通过第五连接线与所述第二发光结构的第一极相连,所述第二信号线通过第六连接线与所述第三发光结构的第一极相连。
  27. 一种显示装置,包括根据权利要求23-26中任一项所述的显示基板。
PCT/CN2022/141541 2022-12-23 2022-12-23 发光元件、显示基板和显示装置 WO2024130724A1 (zh)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018180436A (ja) * 2017-04-20 2018-11-15 株式会社半導体エネルギー研究所 表示装置
CN111863797A (zh) * 2020-07-29 2020-10-30 京东方科技集团股份有限公司 一种显示基板、其制作方法及显示装置
CN113903850A (zh) * 2021-09-30 2022-01-07 苏州芯聚半导体有限公司 显示面板
CN113964149A (zh) * 2021-10-26 2022-01-21 上海天马微电子有限公司 显示面板及其制备方法、显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018180436A (ja) * 2017-04-20 2018-11-15 株式会社半導体エネルギー研究所 表示装置
CN111863797A (zh) * 2020-07-29 2020-10-30 京东方科技集团股份有限公司 一种显示基板、其制作方法及显示装置
CN113903850A (zh) * 2021-09-30 2022-01-07 苏州芯聚半导体有限公司 显示面板
CN113964149A (zh) * 2021-10-26 2022-01-21 上海天马微电子有限公司 显示面板及其制备方法、显示装置

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