WO2024122463A1 - 結晶性酸化物半導体膜、積層構造体、及び半導体装置 - Google Patents

結晶性酸化物半導体膜、積層構造体、及び半導体装置 Download PDF

Info

Publication number
WO2024122463A1
WO2024122463A1 PCT/JP2023/043114 JP2023043114W WO2024122463A1 WO 2024122463 A1 WO2024122463 A1 WO 2024122463A1 JP 2023043114 W JP2023043114 W JP 2023043114W WO 2024122463 A1 WO2024122463 A1 WO 2024122463A1
Authority
WO
WIPO (PCT)
Prior art keywords
oxide semiconductor
semiconductor film
crystalline oxide
film
peaks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/043114
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
崇寛 坂爪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Chemical Co Ltd
Original Assignee
Shin Etsu Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Chemical Co Ltd filed Critical Shin Etsu Chemical Co Ltd
Priority to KR1020257018076A priority Critical patent/KR20250119538A/ko
Priority to JP2024562738A priority patent/JPWO2024122463A1/ja
Priority to CN202380083237.8A priority patent/CN120345061A/zh
Priority to EP23900578.8A priority patent/EP4632797A1/en
Publication of WO2024122463A1 publication Critical patent/WO2024122463A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/875Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being semiconductor metal oxide, e.g. InGaZnO
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/448Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
    • C23C16/4486Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials by producing an aerosol and subsequent evaporation of the droplets or particles
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/14Feed and outlet means for the gases; Modifying the flow of the reactive gases
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/16Oxides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02Heat treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/061Manufacture or treatment of FETs having Schottky gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/63Vertical IGFETs
    • H10D30/635Vertical IGFETs having no inversion channels, e.g. vertical accumulation channel FETs [ACCUFET] or normally-on vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes
    • H10D30/87FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/60Schottky-barrier diodes 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/26Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using liquid deposition
    • H10P14/265Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using liquid deposition using solutions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2921Materials being crystalline insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202Materials thereof
    • H10P14/3234Materials thereof being oxide semiconducting materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242Structure
    • H10P14/3244Layer structure
    • H10P14/3251Layer structure consisting of three or more layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242Structure
    • H10P14/3244Layer structure
    • H10P14/3254Graded layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3434Deposited materials, e.g. layers characterised by the chemical composition being oxide semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3438Doping during depositing
    • H10P14/3441Conductivity type
    • H10P14/3442N-type
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3438Doping during depositing
    • H10P14/3441Conductivity type
    • H10P14/3444P-type
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3438Doping during depositing
    • H10P14/3441Conductivity type
    • H10P14/3446Transition metal elements; Rare earth elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/417Insulated-gate bipolar transistors [IGBT] having a drift region having a doping concentration that is higher at the collector side relative to other parts of the drift region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/832Electrodes characterised by their material
    • H10H20/833Transparent materials

Definitions

  • the present invention relates to a crystalline oxide semiconductor film, a stacked structure, and a semiconductor device.
  • Ga 2 O 3 gallium oxide
  • Patent Document 1 describes a Ga 2 O 3 based semiconductor device in which a p-type ⁇ -(Al X2 Ga 1-X2 ) 2 O 3 single crystal film (0 ⁇ X2 ⁇ 1) is formed on an ⁇ -Al 2 O 3 substrate.
  • the semiconductor device described in Patent Document 1 has problems with the quality of the crystal, and there are many restrictions on its application to semiconductor devices.
  • ion implantation and high-temperature heat treatment are required to obtain a p-type semiconductor, so that it is difficult to realize p-type ⁇ -Ga 2 O 3 itself.
  • the semiconductor device described in Patent Document 1 itself is difficult to realize.
  • Patent Document 2 describes a corundum-structure oxide crystal containing aluminum and gallium, and that phase transitions at high temperatures are suppressed.
  • a mixed crystal with a large band gap there are still many issues to be addressed.
  • the epitaxially grown crystal has rotation domains and warping, which is not necessarily satisfactory.
  • Patent Documents 3 and 4 disclose examples in which ⁇ -Ga 2 O 3 is formed on a substrate via a buffer layer having a quantum well structure, thereby forming ⁇ -Ga 2 O 3 having a rotation domain content of less than 0.02% and a film thickness of 1 ⁇ m or more while containing a dopant. Patent Documents 3 and 4 also disclose examples in which ⁇ -Ga 2 O 3 is formed on a substrate via a buffer layer having a quantum well structure, thereby forming ⁇ -Ga 2 O 3 having a rotation domain count of 0 out of 100,000 counts while containing a dopant.
  • Patent Document 5 describes an example of forming ⁇ -Ga 2 O 3 that is substantially free of rotational domains over a wide range.
  • the peak intensity obtained by X-ray diffraction measurement ⁇ scan of the asymmetric (104) plane was 158 counts to 100,000 counts (content 0.158%), and many rotational domains were observed.
  • the peak intensity of the rotational domains increased with distance from the center of the substrate, and the content of the rotational domains was not uniform within the surface, especially on the 6-inch and 8-inch substrates.
  • the present invention has been made to solve the above problems, and aims to provide a crystalline oxide semiconductor film with good crystallinity and reduced rotation domains, which is particularly useful for semiconductor devices.
  • the present invention has been made to achieve the above-mentioned object, and provides a crystalline oxide semiconductor film, which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and is characterized in that a total area (C2) of peaks of rotational domains relative to a total area (C1) of peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is less than 5 counts relative to a total area (C1) of peaks of the crystalline oxide semiconductor film of 1,000,000 counts.
  • Such a crystalline oxide semiconductor film has good crystallinity with reduced rotation domains and reduced warping and cracks, making it particularly useful for semiconductor devices.
  • the total area (C2) of the peaks of the rotation domain can be 0 counts relative to the total area (C1) of the peaks of the crystalline oxide semiconductor film, which is 1,000,000 counts.
  • Such a crystalline oxide semiconductor film has better crystallinity with further reduced rotation domains, and further reduced warping and cracks, making it particularly useful for semiconductor devices.
  • the present invention also provides a crystalline oxide semiconductor film, which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and is characterized in that a total area (C2) of peaks of rotational domains relative to a total area (C1) of peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is 0 counts relative to a total area (C1) of peaks of the crystalline oxide semiconductor film of 500,000 counts.
  • a crystalline oxide semiconductor film which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and is characterized in that a total area (C2) of peaks of rotational domains relative to a total area (C1) of peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is 0 counts relative to a total area (C1) of
  • Such a crystalline oxide semiconductor film has good crystallinity with reduced rotation domains and reduced warping and cracks, making it particularly useful for semiconductor devices.
  • the crystalline oxide semiconductor film may contain a dopant.
  • the flow of electrons and holes can be controlled by adding dopants.
  • the thickness of the crystalline oxide semiconductor film can be 1 ⁇ m or more.
  • Ga may account for 90 atom % or more of the metals contained in the crystalline oxide semiconductor film.
  • the crystalline oxide semiconductor film can also be 2 inches (50 mm) or larger in diameter.
  • the crystalline oxide semiconductor film can also be 6 inches (150 mm) or larger in diameter.
  • the half-width of the rocking curve of the plane parallel to the main surface of the crystalline oxide semiconductor film can be 25 arcsec or less, and the half-width of the rocking curve of the asymmetric plane can be 2500 arcsec or less.
  • Such a material would have excellent crystallinity and would be useful for semiconductor devices.
  • the crystalline oxide semiconductor film may have a c-plane as its main surface.
  • the crystalline oxide semiconductor film may have a rocking curve half-width of 25 arcsec or less for the (006) plane.
  • Such a material would have excellent crystallinity and would be useful for semiconductor devices.
  • the crystalline oxide semiconductor film may have a rocking curve half-width of 2500 arcsec or less for the (104) plane.
  • Such a material would have excellent crystallinity and would be useful for semiconductor devices.
  • the crystalline oxide semiconductor film may have zero cracks per mm2 .
  • the crystalline oxide semiconductor film can have a rotational domain content [%] calculated from the total peak area (C1) of the crystalline oxide semiconductor film and the total area (C2) of the rotational domain peaks by C1/C2 ⁇ 100 of less than 0.0005%.
  • the crystallinity will be superior and it will be more useful for semiconductor devices.
  • the content of the rotation domains can be less than 0.0005% in all five in-plane locations of the crystalline oxide semiconductor film.
  • the coefficient of variation of the rotation domain content measured at five points in the plane of the crystalline oxide semiconductor film can be less than 0.35.
  • the crystalline oxide semiconductor film may have a rotational domain content [%] of less than 0.0002%, calculated from the total peak area (C1) of the crystalline oxide semiconductor film and the total area (C2) of the rotational domain peaks by C1/C2 ⁇ 100.
  • the crystallinity will be superior and it will be more useful for semiconductor devices.
  • the content of the rotation domains can be less than 0.0002% in all five in-plane locations of the crystalline oxide semiconductor film.
  • the count number of the peak with the highest intensity among the peaks of the rotation domain obtained by X-ray diffraction measurement ⁇ scan of the asymmetric surface of the crystalline oxide semiconductor film can be 0 counts, while the count number of the peak with the highest intensity is 150,000 counts.
  • the present invention provides a laminated structure comprising a substrate and a crystalline oxide semiconductor film laminated on the substrate via a buffer layer, the buffer layer containing Ga as a main component, and three or more buffer film layers laminated such that the Ga composition ratio increases from the substrate side of the buffer layer toward the crystalline oxide semiconductor film side, at least two of the buffer films have a thickness of 200 nm or more and 650 nm or less, the substrate has a corundum structure, and the crystalline oxide semiconductor film is the crystalline oxide semiconductor film of the present invention.
  • Such a laminated structure has a good crystallinity with reduced rotation domains in the crystalline oxide semiconductor film and reduced warping and cracks, making it particularly useful for semiconductor devices.
  • the thickness of all of the buffer films in the buffer layer can be 200 nm or more and 650 nm or less.
  • the buffer layer may also include Al, and may be a laminate of three or more buffer layers such that the composition ratio of Al decreases from the substrate side of the buffer layer toward the crystalline oxide semiconductor film side.
  • the present invention provides a semiconductor device that includes at least one of the crystalline oxide semiconductor film of the present invention and the stacked structure of the present invention.
  • Such a semiconductor device uses the crystalline oxide semiconductor film of the present invention, which has good crystallinity with reduced rotation domains, and therefore has good device characteristics.
  • the semiconductor device can be any one of a semiconductor laser, a diode, or a transistor.
  • the crystalline oxide semiconductor film of the present invention can provide a film with good crystallinity with reduced rotation domains, which is particularly useful for semiconductor devices.
  • FIG. 2 is a typical example of a ⁇ scan of an asymmetric plane ((104) plane) of a crystalline oxide semiconductor film according to the present invention, showing the results of Example 1.
  • 1 is a diagram showing one embodiment of a structure of a laminated structure according to the present invention
  • 1A and 1B are diagrams showing another embodiment of the structure of the laminated structure according to the present invention.
  • FIG. 1 is a diagram showing an example of a Schottky barrier diode according to the present invention
  • 1 is a diagram showing an example of a high electron mobility transistor according to the present invention
  • 1 is a diagram showing an example of a semiconductor field effect transistor according to the present invention
  • 1 is a diagram showing an example of an insulated gate bipolar transistor according to the present invention
  • 1 is a diagram showing an example of a light-emitting diode according to the present invention
  • FIG. 1 is a diagram showing an example of a film forming apparatus according to the present invention.
  • FIG. 13 is a diagram showing another example of a film forming apparatus according to the present invention.
  • FIG. 2 is a diagram showing an example of a mist generating unit according to the present invention.
  • FIG. 1 is a diagram showing an example of a film forming apparatus according to the present invention.
  • FIG. 13 is a diagram showing another example of a film forming apparatus according to the present invention.
  • FIG. 2 is a diagram showing measurement points according to the present invention.
  • FIG. 13 is a diagram showing the results of a (104) plane ⁇ scan in Comparative Example 1.
  • a crystalline oxide semiconductor film which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and is characterized in that a total area (C2) of peaks of rotational domains relative to a total area (C1) of peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is less than 5 counts relative to a total area (C1) of peaks of the crystalline oxide semiconductor film of 1,000,000 counts. It has been found that such a crystalline oxide semiconductor film further reduces not only rotational domains but also warping and cracks, thereby making it possible to solve the conventional problems at once, and has completed the present invention.
  • the present inventors have also succeeded in creating a crystalline oxide semiconductor film, which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and is characterized in that the total area (C2) of the peaks of the rotational domains relative to the total area (C1) of the peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is 0 counts relative to the total area (C1) of the peaks of the crystalline oxide semiconductor film of 500,000 counts. They have found that such a crystalline oxide semiconductor film further reduces not only the rotational domains but also warping and cracks, thereby making it possible to solve the conventional problems at once, and have completed the present invention.
  • the crystalline oxide semiconductor film of the present invention is a crystalline oxide semiconductor film which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and the total area (C2) of peaks of rotational domains relative to the total area (C1) of peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is less than 5 counts relative to the total area (C1) of peaks of the crystalline oxide semiconductor film of 1,000,000 counts.
  • the crystalline oxide semiconductor film of the present invention is a crystalline oxide semiconductor film which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and the total area (C2) of the peaks of the rotation domain relative to the total area (C1) of the peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is 0 counts relative to the total area (C1) of the peaks of the crystalline oxide semiconductor film of 500,000 counts.
  • a typical example of the ⁇ scanning measurement of the present invention is shown in FIG. 1, and will be described in detail later.
  • the crystalline oxide semiconductor film is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and is preferably single crystal.
  • ⁇ -Ga 2 O 3 is a metal oxide having a corundum structure and has trigonal symmetry.
  • the main component means that ⁇ -Ga 2 O 3 accounts for 50 to 100 mol % of the crystalline oxide semiconductor film.
  • Ga may account for 50 atom % or more of the metal components of the crystalline oxide semiconductor film, preferably 90 atom % or more, and more preferably 95 atom % or more.
  • ⁇ -Ga 2 O 3 there is no particular limitation as long as it is a metal oxide that can have a corundum structure, and for example, it may be an oxide containing any of aluminum, titanium, vanadium, chromium, iron, gallium, rhodium, indium, and iridium.
  • a uniaxially oriented film refers to a film in which a peak is observed only in a specific plane orientation in an X-ray diffraction measurement of the main surface of a crystalline oxide semiconductor film.
  • the film is one in which a peak is observed only in a part of the plane parallel to the (006) plane.
  • the total area of the peaks of the crystalline oxide semiconductor film (C1) and the total area of the peaks of the rotational domain (C2) are measured using an X-ray diffraction measuring device, and more specifically, can be measured by performing a ⁇ scan of the asymmetric surface using the X-ray diffraction measuring device.
  • the asymmetric surface refers to a surface that is inclined with respect to the main surface of the crystalline oxide semiconductor film.
  • examples of asymmetric surfaces include the (104) surface when the main surface is the c-plane, the (300) surface when the main surface is the a-plane, the (006) surface when the main surface is the r-plane, the (104) surface when the main surface is the m-plane, and the (110) surface when the main surface is the n-plane.
  • Phi scan is a technique in which an X-ray diffraction measurement device is used to fix the angles of 2 ⁇ , ⁇ , and ⁇ , and rotate the ⁇ axis, which is parallel to the normal to the main surface of the sample, from 0 to 360° to perform measurements.
  • the angle between the asymmetric plane and the sample surface is calculated from the dot product of the reciprocal lattice vectors, and the chi axis is tilted so that the direction of the scattering vector formed by the incident X-ray light and the X-ray diffracted light matches the direction of the reciprocal lattice vector of the asymmetric plane.
  • peaks appear at angular intervals that correspond to the symmetry of the asymmetric surface with respect to the ⁇ axis. For example, when measuring the asymmetric (104) surface of a sample whose principal surface is the c-plane, three peaks appear at 120° intervals because the (104) surface is three-fold symmetric with respect to the ⁇ axis.
  • the total area (C2) of the rotational domain peaks relative to the total area (C1) of the crystalline oxide semiconductor film obtained by ⁇ scanning is less than 5 counts relative to the total area (C1) of the crystalline oxide semiconductor film peaks of 1,000,000 counts.
  • the total area (C2) of the peaks of the rotational domain relative to the total area (C1) of the peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning is 0 counts relative to the total area (C1) of the peaks of the crystalline oxide semiconductor film of 500,000 counts.
  • a typical example of a ⁇ scan of an asymmetric plane ((104) plane) of a crystalline oxide semiconductor film according to the present invention is obtained.
  • a ⁇ scan of the (104) plane can be performed and results can be obtained.
  • the total area (C1) of the peaks of the crystalline oxide semiconductor film is 1,000,000 counts
  • the total area (C2) of the peaks of the rotation domain is preferably 0 counts
  • the total area (C2) of the peaks of the rotation domain is more preferably 0 counts.
  • Such a crystalline oxide semiconductor film has excellent characteristics when used in a semiconductor device.
  • the rotational domain content is 0.005%.
  • the rotational domain content is preferably less than 0.0005%, preferably less than 0.0002%, more preferably less than 0.0001%, and even more preferably 0%.
  • the content of the rotation domain is preferably less than 0.0005% in all five in-plane measurement points of the crystalline oxide semiconductor film, more preferably less than 0.0002%, more preferably less than 0.0001%, and even more preferably 0%.
  • the measurement points are preferably one point at the center and four points at the midpoints of the lines connecting the center and the midpoints of each side, for a total of five points.
  • the coefficient of variation of the rotation domain content measured at five in-plane locations should be less than 0.35, and preferably 0.25 or less. This will make the semiconductor device even more useful.
  • the coefficient of variation can be calculated using the following formula.
  • the count number (peak height) of the peak with the highest intensity among the peaks of the rotation domain obtained by X-ray diffraction measurement ⁇ scan of the asymmetric surface of the crystalline oxide semiconductor film is preferably 0 counts for a count number (peak height) of the peak with the highest intensity of 150,000 counts, and more preferably 0 counts for a count number of 300,000 counts.
  • the crystalline oxide semiconductor film preferably has a c-plane as the main surface. This makes it more suitable for semiconductor devices.
  • the half-width of the rocking curve obtained by X-ray diffraction measurement ⁇ -scan of a plane parallel to the main surface of the crystalline oxide semiconductor film is preferably 25 arcsec or less, more preferably 16 arcsec or less, and even more preferably 10 arcsec or less. The smaller the half-width, the better the crystallinity and the better the device characteristics.
  • the half-width of the rocking curve determined by X-ray diffraction measurement ⁇ -scan of an asymmetric plane of the crystalline oxide semiconductor film is preferably 2500 arcsec or less, more preferably 2000 arcsec or less, and even more preferably 1500 arcsec or less.
  • the thickness of the crystalline oxide semiconductor film is not particularly limited. In the present invention, it is preferably 1 ⁇ m or more, more preferably 2 ⁇ m or more, and even more preferably 3 ⁇ m or more. This makes it more suitable for semiconductor devices.
  • the upper limit of the thickness is not particularly limited, but can be, for example, 1000 ⁇ m or less, 500 ⁇ m or less, or 100 ⁇ m or less.
  • the warpage of the crystalline oxide semiconductor film is preferably 0.21 ⁇ m or less, and more preferably 0.17 ⁇ m or less.
  • warpage refers to the shortest distance between the shortest straight line passing through both ends of the film (for example, both ends within a 5 mm distance) and the apex of the concave or convex shape.
  • the warpage is preferably less than 0.042 ⁇ m/mm.
  • the oxide semiconductor film may contain a dopant.
  • the dopant can control the flow of electrons and holes.
  • the dopant is not particularly limited.
  • n-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium, or p-type dopants such as copper, silver, tin, cobalt, iridium, or rhodium, may be used.
  • the concentration of the dopant may be, for example, about 1.0 ⁇ 10 16 to 1.0 ⁇ 10 22 /cm 3 , and may be a low concentration of about 1.0 ⁇ 10 17 /cm 3 or less, or a high concentration of about 1.0 ⁇ 10 20 /cm 3 or more.
  • the area of the crystalline oxide semiconductor film is preferably equal to or greater than an area equivalent to a diameter of 2 inches (50 mm), more preferably equal to or greater than 4 inches (100 mm), and even more preferably equal to or greater than 6 inches (150 mm).
  • the area can be equal to or less than an area equivalent to a diameter of 12 inches (300 mm).
  • the number of cracks per 1 mm2 of the crystalline oxide semiconductor film is preferably 0, that is, no cracks are included.
  • the method for evaluating the number of cracks is not particularly limited.
  • the number of cracks on the entire surface of the crystalline oxide semiconductor film can be checked using an optical surface inspection device, and the number of cracks can be converted to the number per mm2 by dividing the number by the inspection area.
  • the number of cracks may be counted by observing 1 mm2 using a SEM, a TEM, an optical microscope, or the like.
  • the crystalline oxide semiconductor film according to the present invention can be used in semiconductor devices by carrying out appropriate structural design. Examples of semiconductor devices will be described in detail later.
  • the crystalline oxide semiconductor film according to the present invention can be obtained by appropriately selecting a substrate and a buffer layer and performing film formation, as described later.
  • the film formation method is not particularly limited, and can be realized by a wide range of known methods such as plasma CVD, LPCVD (low pressure CVD), APCVD (atmospheric pressure CVD), mist CVD, HVPE, sputtering, and ion plating, but film formation using the mist CVD method is preferable.
  • the film formation method using the mist CVD method will be described in detail later.
  • the stacked structure 100, 200 having the crystalline oxide semiconductor film according to the present invention basically includes a base 101, 201, a buffer layer 112, 212, and a crystalline oxide semiconductor film 103, 203, and is composed of the buffer layer 112, 212 formed on the main surface of the base 101, 201, and the crystalline oxide semiconductor film 103, 203 further formed thereon.
  • the substrates 101 and 201 are not particularly limited as long as they contain a crystalline substance as a main component, and may be known substrates. They may be insulators, conductors, semiconductors, single crystals, or polycrystals. Examples of the substrates include, but are not limited to, polysulfone, polyethersulfone, polyphenylene sulfide, polyetheretherketone, polyimide, polyetherimide, fluororesin, metals such as iron, aluminum, stainless steel, and gold, silicon, sapphire, quartz, glass, gallium oxide, lithium niobate, and lithium tantalate. In particular, those having a corundum structure are preferable.
  • a substrate in which the main component metal element contained in the greatest amount among the metal elements contained in the substrate is aluminum.
  • a sapphire wafer from the standpoint of quality and cost.
  • the plane orientation of the main surface of the substrate is not particularly limited, and in the case of a sapphire wafer, planes such as the c-plane, m-plane, a-plane, r-plane, and n-plane can be used.
  • the substrate may have an off-angle with respect to the just plane.
  • the off-angle is not particularly limited, but is preferably 0 to 15°.
  • the thickness of the substrate 101, 201 is not particularly limited, but is preferably about 200 to 800 ⁇ m from the viewpoint of cost.
  • the area of the main surface of the substrate 101, 201 is preferably 10 cm 2 or more, more preferably an area equivalent to a diameter of about 5 cm (2 inches) or more, more preferably a diameter of about 10 cm (4 inches) or more, and even more preferably a diameter of about 15 cm (6 inches) or more. If the substrate 101, 201 has a large diameter in this way, the crystalline oxide semiconductor film 103, 203 formed on the substrate 101, 201 will have higher quality and higher productivity. In addition, the degree of freedom in device design is increased.
  • the upper limit of the area is not particularly limited, and the larger the area, the more excellent the productivity. For example, it can be set to an area equivalent to a diameter of 12 inches (300 mm) or less.
  • the shape of the substrate 101, 201 is not particularly limited in the present invention. It may be a circle or a rectangle such as a square.
  • the buffer layer contains Ga as a main component, and is a laminated structure in which three or more buffer films are laminated so that the composition ratio of Ga increases from the substrate side to the crystalline oxide semiconductor film side of the buffer layer, and at least two of these buffer films have a thickness of 200 nm or more and 650 nm or less.
  • the buffer layer is preferably an oxide semiconductor having a corundum structure.
  • the buffer layer may be formed directly on the substrate 101 as in the buffer layer 112 in FIG. 2, or may be formed via another layer. In the case of introducing a separate layer, for example, a release layer for separating the crystalline oxide semiconductor film from the substrate, the buffer layer may be formed on the release layer 204 as in the buffer layer 212 in FIG. 3.
  • the buffer layer 112 is a laminated structure of multiple buffer films 102a, 102b, and 102c each having a different composition
  • the buffer layer 212 is also a laminated structure of multiple buffer films 202a, 202b, and 202c each having a different composition.
  • the buffer films 102a, 102b, and 102c or 202a, 202b, and 202c of the buffer layers 112 and 212 each have a different composition.
  • Ga which is the main component metal element that is contained most abundantly among the metal elements contained in the above-mentioned crystalline oxide semiconductor films 103 and 203, is included.
  • the main component metal element of the base of the buffer layer refers to the main component metal element of the substrate 101 in the embodiment of FIG. 2, and the main component metal element of the peeling layer 204 in the embodiment of FIG. 3.
  • the main component here refers to a metal component that occupies 50 to 100 atom %.
  • the buffer layer contains Ga as a main component, and is composed of three or more buffer films so that the Ga composition ratio increases from the substrate side to the crystalline oxide semiconductor film side of the buffer layer.
  • the number of layers and composition of the entire buffer film can be appropriately adjusted depending on conditions such as the thickness of the crystalline oxide semiconductor film.
  • the thickness of at least two of the three or more buffer films is 200 nm or more and 650 nm or less.
  • the thickness of the at least two buffer films may be the same or different, but if it is less than 200 nm, sufficient effect cannot be obtained, and if it exceeds 650 nm, the stress becomes significant and warping and defects are introduced. It is more preferable that the thickness of all of the three or more buffer films is 200 nm or more and 650 nm or less.
  • the three or more buffer layers should contain Ga as a main component, and the Ga composition ratio should increase from the substrate side to the crystalline oxide semiconductor film side of the buffer layer.
  • the Ga composition ratio increases in the order of buffer films 102a, 102b, and 102c.
  • the buffer film contains the main component metal element of the buffer layer
  • the buffer film when forming a crystalline oxide semiconductor film of ⁇ -Ga 2 O 3 on an Al 2 O 3 wafer, it is preferable to form the buffer film with (Al x Ga 1-x ) 2 O 3 (0 ⁇ x ⁇ 1) and decrease the value of x from the substrate (wafer) side toward the crystalline oxide semiconductor film side.
  • the composition of the buffer layer can be controlled by changing the ratio of the supply amounts of each metal raw material.
  • it when using the mist CVD method, it can be controlled by changing the concentration of the raw material solution, the flow rate of the carrier gas that transports the mist, and the deposition temperature.
  • the method for manufacturing the laminated structure according to the present invention is not particularly limited.
  • the substrate and the buffer layer are appropriately selected according to the type of the crystalline oxide semiconductor film and the semiconductor element to be applied, and the laminated structure can be obtained by forming a film on the substrate.
  • the film forming method is not particularly limited, and can be realized by a wide range of known methods such as plasma CVD, LPCVD (low pressure CVD), APCVD (atmospheric pressure CVD), mist CVD, HVPE, sputtering, and ion plating, but it is preferable to form the film using the mist CVD method.
  • the film forming method using the mist CVD method will be described in detail later.
  • the means for forming the buffer layer is not particularly limited. It is preferable to manufacture the buffer layer by growing crystals on the substrate using mist.
  • a semiconductor device includes at least one of the above-mentioned crystalline oxide semiconductor film and the above-mentioned stacked structure.
  • a semiconductor device semiconductor element
  • Such a semiconductor device may include a base or may have the base removed.
  • the semiconductor device according to the present invention uses a high-quality crystalline oxide semiconductor film with good crystallinity, and is a high-quality semiconductor device.
  • Application examples (specific examples) of the semiconductor device are as follows.
  • the above-mentioned crystalline oxide semiconductor film and the stacked structure having the crystalline oxide semiconductor film have good crystallinity and excellent electrical properties, and are industrially useful.
  • Such a crystalline oxide semiconductor film and the stacked structure having the crystalline oxide semiconductor film can be suitably used in various semiconductor devices and the like, and are particularly useful in power devices.
  • Semiconductor devices can be classified into horizontal elements (horizontal devices) in which an electrode is formed on one side of a crystalline oxide semiconductor film, and vertical elements (vertical devices) in which an electrode is formed on both the front and back sides of a crystalline oxide semiconductor film.
  • the semiconductor device of the present invention can be suitably used in both horizontal and vertical devices, but is preferably used in vertical devices.
  • Examples of semiconductor devices include Schottky barrier diodes (SBDs), metal semiconductor field effect transistors (MESFETs), high electron mobility transistors (HEMTs), semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs), insulated gate bipolar transistors (IGBTs), and light emitting diodes (LEDs).
  • a buffer layer is formed on the main surface of the substrate directly or via another layer.
  • the buffer layer contains Ga as a main component, and is formed by forming the buffer layer so that it is composed of three or more buffer films such that the composition ratio of Ga increases from the substrate side of the buffer layer toward the crystalline oxide semiconductor film side, and includes two or more buffer films having a thickness of 200 nm to 650 nm. It is preferable that all of the multiple buffer films constituting the buffer layer are formed to a thickness of 200 nm to 650 nm.
  • a crystalline oxide semiconductor film containing ⁇ -Ga 2 O 3 as a main component is formed on the buffer layer to obtain a stacked structure according to the present invention.
  • an electrode or the like is further formed on the crystalline oxide semiconductor film to manufacture a semiconductor device.
  • the stacked structure including the substrate, the buffer layer, and the crystalline oxide semiconductor film can be used as it is, or the substrate can be removed to leave the buffer layer and the crystalline oxide semiconductor film, or the substrate and the buffer layer can be removed to leave only the crystalline oxide semiconductor film. In this manner, a high-performance semiconductor device can be manufactured using a high-quality crystalline oxide semiconductor film with good crystallinity.
  • n-type semiconductor layer such as an n+ type semiconductor or an n- type semiconductor layer
  • semiconductor elements exemplified below may further include other layers (such as an insulator layer or a conductor layer), and intermediate layers and buffer layers may be omitted as appropriate.
  • FIG. 4 shows an example of an SBD according to the present invention.
  • SBD 300 includes a relatively lightly doped n-type semiconductor layer 301a, a relatively heavily doped n+ type semiconductor layer 301b, a Schottky electrode 302, and an ohmic electrode 303.
  • the materials of the Schottky electrode 302 and the ohmic electrode 303 may be known electrode materials, such as metals such as aluminum, molybdenum, cobalt, zirconium, tin, niobium, iron, chromium, tantalum, titanium, gold, platinum, vanadium, manganese, nickel, copper, hafnium, tungsten, iridium, zinc, indium, palladium, neodymium, or silver, or alloys thereof; conductive metal oxide films such as tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO), or indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, or polypyrrole; or mixtures and laminates thereof.
  • metals such as aluminum, molybdenum, cobalt, zirconium, tin, niobium, iron, chromium, tantalum, titanium, gold, platinum, vanadium,
  • the Schottky electrode 302 and the ohmic electrode 303 can be formed by known means such as vacuum deposition or sputtering. More specifically, when forming a Schottky electrode using two types of metals, a first metal and a second metal, among the above metals, a layer of the first metal and a layer of the second metal are laminated, and the layer of the first metal and the layer of the second metal are patterned using a photolithography technique.
  • the SBD 300 When a reverse bias is applied to the SBD 300, a depletion layer (not shown) spreads into the n-type semiconductor layer 301a, resulting in a high-voltage SBD.
  • a forward bias When a forward bias is applied, electrons flow from the ohmic electrode 303 to the Schottky electrode 302. Therefore, the SBD of the present invention is excellent for high voltage and large current applications, has a fast switching speed, and is excellent in voltage resistance and reliability.
  • FIG. 5 shows an example of a HEMT according to the present invention.
  • HEMT 400 includes a wide bandgap n-type semiconductor layer 401, a narrow bandgap n-type semiconductor layer 402, an n+ type semiconductor layer 403, a semi-insulator layer 404, a buffer layer 405, a gate electrode 406, a source electrode 407, and a drain electrode 408.
  • FIG. 6 shows an example of a MOSFET according to the present invention.
  • MOSFET 500 includes an n-type semiconductor layer 501, n+ type semiconductor layers 502 and 503, a gate insulating film 504, a gate electrode 505, a source electrode 506, and a drain electrode 507.
  • FIG. 7 shows an example of an IGBT according to the present invention.
  • the IGBT 600 includes an n-type semiconductor layer 601, an n-type semiconductor layer 602, an n+ type semiconductor layer 603, a p-type semiconductor layer 604, a gate insulating film 605, a gate electrode 606, an emitter electrode 607, and a collector electrode 608.
  • FIG. 8 is an example of an LED according to the present invention.
  • the LED 700 includes a first electrode 701, an n-type semiconductor layer 702, a light-emitting layer 703, a p-type semiconductor layer 704, a transparent electrode 705, and a second electrode 706.
  • materials for the transparent electrode include conductive oxide materials containing indium or titanium. More specifically, examples include In 2 O 3 , ZnO, SnO 2 , Ga 2 O 3 , TiO 2 , CeO 2 , or a mixed crystal of two or more of these, or a doped material thereof.
  • the transparent electrode can be formed by providing these materials by a known means such as sputtering. In addition, after forming the transparent electrode, thermal annealing may be performed for the purpose of making the transparent electrode transparent.
  • the materials for the first electrode 701 and the second electrode 706 include, for example, metals such as aluminum, molybdenum, cobalt, zirconium, tin, niobium, iron, chromium, tantalum, titanium, gold, platinum, vanadium, manganese, nickel, copper, hafnium, tungsten, iridium, zinc, indium, palladium, neodymium, or silver, or alloys thereof; metal oxide conductive films such as tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO), or indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, or polypyrrole; or mixtures thereof.
  • metals such as aluminum, molybdenum, cobalt, zirconium, tin, niobium, iron, chromium, tantalum, titanium, gold, platinum, vanadium, manganese, nickel, copper, hafnium
  • the method for forming the electrode film is not particularly limited, and the electrode can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating; physical methods such as vacuum deposition, sputtering, and ion plating; and chemical methods such as CVD and plasma CVD, taking into consideration the suitability of the material.
  • the film forming apparatus 800 has a mist generating section 820 that generates mist by turning a raw material solution into mist, a carrier gas supplying section 830 that supplies a carrier gas for transporting the mist, a film forming section 840 that heat-treats the mist to form a film on a substrate, and a transporting section 809 that connects the mist generating section 820 and the film forming section 840 and transports the mist by the carrier gas.
  • the film forming apparatus 800 may also be provided with a control section (not shown) that controls the whole or a part of the film forming apparatus 800, thereby controlling its operation.
  • mist generating section 820 In the mist generating section 820, the raw solution is turned into mist to generate mist.
  • the mist generating means is not particularly limited as long as it can turn the raw solution into mist, and any known mist generating means may be used, but it is preferable to use a mist generating means using ultrasonic vibrations, as this allows for more stable mist generation.
  • mist generating unit 820 may include a mist generating source 804 that contains raw solution 804a, a container 805 that contains a medium capable of transmitting ultrasonic vibrations, such as water 805a, and an ultrasonic vibrator 806 attached to the bottom of the container 805.
  • the mist generating source 804 which is a container that contains raw solution 804a, is stored in the container 805 that contains water 805a using a support (not shown).
  • An ultrasonic vibrator 806 is attached to the bottom of the container 805, and the ultrasonic vibrator 806 is connected to an oscillator 816. When the oscillator 816 is operated, the ultrasonic vibrator 806 vibrates, and ultrasonic waves are transmitted through the water 805a into the mist generating source 804, turning the raw solution 804a into mist.
  • the raw material solution 804a obtained by mixing the respective metal raw material solutions may be contained in the mist source 804 of one mist generating unit 820 and turned into mist, or multiple mist generating units may be provided, as in the mist generating units 920a and 920b shown in FIG. 11, and the respective metal raw material solutions may be contained in the mist generating sources 904a and 904c of different mist generating units and turned into mist respectively.
  • a mist mixer 913 may be provided to mix the respective misted raw material solutions as shown in FIG. 11, or the raw material solutions may be supplied separately to the film forming chamber 907 without providing the mist mixer 913 (not shown).
  • the carrier gas supply unit 830 may have a carrier gas source 802a for supplying a carrier gas, and may be provided with a flow rate control valve 803a for controlling the flow rate of the carrier gas sent from the carrier gas source 802a.
  • the carrier gas supply unit 830 may also be provided with a dilution carrier gas source 802b for supplying a dilution carrier gas as required, and a flow rate control valve 803b for controlling the flow rate of the dilution carrier gas sent from the dilution carrier gas source 802b.
  • the type of carrier gas is not particularly limited and can be appropriately selected depending on the film to be formed. Examples include inert gases such as oxygen, ozone, nitrogen, and argon, and reducing gases such as hydrogen gas and forming gas.
  • the type of carrier gas may be one type or two or more types. For example, a diluted gas obtained by diluting the same gas as the first carrier gas with another gas (e.g., diluted ten times) may be used as the second carrier gas, or air may be used.
  • the number of points at which the carrier gas is supplied may be two or more, rather than just one.
  • the flow rate of the carrier gas is not particularly limited.
  • it when forming a film on a substrate with a diameter of 4 inches (100 mm), it is preferably 1 to 80 L/min, and more preferably 4 to 40 L/min.
  • the flow rate of the carrier gas in this invention is the measured value at 20°C and normal pressure. When it is measured at other temperatures and pressures or when a different type of flow rate (mass flow rate, etc.) is measured, it can be converted to a volumetric flow rate at 20°C and normal pressure using the gas state equation.
  • the film forming section 840 may include, for example, a film forming chamber 807, in which a base (crystalline substrate) 810 is installed, and a hot plate 808 for heating the base (crystalline substrate) 810.
  • the hot plate 808 may be provided outside the film forming chamber 807 as shown in FIG. 9, or may be provided inside the film forming chamber 807.
  • the film forming chamber 807 may be provided with an exhaust gas exhaust port 812 at a position that does not affect the supply of the mist to the base (crystalline substrate) 810.
  • the film forming section 840 can be provided with a moving mechanism 814 for moving the substrate 810.
  • the direction in which the substrate is moved is not particularly limited, and it may be a reciprocating motion or a rotational motion.
  • a mechanism for rotating the substrate may be provided so that the substrate rotates about its axis.
  • the substrate (crystalline substrate) 810 may be placed face-down on the top surface of the film-forming chamber 807, or may be placed face-up on the bottom surface of the film-forming chamber 807. In this case, one substrate 810 may be placed in the film-forming chamber 807, or two or more substrates 810 may be placed. When two or more substrates are placed, it is preferable to place them symmetrically with respect to the mist supply port 809b that supplies mist to the film-forming chamber 807.
  • the thermal reaction is not particularly limited as long as the mist reacts when heated.
  • the reaction conditions can be set appropriately depending on the raw material and the film to be formed.
  • the heating temperature can be in the range of 120 to 600°C, preferably in the range of 200 to 600°C, and more preferably in the range of 300 to 550°C.
  • the thermal reaction may be carried out under any of the following atmospheres: vacuum, non-oxygen atmosphere, reducing gas atmosphere, air atmosphere, and oxygen atmosphere, and may be appropriately set depending on the film to be formed.
  • the reaction pressure may be atmospheric pressure, pressurized pressure, or reduced pressure, but film formation under atmospheric pressure is preferred because it simplifies the device configuration.
  • the transport unit 809 connects the mist generating unit 820 and the film forming unit 840.
  • the mist is transported by a carrier gas from the mist generating source 804 of the mist generating unit 820 to the film forming chamber 807 of the film forming unit 840 via the transport unit 809.
  • the transport unit 809 can be, for example, a supply pipe 809a as shown in FIG. 9.
  • the transport unit 809 can be a mist supply port 809b that supplies mist to the supply pipe 809a and the film forming chamber 807 as shown in FIG. 10.
  • the supply pipe 809a can be, for example, a quartz tube or a resin tube.
  • the raw material solution (aqueous solution) 804a is not particularly limited as long as it contains a material that can be turned into mist, and may be an inorganic material or an organic material.
  • a solution of a metal or a metal compound is preferably used as the raw material solution, and one or more metals selected from gallium, iron, indium, aluminum, vanadium, titanium, chromium, rhodium, nickel, and cobalt can be used. From such a raw material solution, the components and the like may be set according to the crystalline oxide semiconductor film mainly containing Ga as in the present invention and the buffer layer containing Al.
  • the raw material solution is not particularly limited as long as it can turn the metal solution into a mist, but a solution in which the metal is dissolved or dispersed in an organic solvent or water in the form of a complex or salt can be suitably used as the raw material solution.
  • the complex include acetylacetonate complexes, carbonyl complexes, ammine complexes, and hydride complexes.
  • the salt include metal chloride salts, metal bromide salts, and metal iodide salts.
  • a solution in which the above metals are dissolved in hydrobromic acid, hydrochloric acid, hydroiodic acid, or the like can also be used as the aqueous salt solution.
  • the solute concentration is preferably 0.01 to 1 mol/L.
  • the raw material solution may be mixed with additives such as halogen-containing (e.g., hydrohalic acid) and oxidizing agents.
  • hydrohalic acids include hydrobromic acid, hydrochloric acid, and hydroiodic acid, with hydrobromic acid and hydroiodic acid being preferred.
  • oxidizing agents include peroxides such as hydrogen peroxide ( H2O2 ), sodium peroxide ( Na2O2 ), barium peroxide (BaO2), and benzoyl peroxide (C6H5CO)2O2 , hypochlorous acid ( HClO ), perchloric acid, nitric acid, ozone water, and organic peroxides such as peracetic acid and nitrobenzene.
  • the raw material solution may contain a dopant.
  • the dopant is not particularly limited.
  • n-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium, or p-type dopants such as copper, silver, tin, cobalt, iridium, or rhodium, may be mentioned.
  • the concentration of the dopant may be, for example, about 1.0 ⁇ 10 ⁇ 9 to 1.0 mol/L, and may be a low concentration of about 1.0 ⁇ 10 ⁇ 7 mol/L or less, or a high concentration of about 0.01 mol/L or more.
  • the substrate 810 is not particularly limited as long as it can form a film and support the film. It may be a known substrate. It may be an insulator, a conductor, a semiconductor, a single crystal, or a polycrystal.
  • it is preferable to use a substrate in which the main component metal element contained in the greatest amount among the metal elements contained in the substrate is aluminum. Among them, it is preferable to use a sapphire wafer from the viewpoints of quality and cost.
  • the orientation of the main surface of the substrate is not particularly limited, and in the case of a sapphire wafer, the main surface such as the c-plane, m-plane, or a-plane can be used.
  • the substrate may also have an off-angle with respect to the just plane. The off-angle is not particularly limited, but is preferably 0 to 15°.
  • the thickness of the substrate 810 is not particularly limited, but is preferably about 200 to 800 ⁇ m from the viewpoint of cost.
  • the area of the main surface of the substrate 810 is preferably 10 cm 2 or more, and is preferably equal to or greater than an area equivalent to a diameter of about 5 cm (2 inches), more preferably equal to or greater than a diameter of about 10 cm (4 inches), and even more preferably equal to or greater than a diameter of about 15 cm (6 inches). If the substrate 810 has a large diameter in this way, the crystalline oxide semiconductor film formed on the substrate 810 will have higher quality and higher productivity. In addition, the degree of freedom in device design is increased.
  • the shape of the substrate 810 is not particularly limited in the present invention. It may be circular or rectangular, such as a square.
  • an annealing treatment may be performed after the film is formed.
  • the temperature of the annealing treatment is not particularly limited, but is preferably 600°C or less, and more preferably 550°C or less. This is because the crystallinity of the film becomes stable and good.
  • the processing time of the annealing treatment is not particularly limited, but is preferably 10 seconds to 10 hours, and more preferably 10 seconds to 1 hour.
  • a raw material solution 804a is contained in a mist generating source 804 of a mist generating unit 820, a base body (crystalline substrate) 810 is placed on a hot plate 808, and the hot plate 808 is operated.
  • the flow rate control valves 803a and 803b are opened to supply carrier gas from the carrier gas source 802a (main carrier gas) and the dilution carrier gas source 802b (dilution carrier gas) into the deposition chamber 807, and the atmosphere in the deposition chamber 807 is sufficiently replaced with carrier gas, while the flow rates of the main carrier gas and the dilution carrier gas are adjusted and controlled, respectively.
  • the ultrasonic vibrator 806 is vibrated, and the vibration is propagated through the water 805a to the raw material solution 804a, thereby turning the raw material solution 804a into mist and generating the mist.
  • the mist is transported by a carrier gas
  • the mist is transported by the carrier gas from the mist generating section 820 through the transport section 809 to the film forming section 840, and is introduced into the film forming chamber 807.
  • the mist is supplied onto the substrate 810 placed on the hot plate 808, and is thermally treated by the heat of the hot plate 808 in the film formation chamber 807, causing a thermal reaction and forming a film on the substrate 810.
  • a film can be formed on the substrate 810 while the substrate 810 placed on the hot plate 808 is moved by the substrate movement mechanism 814.
  • the base 810 may be peeled off from the oxide semiconductor film.
  • the peeling means is not particularly limited and may be a known means. For example, a means for peeling off by applying a mechanical shock, a means for peeling off by applying heat and utilizing thermal stress, a means for peeling off by applying vibration such as ultrasonic waves, a means for peeling off by etching, a laser lift-off, etc. can be mentioned. By this peeling, a crystalline oxide semiconductor film can be obtained as a free-standing film.
  • Example 1 Examples of the film formation apparatus used in this example are shown in Figures 10 and 12. Note that a film formation apparatus 900A shown in Figure 13 is the same as the film formation apparatus 900 shown in Figure 12 but does not include the substrate moving mechanism 914. However, even if such a film formation apparatus 900 is used, it is possible to form a crystalline oxide semiconductor film having good crystallinity in which the buffer layer and rotation domain are reduced and warpage and cracks are further reduced. [Example 1] 1. Formation of the Buffer Layer First, the formation of the buffer layer (buffer film) in this Example 1 will be described with reference to Fig. 12. In this Example 1, a c-plane sapphire substrate having a diameter of 4 inches (100 mm) was used as the base 910, and the buffer layer was ( ⁇ - AlxGa1 -x ) 2O3 (0 ⁇ x ⁇ 1).
  • Process for preparing raw material solution 1 vol% of HCl was added to a solution obtained by adding gallium acetylacetonate to water, and the solution was dissolved by stirring at 60°C for 120 minutes to prepare a 0.1 mol/L aqueous solution, which was used as Ga raw material solution 904b.
  • the Ga raw material solution 904b obtained as described above was placed in the mist generating source 904a. The temperature of the solution at this time was 25°C.
  • a c-plane sapphire substrate having a diameter of 4 inches (100 mm) was placed on a hot plate 908 in the film formation chamber 907 as the substrate 910, and the hot plate 908 was operated to raise the temperature to 500°C.
  • the flow rate control valves 903a, 903b, 903c, and 903d of the carrier gas supply units 930a and 930b were opened to supply oxygen gas as a carrier gas from the carrier gas source 902a (main carrier gas for Ga), the dilution carrier gas supply source 902b (dilution carrier gas for Ga), the carrier gas source 902c (main carrier gas for Al), and the dilution carrier gas supply source 902d (dilution carrier gas for Al) into the film formation chamber 907, and the atmosphere in the film formation chamber 907 was sufficiently replaced with these carrier gases, and the flow rate of the main carrier gas for Ga was adjusted to 2 L/min, the flow rate of the dilution carrier gas for Ga was adjusted to 10 L/min, the flow rate of the main carrier gas for Al was adjusted to 10 L/min, and the flow rate of the dilution carrier gas for Al was adjusted to 2 L/min, respectively.
  • the ultrasonic vibrators 906a and 906b were vibrated at 2.4 MHz by the oscillators 916a and 916b, and the vibrations were propagated to the Ga raw material solution 904b and the Al raw material solution 904d through the water 905b and 905d in the containers 905a and 905c, thereby turning the Ga raw material solution 904b and the Al raw material solution 904d into mist to generate mist.
  • mist was transported by carrier gas through transport pipes 909a and 909b to mist mixer 913, where the mist of Ga raw material solution 904b and Al raw material solution 904d were mixed.
  • the mist mixed in mist mixer 913 was transported by carrier gas through supply pipe 909c of transport unit 909 to film formation chamber 907 of film formation unit 940, where the mist was supplied onto substrate 910.
  • the mist was thermally reacted in the film-forming chamber 907 while gas was exhausted from the exhaust port 912, and a thin film of a first layer buffer film ( ⁇ -Al x1 Ga 1-x1 ) 2 O 3 (0 ⁇ x1 ⁇ 1) having a corundum structure was formed on the substrate 910.
  • a first layer buffer film ⁇ -Al x1 Ga 1-x1 ) 2 O 3 (0 ⁇ x1 ⁇ 1) having a corundum structure
  • the Ga raw solution 904b and the Al raw solution 904d were appropriately replenished into the mist generating sources 904a and 904b using a liquid replenishing mechanism (not shown) so that the height of the water surface during film formation of the Ga raw solution 904b of the mist generating source 904a and the Al raw solution 904d of the mist generating source 904c was constant.
  • Carrier gas supplying step were adjusted to 6 L/min for the Ga main carrier gas, 6 L/min for the Ga dilution carrier gas, 6 L/min for the Al main carrier gas, and 6 L/min for the Al dilution carrier gas, respectively, and "1-4.
  • Film forming step was carried out in the same manner as above. A thin film of a third buffer film ( ⁇ -Al x3 Ga 1-x3 ) 2 O 3 (0 ⁇ x3 ⁇ x2) was formed on the second buffer film ( ⁇ -Al x2 Ga 1-x2 ) 2 O 3 (0 ⁇ x2 ⁇ x1), thereby completing the formation of the buffer film.
  • the flow rate control valves 803a and 803b were opened to supply nitrogen gas as a carrier gas from the carrier gas source 802a (main carrier gas) and the dilution carrier gas supply source 802b (dilution carrier gas) into the film formation chamber 807, and the atmosphere in the film formation chamber 807 was sufficiently replaced with these carrier gases, and the flow rate of the main carrier gas and the flow rate of the dilution carrier gas were adjusted to 12 L/min and 12 L/min, respectively.
  • the ultrasonic vibrator 806 was vibrated at 2.4 MHz, and the vibration was propagated to the raw material solution 804a through the water 805a, thereby turning the raw material solution 804a into mist and generating mist.
  • the mist was transported by carrier gas through supply pipe 809a to the deposition chamber 807, where the mist was supplied onto the substrate 810.
  • the mist was thermally reacted in the film-forming chamber 807 while gas was exhausted from the exhaust port 812, to form a film of ⁇ -Ga 2 O 3 having a corundum structure on the substrate 810.
  • the film was formed while the substrate was moved back and forth at 2.5 mm/sec around the mist supply port 809b by the substrate moving mechanism 814 shown in FIG. 10.
  • the film-forming time was 150 minutes.
  • the raw solution 804a was appropriately replenished into the mist generating source 804 using a liquid replenishing mechanism (not shown) so that the water level of the raw solution 804a in the mist generating source 804 during film formation was constant.
  • the measurement was performed on a four-layer laminate with different refractive indices.
  • the average film thickness was calculated from each value, and the first buffer film layer was 250 nm, the second layer was 400 nm, the third layer was 550 nm, and the crystalline oxide semiconductor film was 7.6 ⁇ m.
  • the deposition speed was calculated from the average film thickness and deposition time of each film, and was 4.2 nm/min for the first layer of the buffer film, 6.6 nm/min for the second layer, 9.2 nm/min for the third layer, and 3 ⁇ m/hr for the crystalline oxide semiconductor film.
  • the warpage was 0.14 ⁇ m.
  • the half-width was measured from the (006) plane ⁇ scan of ⁇ -Ga 2 O 3 and found to be 8.6 s, confirming that high-quality ⁇ -Ga 2 O 3 had been produced.
  • polar coordinates (r, ⁇ ) (0,0), (0.5R,0), (0.5R,90), (0.5R,180), and (0.5R,270), in a polar coordinate system in which the radius of the crystalline oxide semiconductor film 1001 formed on the substrate 1000 is R, the center of the crystalline oxide semiconductor film 1001 is the origin 0, the distance from the origin 0 is r, and the angle with the x-axis is ⁇ , as shown in FIG. 14.
  • Example 1 Except for not performing "1. Deposition of buffer layer” and setting the deposition time in “2-4. Deposition step” to 240 minutes, deposition was performed in the same manner as in Example 1. When the same evaluation as in Example 1 was performed, the thickness of the crystalline oxide semiconductor film was 6.0 ⁇ m, and the deposition rate of the crystalline oxide semiconductor film was 1.5 ⁇ m/hour.
  • the warp was 0.34 ⁇ m, and numerous cracks were also found within the surface.
  • the average of the five points was 2.1, the variance given by the sum of the squares of the differences between the average and each value was 0.55, the standard deviation, which is the 1/2 power of the variance, was 0.74, and the coefficient of variation, which is the quotient of the standard deviation and the average, was 0.35.
  • the count number of the highest intensity peak in the rotation domain relative to the count number of the highest intensity peak in the ⁇ scan was 332 counts compared to 14,983 counts.
  • Example 2 A buffer layer was formed in the same manner as in Example 1, except that a 6-inch (150 mm) sapphire substrate was used as the base, the flow rate of each gas was doubled, and the film was formed while the substrate was moved back and forth at 2.5 mm/sec over a width of 200 mm around the mist supply port 909d by the substrate moving mechanism 914. Thereafter, in the "2-1. Raw material solution preparation step", germanium oxide was used instead of tin (II) chloride dihydrate, and a 0.1 mol/L gallium bromide aqueous solution was prepared so that the atomic ratio of gallium to germanium was 1:0.01, the flow rate of each gas in the "2-3.
  • Carrier gas supply step was doubled, the film formation time in the "2-4. Film formation step” was 120 minutes, and the film was formed while the substrate was moved back and forth at 2.5 mm/sec over a width of 200 mm around the mist supply port 809b by the substrate moving mechanism 814.
  • the thickness of the crystalline oxide semiconductor film was 5.1 ⁇ m, and the deposition rate of the crystalline oxide semiconductor film was 2.6 ⁇ m/hour.
  • the warpage was 0.15 ⁇ m. No cracks were observed within 1 mm2.
  • Example 3 The buffer layer was formed in the same manner as in Example 1, except that an 8-inch (150 mm) sapphire substrate was used as the base, the flow rate of each gas was increased by four times, and the film was formed while the substrate was moved back and forth at 2.5 mm/sec over a width of 250 mm centered on the mist supply port 909d by the substrate moving mechanism 914. Then, in "2-1.
  • the thickness of the crystalline oxide semiconductor film was 10.0 ⁇ m, and the deposition rate of the crystalline oxide semiconductor film was 2.9 ⁇ m/hour.
  • the warpage was 0.15 ⁇ m. No cracks were observed within 1 mm2.
  • the first buffer film layer was 130 nm
  • the second buffer film layer was 200 nm
  • the film thickness of the crystalline oxide semiconductor film was 6.4 ⁇ m
  • the deposition rate of the crystalline oxide semiconductor film was 1.6 ⁇ m/hour.
  • the standard deviation was 0.21 ⁇ m
  • the warp was 0.25 ⁇ m, and numerous cracks were observed within the surface.
  • the maximum content of the rotation domain at five points was 0.007%, the minimum was 0.002%, and the median was 0.005%.
  • the rotation domain was 500 counts out of 25,014,264 counts, and 20 counts out of 1,000,000 counts.
  • the average of the five points was 0.005, the variance given by the sum of the squares of the differences between the average and each value was 3.44 ⁇ 10 ⁇ 6 , the standard deviation, which is the 1/2 power of the variance, was 0.0018, and the coefficient of variation, which is the quotient of the standard deviation and the average, was 0.40.
  • the count number of the highest intensity peak in the rotation domain relative to the count number of the highest intensity peak in the ⁇ scan was 210 counts compared to 141,426 counts.
  • Example 4 In “1. Formation of buffer layer”, film formation was performed in the same manner as in Example 1, except that the film formation time was 30 minutes.
  • the first layer of the buffer film was 130 nm
  • the second layer was 200 nm
  • the third layer was 270 nm
  • the film thickness of the crystalline oxide semiconductor film was 9.0 ⁇ m
  • the film formation speed of the crystalline oxide semiconductor film was 3.6 ⁇ m/hour.
  • the standard deviation was 0.10 ⁇ m
  • the coefficient of variation was 0.011.
  • the warp was 0.17 ⁇ m, and no cracks were observed within the surface.
  • the maximum rotation domain content at the five points was 4.97 ⁇ 10 ⁇ 4 %, and the minimum was 2.47 ⁇ 10 ⁇ 4 %.
  • the median of the five points was 3.49 ⁇ 10 ⁇ 4 %.
  • the rotation domain was 90 counts out of 36,421,252 counts, and the ratio was 2 counts out of 1,000,000 counts.
  • the average of the five points was 3.53 ⁇ 10 -4 %, the variance given by the sum of the squares of the differences between the average and each value was 7.66 ⁇ 10 -9 , the standard deviation, which is the 1/2 power of the variance, was 8.75 ⁇ 10 -5 %, and the coefficient of variation, which is the quotient of the standard deviation and the average, was 0.25.
  • the count number of the highest intensity peak in the rotation domain relative to the count number of the highest intensity peak in the ⁇ scan was 288,301 counts, whereas the count number of the highest intensity peak in the rotation domain was 32 counts.
  • the ⁇ -Ga 2 O 3 film of the example has no rotation domain, is excellent in film quality such as crystallinity, and has reduced warpage and cracks. Furthermore, according to the example, the coefficient of variation of the content of rotation domain measured at five points in the plane of the crystalline oxide semiconductor film was lower (less than 0.35) than in the comparative example.
  • a crystalline oxide semiconductor film which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and in which a total area (C2) of peaks of rotational domains relative to a total area (C1) of peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is less than 5 counts relative to a total area (C1) of peaks of the crystalline oxide semiconductor film of 1,000,000 counts.
  • a crystalline oxide semiconductor film which is a uniaxially oriented film containing ⁇ -Ga 2 O 3 as a main component, and a total area (C2) of peaks of rotational domains relative to a total area (C1) of peaks of the crystalline oxide semiconductor film obtained by ⁇ scanning in X-ray diffraction measurement of an asymmetric plane of the crystalline oxide semiconductor film is 0 counts relative to a total area (C1) of peaks of the crystalline oxide semiconductor film of 500,000 counts.
  • [4] The crystalline oxide semiconductor film according to any one of [1] to [3] above, wherein the crystalline oxide semiconductor film contains a dopant.
  • [5] The crystalline oxide semiconductor film according to any one of [1] to [4] above, wherein the crystalline oxide semiconductor film has a thickness of 1 ⁇ m or more.
  • [6] The crystalline oxide semiconductor film according to any one of [1] to [5] above, wherein Ga accounts for 90 atom % or more of metals contained in the crystalline oxide semiconductor film.
  • [7] The crystalline oxide semiconductor film according to any one of [1] to [6] above, wherein the crystalline oxide semiconductor film has a diameter of 2 inches (50 mm) or more.
  • [8] The crystalline oxide semiconductor film according to any one of [1] to [7] above, wherein the crystalline oxide semiconductor film has a diameter of 6 inches (150 mm) or more.
  • [9] The crystalline oxide semiconductor film according to any one of [1] to [8], wherein a half-width of a rocking curve in a plane parallel to a main surface of the crystalline oxide semiconductor film is 25 arcsec or less, and a half-width of a rocking curve in the asymmetric plane is 2500 arcsec or less.
  • [10] The crystalline oxide semiconductor film according to any one of [1] to [9] above, wherein the crystalline oxide semiconductor film has a c-plane as a principal surface.
  • [11] The crystalline oxide semiconductor film according to [10], wherein the half-width of a rocking curve of a (006) plane is 25 arcsec or less.
  • [12] The crystalline oxide semiconductor film according to [10] or [11] above, wherein the crystalline oxide semiconductor film has a rocking curve half-width of 2500 arcsec or less in a (104) plane.
  • [13] The crystalline oxide semiconductor film according to any one of [1] to [12] above, wherein the crystalline oxide semiconductor film has zero cracks per 1 mm2.
  • [14] The crystalline oxide semiconductor film according to any one of [1] to [13] above, wherein the crystalline oxide semiconductor film has a rotational domain content [%] calculated from a total peak area (C1) of the crystalline oxide semiconductor film and a total area (C2) of the rotational domain peaks by C1/C2 ⁇ 100 of less than 0.0005%.
  • [15] The crystalline oxide semiconductor film according to [14], wherein the content of the rotation domain is less than 0.0005% in all of five in-plane locations of the crystalline oxide semiconductor film.
  • [16] The crystalline oxide semiconductor film according to [14] or [15] above, wherein a coefficient of variation of a content of rotational domains measured at five points in a plane of the crystalline oxide semiconductor film is less than 0.35.
  • [17] The crystalline oxide semiconductor film according to any one of [1] to [16] above, wherein the crystalline oxide semiconductor film has a rotational domain content [%] calculated from a total peak area (C1) of the crystalline oxide semiconductor film and a total area (C2) of the rotational domain peaks by C1/C2 ⁇ 100 of less than 0.0002%.
  • [18] The crystalline oxide semiconductor film according to [17], wherein the content of the rotation domain is less than 0.0002% in all of five in-plane positions of the crystalline oxide semiconductor film.
  • [20] A laminate structure including a base and a crystalline oxide semiconductor film laminated on the base via a buffer layer, the buffer layer containing Ga as a main component, and three or more buffer film layers laminated such that a Ga composition ratio increases from the base side of the buffer layer toward the crystalline oxide semiconductor film side, at least two of the buffer films have a thickness of 200 nm or more and 650 nm or less, the base has a corundum structure, and the crystalline oxide semiconductor film is the crystalline oxide semiconductor film of any one of [1] to [19] above.
  • [21] The laminated structure according to [20] above, wherein the thickness of all of the buffer films in the buffer layer is 200 nm or more and 650 nm or less.
  • the present invention is not limited to the above-described embodiments.
  • the above-described embodiments are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and provides similar effects is included within the technical scope of the present invention.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Dispersion Chemistry (AREA)
  • Thermal Sciences (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
PCT/JP2023/043114 2022-12-06 2023-12-01 結晶性酸化物半導体膜、積層構造体、及び半導体装置 Ceased WO2024122463A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020257018076A KR20250119538A (ko) 2022-12-06 2023-12-01 결정성 산화물 반도체막, 적층 구조체, 및 반도체 장치
JP2024562738A JPWO2024122463A1 (https=) 2022-12-06 2023-12-01
CN202380083237.8A CN120345061A (zh) 2022-12-06 2023-12-01 结晶性氧化物半导体膜、层叠结构体及半导体装置
EP23900578.8A EP4632797A1 (en) 2022-12-06 2023-12-01 Crystalline oxide semiconductor film, laminated structure, and semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022195220 2022-12-06
JP2022-195220 2022-12-06

Publications (1)

Publication Number Publication Date
WO2024122463A1 true WO2024122463A1 (ja) 2024-06-13

Family

ID=91379206

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2023/043114 Ceased WO2024122463A1 (ja) 2022-12-06 2023-12-01 結晶性酸化物半導体膜、積層構造体、及び半導体装置

Country Status (6)

Country Link
EP (1) EP4632797A1 (https=)
JP (1) JPWO2024122463A1 (https=)
KR (1) KR20250119538A (https=)
CN (1) CN120345061A (https=)
TW (1) TW202438708A (https=)
WO (1) WO2024122463A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026023152A1 (ja) * 2024-07-26 2026-01-29 三菱重工業株式会社 光学フィルタ、及び光学フィルタの製造方法

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013058637A (ja) 2011-09-08 2013-03-28 Tamura Seisakusho Co Ltd Ga2O3系半導体素子
JP2015017027A (ja) 2013-10-17 2015-01-29 株式会社Flosfia 半導体装置及びその製造方法、並びに結晶及びその製造方法
JP2016156073A (ja) * 2015-02-25 2016-09-01 株式会社Flosfia 量子井戸構造、積層構造体および半導体装置
JP2016157878A (ja) * 2015-02-25 2016-09-01 株式会社Flosfia 結晶性酸化物半導体膜、半導体装置
WO2020194803A1 (ja) * 2019-03-28 2020-10-01 日本碍子株式会社 下地基板及びその製造方法
WO2020261355A1 (ja) * 2019-06-25 2020-12-30 日本碍子株式会社 半導体膜
WO2020261574A1 (ja) * 2019-06-28 2020-12-30 日本碍子株式会社 半導体膜
JP7016489B2 (ja) 2019-12-16 2022-02-07 株式会社Flosfia 結晶性酸化物半導体膜、半導体装置
WO2022075139A1 (ja) * 2020-10-08 2022-04-14 日本碍子株式会社 酸化ガリウム単結晶粒子及びその製法
JP2022094811A (ja) * 2020-12-15 2022-06-27 信越化学工業株式会社 成膜方法

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013058637A (ja) 2011-09-08 2013-03-28 Tamura Seisakusho Co Ltd Ga2O3系半導体素子
JP2015017027A (ja) 2013-10-17 2015-01-29 株式会社Flosfia 半導体装置及びその製造方法、並びに結晶及びその製造方法
JP2016156073A (ja) * 2015-02-25 2016-09-01 株式会社Flosfia 量子井戸構造、積層構造体および半導体装置
JP2016157878A (ja) * 2015-02-25 2016-09-01 株式会社Flosfia 結晶性酸化物半導体膜、半導体装置
JP6876895B2 (ja) 2015-02-25 2021-05-26 株式会社Flosfia 結晶性酸化物半導体膜、半導体装置
WO2020194803A1 (ja) * 2019-03-28 2020-10-01 日本碍子株式会社 下地基板及びその製造方法
WO2020261355A1 (ja) * 2019-06-25 2020-12-30 日本碍子株式会社 半導体膜
WO2020261574A1 (ja) * 2019-06-28 2020-12-30 日本碍子株式会社 半導体膜
JP7265624B2 (ja) 2019-06-28 2023-04-26 日本碍子株式会社 半導体膜
JP7016489B2 (ja) 2019-12-16 2022-02-07 株式会社Flosfia 結晶性酸化物半導体膜、半導体装置
WO2022075139A1 (ja) * 2020-10-08 2022-04-14 日本碍子株式会社 酸化ガリウム単結晶粒子及びその製法
JP2022094811A (ja) * 2020-12-15 2022-06-27 信越化学工業株式会社 成膜方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KENTARO KANEKO: "Growth and physical properties of corundum-structured gallium oxide- based mixed crystal thin film", DOCTORAL THESIS OF KYOTO UNIVERSITY, March 2013 (2013-03-01)
See also references of EP4632797A1

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026023152A1 (ja) * 2024-07-26 2026-01-29 三菱重工業株式会社 光学フィルタ、及び光学フィルタの製造方法

Also Published As

Publication number Publication date
EP4632797A1 (en) 2025-10-15
KR20250119538A (ko) 2025-08-07
CN120345061A (zh) 2025-07-18
JPWO2024122463A1 (https=) 2024-06-13
TW202438708A (zh) 2024-10-01

Similar Documents

Publication Publication Date Title
JP7352226B2 (ja) 結晶性半導体膜および半導体装置
JP7315137B2 (ja) 結晶性酸化物膜
JP6994181B2 (ja) 結晶性酸化物半導体膜および半導体装置
JP7315136B2 (ja) 結晶性酸化物半導体
US11967618B2 (en) Crystalline oxide semiconductor film and semiconductor device
JP6909191B2 (ja) 積層体、半導体装置及び積層体の製造方法
JP6945121B2 (ja) 結晶性半導体膜および半導体装置
JP7358718B2 (ja) 結晶性酸化物半導体膜および半導体装置
WO2024122463A1 (ja) 結晶性酸化物半導体膜、積層構造体、及び半導体装置
JP2025102965A (ja) 積層構造体、半導体装置及び下地基板
WO2024150674A1 (ja) 結晶性金属酸化物膜とその成膜方法及び原料溶液、積層構造体、半導体装置
WO2022191230A1 (ja) 酸化物半導体膜およびその成膜方法、半導体装置
JP7809146B2 (ja) 結晶性酸化物膜、積層構造体、半導体装置、及び結晶性酸化物膜の製造方法
JP6478425B2 (ja) 結晶性半導体膜および半導体装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23900578

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2024562738

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 202547052560

Country of ref document: IN

WWE Wipo information: entry into national phase

Ref document number: 202380083237.8

Country of ref document: CN

WWP Wipo information: published in national office

Ref document number: 202547052560

Country of ref document: IN

WWE Wipo information: entry into national phase

Ref document number: 2023900578

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2023900578

Country of ref document: EP

Effective date: 20250707

WWP Wipo information: published in national office

Ref document number: 202380083237.8

Country of ref document: CN

WWP Wipo information: published in national office

Ref document number: 1020257018076

Country of ref document: KR

WWP Wipo information: published in national office

Ref document number: 2023900578

Country of ref document: EP