WO2024098716A1 - 电子装联方法、电路板组件及通信设备 - Google Patents

电子装联方法、电路板组件及通信设备 Download PDF

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Publication number
WO2024098716A1
WO2024098716A1 PCT/CN2023/095848 CN2023095848W WO2024098716A1 WO 2024098716 A1 WO2024098716 A1 WO 2024098716A1 CN 2023095848 W CN2023095848 W CN 2023095848W WO 2024098716 A1 WO2024098716 A1 WO 2024098716A1
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WO
WIPO (PCT)
Prior art keywords
blind hole
substrate
conductive layer
circuit board
layer
Prior art date
Application number
PCT/CN2023/095848
Other languages
English (en)
French (fr)
Inventor
刘敏波
孙勇
王辉
甘进轩
黄紫玲
Original Assignee
中兴通讯股份有限公司
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Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Publication of WO2024098716A1 publication Critical patent/WO2024098716A1/zh

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H05K3/308—Adaptations of leads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components

Definitions

  • the present disclosure relates to the technical field of electronic assembly, and in particular to an electronic assembly method, a circuit board assembly and a communication device.
  • SMT surface mount technology
  • THT through hole technology
  • the present invention provides an electronic assembly method, a circuit board component and a communication device.
  • the present disclosure provides an electronic assembly method, comprising: providing electronic components to be assembled, the electronic components being provided with conductive pins; providing a substrate, and opening a blind hole on the substrate, the substrate comprising at least one dielectric plate and a circuit layer formed on the dielectric plate, the bottom of the blind hole being located on any one of the dielectric plate and the circuit layer; forming a conductive layer on the inner surface of the blind hole, the conductive layer being connected to the circuit layer; filling the blind hole formed with the conductive layer with solder paste, and inserting the conductive pins of the electronic components into the blind hole; and curing the solder paste to fix the electronic components to the substrate through the conductive pins to obtain a circuit board assembly.
  • the present disclosure further provides a circuit board assembly, which is obtained by using the aforementioned electronic assembly method.
  • the present disclosure further provides a communication device, the communication device at least comprising the aforementioned circuit board assembly.
  • FIG. 1 is a schematic structural diagram of a circuit board assembly obtained by SMT assembly
  • FIG2 is a schematic structural diagram of a circuit board assembly obtained by THT assembly
  • FIG3 is a flowchart of the steps of an electronic assembly method provided by the present disclosure.
  • FIG4 is a schematic diagram of the structure of the electronic components to be assembled provided by the present disclosure.
  • FIG5 is a schematic diagram of a state where a blind hole is formed on a substrate provided by the present disclosure
  • FIG6 is a schematic diagram of a state where a conductive layer is formed in a blind hole on a substrate provided by the present disclosure
  • FIG7 is a schematic diagram of a state where solder paste is filled into a blind hole on a substrate provided by the present disclosure.
  • FIG8 is a schematic structural diagram of a circuit board assembly obtained by assembling electronic components and a substrate provided by the present invention.
  • SMT Surface Mounted Technology
  • THT Through Hole Technology
  • SMT is an electronic assembly technology that installs short-pin or short-lead surface-mounted electronic components on the surface of a printed circuit board (PCB) or other substrates, and assembles them by soldering through reflow soldering or dip soldering.
  • PCB printed circuit board
  • this solution has defects such as easy soldering deviation and low solder joint reliability.
  • the electronic component 11 is provided with a pin 111
  • the surface of the printed circuit board 12 is provided with a pin welding area 121 .
  • the surface of the pin soldering area 121 is provided with solder paste 122. Then the pins 111 of the electronic component 11 are mounted on the pin soldering area 121, and finally the electronic component 11 is fixed to the printed circuit board 12 by reflow soldering or dip soldering.
  • the pin 111 of the electronic component 11 may experience welding offset, that is, there is misalignment or offset between the pin 111 of the electronic component 11 and the corresponding pin welding area 121, thereby reducing the assembly reliability of the electronic component 11 and the printed circuit board 12 at the solder joint.
  • the electronic components 11 are mounted on the surface of the printed circuit board 12 based on SMT. Therefore, when the electronic components 11 are relatively large surface-mount components, the surface-mount component pins may have poor coplanarity, which may cause the pins of the electronic components 11 to be poorly soldered when the electronic components 11 are mounted on the surface of the printed circuit board 12. Moreover, the current only flows on the surface of the printed circuit board 12, so the power is relatively small, that is, SMT is limited to small-sized and low-power electronic components 11.
  • THT can solve the problem of easy soldering deviation by opening through holes on the printed circuit board.
  • opening more through holes on the printed circuit board will make it difficult to lay copper for routing and layout components to avoid through holes, so it is impossible to achieve high integration of electronic components on the printed circuit board.
  • the same component is not compatible with printed circuit boards of different thicknesses. When mounting components, it is also necessary to spray more flux on the through holes, which has low production efficiency.
  • a through hole 221 is opened on the printed circuit board 22, and the pin 211 of the electronic component 21 is inserted into the through hole 221. Then, solder is filled in the through hole 221 through molten tin wave to fix the pin 211 of the electronic component 21 in the through hole 221, thereby realizing the assembly of the electronic component 21 and the printed circuit board 22.
  • the large number of through holes on the printed circuit board 22 will cause the printed circuit board 22 to face difficulties in routing copper and layout components to avoid the through holes 221, so it is impossible to achieve high integration of electronic components 21 on the printed circuit board 22.
  • the same electronic component 21 is not compatible with printed circuit boards 22 of different thicknesses. When mounting components, it is also necessary to spray more flux at the through holes 221, which has low production efficiency.
  • the present disclosure provides an electronic assembly method, a circuit board assembly and a communication device, aiming to improve the assembly reliability and high integration of the circuit board assembly.
  • FIG. 3 is a flow chart of the steps of an electronic assembly method provided by the present disclosure.
  • the electronic assembly method includes steps S101 to S105 .
  • Step S101 providing an electronic component 31 to be assembled, wherein the electronic component 31 is provided with a conductive pin 311 .
  • the electronic components 31 to be assembled include but are not limited to inductors, semiconductor components, transformers, and power modules, wherein the semiconductor components include but are not limited to chips.
  • the electronic component 31 is provided with a conductive pin 311, and is connected to the substrate 32 via the conductive pin 311.
  • the conductive pin 311 may be one or more, and the shape and height of the conductive pin 311 may be set as required, which is not limited here.
  • Step S102 providing a substrate 32 , and opening a blind hole 321 on the substrate 32 .
  • the substrate 32 includes at least one dielectric plate 322 and a circuit layer 324 formed on the dielectric plate 322 .
  • the bottom of the blind hole 321 is located at any one of the dielectric plate 322 and the circuit layer 324 .
  • the substrate 32 includes at least one dielectric plate 322 and a circuit layer 324 formed on the dielectric plate 322, wherein the thickness of the dielectric plate 322 is greater than the thickness of the circuit layer 324, and the dielectric plate 322 is an insulating plate.
  • a hole is drilled on the surface of the substrate 32 by a drilling device to form a blind hole 321 on the substrate 32.
  • the bottom of the blind hole 321 can be located at any layer of the dielectric plate 322 and the circuit layer 324 of the substrate 32.
  • the bottom of the blind hole 321 can be located at any position of the dielectric plate 322 in the substrate 32, which is easier to process and form than the bottom of the blind hole 321 is limited to the circuit layer 324.
  • opening a blind hole 321 on a substrate 32 includes: determining conductive pin parameters corresponding to each conductive pin 311 of an electronic component 31 to be assembled, and determining blind hole design parameters of the blind hole 321 according to the conductive pin parameters; and opening the blind hole 321 on the substrate 32 according to the blind hole design parameters.
  • the conductive pin parameters corresponding to each conductive pin 311 of the electronic component 31 to be assembled are first confirmed, and the conductive pin parameters include the size, shape, and spacing between the conductive pins.
  • the blind hole design parameters corresponding to the blind hole 321 are determined according to the conductive pin parameters, and then the drilling device is controlled to open the blind hole 321 on the substrate 32 according to the blind hole design parameters.
  • the blind hole design parameters include at least one of the size of the blind hole 321, the depth of the blind hole 321, the spacing between the blind holes 321, the spacing between the blind holes 321 and the edge of the substrate 32, and the shape of the blind hole 321.
  • the thickness of the dielectric plate 322 is greater than the thickness of the circuit layer 324 , and the bottom of the blind hole 321 is located at any position of the substrate 32 , that is, the bottom of the blind hole 321 is located at any position of any layer of the dielectric plate 322 and the circuit layer 324 .
  • the electronic assembly method before providing the substrate 32, further includes: providing a copper clad laminate, the copper clad laminate including a first surface and a second surface relative to each other; forming a circuit layer on the first surface and the second surface of the copper clad laminate to prepare the copper clad laminate into a circuit board; and stacking and pressing a plurality of circuit boards to form a substrate.
  • Step S103 forming a conductive layer on the inner surface of the blind hole 321 , wherein the conductive layer is connected to the circuit layer 324 .
  • the conductive layer is a metal conductive layer, wherein the metal conductive layer can be a copper layer, a nickel layer, a tin layer, a silver layer, or a gold layer.
  • the metal conductive layer can be a single metal conductive layer or a stack of multiple metal conductive layers. This is not a restriction.
  • a conductive layer is formed on the inner surface of the blind hole 321.
  • the conductive layer is connected to the conductive pin 311 of the electronic component 31.
  • the conductive layer is connected to the circuit layer 324.
  • the circuit layer 324 is connected to the conductive pins of other electronic components, thereby realizing electrical interconnection between different electronic components.
  • the conductive layer is connected to at least two circuit layers, so that the conductive layer and the circuit layer 324 can pass a larger current, so that the substrate 32 can carry high-power electronic components 31.
  • forming a conductive layer on the inner surface of the blind hole 321 includes: depositing a first conductive layer 325 a on the inner surface of the blind hole 321 , and forming a second conductive layer 325 b by electroplating on the first conductive layer 325 a .
  • a first conductive layer 325a is deposited on the inner surface of the blind hole 321 by a chemical deposition process, such as a copper layer.
  • a second conductive layer 325b is formed on the first conductive layer 325a by an electroplating process, and the second conductive layer 325b is a conductive metal layer, such as a copper layer.
  • the thickness of the second conductive layer 325b is greater than the thickness of the first conductive layer 325a.
  • a third conductive layer is formed on the second conductive layer 325b, and the third conductive layer is any one of a nickel layer, a tin layer, and a silver layer.
  • a fourth conductive layer is formed on the third conductive layer, and the third conductive layer and the fourth conductive layer are different types of metal layers, for example, the fourth conductive layer is a gold layer.
  • Step S104 filling the blind hole 321 formed with the conductive layer with solder paste 326 , and inserting the conductive pin 311 of the electronic component 31 into the blind hole 321 .
  • solder paste 326 is filled in the blind hole 321, and the conductive pin 311 of the electronic component 31 to be assembled is inserted into the blind hole 321 filled with solder paste 326, so that the blind hole 321 is used to limit the conductive pin 311, so as to facilitate the precise installation of the electronic component 31 on the substrate 32.
  • filling the blind hole 321 with the conductive layer with the solder paste 326 includes: filling the blind hole 321 with the conductive layer with the solder paste 326 by stencil printing.
  • the steel mesh and the substrate 32 are positionally calibrated so that the leakage hole of the steel mesh is aligned with the blind hole 321 of the substrate 32.
  • the solder paste 326 is covered on the steel mesh and the solder paste 326 is pressed and scraped by a scraper assembly so that the solder paste 326 is pressed into the blind hole 321 with the help of the leakage hole, and then filled into the corresponding blind hole 321 through the leakage hole.
  • the electronic assembly method further includes: forming a solder pad 327 connected to the conductive layer 324 on the peripheral side of the blind hole 321 .
  • solder paste 326 is filled in the blind hole 321 formed with the conductive layer and on the pad 327 around the blind hole 321, including: Solder paste 326 is filled into the blind hole 321 and onto the pad 327 around the blind hole 321 by screen printing.
  • a soldering pad 327 is formed around the blind hole 321 , so that the electronic component 31 can be firmly soldered to the substrate 32 via the soldering pad 327 during the process of assembling the electronic component 31 to the substrate 32 .
  • the steel mesh and the substrate 32 are calibrated to align the leak hole of the steel mesh with the blind hole 321 of the substrate 32.
  • the solder paste 326 is covered on the steel mesh and the solder paste 326 is scraped by a scraper assembly to press the solder paste 326 into the blind hole 321 and onto the soldering pad 327 through the leak hole, and then filled into the corresponding blind hole 321 and onto the soldering pad 327 on the side of the blind hole 321 through the leak hole.
  • Step S105 curing the solder paste 326 to fix the electronic component 31 to the substrate 32 via the conductive pins 311 to obtain a circuit board assembly.
  • the substrate 32 on which the electronic component 31 is mounted is cured by a heating and curing device to cure the solder paste 326 so as to fix the electronic component 31 to the substrate 32 through the conductive pin 311 to obtain a circuit board assembly.
  • the blind hole 321 is used to limit the electronic component 31, so that the electronic component 31 can be accurately fixed to the substrate 32, thereby solving the problem of welding displacement of the electronic component 31.
  • the solder paste 326 is printed into the blind hole 321 by the steel screen, and the solder paste 326 in the blind hole 321 is used to make up for the pin height difference of the electronic component 31 in the production process, thereby solving the problem of cold solder joint caused by the coplanarity difference of the pins of large-sized surface-mount components.
  • a conductive layer is formed in the blind hole 321, which effectively increases the welding area between the conductive pin 311 of the electronic component 31 and the blind hole side wall of the substrate 32 during the welding process, thereby effectively enhancing the welding strength of the corresponding solder joint and solving the problem of poor reliability of the solder joints of SMT surface mounted components.
  • the electronic components 31 can be fixed without providing through holes on the substrate 32, and the electronic components 31 can be freely arranged on the surface of the substrate 32 without blind holes 321, and the circuit layer inside the substrate 32 without blind holes can be freely wired and copper-plated, thereby achieving highly integrated assembly of the electronic components 31 on the substrate 32 with blind holes 321.
  • the substrate 32 does not need to be provided with through holes, the strength of the substrate 32 is within a controllable range, so that the probability of the substrate 32 being bent by heat is reduced, thereby achieving reliable assembly of the electronic components 31 and the substrate 32.
  • the size of the blind hole 321 of the substrate 32 is adjusted to solve the problem that the conductive pin 311 cannot be smoothly inserted into the blind hole 321 at the same time when the electronic component 31 is machine-mounted. Based on the through hole opened on the substrate 32, if the through hole size is too small, the pin 311 of the electronic component 31 cannot be smoothly inserted into the through hole; if the through hole size is too large, welding defects are likely to occur during the welding process, such as tin loss or insufficient tin during through hole reflow welding, and tin flipping during wave soldering, all of which affect the welding quality.
  • the depth of the blind hole 321 is controlled to solve the problem that the length of the pins of the electronic components 31 is not compatible with substrates 32 of different thicknesses.
  • the present disclosure further provides a circuit board assembly, which is obtained by using the electronic assembly method of any embodiment of the specification.
  • the present disclosure further provides a communication device, which includes at least the aforementioned circuit board assembly.
  • the present disclosure provides an electronic assembly method, a circuit board assembly and a communication device, wherein the electronic assembly method comprises the following steps: opening a blind hole on a substrate, the substrate comprising at least one dielectric plate and a circuit layer formed on the dielectric plate, the bottom of the blind hole being located at any one of the dielectric plate and the circuit layer; forming a conductive layer on the inner surface of the blind hole, the conductive layer being connected to the circuit layer; filling the blind hole with the conductive layer formed therein with solder paste, and inserting the conductive pins of the electronic components into the blind hole; and curing the solder paste to fix the electronic components to the substrate through the conductive pins, thereby obtaining a circuit board assembly.
  • blind holes are first opened on the substrate, and the conductive pins of the electronic components are limited by the blind holes opened on the substrate.
  • the electronic components will not move relative to the substrate during the process of being fixed on the substrate, so that the electronic components can be fixed more accurately at the preset position of the substrate, solving the problem of component welding offset and realizing reliable assembly of circuit board components.
  • the substrate does not need to open through holes, the substrate does not have the difficulty of routing copper and layout components to avoid through holes, so the electronic components can be highly integrated on the substrate.
  • the electronic assembly method provided by the present disclosure can improve the assembly reliability and high integration of circuit board components.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

本公开提供一种电子装联方法、电路板组件及通信设备，其中，该电子装联方法包括：提供待装配的电子元器件，电子元器件设置有导电引脚；提供基板，并在基板上开设盲孔，基板包括至少一层介质板及形成于介质板的线路层，盲孔底部位于介质板和线路层的任意一层；在盲孔的内表面形成导电层，导电层与线路层连接；在形成有导电层的盲孔内填充锡膏，并将电子元器件的导电引脚插接到盲孔内；对锡膏进行固化处理，以将电子元器件通过导电引脚固定于基板，得到电路板组件。

Description

电子装联方法、电路板组件及通信设备
相关申请的交叉引用
本公开要求享有2022年11月07日提交的名称为“电子装联方法、电路板组件及通信设备”的中国专利申请CN202211384124.5的优先权，其全部内容通过引用并入本公开中。
技术领域
本公开涉及电子装联技术领域，尤其涉及一种电子装联方法、电路板组件及通信设备。
背景技术
现代电子装联技术中的主流装联方案可分为表面贴装技术(SMT，Surface Mounted Technology)和通孔插件技术(THT，Through Hole Technology)。然而，SMT方案存在焊接容易偏移、焊点可靠性低等技术问题，THT方案存在无法实现电子元器件在印制电路板上装联高度集成的技术问题，以及生产效率较低的技术问题。
因此，有必要提供一种电子装联方法，解决SMT和THT的上述技术问题。
发明内容
本公开提供一种电子装联方法、电路板组件及通信设备。
第一方面，本公开提供一种电子装联方法，包括：提供待装配的电子元器件，电子元器件设置有导电引脚；提供基板，并在基板上开设盲孔，基板包括至少一层介质板及形成于介质板的线路层，盲孔底部位于介质板和线路层的任意一层；在盲孔的内表面形成导电层，导电层与线路层连接；在形成有导电层的盲孔内填充锡膏，并将电子元器件的导电引脚插接到盲孔内；对锡膏进行固化处理，以将电子元器件通过导电引脚固定于基板，得到电路板组件。
第二方面，本公开还提供一种电路板组件，电路板组件采用前述的电子装联方法得到。
第三方面，本公开还提供一种通信设备，通信设备至少包括前述的电路板组件。
附图说明
为了更清楚地说明本公开技术方案，下面将对实施例描述中所需要使用的附图作简单地 介绍，显而易见地，下面描述中的附图是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是通过SMT装联得到的电路板组件的结构示意图；
图2是通过THT装联得到的电路板组件的结构示意图；
图3是本公开提供的一种电子装联方法的步骤流程图；
图4是本公开提供的待装配的电子元器件的结构示意图；
图5是本公开提供的在基板上形成盲孔的状态示意图；
图6是本公开提供的在基板上的盲孔内形成导电层的状态示意图；
图7是本公开提供的在基板上的盲孔内填装锡膏的状态示意图；以及
图8为本公开提供的将电子元器件和基板进行装联后得到电路板组件的结构示意图。
具体实施方式
下面将结合本公开中的附图，对本公开中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
附图中所示的流程图仅是示例说明，不是必须包括所有的内容和操作/步骤，也不是必须按所描述的顺序执行。例如，有的操作/步骤还可以分解、组合或部分合并，因此实际执行的顺序有可能根据实际情况改变。
应当理解，在此本公开说明书中所使用的术语仅仅是出于描述特定实施例的目的而并不意在限制本公开。如在本公开说明书和所附权利要求书中所使用的那样，除非上下文清楚地指明其它情况，否则单数形式的“一”、“一个”及“该”意在包括复数形式。
现代电子装联技术中的主流装联方案可分为表面贴装技术(SMT，Surface Mounted Technology)和通孔插件技术(THT，Through Hole Technology)。
其中，SMT是一种将短引脚或短引线表面组装电子元器件安装在印制电路板(PCB，Printed Circuit Board)的表面或其它基板的表面上，通过再流焊或浸焊等方法加以焊接组装的电子装联技术，但该方案存在焊接容易偏移，焊点可靠性低等缺陷。
如图1所示，电子元器件11设置有引脚111，印制电路板12的表面设置有引脚焊接区121， 引脚焊接区121的表面设置有锡膏122。然后将电子元器件11的引脚111贴装在引脚焊接区121，最后通过回流焊或者浸焊等方式将电子元器件11固定于印制电路板12。
然而，基于锡膏122仅涂布于印制电路板12的表面，在将电子元器件11对应安装于引脚焊接区121的过程中，基于电子元件器11的引脚111和印制电路板12的表面之间没有限位结构，在引脚表面张力不对称或者自身惯性的作用下，电子元器件11的引脚111可能出现焊接偏移现象，即电子元器件11的引脚111与对应的引脚焊接区121之间存在错位或偏移，降低电子元器件11和印制电路板12在焊点处的装联可靠性。
进一步，基于SMT将电子元器件11装联至印制电路板12的表面，故而，在电子元器件11为较大尺寸的表贴元器件时，可能存在表贴元器件引脚共面度差的现象，从而导致电子元器件11与印制电路板12的表面装联时，容易出现电子元器件11的引脚虚焊现象。并且仅在印制电路板12表面通流，故而功率较小，也即，SMT局限于小尺寸、小功率的电子元器件11。
THT可通过在印制电路板上开通孔解决焊接容易偏移问题，但印制电路板开设较多的通孔会导致印制电路板面临走线铺铜和布局元器件需要避开通孔的困难，故无法实现电子元器件在印制电路板上装联高度集成。另外，同一元器件不能兼容不同厚度印制电路板。元器件贴装时也需要在通孔处喷涂较多的助焊剂，生产效率较低。
如图2所示，在印制电路板22上开设通孔221，将电子元器件21的引脚211穿插到通孔221内，然后在通孔221内通过熔融锡波填充焊锡，将电子元器件21的引脚211固定在通孔221内，从而实现电子元器件21和印制电路板22的装联。
然而，印制电路板22开设较多的通孔会导致印制电路板22面临走线铺铜和布局元器件需要避开通孔221的困难，故无法实现电子元器件21在印制电路板22上装联高度集成。另外，同一电子元器件21不能兼容不同厚度的印制电路板22。元器件贴装时也需要在通孔221处喷涂较多的助焊剂，生产效率较低。
基于此，本公开提供了一种电子装联方法、电路板组件及通信设备，旨在提高电路板组件的装联可靠性和高集成性。
下面结合附图，对本公开的一些实施例作详细说明。在不冲突的情况下，下述的实施例及实施例中的特征可以相互组合。
请参阅图3，图3为本公开所提供的一种电子装联方法的步骤流程图。
如图3所示，电子装联方法包括步骤S101至步骤S105。
步骤S101：提供待装配的电子元器件31，电子元器件31设置有导电引脚311。
在一示例性实施例中，待装配的电子元器件31包括但不限定于电感、半导体元器件、变压器、电源模块，其中，半导体元器件包括但不限定于芯片。
如图4所示，电子元器件31设置有导电引脚311，并通过导电引脚311连接基板32。其中导电引脚311可以是一个或多个，导电引脚311的形状及高度可以根据需要设定，在此不做限定。
步骤S102：提供基板32，并在基板32上开设盲孔321，基板32包括至少一层介质板322及形成于介质板322的线路层324，盲孔321底部位于介质板322和线路层324的任意一层。
如图5所示，基板32包括至少一层介质板322及形成于介质板322的线路层324，其中，介质板322的厚度大于线路层324的厚度，并且介质板322为绝缘板。通过钻孔装置在基板32的表面进行钻孔，以在基板32上形成盲孔321，在一示例性实施例中，盲孔321的底部可以位于基板32的介质板322和线路层324的任意一层。在一示例性实施例中，盲孔321的底部可以位于基板32中的介质板322的任意位置，相比于盲孔321的底部限定于线路层324更易于加工形成。
在一些实施方式中，在基板32上开设盲孔321，包括：确定待装配的电子元器件31的各个导电引脚311对应的导电引脚参数，并根据导电引脚参数确定盲孔321的盲孔设计参数；根据盲孔设计参数在基板32上开设盲孔321。
在一示例性实施例中，在基板32开设盲孔321过程中，先确认待装配的电子元器件31的各个导电引脚311对应的导电引脚参数，该导电引脚参数包括导电引脚的大小、形状、导电引脚之间的间距等，在获得导电引脚参数之后，根据导电引脚参数确定盲孔321所对应的盲孔设计参数，然后根据盲孔设计参数控制钻孔装置在基板32上开设盲孔321。在一示例性实施例中，盲孔设计参数包括盲孔321的大小、盲孔321的深度、盲孔321之间的间距、盲孔321与基板32的边缘之间的间距、盲孔321的形状中的至少一者。
在一些实施方式中，介质板322的厚度大于线路层324的厚度，且盲孔321的底部位于基板32的任意位置，即盲孔321底部位于介质板322和线路层324的任意一层的任意位置。
在一些实施方式中，在提供基板32之前，电子装联方法还包括：提供覆铜板，覆铜板包括相对的第一表面和第二表面；在覆铜板的第一表面及第二表面形成线路层，以将覆铜板制备形成线路板；将多个线路板堆叠压合，以制成基板。
步骤S103：在盲孔321的内表面形成导电层，导电层与线路层324连接。
在一示例性实施例中，导电层为金属导电层，其中，金属导电层可以是铜层、镍层、锡层、银层、金层。金属导电层可以是单层金属导电层、也可以是多层金属导电层的叠合，在 此不做限制。
在盲孔321的内表面形成导电层，一方面，导电层与电子元器件31的导电引脚311相连，另一方面，该导电层与线路层324连接，线路层324与其他电子元器件的导电引脚相连，从而实现不同电子元器件间电气互联。在一示例性实施例中，导电层至少与两层电路层连接，从而导电层和线路层324可通过更大的电流，使得基板32可以承载大功率的电子元器件31。
在一些实施方式中，在盲孔321的内表面形成导电层，包括：在盲孔321的内表面沉积第一导电层325a，并在第一导电层325a上电镀形成第二导电层325b。
如图6所示，在一示例性实施例中，通过化学沉积工艺在盲孔321的内表面沉积第一导电层325a，如，第一导电层325a为铜层，在盲孔321的内表面形成第一导电层325a后，再通过电镀工艺在第一导电层325a上形成第二导电层325b，第二导电层325b为导电金属层，如，铜层。在一示例性实施例中，第二导电层325b的厚度大于第一导电层325a的厚度。
在一些实施方式中，在形成第二导电层325b后，在第二层导电层325b上形成第三导电层，该第三导电层为镍层、锡层、银层中的任一者。
在一些实施方式中，在形成第三导电层镍层后，在第三导电层上形成第四导电层，并且第三导电层和第四导电层为不同种类的金属层，如，第四导电层为金层。
步骤S104：在形成有导电层的盲孔321内填充锡膏326，并将电子元器件31的导电引脚311插接到盲孔321内。
如图7所示，在一示例性实施例中，在盲孔321内形成导电层之后，在盲孔321内填充锡膏326，并将待装配的电子元器件31的导电引311脚插接到填充有锡膏326的盲孔321内，从而利用盲孔321对导电引脚311进行限位，便于电子元器件31精准安装于基板32。
在一些实施方式中，在形成有导电层的盲孔321内填充锡膏326，包括：通过钢网印刷将锡膏326填充于形成有导电层的盲孔321内。
在一示例性实施例中，将钢网与基板32进行位置校准，以使钢网的漏孔与基板32的盲孔321的进行位置对齐，在钢网与基板32位置对齐完成后，将锡膏326覆盖在钢网上，并通过刮刀组件对锡膏326压刮，以使锡膏326借助漏孔被压入到盲孔321当中，进而通过漏孔填装到对应的盲孔321内。
在一些实施方式中，在盲孔321的内表面形成导电层过程中，电子装联方法还包括：在盲孔321的周侧形成与导电层324连接的焊垫327。
其中，在形成有导电层的盲孔321内以及在盲孔321周侧的焊垫327上填充锡膏326，包括： 通过钢网印刷将锡膏326填充于盲孔321内以及在盲孔321周侧的焊垫327上。
如图7所示，在盲孔321内形成导电层的过程中，在盲孔321的周侧形成焊垫327，以便于电子元器件31在与基板32装联过程中，通过焊垫327与基板32牢固焊接。
形成焊垫327后，将钢网与基板32进行位置校准，以使钢网的漏孔与基板32的盲孔321的进行位置对齐，在钢网与基板32位置对齐完成后，将锡膏326覆盖在钢网上，并通过刮刀组件对锡膏326压刮，以使锡膏326借助漏孔被压入到盲孔321当中及焊垫327上，进而通过漏孔填装到对应的盲孔321内及盲孔321周侧的焊垫327上。
步骤S105：对锡膏326进行固化处理，以将电子元器件31通过导电引脚311固定于基板32，得到电路板组件。
如图8所示，在将电子元器件31的导电引脚311插接到盲孔321内之后，将安装有电子元器件31的基板32通过加热固化装置对锡膏326进行固化处理，以将电子元器件31通过导电引脚311固定于基板32，得到电路板组件。
本公开实施方式中利用盲孔321对电子元器件31进行限位，以使得电子元器件31可以精准固定于基板32，从而解决电子元器件31焊接移位问题。同时，通过钢网印刷锡膏326至盲孔321内，利用盲孔321内的锡膏326弥补电子元器件31在生产过程中存在的引脚高度差，从而解决大尺寸表贴元器件引脚共面度差导致的虚焊问题。
同时，盲孔321内形成有导电层，在焊接过程有效增加电子元器件31的导电引脚311与基板32的盲孔侧壁的焊接面积，从而可以有效增强对应焊点的焊接强度，解决SMT表贴元器件焊点可靠性差问题。
进一步，通过在基板32上开设盲孔321，使得基板32无需开设通孔亦可以实现电子元器件31的固定，基板32未开设有盲孔321的表面可自由布局电子元器件31，且基板32内部未开设盲孔的线路层可以自由布线铺铜，从而实现电子元器件31在开设有盲孔321的基板32上的装联高度集成。并且基于基板32无需开设通孔，基板32的强度在可控范围内，使得基板32受热发生弯曲的几率降低，进而实现电子元器件31和基板32的可靠装联。
更进一步，调节基板32盲孔321的大小，解决电子元器件31机贴时导电引脚311无法同时顺利插入盲孔321问题。基于在基板32上开设通孔，若通孔尺寸过小，则电子元器件31引脚311无法顺利插接到通孔内；若通孔尺寸过大，则在焊接过程中容易出现焊接缺陷，如通孔回流焊接容易掉锡、少锡，波峰焊接容易翻锡，均影响焊接质量。
同时，控制盲孔321的深度，解决电子元器件31引脚长度不能兼容不同厚度基板32问题。
在一些实施方式中，本公开还提供一种电路板组件，该电路板组件采用说明书任一实施方式电子装联方法得到。
在一些实施方式中，本公开还提供一种通信设备，通信设备至少包括前述的电路板组件。
本公开提供一种电子装联方法、电路板组件及通信设备，其中，该电子装联方法通过在基板上开设盲孔，基板包括至少一层介质板及形成于介质板的线路层，盲孔底部位于介质板和线路层的任意一层；在盲孔的内表面形成导电层，导电层与线路层连接；在形成有导电层的盲孔内填充锡膏，并将电子元器件的导电引脚插接到盲孔内；对锡膏进行固化处理，以将电子元器件通过导电引脚固定于基板，得到电路板组件。
在将电子元器件和基板进行装配过程中，先在基板上开设盲孔，利用基板上所开设的盲孔对电子元器件的导电引脚进行限位，电子元器件在固定于基板过程中不会相对基板位移，使得电子元器件可以较为精准的固定于基板的预设位置，解决元器件焊接偏移问题，实现电路板组件的可靠装联。并且基于基板无需开设通孔，基板无走线铺铜和布局元器件需要避开通孔的困难，故电子元器件可以在基板上实现高度集成。
本公开所提供的电子装联方法可以提高电路板组件的装联可靠性和高集成性。
应当理解，在本公开说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者系统不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者系统所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者系统中还存在另外的相同要素。
上述本公开序号仅仅为了描述，不代表实施例的优劣。以上所述，仅为本公开的具体实施例，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到各种等效的修改或替换，这些修改或替换都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以权利要求的保护范围为准。

Claims (10)

  1. 一种电子装联方法，包括：
    提供待装配的电子元器件，所述电子元器件设置有导电引脚；
    提供基板，并在所述基板上开设盲孔，所述基板包括至少一层介质板及形成于所述介质板的线路层，所述盲孔底部位于所述介质板和所述线路层的任意一层；
    在所述盲孔的内表面形成导电层，所述导电层与所述线路层连接；
    在形成有所述导电层的所述盲孔内填充锡膏，并将所述电子元器件的导电引脚插接到所述盲孔内；
    对所述锡膏进行固化处理，以将所述电子元器件通过所述导电引脚固定于所述基板，得到电路板组件。
  2. 如权利要求1所述的电子装联方法，其中，在所述基板上开设盲孔，包括：
    确定待装配的所述电子元器件的各个所述导电引脚对应的导电引脚参数，并根据所述导电引脚参数确定所述盲孔的盲孔设计参数；
    根据所述盲孔设计参数在所述基板上开设盲孔。
  3. 如权利要求2所述的电子装联方法，其中，所述盲孔设计参数包括所述盲孔的大小、所述盲孔的深度、所述盲孔之间的间距、所述盲孔与所述基板的边缘之间的间距、所述盲孔的形状中的至少一者。
  4. 如权利要求1所述的电子装联方法，其中，所述在所述盲孔的内表面形成导电层，包括：
    在所述盲孔的内表面沉积第一导电层，并在所述第一导电层上电镀形成第二导电层。
  5. 如权利要求1所述的电子装联方法，其中，所述在所述盲孔的内表面形成导电层的过程中，所述电子装联方法还包括：
    在所述盲孔周侧形成与所述导电层连接的焊垫。
  6. 如权利要求1所述的电子装联方法，其中，所述介质板的厚度大于所述线路层的厚度。
  7. 如权利要求1所述的电子装联方法，其中，在形成有所述导电层的所述盲孔内填充锡膏，包括：
    通过钢网印刷将所述锡膏填充于形成有所述导电层的所述盲孔内。
  8. 一种电路板组件，所述电路板组件采用如权利1至7任一项所述的电子装联方法得到。
  9. 如权利要求8所述的电路板组件，其中，所述电子元器件包括电感、芯片、变压器、电源模块中的至少一者。
  10. 一种通信设备，所述通信设备至少包括如权利要求8至9任一项所述的电路板组件。
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