WO2024075816A1 - 配線基板、配線基板を用いた電子部品実装用パッケージ、および電子モジュール - Google Patents

配線基板、配線基板を用いた電子部品実装用パッケージ、および電子モジュール Download PDF

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Publication number
WO2024075816A1
WO2024075816A1 PCT/JP2023/036390 JP2023036390W WO2024075816A1 WO 2024075816 A1 WO2024075816 A1 WO 2024075816A1 JP 2023036390 W JP2023036390 W JP 2023036390W WO 2024075816 A1 WO2024075816 A1 WO 2024075816A1
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WO
WIPO (PCT)
Prior art keywords
view
recess
opening
wiring board
plan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/036390
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English (en)
French (fr)
Japanese (ja)
Inventor
芳規 川頭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2024555858A priority Critical patent/JP7817435B2/ja
Priority to EP23874941.0A priority patent/EP4600998A1/en
Publication of WO2024075816A1 publication Critical patent/WO2024075816A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H05K1/0221—Coaxially shielded signal lines comprising a continuous shielding layer partially or wholly surrounding the signal lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224—Patterned shielding planes, ground planes or power planes
    • H05K1/0225—Single or multiple openings in a shielding, ground or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/09163—Slotted edge
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the printed circuit board [PCB] or at the walls of large holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10189—Non-printed connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10295—Metallic connector elements partly mounted in a hole of the PCB

Definitions

  • This disclosure relates to wiring boards, packages for mounting electronic components using wiring boards, and electronic modules.
  • a known structure for transmitting such signals is one that has a base made of a metal member and a terminal portion joined to the base.
  • the terminal portion has a ceramic member and a conductive portion provided on the ceramic member (see Patent Document 1).
  • a lead can be joined to the conductive portion.
  • the wiring board includes a base made of a metal material, a dielectric substrate, and a first signal conductor.
  • the base has a first upper surface, a first lower surface, a first side surface, and a first opening having an opening in the first upper surface.
  • the first lower surface is located opposite the first upper surface.
  • the first side surface is connected to the first upper surface and the first lower surface.
  • the dielectric substrate has a second upper surface, a second lower surface, and a second side surface.
  • the dielectric substrate is also located on the first upper surface.
  • the second lower surface is located opposite the second upper surface.
  • the second side surface is connected to the second upper surface and the second lower surface.
  • the second side surface is located along the first side surface.
  • the first signal conductor is located on the second upper surface.
  • the first signal conductor has a first line portion extending in a first direction away from the second side surface, and a first connection portion located between the first line portion and the second side surface.
  • the maximum dimension of the first connection portion in the second direction along the first side surface is greater than the maximum dimension of the first line portion in the second direction.
  • the first opening is positioned so as to overlap at least a portion of the first connection portion.
  • the wiring board of (1) above further includes a bottom surface ground conductor located on the second bottom surface.
  • the bottom surface ground conductor has a first opening region. In a plan view, the first opening region is located within the first opening and overlaps the first connection portion.
  • the first opening is positioned so as to intersect with the first side surface.
  • the maximum dimension of the first opening in the second direction along the first side surface is equal to or greater than the maximum dimension of the first connection portion in the second direction.
  • the dielectric substrate further has a first recess.
  • the first recess is located so as to intersect with the second upper surface and the second side surface.
  • the first recess is located so as to overlap with the first opening in a plan view.
  • the first recess may also include a first inner wall surface.
  • the first inner wall surface is continuous with the second upper surface and the second side surface.
  • the first signal conductor is located so as to extend to the first inner wall surface.
  • the maximum dimension of the first recess in the second direction along the second side surface is smaller than the maximum dimension of the first connection portion in the second direction along the second side surface.
  • the maximum dimension of the first opening in the first direction is greater than the maximum dimension of the first recess in the first direction in a plan view.
  • the wiring boards of (1) to (6) above further include an upper surface ground conductor and an inner layer ground conductor.
  • the upper surface ground conductor is located on the second upper surface with a gap between it and the first signal conductor.
  • the inner layer ground conductor is located within the dielectric substrate.
  • the first connection portion has a first end located on the second side surface.
  • the upper surface ground conductor has a second end located on the second side surface.
  • the inner layer ground conductor has a third end located on the second side surface. In a side view, the minimum distance between the first end and the second end in the second direction is greater than the minimum distance between the first end and the third end in the second direction.
  • the first connection portion has a protrusion.
  • the protrusion is on the second upper surface, along the second side surface, and protrudes in the second direction.
  • the wiring boards of (1) to (8) above further include a first connection member electrically connected to the first connection portion.
  • the first connection member also has a first tip portion that overlaps with the first connection portion in a plan view. In a plan view, the first tip portion is located within the first opening.
  • the maximum dimension of the first connection member in the second direction is smaller than the maximum dimension of the first opening in the second direction.
  • the maximum distance from the first side surface to the inner edge of the first opening in the first direction is greater than the maximum dimension from the first side surface to the first tip in the first direction.
  • the wiring board of (5) or (6) above further includes a first connection member that is electrically connected to the first connection portion. In a plan view, at least a portion of the first connection member is positioned so as to overlap the first recess.
  • the dielectric substrate further has a second recess having an opening on the second lower surface.
  • the second recess is positioned so as to overlap at least a portion of the first signal conductor.
  • the second recess is positioned so as to overlap at least a portion of the first opening in a planar view.
  • the maximum dimension of the second recess in the first direction is equal to or smaller than the maximum dimension of the first opening in the first direction.
  • the dielectric substrate further has a second recess having an opening on the second lower surface.
  • the second recess is positioned so as to overlap at least a portion of the first signal conductor.
  • the maximum dimension of the second recess in the first direction is greater than the maximum dimension of the first recess in the first direction.
  • An electronic component mounting package includes a frame body and the wiring board described above in (1) to (15) fixed to the frame body.
  • the frame body is bonded onto a base and/or a dielectric substrate.
  • An electronic module includes the electronic component mounting package of (16) above, an electronic component, and a lid.
  • the electronic component is located on the base or the dielectric substrate and is electrically connected to the wiring substrate.
  • the lid is located on the frame and covers the inside of the electronic component mounting package.
  • FIG. 1 is a perspective view of a wiring board and an electronic component mounting package according to a first embodiment of the present disclosure
  • FIG. 2 is an enlarged view of a main part A shown in FIG. 2 is a perspective view of the main part A shown in FIG. 1 , with the base portion omitted, as viewed from the negative direction of the z-axis.
  • FIG. 2 is an enlarged plan view of a main part A shown in FIG. 3 is a diagram in which the connecting members are omitted from FIG. 2. 4 in which the connecting members are omitted. 6 is a side view of the wiring board shown in FIG. 5 as viewed from the x-axis direction.
  • FIG. 2 is an enlarged perspective view of a base according to the first embodiment of the present disclosure.
  • FIG. 9 is a plan view of the base shown in FIG. 8 .
  • FIG. 13 is a perspective view showing a first modified example of the base portion.
  • FIG. 11 is a perspective view showing a second modified example of the base portion.
  • FIG. 11 is a perspective view showing a first modified example of a dielectric substrate.
  • FIG. 13 is a perspective view showing a first modified example of the dielectric substrate, as viewed from the negative direction of the z-axis in FIG. 12 .
  • FIG. 13B is a diagram showing a first modified example of the dielectric substrate, and is a plan view of FIG. 13A as seen from the negative direction of the z-axis.
  • FIG. 11 is a perspective view showing a modified example 2 of the dielectric substrate.
  • FIG. 14B is a diagram showing a modified example 2 of the dielectric substrate, and is a plan view of FIG. 14A as viewed from the negative direction of the z-axis.
  • FIG. 11 is a perspective view showing a third modified example of the dielectric substrate.
  • FIG. 15B is a diagram showing a third modified example of the dielectric substrate, and is a plan view of FIG. 15A as viewed from the negative direction of the z-axis.
  • 1 is an exploded perspective view showing a connection portion between a wiring board and an external board, with the connection member omitted;
  • 13 is a plan view showing a first modified example of a connection portion between a wiring board and an external board and a first connection member;
  • FIG. 11 is a perspective view showing a second modified example of the first connecting member.
  • FIG. 11 is a plan view showing a second modified example of the first connecting member.
  • FIG. 11 is a perspective view showing a third modified example of the first connecting member.
  • FIG. 11 is a side view showing a third modified example of the first connecting member.
  • FIG. 11 is a perspective view showing a fourth modified example of the first connecting member.
  • FIG. 13 is a side view showing a fourth modified example of the first connecting member.
  • FIG. 13 is a plan view showing a fourth modified example of the first connecting member.
  • FIG. 11 is a perspective view of a wiring board according to a second embodiment of the present disclosure.
  • FIG. 13 is a perspective view of a wiring board according to a second embodiment of the present disclosure, including a third modified example of a base portion.
  • FIG. 23 is a perspective view of the wiring board shown in FIG. 22 as viewed from the negative direction of the z-axis.
  • 1 is an exploded perspective view of a wiring board, an electronic component mounting package, and an electronic module according to an embodiment of the present disclosure.
  • any direction of the wiring board may be upward or downward, for convenience, a Cartesian coordinate system xyz is defined, and the positive side of the z direction is upward.
  • the first direction refers to, for example, the x direction in the drawings.
  • the second direction refers to, for example, the y direction in the drawings.
  • the plan view is a concept that includes a planar perspective view.
  • the side view is a concept that includes a side perspective view.
  • the wiring board 101 includes a base portion 1 made of a metal material, a dielectric substrate 2, and a first signal conductor S1.
  • the base 1 has a first upper surface 1a, a first lower surface 1c, a first side surface 1b, and a first opening 11 having an opening on the first upper surface 1a.
  • the first lower surface 1c is located on the opposite side to the first upper surface 1a.
  • the first side surface 1b is connected to the first upper surface 1a and the first lower surface 1c.
  • the first upper surface 1a may include a mounting area on which an electronic component 103 described later is mounted.
  • the base 1 is, for example, rectangular in plan view, with a size of 10 mm x 10 mm to 50 mm x 50 mm and a thickness of 0.5 mm to 20 mm.
  • metal materials constituting the base 1 include metal materials such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or alloys containing these metal materials.
  • the base 1 may be a single metal plate or a laminate of multiple metal plates.
  • a plating layer of nickel, gold, or the like may be formed on the surface of the base 1 by electroplating or electroless plating in order to reduce oxidation corrosion.
  • the base 1 being made of a metal material here means that it is essentially made of a metal material, and for example, the base 1 may contain a non-metallic material that is unavoidable during manufacturing.
  • the dielectric substrate 2 is located on the first upper surface 1a.
  • the dielectric substrate 2 also has a second upper surface 2a, a second lower surface 2c, and a second side surface 2b.
  • the second lower surface 2c is located on the opposite side to the second upper surface 2a.
  • the second side surface 2b is connected to the second upper surface 2a and the second lower surface 2c.
  • the second side surface 2b is located along the first side surface 1b.
  • the material of the dielectric substrate 2 may be, for example, a ceramic material such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, or a silicon nitride sintered body, or a dielectric material such as a glass ceramic material or a glass epoxy material.
  • the dielectric substrate 2 may also be a printed circuit board (PCB).
  • the dielectric substrate 2 can be joined to the base 1 via, for example, solder, brazing material, glass, or adhesive such as a resin adhesive.
  • the brazing material can be, for example, silver, copper, gold, aluminum, or magnesium, and may contain additives such as nickel, cadmium, or phosphorus.
  • the dielectric substrate 2 is located on a portion of the first upper surface 1a of the base 1, but the dielectric substrate 2 may be located so as to cover the entire first upper surface 1a.
  • the second upper surface 2a of the dielectric substrate 2 may include an area on which the electronic components 103 described below are mounted.
  • the dielectric substrate 2 may be a single layer or may be configured with multiple dielectric layers stacked together.
  • the dielectric substrate 2 is, for example, rectangular in plan view, with dimensions of 4 mm x 4 mm to 50 mm x 50 mm and a thickness of 0.5 mm to 10 mm.
  • the dielectric substrate 2 may further have a dielectric layer located on the second upper surface 2a.
  • the dielectric layer located on the second upper surface 2a may be located so as to cover a portion of the second upper surface 2a, or may be located so as to cover the entire second upper surface 2a.
  • the dielectric substrate 2 has a wall portion 25.
  • the wall portion 25 is located so as to overlap a portion of the first signal conductor S1 in a plan view.
  • a grounding conductor may be located on the upper surface and side surfaces of the wall portion 25.
  • the dielectric substrate 2 can be manufactured, for example, as follows: A plurality of green sheets are processed using a mold or the like to prepare a plurality of green sheets formed to the outer shape of the dielectric substrate 2. Next, the plurality of green sheets are stacked so that their outer edges coincide to form a green sheet laminate. The green sheet laminate is fired to sinter the plurality of green sheets, thereby obtaining the dielectric substrate 2.
  • the first signal conductor S1 is located on the second upper surface 2a.
  • the first signal conductor S1 also has a first line portion S1L extending in a first direction (x direction) away from the second side surface 2b, and a first connection portion S1P located between the first line portion S1L and the second side surface 2b.
  • materials for the first signal conductor S1 include metal materials such as gold, silver, copper, nickel, tungsten, molybdenum, and manganese.
  • the first signal conductor S1 may also be formed by sintering a metal paste on the second upper surface 2a, or may be formed using a thin film formation technique such as a vapor deposition method or a sputtering method.
  • the first signal conductor S1 has a width of, for example, 0.05 mm to 2 mm and a length of, for example, 1.5 mm to 25 mm.
  • the thickness of the first signal conductor S1 is, for example, 0.01 to 0.1 mm.
  • the width, length, and thickness of the first signal conductor S1 referred to here can be the dimensions of the first signal conductor S1 in the x direction, y direction, and z direction, respectively. Furthermore, the width, length, and thickness of the first signal conductor S1 do not have to be constant, and may change along the way.
  • the surface of the first signal conductor S1 may be formed with metal plating such as nickel plating or gold plating.
  • an insulating film such as ceramic (e.g., alumina coating) or resin may be located on a portion of the first signal conductor S1.
  • the insulating film may be provided on the first signal conductor S1 by screen printing. Also, the insulating film may be located only on a portion of the first signal conductor S1. With this configuration, it is possible to reduce the possibility that the first signal conductor S1 will short-circuit with other wiring.
  • the first signal conductor S1 is located in contact with the second side surface 2b in a plan view. In other words, the first signal conductor S1 is located so as to reach the second side surface 2b. Note that the first signal conductor S1 does not necessarily need to be in contact with the second side surface 2b, and may be located away from the second side surface 2b in a plan view.
  • the maximum dimension Ls1a of the first connection portion S1P in the y direction is greater than the maximum dimension Ls1c of the first line portion S1L in the y direction. This configuration allows for a stable connection of the first connection member 31, which will be described later.
  • the first connection portion S1P has a protrusion S1a, which will be described later. Therefore, in one embodiment, the maximum dimension Ls1a of the first connection portion S1P in the y direction may be a dimension including the protrusion S1a. Also, in one embodiment, the dimension Ls1p of the first connection portion S1P other than the protrusion S1a in the y direction is also larger than the maximum dimension Ls1c of the first line portion S1L in the y direction.
  • the first signal conductor S1 has a second connection portion S1b on the opposite side (positive direction of the x-axis) from the first connection portion S1P.
  • the dimension Ls1b of the second connection portion S1b in the y-direction is larger than the maximum dimension Ls1c of the first line portion S1L in the y-direction.
  • a conductive connection member such as a lead terminal or a wire may be joined to the second connection portion S1b, similar to the first connection portion S1P.
  • the wiring board 101 may have an upper surface ground conductor G2 located on the second upper surface 2a.
  • the upper surface ground conductor G2 has a first upper surface ground conductor G21 and a second upper surface ground conductor G22.
  • the first signal conductor S1 is located between the first upper surface ground conductor G21 and the second upper surface ground conductor G22.
  • a bottom ground conductor G1 may be located on the second bottom surface 2c.
  • the bottom ground conductor G1 has a first opening area G11. More specifically, in a plan view from the negative direction of the z axis, the second bottom surface 2c is exposed at a position overlapping with the first opening area G11. In a plan view, the first opening area G11 is located within the first opening 11 and overlaps with the first connection portion S1P. With this configuration, the metal parts (base 1 and bottom ground conductor G1) close to the first connection portion S1P can be kept away in the z direction.
  • the possibility of the impedance value around the connection portion of the first connection member 31 decreasing can be reduced.
  • the first opening region G11 is located within the first opening 11 in plan view, the effective relative dielectric constant around the first connection member 31 can be further reduced. This further reduces the possibility that the impedance value around the connection portion of the first connection member 31 will decrease.
  • the first opening region G11 is positioned so as to intersect with the second side surface 2b, but the first opening region G11 does not necessarily have to be positioned so as to intersect with the second side surface 2b. In other words, in a plan view, the first opening region G11 may be positioned with a gap between it and the second side surface 2b.
  • the lower surface ground conductor G1 may be electrically connected to the first upper surface ground conductor G21, the second upper surface ground conductor G22, and the inner layer ground conductor G3, which will be described later, by a via provided in the dielectric substrate 2 or a conductor formed on the side of the dielectric substrate 2, including the second side surface 2b. Furthermore, the lower surface ground conductor G1 may be electrically connected to the base 1.
  • the first opening 11 is positioned so as to overlap at least a portion of the first signal conductor S1 in plan view.
  • the first opening 11 is filled with air or a dielectric material such as a resin material or a glass material, and has a lower dielectric constant than the base 1. For this reason, when a first connection portion S1P is provided in the first signal conductor S1 to stably connect the first connection member 31 described later, the possibility of a decrease in the impedance value can be reduced.
  • the first opening 11 has a shape cut from the first upper surface 1a to the first side surface 1b, but may have a shape cut from the first upper surface 1a, the first side surface 1b, and the first lower surface 1c, as in Modification 1 of the base 1 described below.
  • the first opening 11 may also have a concave shape with an opening in the first upper surface 1a, as in Modification 2 of the base 1 described below.
  • the shape of the first opening 11 in a plan view is a rectangle with some rounded corners, but the shape of the first opening 11 may be a rectangle or a circle.
  • the base 1 may have multiple first openings 11.
  • the first signal conductor S1 may be located at the center of the first opening 11 in the y direction.
  • the first opening 11 may be located line-symmetrically with the first signal conductor S1 in between.
  • the second side surface 2b may be located along the first side surface 1b in a plan view.
  • the first opening 11 may be located so as to intersect with the first side surface 1b. More specifically, the first opening 11 may be shaped to be cut from the first upper surface 1a to the first side surface 1b. With this configuration, the decrease in impedance in the first signal conductor S1 can be more efficiently reduced.
  • the base 1 and first opening 11 shown in Figures 8 and 9 can be manufactured by stacking a metal plate formed to the outer shape of the base 1 having the first opening 11 and a metal plate formed to the outer shape of the base 1. With this configuration, compared to the case of Variation 1 of the base 1 described below, when the base 1 is a laminate, the manufacturing process of the base 1 can be reduced.
  • FIG. 10 shows modified example 1 of the base 1.
  • the first opening 11 of the base 1 is located so as to intersect with the first upper surface 1a, the first side surface 1b, and the first lower surface 1c.
  • the first opening 11 penetrates the base 1 from the first upper surface 1a to the first lower surface 1c, and is located so as to intersect with the first side surface 1b.
  • FIG. 11 shows a second modified example of the base 1.
  • the first opening 11 of the base 1 does not have to be positioned so as to intersect with the first side surface 1b.
  • the first opening 11 may be positioned with a gap between it and the first side surface 1b.
  • the first opening 11 may extend from the first upper surface 1a to the first lower surface 1c.
  • the second side surface 2b is flush with the first side surface 1b in a plan view, but the second side surface 2b may be located away from the first side surface 1b.
  • the first opening 11 is located intersecting with the first side surface 1b, so that the base 1 that overlaps with the first signal conductor S1 can be reduced. This makes it possible to more efficiently reduce the decrease in impedance in the first signal conductor S1.
  • the impedance value may decrease near the second side surface 2b. Therefore, by positioning the first opening 11 so as to intersect with the first side surface 1b, it is possible to reduce the decrease in the impedance value of the first signal conductor S1 near the second side surface 2b.
  • the maximum dimension Ly11 of the first opening 11 in the second direction (y direction) along the first side surface 1b may be equal to or greater than the maximum dimension Ls1a of the first connection portion S1P in the second direction.
  • the first connection portion S1P may be located within the first opening 11 in the y direction. This reduces the possibility of a decrease in the impedance value when the first connection portion S1P is provided in the first signal conductor S1 to stably connect the first connection member 31 described below.
  • the dielectric substrate 2 may further have a first recess 21.
  • the first recess 21 is located so as to intersect with the second upper surface 2a and the second side surface 2b.
  • the first recess 21 is located so as to overlap with the first opening 11 in a plan view.
  • the first recess 21 may also include a first inner wall surface 211.
  • the first inner wall surface 211 is continuous with the second upper surface 2a and the second side surface 2b.
  • the first signal conductor S1 (first connection portion S1P) is located so as to extend to the first inner wall surface 211.
  • the maximum dimension Ly21 of the first recess 21 in the y direction may be smaller than the maximum dimension Ls1a of the first connection portion S1P in the y direction.
  • the first recess 21 is located so as to intersect with the second upper surface 2a, the second side surface 2b, and the second lower surface 2c. In other words, the first recess 21 penetrates from the second upper surface 2a to the second lower surface 2c, and is located in contact with the second side surface 2b in a plan view.
  • the dielectric board 2 may further include a third recess 23 and a fourth recess 24 located on the second upper surface 2a.
  • the third recess 23 is located in contact with the second side surface 2b and the first upper surface ground conductor G21.
  • the fourth recess 24 is located in contact with the second side surface 2b and the second upper surface ground conductor G22.
  • the third recess 23 may include a third inner wall surface 233 that is continuous with the second upper surface 2a and the second side surface 2b.
  • the first upper surface ground conductor G21 may be located so as to extend to the third inner wall surface 233.
  • the fourth recess 24 may include a fourth inner wall surface 244 that is continuous with the second upper surface 2a and the second side surface 2b.
  • the second upper surface ground conductor G22 may be located so as to extend to the fourth inner wall surface 244.
  • the maximum dimension Lz23 of the third recess 23 in the z direction and the maximum dimension Lz24 of the fourth recess 24 in the z direction may be the same as or different from the maximum dimension Lz21 of the first recess 21 in the z direction.
  • the maximum dimension Lz23 of the third recess 23 in the z direction and the maximum dimension Lz24 of the fourth recess 24 in the z direction are the same as the dimension Lz2b of the second side surface 2b of the dielectric substrate 2 in the z direction, the grounding state of the dielectric substrate 2 can be improved, thereby improving the high-frequency characteristics of the first signal conductor S1.
  • FIG. 12 shows modified example 1 of the dielectric substrate 2.
  • the first recess 21 does not extend all the way to the second lower surface 2c. In other words, the first recess 21 is cut out from the second upper surface 2a to the second side surface 2b.
  • the maximum distance Lx11 in the x direction from the first side surface 1b to the inner edge of the first opening 11 may be greater than the maximum dimension Lx21 of the first recess 21 in the x direction.
  • the wiring board 101 may further include an upper surface ground conductor G2 and an inner layer ground conductor G3.
  • the upper surface ground conductor G2 is located on the second upper surface 2a with a gap between it and the first signal conductor S1.
  • the inner layer ground conductor G3 is located within the dielectric substrate 2.
  • the first connection portion S1P has a first end S1e located on the second side surface 2b.
  • the upper surface ground conductor G2 has a second end G21e (G22e) located on the second side surface 2b.
  • the inner layer ground conductor G3 has a third end G3e located on the second side surface 2b.
  • the first connection portion S1P has a protrusion S1a described later, and in this case, the protrusion S1a and the first end S1e are the same.
  • the first end S1e can be said to be the outer edge portion of the first connection portion S1P close to the second side surface 2b.
  • the first end S1e is located symmetrically across the first recess 21, but may be located on only one side.
  • the second end G21e (G22e) of the upper surface ground conductor G2 is the second end G21e of the first upper surface ground conductor G21 and the second end G22e of the second upper surface ground conductor G22.
  • the first end S1e, the second end G21e (G22e), and the third end G3e are exposed to the second side surface 2b, but they do not necessarily have to be exposed to the second side surface 2b.
  • the minimum distance L1 between the first end S1e and the second end G21e (G22e) in the y direction is greater than the minimum distance L2 between the first end S1e and the third end G3e in the y direction.
  • the materials of the bottom ground conductor G1, the top ground conductor G2, and the inner-layer ground conductor G3 may be the same as or different from those of the first signal conductor S1.
  • the bottom ground conductor G1, the top ground conductor G2, and the inner-layer ground conductor G3 may be formed, for example, by the same method as that of the first signal conductor S1.
  • the first connection portion S1P may have a protrusion S1a.
  • the protrusion S1a is on the second upper surface 2a and protrudes in the y direction along the second side surface 2b. With this configuration, even if the inductive component increases at the point where the first connection member 31 and the external board are connected, a capacitive component can be added to the first signal conductor S1, making it easier to adjust the impedance value.
  • the protrusion S1a is in contact with the second side surface 2b in a plan view. Note that in one embodiment, the protrusions S1a are located symmetrically across the first recess 21, but may be located on only one side.
  • the wiring board 101 may further include a first connection member 31 electrically connected to at least a portion of the first connection portion S1P.
  • the first connection member 31 may have a first tip portion 31e that overlaps with the first signal conductor S1 in a planar view. In a planar view, the first tip portion 31e may be located within the first opening 11.
  • the impedance value may decrease in the portion where the first connection member 31 and the first connection portion S1P overlap.
  • the above-mentioned configuration can reduce the possibility of the impedance value at the first connection portion S1P decreasing.
  • the first connection member 31 is a lead terminal, but is not limited to this.
  • the first connection member 31 may be, for example, a conductive member such as a wire, or a flexible printed circuit board (FPC: Flexible Printed Circuits).
  • FPC Flexible Printed Circuits
  • a flexible circuit board or a printed circuit board on which an electronic circuit is formed may be connected to the tip of the first connection member 31.
  • the second connection member 32 and the third connection member 33 described later may also be members similar to the first connection member 31.
  • the maximum dimension Ly31 of the first connection member 31 in the y direction may be smaller than the maximum dimension Ly11 of the first opening 11 in the y direction.
  • the portion where the first connection member 31 and the first signal conductor S1 overlap, where the impedance value may decrease, is located within the first opening 11 in the y direction in a plan view. This configuration makes it easy to adjust the impedance value in the first signal conductor S1.
  • the maximum distance Lx11 in the x direction from the first side surface 1b to the inner edge of the first opening 11 may be greater than the maximum dimension L31e in the x direction from the first side surface 1b to the first tip portion 31e.
  • the portion where the first connection member 31 and the first connection portion S1P overlap, where the impedance value may decrease, is located within the first opening 11 in the x direction in a plan view. This configuration makes it easy to adjust the impedance value in the first signal conductor S1.
  • the first connection member 31 may be positioned so as to overlap the first recess 21. If the area of the first signal conductor S1 is increased (the first connection portion S1P is provided) in order to join the first connection member 31 to the first signal conductor S1, the impedance value may decrease, but by providing the first recess 21, the decrease in the impedance value can be reduced.
  • the dielectric substrate 2 may further have a second lower surface 2c opposite to the second upper surface 2a, and a second recess 22 having an opening in the second lower surface 2c.
  • the second recess 22 may be positioned so as to overlap at least a part of the first signal conductor S1 in a planar view.
  • the second recess 22 is filled with air or a dielectric material such as a resin material or a glass material, and has a lower dielectric constant than the dielectric substrate 2. Therefore, the reduction in impedance caused by the dielectric substrate 2 in the first signal conductor S1 can be reduced.
  • the dielectric substrate 2 has a first recess 21 and a second recess 22, but it does not necessarily have to have the first recess 21, and may have only the second recess 22.
  • FIGS. 14A and 14B show modified example 2 of the dielectric substrate 2
  • FIGS. 15A and 15B show modified example 3 of the dielectric substrate 2.
  • the second recess 22 may be positioned so as to intersect with the second side surface 2b. In other words, the second recess 22 may be positioned so as to be cut from the second lower surface 2c to the second side surface 2b.
  • the first recess 21 and the second recess 22 may be connected to each other as in the modified example 2 of the dielectric substrate 2 shown in FIG. 14A.
  • the first recess 21 and the second recess 22 are connected to each other on the second side surface 2b.
  • the dielectric substrate 2 overlapping with the first signal conductor S1 in a plan view can be further reduced compared to the case where the first recess 21 and the second recess 22 are located separately, so that the decrease in the impedance value can be reduced.
  • the first recess 21 and the second recess 22 may be located separately, as in modified example 3 of the dielectric substrate 2 shown in FIG. 15A. In this configuration, the strength of the dielectric substrate 2 can be improved compared to when the first recess 21 and the second recess 22 are connected.
  • the second recess 22 may be positioned overlapping the first recess 21 in a plan view, or may be positioned away from the first recess 21.
  • the overlapping portion of the first signal conductor S1 and the first connecting member 31 can be covered without interruption by the first recess 21 and the second recess 22, compared to when the second recess 22 is positioned away from the first recess 21 in a plan view, so that a further decrease in the impedance value in the first signal conductor S1 can be reduced.
  • the second recess 22 may be positioned so as to overlap at least a part of the first opening 11.
  • a maximum dimension Lx22 of the second recess 22 in the x direction may be equal to or smaller than a maximum distance Lx11 of the first opening 11 in the x direction.
  • the maximum dimension Lx22 of the second recess 22 in the x direction may be larger than the maximum dimension Lx21 of the first recess 21 in the x direction.
  • the wiring board 101 may be electrically connected to an external board 4.
  • the external board 4 includes a board 41 and a second signal conductor S2 located on the upper surface of the board 41.
  • the first signal conductor S1 and the second signal conductor S2 are electrically connected by the first connection member 31 described above.
  • the external substrate 4 may include a first external upper surface ground conductor G4 and a second external upper surface ground conductor G5 located on the upper surface of the substrate 41.
  • the second signal conductor S2 may be located between the first external upper surface ground conductor G4 and the second external upper surface ground conductor G5.
  • the first external upper surface ground conductor G4 and the first upper surface ground conductor G21 may be electrically connected by the second connecting member 32 described above.
  • the second external upper surface ground conductor G5 and the second upper surface ground conductor G22 may be electrically connected by the third connecting member 33 described above.
  • the external substrate 4 may include an external bottom surface ground conductor G6 located on the underside of the substrate 41.
  • the external bottom surface ground conductor G6 may be electrically connected to the first external top surface ground conductor G4 and/or the second external top surface ground conductor G5 by vias or castellations.
  • the external substrate 4 also has a substrate side surface 41b, which faces the first side surface 1b of the base 1.
  • the substrate side surface 41b may be joined to the first side surface 1b by a conductive bonding material F.
  • the external bottom surface ground conductor G6 and the bottom surface ground conductor G1 may be electrically connected by the bonding material F.
  • the bonding material F may extend to a portion of the first upper surface 1a. Furthermore, in order to reduce a decrease in the impedance value in the first signal conductor S1, the bonding material F does not have to extend to the first opening 11.
  • the bonding material F may be positioned with a gap between the first signal conductor S1 and the second signal conductor S2 in a side view. This configuration reduces the possibility of the bonding material F coming into contact with the first signal conductor S1, the second signal conductor S2, and the first connection member 31, causing a short circuit.
  • the bonding material F may contain silver epoxy resin.
  • the bonding material F may contain silver epoxy resin.
  • the silver epoxy resin has a higher viscosity than solder or brazing material and is therefore less likely to flow off. This makes it easier to position the bonding material F at the desired position.
  • the bonding material F may also be solder, brazing material, etc.
  • the external bottom surface ground conductor G6 and the bottom surface ground conductor G1 are electrically connected via the bonding material F, which reduces the deviation in ground potential between the external substrate 4 and the wiring substrate 101 and strengthens the grounding state. This makes it possible to improve high-frequency characteristics such as crosstalk characteristics when transmitting signals in the first signal conductor S1 and the second signal conductor S2.
  • the external substrate 4 may have a base portion 42 located below the substrate 41.
  • the substrate 41 may be directly joined to the base portion 42, or, if the external substrate 4 has an external bottom surface earth conductor G6, the substrate 41 may be joined via the external bottom surface earth conductor G6.
  • the bonding material F may extend to between the substrate 41 and the base portion 42. In other words, the substrate 41 and/or the external bottom surface earth conductor G6 may be joined to the base portion 42 by the bonding material F.
  • FIG. 17 is a plan view showing the connection portion between the wiring board 101 and the external board 4 and variant 1 of the first connecting member 31.
  • Variation 1 of the first connecting member 31 has a first narrow portion 31n and a first wide portion 31w.
  • the dimension L31w of the first wide portion 31w in the y direction is larger than the dimension L31n of the first narrow portion 31n in the y direction.
  • the dimension L31w of the first wide portion 31w in the y direction may be rephrased as the maximum dimension of the first connecting member 31 in the y direction.
  • the first wide portion 31w has an arc shape in a plan view and is continuous with the first narrow portion L31n.
  • the external connecting member 31 can be rephrased as having a bulging shape at the first wide portion 31w in a plan view.
  • the first wide portion 31w has a symmetrical shape in the longitudinal direction of the first connecting member 31, but this does not necessarily have to be the case; for example, the first wide portion 31w may be located on only one side of the first connecting member 31 (e.g., the positive side in the y direction).
  • the first wide portion 31w is located between the first side surface 1b and the board side surface 41b in a plan view.
  • This configuration reduces the possibility of sudden impedance fluctuations when a signal is transmitted between the first signal conductor S1 and the second signal conductor S2, and reduces the possibility of unwanted electrical signals being reflected by the first signal conductor S1 and the second signal conductor S2.
  • the first side surface 1b is flush with the second side surface 2b, so in other words, the first wide portion 31n is located between the second side surface 2b and the board side surface 41b in a plan view.
  • the dimension L31w of the first wide portion 31w in the y direction is larger than the dimension Ls2 of the second signal conductor S2 in the y direction.
  • the dimension L31w of the first wide portion 31w in the y direction may be smaller than or the same as the dimension Ls2 of the second signal conductor S2 in the y direction.
  • the dimension L31w is larger than the dimension Ls2, the possibility of localized high impedance in the first connection member 31 can be reduced.
  • the dimension L31w of the first wide portion 31w in the y direction is smaller than the maximum dimension Ls1a of the first connection portion S1P in the y direction.
  • the dimension L31w of the first wide portion 31w in the y direction may be larger than or the same as the maximum dimension Ls1a of the first connection portion S1P in the y direction.
  • FIG. 17 also shows modified examples of the second connecting member 32 and the third connecting member 33.
  • the second connecting member 32 has a second narrow portion 32n and a second wide portion 32w.
  • the second narrow portion 32n and the second wide portion 32w can be defined similarly to the first narrow portion 31n and the first wide portion 31w, respectively.
  • the third connecting member 33 has a third narrow portion 33n and a third wide portion 33w.
  • the third narrow portion 33 and the third wide portion 33w can also be defined similarly to the first narrow portion 31n and the first wide portion 31w, respectively.
  • FIGS. 18A and 18B show modified example 2 of the first connecting member 31.
  • the first connecting member 31 also has a first narrow portion 31n and a first wide portion 31w.
  • Modified example 2 of the first connecting member 31 differs from modified example 1 of the first connecting member 31 in that the first wide portion 31w has a linear shape along the y direction.
  • FIGS. 19A and 19B show a third modified example of the first connection member 31.
  • the first signal conductor S1 also has a first narrow portion 31n and a first wide portion 31w, but in a plan view from the y direction, the dimension H31w of the first wide portion 31w in the z direction is larger than the dimension H31n of the first narrow portion 31n in the z direction.
  • 20A, 20B, and 20C are diagrams showing a fourth modified example of the first connecting member 31.
  • the dimension H31w of the first wide portion 31w in the z direction is larger than the dimension H31n of the first narrow portion 31n in the z direction (FIG. 20B)
  • the dimension L31w of the first wide portion 31w in the y direction is larger than the dimension L31n of the first narrow portion 31n in the y direction (FIG. 20C).
  • 17 to 20A, 20B, and 20C show various modified examples of the first connecting member 31, but the second connecting member 32 and the third connecting member 33 may be formed in the same shape as each modified example of the first connecting member 31.
  • the wiring board 101 according to the second embodiment is different from the first embodiment in that the dielectric board 2 is a printed circuit board.
  • FIGS. 22 and 23 are diagrams showing a wiring board 101 having a third modified example of the base 1.
  • This embodiment is different from the above embodiment in that the base 1 has a second opening 12.
  • the second opening 12 is cut from the first lower surface 1c to the first side surface 1b.
  • the maximum dimension Ly12 of the second opening 12 in the y direction may be larger than the maximum dimension Ly11 of the first opening 11 in the y direction.
  • the maximum distance Lx12 from the first side surface 1b to the inner edge of the second opening 12 in the x direction may be larger than the maximum distance Lx11 from the first side surface 1b to the inner edge of the first opening 11 in the x direction.
  • the first opening 11 may be located within the second opening 12 in a plan view.
  • an electronic component mounting package 100 includes a frame body 102 and a wiring board 101 fixed to the frame body 102.
  • the frame body 102 is bonded onto the base 1 and onto the dielectric substrate 2.
  • the frame body 102 may be bonded only onto either the base 1 or the dielectric substrate 2.
  • the frame 102 is located on the base 1 and/or the dielectric substrate 2, and protects the electronic components 103 located inside in a plan view. That is, in a plan view, the frame 102 is located so as to surround the electronic components 103.
  • the first upper surface 1a of the base 1 is surrounded by the frame 102 and the dielectric substrate 2. In this manner, the frame 102 does not have to surround the entire first upper surface 1a of the base 1.
  • the frame 102 may be rectangular in plan view.
  • the dielectric substrate 2 may be sandwiched between the frame 102 and the base 1.
  • the frame 102 may have a notch 102K for joining the dielectric substrate 2.
  • the material of the frame 102 may be, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials.
  • the wiring board 101 can be fitted into the cutout portion 102K and joined.
  • the material of the frame 102 may be an insulating material, for example, an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a ceramic material such as glass ceramics.
  • the material of the frame 102 may be the same material as that of the dielectric substrate 2. In this case, the frame 102 and the dielectric substrate 2 can be molded as a single unit.
  • the frame 102 can be joined to the base 1 via a brazing material or the like.
  • the brazing material can be, for example, silver, copper, gold, aluminum, or magnesium, and can contain additives such as nickel, cadmium, or phosphorus.
  • the electronic component mounting package 100 can be used, for example, as a package for mounting semiconductor components for wireless communication or optical communication.
  • the wiring board 101 in the electronic component mounting package 100 can be used as an input/output terminal for transmitting and inputting/outputting electrical signals by electrically connecting an electronic component 103 such as a semiconductor element to the outside.
  • an electronic module 10 includes an electronic component mounting package 100, an electronic component 103, and a lid 104.
  • the electronic component 103 is located on the base 1 or the dielectric substrate 2, and is electrically connected to the wiring board 101.
  • the lid 104 is located on the frame 102, and is positioned to cover the inside of the electronic component mounting package 100.
  • the electronic component 103 may be a component that performs signal processing, such as converting a radio signal or an optical signal into an electrical signal, or converting an electrical signal into an optical signal or a radio signal.
  • the electronic component 103 is located on the base 1 and is housed in the electronic component mounting package 100.
  • the electronic component 103 may be, for example, an optical semiconductor element such as a semiconductor laser (LD) or a photodiode (PD), a semiconductor integrated circuit element, or a sensor element such as an optical sensor.
  • the electronic component 103 may be formed from a semiconductor material such as gallium arsenide or gallium nitride.
  • the electronic module 10 may be used as an optical communications module.
  • the lid 104 is positioned on the frame 102, covering the inside of the electronic component mounting package 100, and protects the electronic component 103 together with the frame 102.
  • the lid 104 is, for example, rectangular in plan view, with dimensions of 10 mm x 10 mm to 50 mm x 50 mm and a thickness of 0.5 mm to 2 mm.
  • materials for the lid 104 include metal materials such as iron, copper, nickel, chromium, cobalt, molybdenum, or tungsten, or alloys that combine multiple of these metal materials.
  • the metal members that make up the lid 104 can be produced by subjecting an ingot of such metal material to metal processing methods such as rolling and punching.
  • the electronic module 10 may further include a seal ring located between the lid body 104 and the frame body 102.
  • the seal ring has a function of joining the lid body 104 and the frame body 102.
  • the seal ring is located on the frame body 102 and surrounds the electronic component 103 in a plan view.
  • materials for the seal ring include metal materials such as iron, copper, silver, nickel, chromium, cobalt, molybdenum, and tungsten, or alloys combining a plurality of these metal materials. Note that if a seal ring is not provided on the frame body 102, the lid body 104 may be joined to the frame body 102 via an adhesive such as solder, brazing material, glass, or resin adhesive.
  • the wiring board according to one embodiment has the above-described configuration, and therefore, when the wiring board is miniaturized, it is possible to adjust the impedance in the first signal conductor. This makes it possible to improve the signal transmission characteristics in the first signal conductor. This makes it possible to provide an electronic component mounting package and an electronic module that are capable of reducing loss in signal transmission, particularly in high-frequency signal transmission.
  • This disclosure can be used as a wiring board, a package for mounting electronic components using a wiring board, and an electronic module.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)
PCT/JP2023/036390 2022-10-07 2023-10-05 配線基板、配線基板を用いた電子部品実装用パッケージ、および電子モジュール Ceased WO2024075816A1 (ja)

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EP23874941.0A EP4600998A1 (en) 2022-10-07 2023-10-05 Wiring board, electronic component mounting package using wiring board, and electronic module

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012222079A (ja) * 2011-04-06 2012-11-12 Kyocera Corp 端子構造体、電子部品収納用パッケージおよび電子装置
JP2013197435A (ja) * 2012-03-22 2013-09-30 Kyocera Corp 配線基板
WO2014192687A1 (ja) * 2013-05-29 2014-12-04 京セラ株式会社 素子収納用パッケージおよび実装構造体
WO2015129731A1 (ja) * 2014-02-26 2015-09-03 京セラ株式会社 電子部品収納用パッケージおよび電子装置
JP2017045959A (ja) * 2015-08-28 2017-03-02 株式会社東芝 高周波半導体装置用パッケージおよび高周波半導体装置
JP2018037564A (ja) 2016-09-01 2018-03-08 株式会社東芝 高周波半導体用パッケージおよび高周波半導体装置
JP2019216200A (ja) * 2018-06-13 2019-12-19 住友電工デバイス・イノベーション株式会社 半導体装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012222079A (ja) * 2011-04-06 2012-11-12 Kyocera Corp 端子構造体、電子部品収納用パッケージおよび電子装置
JP2013197435A (ja) * 2012-03-22 2013-09-30 Kyocera Corp 配線基板
WO2014192687A1 (ja) * 2013-05-29 2014-12-04 京セラ株式会社 素子収納用パッケージおよび実装構造体
WO2015129731A1 (ja) * 2014-02-26 2015-09-03 京セラ株式会社 電子部品収納用パッケージおよび電子装置
JP2017045959A (ja) * 2015-08-28 2017-03-02 株式会社東芝 高周波半導体装置用パッケージおよび高周波半導体装置
JP2018037564A (ja) 2016-09-01 2018-03-08 株式会社東芝 高周波半導体用パッケージおよび高周波半導体装置
JP2019216200A (ja) * 2018-06-13 2019-12-19 住友電工デバイス・イノベーション株式会社 半導体装置

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