WO2024066407A1 - 电路版图的布线方法、装置、设备、存储介质及产品 - Google Patents

电路版图的布线方法、装置、设备、存储介质及产品 Download PDF

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Publication number
WO2024066407A1
WO2024066407A1 PCT/CN2023/095685 CN2023095685W WO2024066407A1 WO 2024066407 A1 WO2024066407 A1 WO 2024066407A1 CN 2023095685 W CN2023095685 W CN 2023095685W WO 2024066407 A1 WO2024066407 A1 WO 2024066407A1
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WIPO (PCT)
Prior art keywords
routing
wiring
turning
points
point
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PCT/CN2023/095685
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English (en)
French (fr)
Inventor
马圣铭
陈越
王健名
淮赛男
张胜誉
徐雄
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腾讯科技（深圳）有限公司
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Publication of WO2024066407A1 publication Critical patent/WO2024066407A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing

Definitions

  • the embodiments of the present application relate to the field of micro-nano processing technology, and in particular to a wiring method, device, equipment, storage medium and product of a circuit layout.
  • automatic wiring refers to the layout of circuits in the process of automatically completing the design of circuit layouts through software.
  • the automatic routing algorithm usually divides the routing area into several grids or rectangular areas, and controls the routing path to be arranged along the grid lines, or controls the routing path to cross the rectangular area of the path, so as to connect the components or solder joints in the routing area.
  • the wiring path obtained by the solution in the above-mentioned related technology is a horizontal and vertical route, and there is usually a large bend at the turn, which does not meet the requirements of some chip designs that require small curvature wiring, affecting the scope of application of the above-mentioned automatic wiring algorithm.
  • the embodiments of the present application provide a wiring method, device, equipment, storage medium and product for a circuit layout, which can generate small curvature turns in the wiring path during the automatic wiring process, thereby expanding the scope of application of the automatic wiring algorithm.
  • the technical solution is as follows:
  • a wiring method for a circuit layout is provided, the method being executed by a computer device, the method comprising:
  • a routing path passing through the at least one routing point is generated; the routing path starts turning at the turning start position with the turning radius.
  • a wiring device for a circuit layout comprising:
  • a first acquisition module configured to acquire location information of at least one wiring point in the circuit layout from wiring planning information of the circuit layout
  • a second acquisition module is used to calculate the turning starting position and the turning radius corresponding to each of the at least one routing point based on the position information
  • the path generation module is used to generate a routing path passing through the at least one routing point based on the turning starting position and the turning radius; the routing path starts turning at the turning starting position with the turning radius.
  • At least one routing point includes n routing points; n is greater than or equal to 2, and n is an integer;
  • the second acquisition module is used to:
  • the auxiliary frames of the n wiring points are obtained; the auxiliary frames of the n wiring points do not overlap each other; the auxiliary frames are U-shaped square frames; the opening direction of the auxiliary frames is the same as the wiring extension direction at the wiring points, and the center position of the auxiliary frames is On an extension line starting from the wiring point;
  • the turning starting positions and turning radii corresponding to the n routing points are calculated;
  • the turning starting position of the routing point is obtained based on the offset between the center of the auxiliary frame of the routing point and the routing point; and the turning radius of the routing point is obtained based on the side length of the auxiliary frame of the routing point.
  • the offset of each of the n wiring points increases in sequence according to the arrangement order.
  • the side lengths of the auxiliary frames of the n wiring points increase in ascending order.
  • the second acquisition module is used to acquire the auxiliary frames of the n routing points based on the arrangement order of the n routing points, the position information of the components in the extension direction of the n routing points, and the position information of the n routing points.
  • the second acquisition module is used to sort the positions of the n routing points in a direction opposite to the turning direction to obtain an arrangement order of the n routing points.
  • the first acquisition module is used to traverse the position information of each of the wiring points in the wiring planning information to obtain the position information of n wiring points;
  • the turning directions of the n routing points are the same, and the position information of any two adjacent routing points among the n routing points meets the specified conditions.
  • the specified condition includes:
  • the difference between the horizontal coordinates of any two adjacent wiring points is less than a first difference threshold, and the difference between the vertical coordinates of any two adjacent wiring points is less than a second difference threshold.
  • the path generation module is used to:
  • the turning angle of the first routing point is obtained; the first routing point is any one of the at least one routing point;
  • a routing path of the first routing point is generated based on a turning start position of the first routing point, a turning radius of the first routing point, and a turning angle of the first routing point.
  • a chip product comprising: at least one wiring point;
  • the at least one routing point has a turning start position and a turning radius on the respective routing path, and the routing path starts from the turning position and turns with the turning radius.
  • a computer device which includes a processor and a memory, wherein the memory stores at least one computer instruction, and the at least one computer instruction is loaded and executed by the processor to implement the above-mentioned circuit layout wiring method.
  • a computer-readable storage medium wherein at least one computer instruction is stored in the storage medium, and the at least one computer instruction is loaded and executed by a processor to implement the above-mentioned circuit layout wiring method.
  • a computer program product or a computer program comprising computer instructions, the computer instructions being stored in a computer-readable storage medium.
  • a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the wiring method of the circuit layout.
  • the initial turning position of the above wiring point and the turning radius corresponding to the turning curvature are obtained, and the wiring path is controlled to turn based on the obtained initial turning position and turning radius, so as to realize the control of the turning curvature of the wiring path in the automatic wiring process, so that the automatic wiring algorithm can be applicable to the automatic wiring of chips that have requirements on the turning curvature, thereby expanding the applicable scenarios of the automatic wiring algorithm.
  • FIG1 is a schematic diagram of an application scenario of a superconducting quantum chip provided by an embodiment of the present application
  • FIG2 is a schematic diagram of the classic automatic routing involved in the present application.
  • FIG3 is a schematic diagram of a CPW circuit involved in the present application.
  • FIG4 is a flow chart of a wiring method for a circuit layout provided by an embodiment of the present application.
  • FIG5 is a schematic diagram of a dense area involved in this application.
  • FIG6 is a schematic diagram of simulated CPW wiring through an airport involved in the present application.
  • FIG7 is a flow chart of a wiring method for a circuit layout provided by an embodiment of the present application.
  • FIG8 is a schematic diagram of the arrangement of wiring points involved in the embodiment shown in FIG7;
  • FIG9 is a schematic diagram of offset settings involved in the embodiment shown in FIG7 ;
  • FIG10 is a schematic diagram of the turning radius involved in the embodiment shown in FIG7 ;
  • FIG11 is a schematic diagram of a wiring path involved in the embodiment shown in FIG7 ;
  • FIG. 12 is a process flow chart of the automatic routing algorithm involved in the embodiment shown in FIG. 7;
  • FIG13 is a schematic diagram of a wiring path of a chip product according to an embodiment of the present application.
  • FIG14 is a block diagram of a wiring device for a circuit layout according to an embodiment of the present application.
  • FIG. 15 is a schematic diagram of the structure of a computer device provided in one embodiment of the present application.
  • Superconducting quantum chip The central processing unit of a superconducting quantum computer.
  • a quantum computer is a machine that uses the principles of quantum mechanics to perform calculations. Based on the superposition principle and quantum entanglement of quantum mechanics, quantum computers have strong parallel processing capabilities and can solve some problems that are difficult for classical computers to calculate.
  • the zero resistance characteristics of superconducting quantum bits and the manufacturing process that is close to that of integrated circuits make the quantum computing system built using superconducting quantum bits one of the most promising systems for realizing practical quantum computing.
  • Figure 1 shows a schematic diagram of an application scenario of a superconducting quantum chip provided by an embodiment of the present application.
  • the application scenario can be a superconducting quantum computing platform, which includes: a quantum computing device 11, a dilution refrigerator 12, a control device 13 and a computer 14.
  • the quantum computing device 11 is a circuit that acts on a physical quantum bit.
  • the quantum computing device 11 can be realized as a quantum chip, such as a superconducting quantum chip near absolute zero.
  • the dilution refrigerator 12 is used to provide an absolute zero environment for the superconducting quantum chip.
  • the control device 13 is used to control the quantum computing device 11, and the computer 14 is used to control the control device 13.
  • the written quantum program is compiled into instructions by the software in the computer 14 and sent to the control device 13 (such as an electronic/microwave control system).
  • the control device 13 converts the above instructions into electronic/microwave control signals and inputs them into the dilution refrigerator 12 to control the superconducting quantum bits at a temperature less than 10mK.
  • the reading process is the opposite, and the reading waveform is transmitted to the quantum computing device 11.
  • EDA Electronic Design Automation
  • Automatic routing Use software to automatically complete the layout of circuits and chip designs, and connect components according to rules and requirements. It is mostly used in large-scale and ultra-large-scale integrated circuit design and is one of the links. It is usually performed after the layout is completed.
  • Layout Also known as circuit layout, it is a design drawing that describes how the components in the circuit are laid out, placed, and connected. It is a planar geometric shape description of the actual circuit physical situation.
  • the layout design must comply with constraints such as manufacturing process, timing, area, and power consumption.
  • the layout design file contains the shape, area, and position information of each hardware unit on the chip. interest.
  • Component A general term for elements and devices, which are electronic parts and components in the circuit, such as resistors, capacitors, inductors, etc.
  • Coplanar waveguide It consists of a central conductor on the substrate and coplanar grounding layers on both sides. It is a microwave planar transmission line with superior performance and convenient processing. It is used to transmit microwave signals. A large number of coplanar waveguide technologies are used in superconducting quantum chips.
  • Radius of curvature is the reciprocal of the curvature and is represented by R. For a curve, the radius of curvature is equal to the radius of the arc closest to the curve at that point.
  • Topology is a discipline that studies topological space. It is developed from geometry and set theory. It mainly studies the properties of geometric figures or spaces that remain unchanged after continuous changes in shape. It studies concepts such as space, dimension, and transformation. Topology only considers the positional relationship between objects rather than the shape and size. Topological wiring is a wiring method based on topological structure and topological network.
  • Pads exist on circuit boards and are used to connect electronic components and circuits. Solder is usually used to solder the pins of components to the circuit board. In classical circuits, pads are usually polygonal copper sheets; in superconducting quantum chips, the shape and structure of pads are different.
  • Classic automatic routing is a single-line arrangement in a geometric form.
  • Figure 2 shows a schematic diagram of the classic automatic routing involved in this application.
  • the grid routing in the classic automatic routing uses a chessboard-like grid to cover the entire routing area.
  • the components on the layout are placed in the grid like chess pieces, and the routing path is carried out along the horizontal and vertical grid lines, as shown in part (a) of Figure 2.
  • the shape routing in the classic automatic routing is improved from the grid routing. Its characteristic is that it uses graphics such as rectangles instead of grids to divide the routing area into several rectangular areas, so that the routing path crosses the rectangles of the path in turn, as shown in part (b) of Figure 2.
  • These geometric routing algorithms all require auxiliary positioning functions, and use the geometric coordinates and geometric characteristics of components to determine the routing path.
  • the above-mentioned classic wiring methods are sequential and need to be wired one by one, which will increase the difficulty of wiring in the later stage, reduce wiring efficiency and result in very long lines.
  • Current circuit designs are becoming more and more complex, making automatic wiring tools based on grid and geometric methods increasingly limited.
  • the classic automatic wiring algorithm does not take into account the physical characteristics of the design requirements of some chips that require small curvature turns (such as quantum chips, specifically superconducting quantum chips).
  • its wiring algorithm may generate lines with a turning radius that does not meet the design requirements, and it is impossible to customize the radius of curvature of the chip line.
  • CPW coplanar waveguides
  • Figure 3 shows a schematic diagram of the CPW line involved in this application.
  • the structure of the CPW line is shown in part (a) of Figure 3. It consists of a central conductor on the substrate and ground wires on both sides. The central conductor and the ground wire are both formed by metal films. Therefore, when microwaves propagate therein, the electric field is distributed in the air, substrate and metal layer.
  • CPW is different from the signal line in the classical chip.
  • the potential difference caused by it will generate a parasitic mode in the circuit and couple with the CPW mode, which will have a greater impact on the transmission characteristics of the circuit. Therefore, the wiring algorithms and rules of classical EDA cannot be directly applied to the automatic wiring of superconducting quantum chips.
  • FIG. 4 shows a flow chart of a wiring method for a circuit layout provided by an embodiment of the present application.
  • the execution subject of each step of the method may be a computer device.
  • the method may include the following steps:
  • Step 41 obtaining location information of at least one wiring point in the circuit layout from wiring planning information of the circuit layout.
  • the routing point is an endpoint of a routing path in the circuit layout, or the routing point is a node passed through in the routing path in the circuit layout.
  • the wiring point can be a node of a pin of a component or solder joint in a circuit layout, or a wiring point
  • the position may also be a node of an extension line of a pin of a component or a solder joint.
  • a wiring path may be set between two wiring points. Step 42, based on the position information, calculate the turning starting position and turning radius corresponding to each of at least one wiring point.
  • the turning radius may refer to the radius of the circle where the arc formed by the turning of the wiring path is located.
  • an auxiliary frame is set in the routing extension direction of the routing point, the auxiliary frame is a U-shaped square frame, the opening direction of the auxiliary frame is the same as the routing extension direction at the routing point, the center of the auxiliary frame is located on the extension line starting from the routing point, the midpoint of the line between the center of the auxiliary frame and the routing point is used as the starting position of the turn, and the side length of the auxiliary frame is used as the turning radius.
  • a pair of wiring points may not be directly connected by a horizontal or vertical line, or there may be other components or solder joints between the pair of wiring points, which results in the wiring path between the pair of wiring points needing to go through one or more turns.
  • the position where the wiring point starts to turn on the subsequent wiring path and the turning radius can be determined, so that the turning area of the subsequent wiring path can be controlled.
  • Step 43 based on the turning start position and the turning radius, generating a routing path passing through at least one routing point; the routing path starts turning at the turning start position with the turning radius.
  • Each of the at least one routing point corresponds to a routing path. For example, when there are n routing points, n routing paths may be generated.
  • the subsequent wiring path after the wiring point is extended to the starting turning position and then starts to turn with the turning radius, thereby obtaining a wiring path for at least one wiring point.
  • the scheme shown in the embodiment of the present application obtains the initial turning position of the above-mentioned wiring point and the turning radius corresponding to the turning curvature through the position information of at least one wiring point, and controls the wiring path to turn based on the obtained initial turning position and turning radius, thereby realizing the control of the turning curvature of the wiring path during the automatic wiring process, so that the automatic wiring algorithm can be applied to the automatic wiring of chips that have requirements for the turning curvature, thereby expanding the applicable scenarios of the automatic wiring algorithm.
  • the automatic wiring software/tool can determine the dense area of wiring points in the circuit layout by traversing the position information of each wiring point in the wiring planning information, and control the turning curvature in the wiring path of the wiring points in the dense area to reduce the calculation amount of automatic wiring.
  • the solution provided in the embodiments of the present application can add the position of the U-shaped block (represented by "airport") and the setting of the runway sequence on the basis of the superconducting quantum chip pad and pin docking algorithm to achieve the goal of smoothing the large curvature wiring in dense areas.
  • a U-shaped block can be placed at the end point of the CPW to be connected in the dense area to guide the direction of the arc of the CPW turn.
  • the radius of the arc can be positively correlated with the side length of the U-shaped block (for example, half the side length of the U-shaped block), so the size of the U-shaped block can be changed according to actual needs. The larger the required curvature radius, the larger the size of the U-shaped block should be.
  • FIG. 6 shows a schematic diagram of simulating CPW wiring through an airport involved in this application.
  • the "airport” is a U-shaped block in actual wiring
  • the "runway” inside the airport is a fixed CPW wiring path
  • the "passenger plane” 61 is the head of the wiring.
  • the passenger plane takes off and turns according to a predetermined arc path, corresponding to the automatic wiring to make a small curvature turn.
  • FIG. 7 shows a flow chart of a wiring method for a circuit layout provided by an embodiment of the present application.
  • the execution subject of each step of the method may be a computer device.
  • the method may include the following steps:
  • Step 701 Acquire location information of at least one wiring point in the circuit layout from wiring planning information of the circuit layout.
  • the circuit layout may be a circuit layout of a quantum chip, for example, a circuit layout of a superconducting quantum chip.
  • the solution shown in the embodiment of the present application can be processed for a single wiring point, or can also be processed for two or more wiring points.
  • the position information of the at least one routing point when processing is performed on two or more routing points, includes position information of n routing points, where n is greater than or equal to 2 and is an integer.
  • the step of acquiring the position information of at least one wiring point in the circuit layout from the wiring planning information of the circuit layout may include:
  • the turning directions of the n routing points are the same, and the position information of any two adjacent routing points among the n routing points meets the specified conditions.
  • the above specified conditions include:
  • the difference between the horizontal coordinates of any two adjacent wiring points is less than the first difference threshold, and the difference between the vertical coordinates of any two adjacent wiring points is less than the second difference threshold.
  • the automatic routing software/tool can determine the dense area of routing points in the circuit layout by traversing the position information of each routing point in the routing planning information, and control the curvature of the routing path of the routing points in the dense area.
  • Whether points t 1 , t 2 satisfy p(t i ) ⁇ p(t k ) can be determined based on whether the difference in the horizontal and vertical coordinates of t 1 , t 2 is less than twice the neighborhhood parameter, that is,
  • the 2*neighborhhood1 is the first difference threshold
  • the 2*neighborhhood2 is the second difference threshold.
  • the neighborhood1 and neighborhood2 may be the same or different.
  • the first difference threshold and the second difference threshold may also be set to different parameter values.
  • the currently traversed routing point is added to the point set corresponding to the previously traversed routing point.
  • one or more point sets can be traversed from the routing planning information, that is, corresponding to one or more dense areas. Afterwards, the routing points in any point set can be obtained as at least one of the above-mentioned routing points, and the position information of at least one routing point can be obtained.
  • the computer device can divide the four CPW lines into two independent dense areas (i.e., the upper two CPW lines constitute one dense area, and the lower two CPW lines constitute another dense area), and perform subsequent processing separately.
  • the turning direction may be determined by a positional relationship between a routing point and an end point of a routing path of the routing point.
  • the turning direction refers to a direction perpendicular to the extension direction of the current wiring point. For example, taking the extension direction of the current wiring point as forward, the turning direction may be left or right.
  • Step 702 Calculate the turning start position and turning radius corresponding to at least one routing point based on the position information.
  • the step of obtaining the turning starting position and turning radius of each of the at least one routing point based on the position information of the at least one routing point may include:
  • the turning directions of the routing paths of the n routing points are the same, and obtaining the arrangement order of the n routing points includes:
  • the positions of the n routing points are sorted in the reverse direction of the turning direction to obtain the arrangement order of the n routing points.
  • the algorithm provided in the embodiment of the present application can refer to the method for setting the track and the starting position of the athlete in the track and field long-distance running event.
  • the inside of the track and field track is the first to turn and has the smallest turning radius. Since the curvature of the inner curve is larger, the athletes on the inner track also need to stand further back when starting.
  • Figure 8 shows a schematic diagram of the wiring point sorting involved in the embodiment of the present application.
  • the CPW located on the inside should also turn first, and the turning radius is the smallest (but not less than the minimum radius that meets the design requirements), leaving turning space for the remaining CPW lines on the outside.
  • the turning order of each pair of CPW is determined by sorting from the inside to the outside.
  • the above-mentioned sorting from the inside to the outside is the sorting in the opposite direction of the turning direction.
  • the auxiliary frame determination order corresponding to the n wiring points is determined according to the arrangement order; according to the auxiliary frame determination order, auxiliary frames are set in sequence in the wiring extension direction of each of the n wiring points to obtain auxiliary frames for each of the n wiring points.
  • the turning starting positions and turning radius of the n routing points are obtained.
  • the midpoint of the line between the center of the auxiliary frame corresponding to the i-th routing point and the i-th routing point is used as the turning start position, and the side length of the auxiliary frame is used as the turning radius.
  • i is a positive integer.
  • the turning start position of the routing point is obtained based on the offset between the center of the auxiliary frame of the routing point and the routing point; and the turning radius of the routing point is obtained based on the side length of the auxiliary frame of the routing point.
  • the offsets of the n wiring points are increased in order of arrangement.
  • the side lengths of the auxiliary frames of the n wiring points increase in order of arrangement.
  • a U-shaped block, "airport”, which is used to control the turning curvature radius can be established based on the turning order at the place where the dense area CPW is about to turn. At this time, it is necessary to consider where the "airport" is placed.
  • airports are scattered in different provinces and cities based on factors such as city size, population density, and geographical location. Often a city will only have one or two airports at most, and the distance between airports will not be too close to avoid conflicts in routes and scheduling between airports.
  • the algorithm involved in this application needs to avoid the U-shaped blocks on the CPW from crossing or overlapping each other, because this will cause errors in automatic routing.
  • the algorithm also needs to avoid mutual obstruction and interference when the CPW turns.
  • the scheme shown in the embodiment of this application can specifically control the density of the U-shaped blocks in each dense area. If the distance is too close, the turning space will be limited or the CPWs will be too close. If the distance is too far, it will cause a waste of layout space and even affect the routing of other places.
  • an "airport" is set before turning for each pair of CPWs in a dense area.
  • an offset parameter may be set before each "airport” to control the horizontal distance and take-off order of the "airport" under the premise that the layout space allows.
  • Figure 9 shows a schematic diagram of the offset setting involved in the embodiment of the present application.
  • the scheme shown in the embodiment of the present application sets an offset parameter (i.e., the above-mentioned offset), which is the horizontal distance offset between the middle of the "airport" (the center of the U-shaped square) and the end of the CPW straight line in the original layout near the turn, which is used to adjust the density between airports.
  • the above-mentioned offset value can be non-fixed, that is, the offset can be increased in sequence according to the above-mentioned arrangement order, and the difference between the offsets of adjacent wiring points can be pre-set by the developer or designer, or it can be determined according to the layout information.
  • the scheme shown in the embodiment of the present application can set independent offsets for different dense areas.
  • the above-mentioned obtaining the auxiliary frames of the n wiring points based on the arrangement order of the n wiring points and the position information of the n wiring points includes:
  • the auxiliary frames of the n wiring points are obtained.
  • a computer device determines an offset value based on position information of components in the extension direction of the n routing points and position information of the n routing points, and determines the auxiliary frame corresponding to each of the n routing points in sequence according to the auxiliary frame determination order based on the determined offset value.
  • the algorithm shown in the embodiment of the present application can traverse and search for possible offset values based on the layout information around the dense area, including the distance between components and obstacles, etc., and set a suitable solution so that the "airports" do not affect each other or overlap, while minimizing the occupation of the layout space.
  • the algorithm involved in the embodiment of the present application is characterized in that the curvature radius of the CPW turn is set by using a U-shaped block and guiding the turn.
  • the curvature radius of the CPW turn can be set to half the side length of the U-shaped block. If you want to increase the turning radius, just increase the side length of the block accordingly.
  • FIG. 10 shows a schematic diagram of the turning radius involved in an embodiment of the present application. As shown in Figure 10, it shows an arc turn made by a CPW with an order of 1 in a dense area, and its curvature radius is R_1. As the turning path setting continues, the curvature radius set for the later turns in the same dense area can be larger and larger to avoid the CPW arc with a higher order.
  • the initial value and increase of the curvature radius are selected by automatically traversing the values (for example, starting from the minimum design requirement and increasing) until the optimal solution is obtained.
  • the initial value and increment of the curvature radius may also be preset by a developer or designer.
  • the computer device when determining the auxiliary frames of each of the n routing points, the computer device first sets the side length and offset value of each of the n routing points to the initial side length and initial offset value; then, according to the arrangement order of the n routing points, the side length and offset value of the auxiliary frame of each routing point are determined in turn according to the pre-specified side length increase step and offset value increase step, so that the auxiliary frame of the current routing point does not overlap with the auxiliary frame of the previous routing point, and the side length of the auxiliary frame of the current routing point is greater than the side length of the auxiliary frame of the previous routing point; at the same time, the size and offset value of the auxiliary frame are restricted, for example, the auxiliary frame is restricted to not overlap with other components.
  • the solution shown in the embodiment of the present application specifies the radius and location of the "airport" through protobuf, where
  • the neighborhood field (taking neighborhood1 and neighborhood2 as an example) controls the size of the airport, and the offset controls the location of the airport.
  • the algorithm provided in the embodiment of the present application (which may be referred to as the "airport" algorithm) can be implemented, and its code may be as follows:
  • Step 703 Acquire a turning angle of the first routing point based on the turning start position of the first routing point, the turning radius of the first routing point, and the position information of the target routing point corresponding to the first routing point.
  • the first wiring point is any one of the at least one wiring point.
  • the computer device takes the turning starting position of the first wiring point as the starting point, takes the position information of the target wiring point corresponding to the first wiring point as the end point, turns with the turning radius of the first wiring point between the starting point and the end point, and calculates the turning angle corresponding to this turn.
  • the turning angle can be determined in combination with the position information of the corresponding target routing point of at least one routing point, that is, it is necessary to determine how much angle to turn from the turning starting position.
  • Step 704 Generate a routing path for the first routing point based on the turning start position of the first routing point, the turning radius of the first routing point, and the turning angle of the first routing point.
  • the computer device takes the turning start position of the first routing point as the starting point, turns according to the turning radius and the turning angle of the first routing point, and determines the generated route as the routing path of the first routing point.
  • the above-mentioned generated wiring path can refer to the point set corresponding to the generated wiring path; for example, taking CPW as an example, the above-mentioned wiring path can be implemented as a CPW point set, and the CPW point set includes the position information of n points in the CPW line laid out on the wiring path.
  • the computer device can also generate parameter information of the arc segment of the wiring at the turning point corresponding to the first wiring point; wherein the parameter information of the arc segment includes arc parameters and center parameters, the arc parameters can be used to indicate the arrangement order of each point contained in the arc segment, and the center parameters can be used to indicate the center position corresponding to the arc segment.
  • the wiring path starts from a turning position and turns at a turning radius.
  • the wiring path corresponding to the first wiring point starts from the starting position of the turn, and after turning the turning angle according to the turning radius, extends forward along the tangent direction of the circle where the arc formed by the turn is located. That is to say, when calculating the turning angle, it is necessary to comprehensively consider the corresponding target wiring point of the wiring point.
  • the turning start position and turning radius of the first routing point and the target routing point can be calculated at the same time, and the turning start position and turning radius of the first routing point and the target routing point can be calculated respectively.
  • the turning radius of each of the first routing point and the target routing point can be determined, and then combined with the respective turning starting positions and turning angles of the first routing point and the target routing point, the routing path between the first routing point and the target routing point can be drawn.
  • Figure 11 shows a schematic diagram of a wiring path involved in an embodiment of the present application.
  • the turning radius 1101 of the wiring path generated according to the scheme shown in the embodiment of the present application is significantly larger than the turning radius 1102 of the wiring path generated according to the classic automatic wiring algorithm, and the curvature radius is significantly reduced.
  • the algorithm used in the solution shown in the embodiment of the present application is not only applicable to densely populated areas, but can also be extended to any wiring point in the layout that requires flexible adjustment of its turning radius.
  • the scheme shown in the embodiment of the present application obtains the initial turning position of the starting turning of the above-mentioned wiring point and the turning radius corresponding to the turning curvature through the position information of at least one wiring point, and controls the wiring path to turn based on the obtained initial turning position and turning radius, thereby realizing the control of the turning curvature of the wiring path during the automatic wiring process, so that the automatic wiring algorithm can be applicable to the automatic wiring of chips that have requirements for the turning curvature, thereby expanding the applicable scenarios of the automatic wiring algorithm.
  • the scheme shown in the embodiment of the present application is not limited to horizontal and vertical wiring paths. It can comprehensively consider offset parameters and turning radius in combination with multiple wiring points. It does not need to be wired one by one through a serial wiring method. It can reduce the wiring difficulty and improve the wiring efficiency in large-scale chip wiring.
  • the automatic routing algorithm has more tolerance in the selection of routing paths and routing directions. While realizing automatic routing, it can automatically identify and increase the curvature radius of lines in dense areas (such as CPW) at turns, thereby improving chip research and development efficiency.
  • the topological routing algorithm can generate routing paths according to the circuit routing rules.
  • An important parameter in the rule is the neighborhood parameter, which is usually set to the minimum spacing between routing lines in the layout (dense area) to ensure the distance between lines (avoid line overlap and intersection) for automatic routing.
  • the neighbor parameter is usually a fixed value, when the CPW spacing in the dense area of the layout is small, there will be a problem of excessive curvature of the automatically arranged CPW in the dense area.
  • the scheme shown in the embodiment of the present application introduces a new automatic routing algorithm for processing, and the processing flow chart of the automatic routing algorithm can be shown in Figure 12.
  • the automatic routing tool may traverse each routing point in the routing planning information of the circuit layout in order from small to large abscissas/ordinates to search for and locate a dense area of routing points in the circuit layout.
  • the automatic routing tool searches for at least two routing points with the same turning direction, and the difference between the horizontal coordinate and the vertical coordinate between each two adjacent routing points in the at least two routing points is less than the difference threshold, it is determined that the routing point dense area has been entered.
  • the automatic routing tool may sort the at least two routing points in the dense area according to the reverse direction of the turning direction of the at least two routing points in the dense area to obtain the arrangement order of the at least two routing points in the dense area.
  • the automatic routing tool may set the offset of each of the at least two routing points in the dense area in an incremental manner according to the arrangement order of the at least two routing points in the dense area.
  • the automatic wiring tool can set the wiring points in an incremental manner according to the arrangement order of at least two wiring points in the above dense area.
  • the turning radius corresponding to at least two wiring points in the dense area is set (that is, the side length of the airport is set), and then based on the offset and turning radius of at least two wiring points in the dense area, a wiring path for at least two wiring points to turn from their respective turning starting positions is generated, and the extension direction of the wiring path after the turn is tangent to the circle where the arc formed by the turning position is located, and can be connected to the target wiring point.
  • the solution shown in the above embodiment of the present application is based on topological wiring, and an algorithm is developed that can identify dense wiring areas and customize the curvature radius of the line (such as CPW) at the turning point, so that the automatic wiring can be achieved while taking into account the effect of small curvature turns in dense areas, meeting the automatic wiring requirements of superconducting quantum chips.
  • the above solution has the following advantages:
  • an embodiment of the present application also provides a chip product, which includes: at least one wiring point; and the at least one wiring point has a turning starting position and a turning radius on its respective wiring path, and the wiring path starts from the turning position and turns with the turning radius.
  • the wiring path of the chip product can be obtained according to the method shown in FIG. 4 or FIG. 7 .
  • Figure 13 shows a schematic diagram of the wiring path of the chip product involved in the embodiment of the present application.
  • the chip product includes at least one wiring point 1301 and a wiring path 1302 corresponding to the wiring point 1301, wherein the wiring path 1302 starts to turn at a turning position 1303, turns at a certain turning radius, and forms an arc-shaped turning section.
  • the at least one routing point includes n routing points, and the offsets of the n routing points increase in order of arrangement.
  • the offset of each wiring point in the chip product increases in sequence in the reverse direction of the turning direction.
  • the turning radius of each of the n routing points increases in order of arrangement.
  • the turning radius of each wiring point in the chip product increases in sequence in the reverse direction of the turning direction.
  • a difference between the horizontal coordinates of any two adjacent routing points is less than a first difference threshold, and a difference between the vertical coordinates of any two adjacent routing points is less than a second difference threshold.
  • the chip product is a quantum chip, for example, a superconducting quantum chip.
  • FIG14 is a block diagram of a wiring device for a circuit layout according to an exemplary embodiment.
  • the wiring device for the circuit layout can implement all or part of the steps performed by a computer device in the method provided in the embodiment shown in FIG4 or FIG7, and the wiring device for the circuit layout includes:
  • a first acquisition module 1401 is used to acquire location information of at least one wiring point in the circuit layout from wiring planning information of the circuit layout;
  • the second acquisition module 1402 is used to calculate the turning starting position and turning radius corresponding to at least one routing point based on the position information
  • the path generation module 1403 is used to generate a routing path passing through at least one routing point based on the turning starting position and the turning radius; the routing path starts turning at the turning starting position with the turning radius.
  • At least one routing point includes n routing points; n is greater than or equal to 2, and n is an integer;
  • the second acquisition module 1402 is used to:
  • the n wiring points Based on the arrangement order of the n wiring points and the position information of the n wiring points, obtain the n wiring points Auxiliary frames for each wiring point; the auxiliary frames for each of the n wiring points do not overlap each other; the auxiliary frames are U-shaped square frames; the opening direction of the auxiliary frames is the same as the wiring extension direction at the wiring point, and the center of the auxiliary frames is located on the extension line starting from the wiring point;
  • the turning starting positions and turning radii corresponding to the n routing points are calculated;
  • the turning starting position of the routing point is obtained based on the offset between the center of the auxiliary frame of the routing point and the routing point; and the turning radius of the routing point is obtained based on the side length of the auxiliary frame of the routing point.
  • the offsets of the n wiring points are increased in ascending order according to the arrangement order.
  • the side lengths of the auxiliary frames of the n wiring points increase in ascending order.
  • the second acquisition module 1402 is used to acquire the auxiliary frames of the n routing points based on the arrangement order of the n routing points, the position information of the components in the extension direction of the n routing points, and the position information of the n routing points.
  • the second acquisition module 1402 is used to sort the positions of the n routing points in a reverse direction of the turning direction to obtain an arrangement order of the n routing points.
  • the first acquisition module 1401 is used to traverse the location information of each routing point in the routing planning information to obtain location information of n routing points;
  • the turning directions of the n routing points are the same, and the position information of any two adjacent routing points among the n routing points meets the specified conditions.
  • the specified condition includes:
  • the difference between the horizontal coordinates of any two adjacent wiring points is less than a first difference threshold, and the difference between the vertical coordinates of any two adjacent wiring points is less than a second difference threshold.
  • the path generation module 1403 is used to:
  • the turning angle of the first routing point is obtained; the first routing point is any one of the at least one routing point;
  • a routing path of the first routing point is generated based on a turning start position of the first routing point, a turning radius of the first routing point, and a turning angle of the first routing point.
  • the circuit layout is a circuit layout of a superconducting quantum chip.
  • the scheme shown in the embodiment of the present application obtains the initial turning position of the starting turning of the above-mentioned wiring point and the turning radius corresponding to the turning curvature through the position information of at least one wiring point, and controls the wiring path to turn based on the obtained initial turning position and turning radius, thereby realizing the control of the turning curvature of the wiring path during the automatic wiring process, so that the automatic wiring algorithm can be applicable to the automatic wiring of chips that have requirements for the turning curvature, thereby expanding the applicable scenarios of the automatic wiring algorithm.
  • the device provided in the above embodiment when implementing its functions, only uses the division of the above functional modules as an example.
  • the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.
  • the device and method embodiments provided in the above embodiment belong to the same concept, and their specific implementation process is detailed in the method embodiment, which will not be repeated here.
  • FIG15 is a schematic diagram of a computer device according to an exemplary embodiment.
  • the computer device 1500 includes a processor 1501, such as a central processing unit (CPU), a system memory 1504 including a random access memory (RAM) 1502 and a read-only memory (ROM) 1503, and a system bus 1505 connecting the system memory 1504 and the processor 1501.
  • the computer device 1500 also includes an input/output system 1506 for facilitating the transfer of information between various components within the computer, and a mass storage device 1507 for storing an operating system 1513 , application programs 1514 , and other program modules 1515 .
  • the mass storage device 1507 is connected to the processor 1501 through a mass storage controller (not shown) connected to the system bus 1505.
  • the mass storage device 1507 and its associated computer readable medium provide non-volatile storage for the computer device 1500. That is, the mass storage device 1507 may include a computer readable medium (not shown) such as a hard disk or a Compact Disc Read-Only Memory (CD-ROM) drive.
  • a computer readable medium such as a hard disk or a Compact Disc Read-Only Memory (CD-ROM) drive.
  • the computer-readable medium may include computer storage media and communication media.
  • Computer storage media include volatile and non-volatile, removable and non-removable media implemented by any method or technology for storing information such as computer-readable instructions, data structures, program modules or other data.
  • Computer storage media include RAM, ROM, flash memory or other solid-state storage technologies, CD-ROM, or other optical storage, cassettes, magnetic tapes, disk storage or other magnetic storage devices.
  • RAM random access memory
  • the computer device 1500 can be connected to the Internet or other network devices through a network interface unit 1516 connected to the system bus 1505 .
  • the memory also includes one or more computer instructions, which are stored in the memory.
  • the processor 1501 implements all or part of the steps of the method shown in either Figure 4 or Figure 7 by executing the one or more computer instructions.
  • a non-transitory computer-readable storage medium including instructions is also provided, such as a memory including a computer program (instructions), and the above program (instructions) can be executed by a processor of a computer device to complete the methods shown in various embodiments of the present application.
  • the non-transitory computer-readable storage medium can be a ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.
  • a computer program product or a computer program is also provided, the computer program product or the computer program includes a computer instruction, and the computer instruction is stored in a computer-readable storage medium.
  • the processor of the computer device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the method shown in each of the above embodiments.

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Abstract

本申请公开了一种电路版图的布线方法、装置、设备、存储介质及产品，涉及微纳加工技术领域。该方法包括：从电路版图的布线规划信息中获取所述电路版图中的至少一个布线点位的位置信息(41)；基于位置信息，计算至少一个布线点位各自对应的转弯起始位置以及转弯半径(42)；基于转弯起始位置以及转弯半径，生成经过至少一个布线点位的布线路径；所述布线路径在所述转弯起始位置以所述转弯半径开始转弯(43)。上述方案扩展了自动布线算法的适用场景。

Description

电路版图的布线方法、装置、设备、存储介质及产品
本申请要求于2022年09月30日提交的申请号为202211210801.1、发明名称为“电路版图的布线方法、装置、设备、存储介质及产品”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及微纳加工技术领域，特别涉及一种电路版图的布线方法、装置、设备、存储介质及产品。
背景技术
在微纳加工技术中，自动布线是指在通过软件自动完成电路版图的设计过程中的线路布置。
在相关技术中，自动布线算法通常将布线区域划分为若干网格或者矩形区域，并控制布线路径沿网格线布置，或者，控制布线路径越过途径的矩形区域，从而连接布线区域中的元器件或焊点。
然而，上述相关技术中的方案得到的布线路径为横平竖直的路线，在转弯处通常存在较大的弯曲，这不满足某些需要小曲率布线的芯片设计要求，影响了上述自动布线算法的适用范围。
发明内容
本申请实施例提供了一种电路版图的布线方法、装置、设备、存储介质及产品，能够在自动布线过程中，在布线路径中产生小曲率的转弯，从而扩展了自动布线算法的适用范围。所述技术方案如下：
根据本申请实施例的一个方面，提供了一种电路版图的布线方法，所述方法由计算机设备执行，所述方法包括：
从电路版图的布线规划信息中获取所述电路版图中的至少一个布线点位的位置信息；
基于所述位置信息，计算所述至少一个布线点位各自对应的转弯起始位置以及转弯半径；
基于所述转弯起始位置以及转弯半径，生成经过所述至少一个布线点位的布线路径；所述布线路径在所述转弯起始位置以所述转弯半径开始转弯。
根据本申请实施例的一个方面，提供了一种电路版图的布线装置，所述装置包括：
第一获取模块，用于从电路版图的布线规划信息中获取所述电路版图中的至少一个布线点位的位置信息；
第二获取模块，用于基于所述位置信息，计算所述至少一个布线点位各自对应的转弯起始位置以及转弯半径；
路径生成模块，用于基于所述转弯起始位置以及转弯半径，生成经过所述至少一个布线点位的布线路径；所述布线路径在所述转弯起始位置以所述转弯半径开始转弯。
在一种可能的实现方式中，至少一个布线点位包含n个布线点位；n大于或者等于2，且n为整数；
所述第二获取模块，用于，
获取n个所述布线点位的排列次序；
基于n个所述布线点位的排列次序，以及n个所述布线点位的位置信息，获取n个所述布线点位各自的辅助框；n个所述布线点位各自的所述辅助框互不重叠；所述辅助框为U型方框；所述辅助框的开口方向与所述布线点位处的布线延伸方向相同，所述辅助框的中心位 于从所述布线点位开始的延长线上；
基于n个所述布线点位各自的辅助框，计算n个所述布线点位各自对应的转弯起始位置以及转弯半径；
其中，所述布线点位的转弯起始位置基于所述布线点位的所述辅助框的中心与所述布线点位之间的偏移量获得；所述布线点位的转弯半径基于所述布线点位的辅助框的边长获得。
在一种可能的实现方式中，n个所述布线点位各自的所述偏移量按照所述排列次序递增。
在一种可能的实现方式中，n个所述布线点位各自的所述辅助框的的边长按照所述排列次序递增。
在一种可能的实现方式中，所述第二获取模块，用于基于n个所述布线点位的排列次序，n个所述布线点位的延伸方向上的元器件的位置信息，以及n个所述布线点位的位置信息，获取n个所述布线点位各自的辅助框。
在一种可能的实现方式中，所述第二获取模块，用于将n个所述布线点位的位置按照所述转弯方向的逆方向进行排序，获得n个所述布线点位的排列次序。
在一种可能的实现方式中，所述第一获取模块，用于遍历所述布线规划信息中的各个所述布线点位的位置信息，获得n个所述布线点位的位置信息；
其中，n个所述布线点位的转弯方向相同，且n个所述布线点位中的任意两个相邻布线点位的位置信息满足指定条件。
在一种可能的实现方式中，所述指定条件包括：
所述任意两个相邻布线点位的横坐标的差值小于第一差值阈值，且所述任意两个相邻布线点位的纵坐标的差值小于第二差值阈值。
在一种可能的实现方式中，所述路径生成模块，用于，
基于第一布线点位的转弯起始位置、所述第一布线点位的转弯半径以及与所述第一布线点位对应的目标布线点位的位置信息，获取所述第一布线点位的转弯角度；所述第一布线点位是至少一个布线点位中的任意一个；
基于第一布线点位的转弯起始位置、所述第一布线点位的转弯半径以及所述第一布线点位的转弯角度，生成所述第一布线点位的布线路径。
再一方面，提供了一种芯片产品，所述芯片产品包括：至少一个布线点位；
所述至少一个布线点位在各自的布线路径上具有转弯起始位置和转弯半径，且所述布线路径从所述转弯位置处开始，以所述转弯半径进行转弯。
再一方面，提供了一种计算机设备，所述计算机设备包含处理器和存储器，所述存储器中存储有至少一条计算机指令，所述至少一条计算机指令由所述处理器加载并执行以实现上述的电路版图的布线方法。
又一方面，提供了一种计算机可读存储介质，所述存储介质中存储有至少一条计算机指令，所述至少一条计算机指令由处理器加载并执行以实现上述的电路版图的布线方法。
又一方面，提供了一种计算机程序产品或计算机程序，该计算机程序产品或计算机程序包括计算机指令，该计算机指令存储在计算机可读存储介质中。计算机设备的处理器从计算机可读存储介质读取该计算机指令，处理器执行该计算机指令，使得该计算机设备执行上述电路版图的布线方法。
本申请实施例提供的技术方案至少包括如下有益效果：
通过至少一个布线点位的位置信息，获取到上述布线点位的开始转弯的转弯初始位置，以及对应转弯曲率的转弯半径，并基于得到的转弯初始位置以及转弯半径控制布线路径进行转弯，从而在自动布线过程中实现对布线路径的转弯曲率的控制，使得自动布线算法能够适用于对转弯曲率有要求的芯片的自动布线，从而扩展了自动布线算法的适用场景。
附图说明
图1是本申请一个实施例提供的超导量子芯片的应用场景的示意图；
图2是本申请涉及的经典自动布线的示意图；
图3是本申请涉及的CPW线路示意图；
图4是本申请一个实施例提供的电路版图的布线方法的流程图；
图5是本申请涉及的密集区示意图；
图6是本申请涉及的通过机场模拟CPW布线的示意图；
图7是本申请一个实施例提供的电路版图的布线方法的流程图；
图8是图7所示实施例涉及的布线点位排序示意图；
图9是图7所示实施例涉及的offset设置示意图；
图10是图7所示实施例涉及的转弯半径示意图；
图11是图7所示实施例涉及的布线路径的示意图；
图12是图7所示实施例涉及的自动布线算法的处理流程图；
图13是本申请实施例涉及的芯片产品的布线路径示意图；
图14是本申请一个实施例提供的电路版图的布线装置的结构方框图；
图15是本申请一个实施例提供的计算机设备的结构示意图。
具体实施方式
在对本申请实施例进行介绍说明之前，首先对本申请中涉及的一些名词进行解释说明。
1)超导量子芯片(superconducting quantum chip)：超导量子计算机的中央处理器。量子计算机是利用量子力学原理来进行计算的一种机器。基于量子力学的叠加原理和量子纠缠，量子计算机具有较强的并行处理能力，可以解决一些经典计算机难以计算的问题。超导量子比特的零电阻特性及与集成电路接近的制造工艺，使得利用超导量子比特构建的量子计算体系是目前最有希望实现实用量子计算的体系之一。
请参考图1，其示出了本申请一个实施例提供的超导量子芯片的应用场景的示意图。如图1所示，该应用场景可以是超导量子计算平台，该应用场景包括：量子计算器件11、稀释制冷机12、控制设备13和计算机14。
量子计算器件11是一种作用在物理量子比特上的电路，量子计算器件11可以实现成为量子芯片，如处于绝对零度附近的超导量子芯片。稀释制冷机12用于为超导量子芯片提供绝对零度的环境。
控制设备13用于对量子计算器件11进行控制，计算机14用于对控制设备13进行控制。例如，编写好的量子程序经过计算机14中的软件编译成指令发送给控制设备13(如电子/微波控制系统)，控制设备13将上述指令转换为电子/微波控制信号输入到稀释制冷机12，控制处于小于10mK温度的超导量子比特。读取的过程则与之相反，读取波形被输送到量子计算器件11。
2)电子设计自动化(Electronic Design Automation，EDA)：是一种电子领域的设计方式，指使用计算机软件(辅助设计软件)来完成电子领域内的设计工作，并实现设计上的自动化。包括集成电路芯片的功能设计、功能验证，布局布线等流程。这一类流程所使用的软件工具统称为EDA工具。
3)自动布线(automatic routing)：使用软件，自动化地完成电路、芯片设计中线路的布置，将元器件间按照规则和要求连接起来，多用于大规模、超大规模集成电路设计，是其中的一个环节，通常在版图布局完成后进行。
4)版图(layout)：又称为电路版图，是描述电路中的元器件如何布局、摆放和连接的设计图。是真实电路物理情况的平面几何形状描述。版图的设计必须遵守制造工艺、时序、面积、功耗等约束条件。版图设计文件包含了各个硬件单元在芯片上的形状、面积和位置信 息。
5)元器件(component)：元件和器件的总称，是电路中的电子部件和组成元素，比如电阻、电容、电感等。
6)共面波导(Coplanar Waveguide，CPW)：包括衬底上一个中央导体和其两侧的共面接地层，是一种性能优越、加工方便的微波平面传输线，用于传输微波信号。超导量子芯片中使用大量的共面波导技术。
7)曲率半径(radius of curvature)：曲率半径是曲率的倒数，用R表示。对于曲线，曲率半径等于最接近该点处曲线的圆弧半径。
8)拓扑(topology)：拓扑学是一门研究拓扑空间的学科，从几何学与集合论中发展而来，主要研究几何图形或空间在连续改变形状后维持不变的性质，研究包括空间、维度及变换等概念，拓扑中只考虑物体间的位置关系而非形状大小。拓扑布线是基于拓扑结构、拓扑网络进行的布线方式。
9)焊盘(pad)：焊盘存在于电路板上，是用于连接电子元器件以及线路的位置，通常在焊盘上使用焊锡将元器件的管脚焊接固定在电路板上。在经典电路中，焊盘通常是多边形的铜片；而在超导量子芯片中，焊盘的形状和构造会有所不同。
经典自动布线是以几何形式进行单线排布。请参考图2，其示出了本申请涉及的经典自动布线的示意图。比如，经典自动布线中的网格布线采用了棋盘式的方格覆盖整个布线区域，版图上的元器件如同棋子摆放在网格中，布线的路径沿着横平竖直的网格线进行，如图2中的(a)部分所示。经典自动布线中的形状布线从网格布线改良而来，其特点是利用矩形等图形代替网格，将布线区域划分为若干矩形区域，使布线路径依次越过途径的矩形，如图2中的(b)部分所示。这些几何布线算法都需要辅助定位功能，利用元器件的几何坐标和几何特性，决定布线路径。
一方面，上述经典的布线手段是序列式的，需要逐个布线，这会导致布线后期难度会加大、布线效率降低且会出现很长的线路。当前的电路设计越来越复杂，使得用网格、几何图形方法为基础的自动布线工具越来越受限。另一方面，经典自动布线算法没有考虑一些需要小曲率转弯的芯片(比如量子芯片，具体例如超导量子芯片)设计要求的物理特性，其布线算法在应对此类版图更为复杂的芯片时，有可能生成转弯半径不符合设计要求的线路，无法针对芯片线路的曲率半径进行自定义的扩大。
以超导量子芯片为例，当量子芯片中的物理量子比特数目增多时，与其对应的比特控制以及读取等信号线数目也会随之增多。而由于芯片尺寸及版图空间限制，部分区域会出现信号线排布密集的情况。在超导量子芯片中，信号线一般采用共面波导(Coplanar Waveguide，CPW)来实现，请参考图3，其示出了本申请涉及的CPW线路示意图，CPW线路的结构如图3中的(a)部分所示，由衬底上的中心导体、两侧的地线构成，中心导体和地线均是由金属薄膜形成，因此微波在其中传播时，电场分布在空气、衬底以及金属层。CPW区别于经典芯片中的信号线，如图3中的(b)部分所示，当其路径发生较大弯曲时，由其引起的电位差会在电路中产生寄生模式并与CPW模式耦合，对电路的传输特性造成较大影响。因此，经典EDA的布线算法及规则无法直接应用于超导量子芯片的自动布线中。
对于上述问题，请参考图4，其示出了本申请一个实施例提供的电路版图的布线方法的流程图。该方法各步骤的执行主体可以是计算机设备。该方法可以包括如下几个步骤：
步骤41，从电路版图的布线规划信息中获取电路版图中的至少一个布线点位的位置信息。
可选地，布线点位是电路版图中的布线路径的端点，或，布线点位是电路版图中的布线路径中经过的节点。
其中，上述布线点位可以是电路版图中的元器件或者焊点的引脚的节点，或者，布线点 位也可以是元器件或者焊点的引脚的延长线的节点。两个布线点位之间可以设置布线路径。步骤42，基于位置信息，计算至少一个布线点位各自对应的转弯起始位置以及转弯半径。
其中，上述转弯半径，可以是指布线路径转弯所形成的弧形所在的圆形的半径。
在一些实施例中，以布线点位所在位置为起点，在布线点位的布线延伸方向上设置辅助框，辅助框为U型方框，辅助框的开口方向与布线点位处的布线延伸方向相同，辅助框的中心位于从布线点位开始的延长线上，将辅助框的中心与布线点位之间的连线的中点作为转弯起始位置，将辅助框的边长作为转弯半径。
通常情况下，一对布线点位之间可能无法直接通过横线或者竖线相连，或者，一对布线点位之间可能存在其它元器件或者焊点，这就导致这一对布线点位之间的布线路径需要经过一次或多次转弯。在本申请实施例中，可以基于至少一个布线点位的位置，确定该布线点位在后续布线路径上开始转弯的位置，以及转弯半径，从而使得后续的布线路径的转弯区域得到控制。
步骤43，基于转弯起始位置以及转弯半径，生成经过至少一个布线点位的布线路径；布线路径在转弯起始位置处以转弯半径开始转弯。
至少一个布线点位中的每一个布线点位均对应一条布线路径，比如，在有n个布线点位的情况下，可生成n条布线路径。
在一些实施例中，在确定至少一个布线点位在后续布线路径上各自对应的转弯起始位置以及转弯半径后，布线点位后的后续布线路径延至转弯起始位置后开始以转弯半径进行转弯，从而得到至少一个布线点位各自的布线路径。综上所述，本申请实施例所示的方案，通过至少一个布线点位的位置信息，获取到上述布线点位的开始转弯的转弯初始位置，以及对应转弯曲率的转弯半径，并基于得到的转弯初始位置以及转弯半径控制布线路径进行转弯，从而在自动布线过程中实现对布线路径的转弯曲率的控制，使得自动布线算法能够适用于对转弯曲率有要求的芯片的自动布线，从而扩展了自动布线算法的适用场景。
基于上述图4所示的方案，自动布线软件/工具可以通过遍历布线规划信息中的各个布线点位的位置信息，来确定电路版图中的布线点位的密集区，并对密集区中的布线点位的布线路径中的转弯曲率进行控制，以降低自动布线的计算量。
具体比如，在超导量子芯片中，由于版图的尺寸和空间等因素的限制，可能会出现某些位置上多组CPW的线路排布较为紧密的情况，CPW的线路排布较为紧密区域可以称之为密集区。请参考图5，其示出了本申请涉及的密集区示意图。
本申请涉及的实施例所提供的方案，可以在超导量子芯片焊盘和引脚对接算法的基础上，增加U型方块(以“机场”表示)的位置以及跑道顺序的设置，以实现平抑密集区大曲率布线的目标。
具体的，可以将U型方块放置于密集区CPW待连线的端点，以引导CPW转弯的圆弧的走向。圆弧的半径可以与U型方块边长成正相关(比如是U型方块边长的一半)，因此可以根据实际需求改变U型方块的大小，所需的曲率半径越大，U型方块的大小也应随之增大。
上述算法可以用客机从机场跑道起飞来形象化，请参考图6，其示出了本申请涉及的通过机场模拟CPW布线的示意图。如图6所示，“机场”为实际布线中的U型方块，机场内部的“跑道”是固定的CPW布线路径，“客机”61即布线行进的头部，到达跑道尽头后，客机起飞并按照预定的圆弧路径进行转弯，对应自动布线进行小曲率的转弯。
请参考图7，其示出了本申请一个实施例提供的电路版图的布线方法的流程图。该方法各步骤的执行主体可以是计算机设备。该方法可以包括如下几个步骤：
步骤701，从电路版图的布线规划信息中获取电路版图中的至少一个布线点位的位置信息。
在一种可能的实现方式中，上述电路版图可以量子芯片的电路版图，比如，可以是超导量子芯片的电路版图。
本申请实施例所示的方案，可以针对单个布线点位进行处理，或者，也可以针对两个或者两个以上的布线点位进行处理。
其中，在针对两个或者两个以上的布线点位进行处理时，上述至少一个布线点位的位置信息包括n个布线点位的位置信息，n大于或者等于2，且n为整数。
此时，在一些可能的实现方式中，上述从电路版图的布线规划信息中获取电路版图中的至少一个布线点位的位置信息的步骤可以包括：
遍历布线规划信息中的各个布线点位的位置信息，获得n个布线点位的位置信息；
其中，n个布线点位的转弯方向相同，且n个布线点位中的任意两个相邻布线点位的位置信息满足指定条件。
在一些可能的实现方式中，上述指定条件包括：
任意两个相邻布线点位的横坐标的差值小于第一差值阈值，且任意两个相邻布线点位的纵坐标的差值小于第二差值阈值。
在本申请实施例中，自动布线软件/工具可以通过遍历布线规划信息中的各个布线点位的位置信息，来确定电路版图中的布线点位的密集区，并对密集区中的布线点位的布线路径中的转弯曲率进行控制。
具体比如，在超导量子芯片中，由于版图的尺寸和空间等因素的限制，可能会出现某些位置上多组CPW的线路排布较为紧密的情况，CPW的线路排布较为紧密区域可以称之为密集区。请参考图6，其示出了本申请实施例涉及的密集区示意图。
假设电路版图中的布线点位(terminal)的数量为t，且t∈T，对每个布线点位ti所生成的U型方块记为p(ti)。
如果一个点集A∈T，即A是T的真子集，且对所有满足p(ti)∩p(tk)非空的tk，都有tk∈A，则称点集A是完备的。
定义由ti生成的密集区点位集合A(ti)为包含ti的T中的最小完备子集。
记某一密集区A内的点位个数为N，同时可以观察到，A(ti)＝A(t)。
判断点位t1，t2是否满足p(ti)∩p(tk)非空，可根据t1，t2的横纵坐标差是否小于近邻(neighborhhood)参数的2倍来判断，即|x1-x2|＜2*neighborhhood1，以及，|y1-y2|＜2*neighborhhood2。
其中，上述2*neighborhhood1即为第一差值阈值，上述2*neighborhhood2即为第二差值阈值。上述neighborhhood1和neighborhhood2可以相同，也可以不同。
可选的，上述第一差值阈值和第二差值阈值也可以设置为不同的参数值。
在遍历布线规划信息中的各个布线点位的位置信息的过程中，当遍历到一个布线点位的坐标，与之前遍历过的某个布线点位的坐标满足横坐标的差值小于第一差值阈值，纵坐标的差值小于第二差值阈值，且两者转弯方向相同的情况，则将当前遍历到的布线点位添加至之前遍历过的布线点位对应的点位集合，通过上述方式，可以从布线规划信息中遍历得到一个或者多个点位集合，即对应一个或者多个密集区，之后，可以将任一点位集合中的布线点位，获取为上述至少一个布线点位，并得到至少一个布线点位的位置信息。
比如，请参考上述图5中的最下面一组布线CPW线路，其中4条CPW线路分为两组，上面两条CPW线路与下面两条CPW线路的转弯方向不同，相应的，计算机设备可以将这4条CPW线路分为两个独立的密集区(即上面两条CPW线路构成一个密集区，下面两条CPW线路构成另一个密集区)，并分别进行后续处理。
其中，上述转弯方向可以通过布线点位与该布线点位的布线路径的终点之间的位置关系来确定。
其中，上述转弯方向，是指与当前布线点位的延伸方向垂直的方向，比如，以当前布线点位的延伸方向为向前为例，上述转弯方向可以向左或者向右。
步骤702，基于位置信息，计算至少一个布线点位各自对应的转弯起始位置以及转弯半径。
在一种可能的实现方式中，在至少一个布线点位包含n个布线点位，n大于或者等于2，且n为整数的情况下，上述基于至少一个布线点位的位置信息，获取至少一个布线点位各自的转弯起始位置以及转弯半径的步骤可以包括：
S702a，获取n个布线点位的排列次序。
在布线进入密集区后，通常有多对CPW会进行转弯，为了让CPW都够能顺利转弯且互不干扰，需要决定哪对CPW最先进行转弯，本申请中可以形象的比喻为对“客机”的起飞顺序进行排序。
在一种可能的实现方式中，n个布线点位的布线路径的转弯方向相同，获取n个布线点位的排列次序，包括：
将n个布线点位的位置按照转弯方向的逆方向进行排序，获得n个布线点位的排列次序。
本申请实施例提供的算法可以参考田径长跑项目中跑道和运动员起跑位置的设置方法，田径跑道内侧是最先进行转弯、且转弯半径最小的，由于内侧弯道曲率更大，位于内侧跑道的运动员在起跑时，也需要站在更靠后的位置。
同样，请参考图8，其示出了本申请实施例涉及的布线点位排序示意图。如图8所示，在CPW进行转弯的时候，位于内侧的CPW也应该最早进行转弯，且转弯半径最小(但不小于满足设计需求的最小半径)，给其余处于外侧的CPW线路让出转弯空间。这样由内向外依次进行排序，便确定好了每对CPW的转弯次序。其中，上述由内向外的排序，即为转弯方向的逆方向的排序。
S702b，基于n个布线点位的排列次序，以及n个布线点位的位置信息，获取n个布线点位各自的辅助框；n个布线点位各自的辅助框互不重叠；辅助框为U型方框；辅助框的开口方向与布线点位处的布线延伸方向相同，辅助框的中心位于从布线点位开始的延长线上。
在一些实施例中，在确定n个布线点位在电路版图中的位置信息和n个布线点位的排列次序后，根据排列次序确定n个布线点位对应的辅助框确定顺序；按照辅助框确定顺序在n个布线点位中的各个布线点位的布线延伸方向上依次设置辅助框，得到n个布线点位各自的辅助框。
基于n个布线点位各自的辅助框，获取n个布线点位各自的转弯起始位置以及转弯半径；
在一些实施例中，针对n个布线点位各自的辅助框，将第i个布线点位对应的辅助框的中心与第i个布线点位之间的连线的中点作为转弯起始位置，将辅助框的边长作为转弯半径。i为正整数。
其中，布线点位的转弯起始位置基于布线点位的辅助框的中心与布线点位之间的偏移量获得；布线点位的转弯半径基于布线点位的辅助框的边长获得。
在一种可能的实现方式中，n个布线点位各自的偏移量按照排列次序递增。
在一种可能的实现方式中，n个布线点位各自的辅助框的边长按照排列次序递增。
在确定上述排列次序(对应上述机场的转弯顺序)后，即可以基于转弯顺序，在密集区CPW即将进行转弯处，建立用于控制转弯曲率半径的U型方块——“机场”，此时，需要考虑“机场”放置在什么位置。
现实生活中，机场是根据城市规模、人口密度、地理位置条件等因素散布在不同省份、不同城市的，往往一个城市最多只会有一至两个机场，机场和机场之间也不会距离太近，以避免机场间航线和调度的冲突。
同样，在布线时，本申请涉及的算法需要避免CPW上的U型方块间出现相互交叉、重叠的情况，因为这样会导致自动布线出现错误，同时，算法也需要避免CPW转弯时相互阻碍、干扰。对此，本申请实施例所示的方案可以针对性的对每个密集区中U型方块的密度进行控制，距离太近会使转弯空间受限或使CPW间太过于贴近，距离太远又会造成版图空间的浪费、甚至影响其他地方的布线。
本申请实施例所示的方案，在密集区中每对CPW在转弯前设置“机场”，一个密集区中会存在多个U型方块，为了不让他们彼此之间相互干扰、阻碍，可以在每个“机场”前设置了offset(偏移量)参数，在版图空间允许的前提下，控制“机场”的水平距离及起飞顺序。
比如，请参考图9，其示出了本申请实施例涉及的offset设置示意图，如图9所示，本申请实施例所示的方案设置一个offset参数(即上述偏移量)，为“机场”正中间(U型方块的中心)和原版图CPW直线末端临近转弯处间的水平距离偏移量，用于调整机场间的密度。上述offset数值可以是非固定的，也就是说，可以按照上述排列次序，使offset依次增大，相邻布线点位的offset之间的差值可以由开发人员或者设计人员预先设置，也可以根据版图信息决定。另外，在版图不同位置的密集区，由于周边环境不一，要求的offset也不统一，因此，本申请实施例所示的方案，可以针对不同的密集区分别设置独立的offset。
在一种可能的实现方式中，上述基于n个布线点位的排列次序，以及n个布线点位的位置信息，获取n个布线点位各自的辅助框，包括：
基于n个布线点位的排列次序，n个布线点位的延伸方向上的元器件的位置信息，以及n个布线点位的位置信息，获取n个布线点位各自的辅助框。
在一些实施例中，计算机设备根据n个布线点位的延伸方向上的元器件的位置信息以及n个布线点位的位置信息确定offset数值，根据确定的offset数值按照辅助框确定顺序依次确定n个布线点位中的每个布线点位对应的辅助框。
比如，本申请实施例所示的算法可以根据密集区周边的版图信息，包括与元器件、障碍物之间的距离等，遍历搜寻可能的offset数值，设置合适的解，使“机场”间既不相互影响或产生交叠，同时又尽可能减少对版图空间的占用。
此外，若要CPW按照预定的轨迹进行转弯，则需要根据设计需求分别设置其曲率半径。
本申请实施例涉及的算法的特点是利用U型方块设定CPW转弯的曲率半径，并引导转弯。比如，CPW转弯的曲率半径可以设置为U型方块的边长的一半，如果想要增大转弯半径，相应增大方块边长即可。
CPW的转弯按照上述排列次序来进行，请参考图10，其示出了本申请实施例涉及的转弯半径示意图。如图10所示，其展示了一个密集区中次序为1的CPW所进行的圆弧转弯，其曲率半径为R_1。当转弯路径设定继续进行，同一密集区中次序越往后的转弯所设定的曲率半径可以越来越大，以避开次序靠前的CPW圆弧。可选的，曲率半径的初始数值和增幅的选择通过自动化遍历数值进行(比如，从最低设计要求开始增加)，直至取得最优解。
或者，上述曲率半径的初始数值和增幅也可以由开发人员或者设计人员预先设置。
在一种可能的实现方式中，以CPW转弯的曲率半径设置为U型方块的边长的一半为例，计算机设备在确定n个布线点位各自的辅助框时，首先将n个布线点位各自的辅助框的边长和offset数值为初始边长和初始offset数值；然后按照n个布线点位的排列顺序，按照预先指定的边长增加步长和offset数值增加步长，依次确定每个布线点位的辅助框的边长和offset数值，使得当前布线点位的辅助框与前一布线点位的辅助框不存在重叠，且当前布线点位的辅助框的边长大于前一布线点位的辅助框的边长；同时，对辅助框的尺寸和offset数值进行限制，比如，限定辅助框与其它元器件也不存在重叠。
本申请实施例所示的方案通过protobuf规定了“机场”的半径和位置，其中 neighborhood字段(以neighborhood1和neighborhood2相同为例)控制了机场的大小，offset控制机场的位置，通过调节这两个值能够实现本申请实施例提供的算法(可以称为“机场”算法)，其代码可以如下所示：
步骤703，基于第一布线点位的转弯起始位置、第一布线点位的转弯半径以及与第一布线点位对应的目标布线点位的位置信息，获取第一布线点位的转弯角度。
其中，第一布线点位是至少一个布线点位中的任意一个。
在一些实施例中，计算机设备以第一布线点位的转弯起始位置为起点，以第一布线点位对应的目标布线点位的位置信息为终点，在以起点和终点之间以第一布线点位的转弯半径进行转弯，计算得到本次转弯对应的转弯角度。
在本申请实施例中，在确定至少一个布线点位的转弯起始位置以及转弯半径后，可以结合至少一个布线点位的对应的目标布线点位的位置信息来确定转弯角度，也就是需要确定从转弯起始位置开始转过多少角度。
步骤704，基于第一布线点位的转弯起始位置、第一布线点位的转弯半径以及第一布线点位的转弯角度，生成第一布线点位的布线路径。
在一些实施例中，计算机设备以第一布线点位的转弯起始位置为起点，根据第一布线点位的转弯半径以及第一布线点位的转弯角度进行转弯，将生成的路线确定为第一布线点位的布线路径。
其中，上述生成布线路径，可以是指生成布线路径对应的点集；比如，以为CPW为例，上述布线路径可以实现为CPW点集，该CPW点集中包括用于定义该布线路径上布设的CPW线中的n个点的位置信息。
可选的，在生成布线路径的过程中，计算机设备还可以对应该第一布线点位生成布线在转弯处的弧线段的参数信息；其中，上述弧线段的参数信息包括弧参数和圆心参数，该弧参数可以用于指示弧线段中包含的各个点的排列顺序，上述圆心参数可以用于指示弧线段对应的圆心位置。
其中，当上述布线为CPW线时，每一组CPW弧线段对应于2条平行且呈弧线的信号传输线段。
其中，上述布线路径从转弯位置处开始，以转弯半径进行转弯。
可选的，上述第一布线点位对应的布线路径从转弯起始位置开始，按照转弯半径转过上述转弯角度之后，沿着上述转弯形成的圆弧所在的圆形的切线方向向前延伸，也就是说，在计算上述转弯角度时，需要综合考虑布线点位的对应的目标布线点位。
比如，假设目标布线点位与转弯起始位置之间不存在障碍物为例，通过本申请实施例所示的方案，可以同时计算第一布线点位和目标布线点位的转弯起始位置和转弯半径，并分别 确定第一布线点位和目标布线点位各自在转弯起始位置按照各自的转弯半径转弯形成的圆弧所在的圆形，再计算两个圆形之间的共同的切线，且该切线方向与第一布线点位和目标布线点位各自在转弯起始位置按照各自的转弯半径开始转弯后的延伸方向相同，计算出该切线与两个圆形的交点之后，即可以确定第一布线点位和目标布线点位各自的转弯半径，再结合第一布线点位和目标布线点位各自的转弯起始位置和转弯角度，即可以绘制出第一布线点位和目标布线点位之间的布线路径。
请参考图11，其示出了本申请实施例涉及的布线路径的示意图。如图11所示，按照本申请实施例所示的方案生成的布线路径的转弯半径1101，相比于按照经典自动布线算法生成的布线路径的转弯半径1102明显增大，曲率半径明显减小。
可选的，本申请实施例所示的方案使用的算法不仅适用于密集区，还可推广至版图中任意需要灵活调节其转弯半径的布线点位。
综上所述，本申请实施例所示的方案，通过至少一个布线点位的位置信息，获取到上述布线点位的开始转弯的转弯初始位置，以及对应转弯曲率的转弯半径，并基于得到的转弯初始位置以及转弯半径控制布线路径进行转弯，从而在自动布线过程中实现对布线路径的转弯曲率的控制，使得自动布线算法能够适用于对转弯曲率有要求的芯片的自动布线，从而扩展了自动布线算法的适用场景。
此外，本申请实施例所示的方案不限于横平竖直的布线路径，能够结合多个布线点位综合考虑offset参数和转弯半径，不需要通过序列式的布线方式来逐个布线，能够在规模较大的芯片布线中降低布线难度，提高布线效率。
本申请实施例所示的方案中，自动布线算法在布线路径的选择和布线方向上有更多的宽容度，可以在实现自动布线的同时，自动识别并增大密集区中的线路(比如CPW)在转弯处的曲率半径，提升芯片研发效率。
拓扑布线算法可以根据电路布线规则生成布线路径，该规则中的一个重要参数为neighborhood(近邻)参数，通常被设置为版图中布线线路间的最小间距(密集区)，以在保证线路间距离(避免线路重叠、交叉)的前提下，进行自动布线。但由于近邻参数通常是固定值，当版图的密集区中CPW间距较小时，会存在密集区得到的自动排布的CPW曲率过大的问题，对此，基于上述图4或图7所示的方案，本申请实施例所示的方案引入一种新的自动布线算法进行处理，该自动布线算法的处理流程图可以如图12所示。
S1201，布线开始。
S1202，密集区搜寻定位。
比如，自动布线工具可以从横坐标/纵坐标从小到大的顺序依次遍历电路版图的布线规划信息中的各个布线点位，以搜索定位电路版图中的布线点位的密集区。
S1203，判断是否进入密集区。
具体比如，当自动布线工具搜索到转弯方向相同的至少两个布线点位，且至少两个布线点位中每相邻两个布线点位之间的横坐标和纵坐标之间的差值都小于差值阈值时确定进入布线点位的密集区。
S1204，起飞顺序编排。
自动布线工具可以根据密集区中的至少两个布线点位的转弯方向的逆方向，对至少两个布线点位进行排序，得到密集区中的至少两个布线点位的排列顺序。
S1205，机场密度控制。
自动布线工具可以按照上述密集区中的至少两个布线点位的排列顺序，以递增的方式设置上述密集区中的至少两个布线点位各自的偏移量。
S1206，转弯路径预设。
自动布线工具可以按照上述密集区中的至少两个布线点位的排列顺序，以递增的方式设 置上述密集区中的至少两个布线点位各自对应的转弯半径(也就是设置机场的边长)，然后基于上述密集区中的至少两个布线点位各自的偏移量和转弯半径，生成至少两个布线点位从各自的转弯起始位置处开始转弯的布线路径，且该布线路径在转弯结束后的延伸方向，与转弯位置形成的圆弧所在的圆形相切，并且能够连接到目标布线点位。
本申请上述实施例所示的方案，基于拓扑布线，研发了一种能够识别布线密集区，并对线路(比如CPW)转弯处的曲率半径进行自定义的算法，使得在实现自动布线的兼顾密集区小曲率转弯的效果，满足超导量子芯片的自动布线需求。上述方案具有以下优势：
1)针对超导量子芯片的EDA自动布线；
2)智能识别布线密集区；
3)在布线过程中自动调节转弯处CPW线路的曲率半径；
4)允许用户根据设计要求自定义曲率半径参数；
5)高效和便捷化。
此外，本申请实施例还提供一种芯片产品，该芯片产品包括：至少一个布线点位；且该至少一个布线点位在各自的布线路径上具有转弯起始位置和转弯半径，且布线路径从转弯位置处开始，以转弯半径进行转弯。
其中，上述芯片产品的布线路径可以按照上述图4或图7所示的方法获得。
请参考图13，其示出了本申请实施例涉及的芯片产品的布线路径示意图。如图13所示，芯片产品中包含至少一个布线点位1301，以及布线点位1301对应的布线路径1302，其中，布线路径1302在转弯位置1303处开始转弯，以一定的转弯半径进行转弯，形成圆弧形的转弯路段。
在一种可能的实现方式中，上述至少一个布线点位包含n个布线点位，n个布线点位各自的偏移量按照排列次序递增。
如图13所示，芯片产品中的各个布线点位的偏移量按照转弯方向的逆方向依次递增。
在一种可能的实现方式中，n个布线点位各自的转弯半径按照排列次序递增。
如图13所示，芯片产品中的各个布线点位的转弯半径按照转弯方向的逆方向依次递增。
在一种可能的实现方式中，n个布线点位中，任意两个相邻布线点位的横坐标的差值小于第一差值阈值，且任意两个相邻布线点位的纵坐标的差值小于第二差值阈值。
在一种可能的实现方式中，上述芯片产品是量子芯片，比如，可以是超导量子芯片。
图14是根据一示例性实施例示出的一种电路版图的布线装置的结构方框图。该电路版图的布线装置可以实现图4或图7所示实施例提供的方法中，由计算机设备执行的全部或部分步骤，该电路版图的布线装置包括：
第一获取模块1401，用于从电路版图的布线规划信息中获取所述电路版图中的至少一个布线点位的位置信息；
第二获取模块1402，用于基于位置信息，计算至少一个布线点位各自对应的转弯起始位置以及转弯半径；
路径生成模块1403，用于基于转弯起始位置以及转弯半径，生成经过至少一个布线点位的布线路径；所述布线路径在所述转弯起始位置以所述转弯半径开始转弯。
在一种可能的实现方式中，至少一个布线点位包含n个布线点位；n大于或者等于2，且n为整数；
所述第二获取模块1402，用于，
获取n个所述布线点位的排列次序；
基于n个所述布线点位的排列次序，以及n个所述布线点位的位置信息，获取n个所述 布线点位各自的辅助框；n个所述布线点位各自的所述辅助框互不重叠；所述辅助框为U型方框；所述辅助框的开口方向与所述布线点位处的布线延伸方向相同，所述辅助框的中心位于从所述布线点位开始的延长线上；
基于n个所述布线点位各自的辅助框，计算n个所述布线点位各自对应的转弯起始位置以及转弯半径；
其中，所述布线点位的转弯起始位置基于所述布线点位的所述辅助框的中心与所述布线点位之间的偏移量获得；所述布线点位的转弯半径基于所述布线点位的辅助框的边长获得。
在一种可能的实现方式中，n个所述布线点位各自的所述偏移量按照所述排列次序递增。
在一种可能的实现方式中，n个所述布线点位各自的所述辅助框的的边长按照所述排列次序递增。
在一种可能的实现方式中，所述第二获取模块1402，用于基于n个所述布线点位的排列次序，n个所述布线点位的延伸方向上的元器件的位置信息，以及n个所述布线点位的位置信息，获取n个所述布线点位各自的辅助框。
在一种可能的实现方式中，所述第二获取模块1402，用于将n个所述布线点位的位置按照所述转弯方向的逆方向进行排序，获得n个所述布线点位的排列次序。
在一种可能的实现方式中，所述第一获取模块1401，用于遍历所述布线规划信息中的各个所述布线点位的位置信息，获得n个所述布线点位的位置信息；
其中，n个所述布线点位的转弯方向相同，且n个所述布线点位中的任意两个相邻布线点位的位置信息满足指定条件。
在一种可能的实现方式中，所述指定条件包括：
所述任意两个相邻布线点位的横坐标的差值小于第一差值阈值，且所述任意两个相邻布线点位的纵坐标的差值小于第二差值阈值。
在一种可能的实现方式中，所述路径生成模块1403，用于，
基于第一布线点位的转弯起始位置、所述第一布线点位的转弯半径以及与所述第一布线点位对应的目标布线点位的位置信息，获取所述第一布线点位的转弯角度；所述第一布线点位是至少一个布线点位中的任意一个；
基于第一布线点位的转弯起始位置、所述第一布线点位的转弯半径以及所述第一布线点位的转弯角度，生成所述第一布线点位的布线路径。
在一种可能的实现方式中，所述电路版图是超导量子芯片的电路版图。
综上所述，本申请实施例所示的方案，通过至少一个布线点位的位置信息，获取到上述布线点位的开始转弯的转弯初始位置，以及对应转弯曲率的转弯半径，并基于得到的转弯初始位置以及转弯半径控制布线路径进行转弯，从而在自动布线过程中实现对布线路径的转弯曲率的控制，使得自动布线算法能够适用于对转弯曲率有要求的芯片的自动布线，从而扩展了自动布线算法的适用场景。
需要说明的是，上述实施例提供的装置，在实现其功能时，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将设备的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。另外，上述实施例提供的装置与方法实施例属于同一构思，其具体实现过程详见方法实施例，这里不再赘述。
图15是根据一示例性实施例示出的一种计算机设备的结构示意图。所述计算机设备1500包括处理器1501，比如中央处理单元(CPU，Central Processing Unit)、包括随机存取存储器(Random Access Memory，RAM)1502和只读存储器(Read-Only Memory，ROM)1503的系统存储器1504，以及连接系统存储器1504和处理器1501的系统总线1505。所述 计算机设备1500还包括帮助计算机内的各个器件之间传输信息的输入/输出系统1506，和用于存储操作系统1513、应用程序1514和其他程序模块1515的大容量存储设备1507。
所述大容量存储设备1507通过连接到系统总线1505的大容量存储控制器(未示出)连接到处理器1501。所述大容量存储设备1507及其相关联的计算机可读介质为计算机设备1500提供非易失性存储。也就是说，所述大容量存储设备1507可以包括诸如硬盘或者光盘只读存储器(Compact Disc Read-Only Memory，CD-ROM)驱动器之类的计算机可读介质(未示出)。
不失一般性，所述计算机可读介质可以包括计算机存储介质和通信介质。计算机存储介质包括以用于存储诸如计算机可读指令、数据结构、程序模块或其他数据等信息的任何方法或技术实现的易失性和非易失性、可移动和不可移动介质。计算机存储介质包括RAM、ROM、闪存或其他固态存储其技术，CD-ROM、或其他光学存储、磁带盒、磁带、磁盘存储或其他磁性存储设备。当然，本领域技术人员可知所述计算机存储介质不局限于上述几种。上述的系统存储器1504和大容量存储设备1507可以统称为存储器。
计算机设备1500可以通过连接在所述系统总线1505上的网络接口单元1516连接到互联网或者其它网络设备。
所述存储器还包括一个或者一个以上的计算机指令，所述一个或者一个以上计算机指令存储于存储器中，处理器1501通过执行该一个或一个以上计算机指令来实现图4或图7任一所示的方法的全部或者部分步骤。
在示例性实施例中，还提供了一种包括指令的非临时性计算机可读存储介质，例如包括计算机程序(指令)的存储器，上述程序(指令)可由计算机设备的处理器执行以完成本申请各个实施例所示的方法。例如，所述非临时性计算机可读存储介质可以是ROM、RAM、CD-ROM、磁带、软盘和光数据存储设备等。
在示例性实施例中，还提供了一种计算机程序产品或计算机程序，该计算机程序产品或计算机程序包括计算机指令，该计算机指令存储在计算机可读存储介质中。计算机设备的处理器从计算机可读存储介质读取该计算机指令，处理器执行该计算机指令，使得该计算机设备执行上述各个实施例所示的方法。

Claims (15)

  1. 一种电路版图的布线方法，所述方法由计算机设备执行，所述方法包括：
    从电路版图的布线规划信息中获取所述电路版图中的至少一个布线点位的位置信息；
    基于所述位置信息，计算所述至少一个布线点位各自对应的转弯起始位置以及转弯半径；
    基于所述转弯起始位置以及转弯半径，生成经过所述至少一个布线点位的布线路径；所述布线路径在所述转弯起始位置以所述转弯半径开始转弯。
  2. 根据权利要求1所述的方法，其中，所述至少一个布线点位包含n个布线点位；n大于或者等于2，且n为整数；
    所述基于所述位置信息，计算所述至少一个布线点位各自对应的转弯起始位置以及转弯半径，包括：
    获取n个所述布线点位的排列次序；
    基于n个所述布线点位的排列次序，以及n个所述布线点位的位置信息，获取n个所述布线点位各自的辅助框；n个所述布线点位各自的所述辅助框互不重叠；所述辅助框为U型方框；所述辅助框的开口方向与所述布线点位处的布线延伸方向相同，所述辅助框的中心位于从所述布线点位开始的延长线上；
    基于n个所述布线点位各自的辅助框，计算n个所述布线点位各自对应的转弯起始位置以及转弯半径；
    其中，所述布线点位的转弯起始位置基于所述布线点位的所述辅助框的中心与所述布线点位之间的偏移量获得；所述布线点位的转弯半径基于所述布线点位的辅助框的边长获得。
  3. 根据权利要求2所述的方法，其中，n个所述布线点位各自的所述偏移量按照所述排列次序递增。
  4. 根据权利要求2所述的方法，其中，n个所述布线点位各自的所述辅助框的的边长按照所述排列次序递增。
  5. 根据权利要求2所述的方法，其中，所述基于n个所述布线点位的排列次序，以及n个所述布线点位的位置信息，获取n个所述布线点位各自的辅助框，包括：
    基于n个所述布线点位的排列次序，n个所述布线点位的延伸方向上的元器件的位置信息，以及n个所述布线点位的位置信息，获取n个所述布线点位各自的辅助框。
  6. 根据权利要求2所述的方法，其中，n个所述布线点位的布线路径的转弯方向相同，所述获取n个所述布线点位的排列次序，包括：
    将n个所述布线点位的位置按照所述转弯方向的逆方向进行排序，获得n个所述布线点位的排列次序。
  7. 根据权利要求2所述的方法，其中，所述从电路版图的布线规划信息中获取所述电路版图中的至少一个布线点位的位置信息，包括：
    遍历所述布线规划信息中的各个所述布线点位的位置信息，获得n个所述布线点位的位置信息；
    其中，n个所述布线点位的转弯方向相同，且n个所述布线点位中的任意两个相邻布线点位的位置信息满足指定条件。
  8. 根据权利要求7所述的方法，其中，所述指定条件包括：
    所述任意两个相邻布线点位的横坐标的差值小于第一差值阈值，且所述任意两个相邻布线点位的纵坐标的差值小于第二差值阈值。
  9. 根据权利要求1所述的方法，其中，所述基于所述转弯起始位置以及转弯半径，生成经过所述至少一个布线点位的布线路径，包括：
    基于第一布线点位的转弯起始位置、所述第一布线点位的转弯半径以及与所述第一布线点位对应的目标布线点位的位置信息，获取所述第一布线点位的转弯角度；所述第一布线点位是所述至少一个布线点位中的任意一个；
    基于第一布线点位的转弯起始位置、所述第一布线点位的转弯半径以及所述第一布线点位的转弯角度，生成所述第一布线点位的布线路径。
  10. 根据权利要求1至9任一所述的方法，其中，所述电路版图是超导量子芯片的电路版图。
  11. 一种芯片产品，其中，所述芯片产品包括：至少一个布线点位；
    所述至少一个布线点位在各自的布线路径上具有转弯起始位置和转弯半径，且所述布线路径从所述转弯位置处开始，以所述转弯半径进行转弯。
  12. 一种电路版图的布线装置，其中，所述装置包括：
    第一获取模块，用于从电路版图的布线规划信息中获取所述电路版图中的至少一个布线点位的位置信息；
    第二获取模块，用于基于所述位置信息，计算所述至少一个布线点位各自对应的转弯起始位置以及转弯半径；
    路径生成模块，用于基于所述转弯起始位置以及转弯半径，生成经过所述至少一个布线点位的布线路径；所述布线路径在所述转弯起始位置以所述转弯半径开始转弯。
  13. 一种计算机设备，其中，所述计算机设备包含处理器和存储器，所述存储器中存储有至少一条计算机指令，所述至少一条计算机指令由所述处理器加载并执行以实现如权利要求1至10任一所述的电路版图的布线方法。
  14. 一种计算机可读存储介质，其中，所述存储介质中存储有至少一条计算机指令，所述至少一条计算机指令由处理器加载并执行以实现如权利要求1至10任一所述的电路版图的布线方法。
  15. 一种计算机程序产品，其中，所述计算机程序产品包括计算机指令，所述计算机指令存储在计算机可读存储介质中；所述计算机指令由计算机设备的处理器执行，以实现如权利要求1至10任一所述的电路版图的布线方法。
PCT/CN2023/095685 2022-09-30 2023-05-23 电路版图的布线方法、装置、设备、存储介质及产品 WO2024066407A1 (zh)

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