WO2024053103A1 - Icブリッジ、icモジュールおよびicモジュールの製造方法 - Google Patents

Icブリッジ、icモジュールおよびicモジュールの製造方法 Download PDF

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Publication number
WO2024053103A1
WO2024053103A1 PCT/JP2022/033933 JP2022033933W WO2024053103A1 WO 2024053103 A1 WO2024053103 A1 WO 2024053103A1 JP 2022033933 W JP2022033933 W JP 2022033933W WO 2024053103 A1 WO2024053103 A1 WO 2024053103A1
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Prior art keywords
module
bridge
chip
wiring
resin layer
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PCT/JP2022/033933
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English (en)
French (fr)
Japanese (ja)
Inventor
一彦 梶谷
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ウルトラメモリ株式会社
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Application filed by ウルトラメモリ株式会社 filed Critical ウルトラメモリ株式会社
Priority to JP2024545411A priority Critical patent/JPWO2024053103A1/ja
Priority to CN202280099550.6A priority patent/CN119768918A/zh
Priority to PCT/JP2022/033933 priority patent/WO2024053103A1/ja
Publication of WO2024053103A1 publication Critical patent/WO2024053103A1/ja

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/18Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N

Definitions

  • the present invention relates to an IC bridge, an IC module, and a method for manufacturing an IC module.
  • IC modules three-dimensional or 2.5-dimensional mounting techniques are known in which multiple IC dies (IC chips) are mounted on a Si interposer using TSV (Through Silicon Via) technology. According to such mounting technology, it is possible to form high-density wiring for a plurality of IC dies (IC chips), and it is possible to realize miniaturization, thinning of the film, and widening of the band.
  • Si interposers are relatively expensive.
  • Patent Document 1 discloses that instead of such a Si interposer, a redistribution layer (RDL) and a small Si bridge die are used, and a plurality of IC dies (IC chips) are mounted on these. 3D or 2.5D implementation techniques are disclosed. IC modules in which a plurality of IC dies (IC chips) are mounted using a redistribution layer in this manner are often manufactured using FOWLP (Fan Out Wafer Level Package) technology. According to such mounting technology, it is possible to form high-density wiring for multiple IC dies (IC chips) at a relatively low cost, and it is possible to realize miniaturization, thinning, and widening of the band. Can be done.
  • FOWLP Fast Out Wafer Level Package
  • the IC module described in Patent Document 1 includes a processor die (114) and a memory die (116) (first IC chip) embedded in a sealing material (118) (corresponding to the front side resin layer for the module). and a second IC chip), a rewiring layer (120) (corresponding to the rewiring layer for the module), and a Si bridge die (corresponding to the back side resin layer for the module) embedded in the sealing material (146) (corresponding to the back side resin layer for the module). 132) (corresponding to an IC bridge), conductive pillars (124, 126, 134, 136), and conductive bumps (144).
  • Such an IC module is mounted on a package substrate (140) and packaged.
  • the thickness of the Si bridge die (equivalent to an IC bridge) is approximately 100 um or more for handling during mounting (reducing warpage of the Si bridge die, preventing chipping, etc.). Therefore, the height of the conductive pillars juxtaposed to the Si bridge die is also approximately 100 um or more. However, increasing the height of the Si bridge die and the conductive pillars prevents further thinning of the IC module. Furthermore, when the height of the conductive pillar is increased, it is necessary to increase the diameter of the conductive pillar. When the diameter of the conductive pillars becomes thick, the number of conductive pillars is limited and high integration is hindered.
  • An object of the present invention is to provide an IC bridge, an IC module, and a method for manufacturing an IC module that facilitates thinning after mounting without impairing handling during mounting.
  • the IC bridge according to the present invention is an IC bridge that is bridged between a first IC chip and a second IC chip to electrically connect the first IC chip and the second IC chip, and the IC bridge has a surface of the IC bridge.
  • the IC bridge includes a bridge rewiring layer disposed on the side, and a bridge resin layer disposed on the back side of the IC bridge.
  • the bridge redistribution layer includes a dielectric layer, a wiring disposed within the dielectric layer, and a wiring that electrically connects the first IC chip and the second IC chip, and a wiring that is exposed and disposed on the surface.
  • a first pad electrode that electrically connects the wiring and the first IC chip; and a first pad electrode that is exposed on the surface and electrically connects the wiring and the second IC chip. It has two pad electrodes.
  • the IC module according to the present invention includes a module front side resin layer, a module rewiring layer, and a module back side resin layer, which are laminated in order from the front side to the back side, and a module side resin layer arranged in the module front side resin layer. a first IC chip and a second IC chip arranged along the surface, and a first wiring and a third wiring arranged in the module rewiring layer and electrically connected to the first IC chip.
  • a second conductive pillar is connected to the second conductive pillar and has its other end exposed on the back surface, and the second conductive pillar is embedded in the module back side resin layer and is bridged between the first IC chip and the second IC chip.
  • the IC bridge electrically connects the first IC chip and the second IC chip via the third wiring and the fourth wiring of the module rewiring layer.
  • the thickness of the IC bridge from the front side to the back side and the thickness of the module back side resin layer from the front side to the back side are 10 ⁇ m or more and 50 ⁇ m or less.
  • the method for manufacturing an IC module includes a module front side resin layer, a module rewiring layer, and a module back side resin layer, which are laminated in order from the front side to the back side, and the inside of the module front side resin layer.
  • a first IC chip and a second IC chip which are arranged in the module rewiring layer and are arranged along the surface; and a first wiring which is arranged in the module rewiring layer and electrically connected to the first IC chip.
  • a first conductor pillar is disposed in the resin layer on the back side of the module, extends from the front side toward the back side, and has one end connected to the second wiring of the module rewiring layer.
  • a second conductive pillar that is electrically connected and whose other end is exposed on the back surface; and a second conductive pillar that is embedded in the module back side resin layer and is between the first IC chip and the second IC chip; an IC bridge that electrically connects the first IC chip and the second IC chip via the third wiring and the fourth wiring of the module rewiring layer.
  • the module surface-side resin layer on which the first IC chip and the second IC chip are arranged is formed, the module rewiring layer is formed, and the thickness from the front surface side to the back surface side is forming a material layer of the module back side resin layer in which the IC bridge having a thickness of approximately 100 ⁇ m or more, the first conductive pillar and the second conductive pillar are arranged;
  • the IC bridge and the back side for the module have a thickness from the front side to the back side of 10 ⁇ m or more and 50 ⁇ m or less. Obtain a resin layer.
  • the present invention it is possible to easily reduce the thickness of the IC bridge after mounting the IC module without impairing the handling of the IC bridge during the mounting of the IC module.
  • FIG. 1 is a sectional view showing an IC module according to a first embodiment.
  • FIG. 2 is a sectional view showing an IC bridge in the IC module shown in FIG. 1, and an IC bridge according to a first embodiment. It is a figure showing an example of the manufacturing method of the IC bridge concerning a 1st embodiment. It is a figure showing an example of the manufacturing method of the IC bridge concerning a 1st embodiment. It is a figure showing an example of the manufacturing method of the IC bridge concerning a 1st embodiment. It is a figure showing an example of the manufacturing method of the IC bridge concerning a 1st embodiment. It is a figure showing an example of the manufacturing method of the IC bridge concerning a 1st embodiment. It is a figure showing an example of the manufacturing method of the IC bridge concerning a 1st embodiment. FIG.
  • FIG. 7 is a diagram showing another example of the method for manufacturing the IC bridge according to the first embodiment.
  • FIG. 7 is a diagram showing another example of the method for manufacturing the IC bridge according to the first embodiment.
  • FIG. 7 is a diagram showing another example of the method for manufacturing the IC bridge according to the first embodiment.
  • FIG. 7 is a diagram showing another example of the method for manufacturing the IC bridge according to the first embodiment.
  • FIG. 3 is a diagram illustrating an example of a method for manufacturing an IC module according to the first embodiment.
  • FIG. 3 is a diagram illustrating an example of a method for manufacturing an IC module according to the first embodiment.
  • FIG. 3 is a sectional view showing an IC module according to a second embodiment.
  • FIG. 3 is a diagram showing another example of the method for manufacturing the IC bridge according to the first embodiment.
  • FIG. 7 is a diagram showing another example of the method for manufacturing the IC bridge according to the first embodiment.
  • FIG. 7 is a diagram showing another example of
  • FIG. 7 is a sectional view showing an IC bridge in the IC module shown in FIG. 6, and an IC bridge according to a second embodiment. It is a figure which shows an example of the manufacturing method of the IC bridge based on 2nd Embodiment. It is a figure which shows an example of the manufacturing method of the IC bridge based on 2nd Embodiment. It is a figure which shows an example of the manufacturing method of the IC bridge based on 2nd Embodiment. It is a figure which shows an example of the manufacturing method of the IC bridge based on 2nd Embodiment. It is a figure which shows an example of the manufacturing method of the IC bridge based on 2nd Embodiment. It is a figure which shows an example of the manufacturing method of the IC bridge based on 2nd Embodiment.
  • FIG. 1 is a sectional view showing an IC module according to the first embodiment.
  • the IC module 100 includes a module front side resin layer 110, a module rewiring layer 130, and a module back side resin layer 120, which are laminated in order from the front side to the back side.
  • the IC module 100 also includes a first IC chip 21, a second IC chip 22, a first conductor bump 111, a second conductor bump 112, a third conductor bump 113, and a fourth conductor bump 114.
  • the first wiring 131, the second wiring 132, the third wiring 133, the fourth wiring 134, the first conductor pillar 121, the second conductor pillar 122, the IC bridge 10, and the first conductor It includes a bump 141 and a second conductor bump 142.
  • the first IC chip 21 and the second IC chip 22 (Integrated Circuit chip) (also referred to as an IC die) are sealed with a module surface-side resin layer 110. That is, the first IC chip 21 and the second IC chip 22 are arranged within the module front side resin layer 110. The first IC chip 21 and the second IC chip 22 are arranged along the surface of the IC module.
  • the first IC chip 21 and the second IC chip 22 include, but are not particularly limited to, logic chips such as SoC (System On Chip), MPU (Micro Processing Unit), and FPGA (Field Programmable Gate Array), and memory chips such as DRAM and SRAM. can be mentioned.
  • SoC System On Chip
  • MPU Micro Processing Unit
  • FPGA Field Programmable Gate Array
  • memory chips such as DRAM and SRAM.
  • FIG. 1 shows an example of a combination of an SoC and a memory.
  • the first IC chip 21 is connected to the module rewiring layer 130 via the first conductor bump 111 and the third conductor bump 113.
  • the second IC chip 22 is connected to the module rewiring layer 130 via the second conductor bump 112 and the fourth conductor bump 114.
  • Examples of the first conductor bump 111, the second conductor bump 112, the third conductor bump 113, and the fourth conductor bump 114 include micro bumps, Cu pillar bumps, and the like.
  • the first conductor bump 111, the second conductor bump 112, the first wiring 131, the second wiring 132, the first conductor pillar 121, and the second conductor pillar 122 which will be described later, mainly supply power and GND, Used for transmitting and receiving external signals.
  • the third conductor bump 113, the fourth conductor bump 114, the third wiring 133, the fourth wiring 134, and the IC bridge 10 which will be described later, provide communication interface signals between the first IC chip 21 and the second IC chip 22. It is used for sending and receiving etc.
  • a first wiring 131, a second wiring 132, a third wiring 133, and a fourth wiring 134 are arranged in the module redistribution layer (RDL) 130, and these wirings are dielectric. It is covered by a body layer 136.
  • the first wiring 131 is electrically connected to the first IC chip 21 via the first conductive bump 111
  • the second wiring 132 is electrically connected to the second IC chip 22 via the second conductive bump 112. It is connected to the.
  • the third wiring 133 is electrically connected to the first IC chip 21 via the third conductive bump 113
  • the fourth wiring 134 is electrically connected to the second IC chip 22 via the fourth conductive bump 114. It is connected to the.
  • Examples of the material for the first wiring 131, the second wiring 132, the third wiring 133, and the fourth wiring 134 include metals such as Cu.
  • Examples of the material for the dielectric layer 136 include organic materials such as polyimide.
  • the first conductor pillar 121 and the second conductor pillar 122 are arranged within the module back side resin layer 120 and extend from the front side of the IC module toward the back side. ing.
  • One end of the first conductive pillar 121 is electrically connected to the first wiring 131 of the module rewiring layer 130, and the other end of the first conductive pillar 121 is exposed on the back surface of the IC module.
  • One end of the second conductive pillar 122 is electrically connected to the second wiring 132 of the module rewiring layer 130, and the other end of the second conductive pillar 122 is exposed on the back surface of the IC module.
  • Examples of the material for the first conductor pillar 121 and the second conductor pillar 122 include metals such as Cu.
  • the first conductor bump 141 and the second conductor bump 142 are arranged on the back surface of the IC module.
  • the first conductor bump 141 is connected to the first conductor pillar 121
  • the second conductor bump 142 is connected to the second conductor pillar 122.
  • Examples of the first conductor bump 141 and the second conductor bump 142 include C4 (Controlled Collapsed Chip Connection) bumps.
  • the IC bridge 10 is embedded in the module back side resin layer 120 and is bridged between the first IC chip 21 and the second IC chip 22.
  • the IC bridge 10 is electrically connected to a third wiring 133 and a fourth wiring 134, and is electrically connected to the third wiring 133, the third conductive bump 113, the fourth wiring 134, and the fourth conductive bump 114.
  • the first IC chip 21 and the second IC chip 22 are electrically connected. Details of the IC bridge 10 will be described later.
  • the thickness of the module back side resin layer 120 from the front side to the back side is 10 ⁇ m or more and 50 ⁇ m or less. Further, the thickness of the IC bridge 10 from the front side to the back side is 10 ⁇ m or more and 50 ⁇ m or less.
  • the position in the direction from the front side to the back side, the position of the back side surface of the module back side resin layer 120 and the position of the back side surface of the bridge resin layer 18 of the IC bridge 10, which will be described later. , are available. That is, the back side surface of the module back side resin layer 120 and the back side surface of the bridge resin layer 18 of the IC bridge 10, which will be described later, are flush with each other and do not have a step.
  • the material of the module back side resin layer 120 and the material of the bridge resin layer 18 of the IC bridge 10 may be the same or different. Generally, epoxy resin materials are used for both.
  • FIG. 2 is a sectional view showing the IC bridge in the IC module shown in FIG. 1, and the IC bridge according to the first embodiment.
  • the IC bridge 10 includes a bridge rewiring layer 12 disposed on the front side of the IC bridge, that is, the front side of the IC module, and a bridge rewiring layer 12 disposed on the back side of the IC bridge, that is, the back side of the IC module.
  • a bridge resin layer 18 is provided.
  • the bridge redistribution layer (RDL) 12 includes a dielectric layer 13, a wiring 14, a first pad electrode 15, and a second pad electrode 16.
  • the wiring 14 is arranged within the dielectric layer 13 and electrically connects the first IC chip 21 and the second IC chip 22 described above.
  • the first pad electrode 15 is exposed on the surface and electrically connects the wiring 14 and the first IC chip 21 described above.
  • the second pad electrode 16 is exposed on the surface and electrically connects the wiring 14 and the second IC chip 22 described above.
  • a metal such as Cu is used as the material for the wiring 14, and a metal such as Cu or Al is used as the material for the first pad electrode 15 and the second pad electrode 16.
  • a metal such as Cu or Al is used as the material for the first pad electrode 15 and the second pad electrode 16.
  • an organic material such as polyimide is used as the material of the dielectric layer 13.
  • the thickness of the IC bridge 10 alone before the IC module is mounted is 100 ⁇ m or more, or approximately 100 ⁇ m or more, from the front surface to the back surface. This reduces warping and prevents chipping, making it easier to handle the IC bridge 10 when mounting an IC module.
  • the thickness of the IC bridge 10 after mounting the IC module from the front surface to the back surface is 10 ⁇ m or more and 50 ⁇ m or less. This allows the IC bridge 10 and IC module 100 to be made thinner after mounting.
  • An example of a method for manufacturing the IC bridge 10 and the IC module 100 will be described below.
  • 3A to 3E are diagrams illustrating an example of the method for manufacturing the IC bridge according to the first embodiment.
  • 3A-3E illustrate an example of manufacturing two IC bridges at the same time.
  • a wiring 14 is formed on a flat first carrier substrate B1 made of glass or the like, and a first pad electrode 15 and a second pad electrode 16 are formed on the wiring 14.
  • the dielectric layer 13 is laminated on the first carrier substrate B1 so as to cover the wiring 14, the first pad electrode 15, and the second pad electrode 16.
  • the dielectric layer 13 is polished to expose the first pad electrode 15 and the second pad electrode 16.
  • This forms a bridge rewiring layer 12 in which the wiring 14, the first pad electrode 15, and the second pad electrode 16 are covered with the dielectric layer 13.
  • the bridge rewiring layer 12 may be formed by laminating the wiring 14, the dielectric layer 13, the first pad electrode 15, the second pad electrode 16, and the dielectric layer 13 in this order.
  • the first carrier substrate B1 is turned upside down, and the side of the bridge rewiring layer 12 opposite to the first carrier substrate B1 is placed on a flat second carrier substrate B2 made of glass or the like. After pasting, the first carrier substrate B1 is peeled off from the bridge rewiring layer 12.
  • a bridge resin layer 18 is laminated on the back surface of the bridge rewiring layer 12 by a coating method, etc., and the bridge resin layer 18 is cured, so that the thickness of the bridge resin layer 18 is increased.
  • the back surface of the bridge resin layer 18 is polished to a predetermined thickness.
  • the predetermined thickness is preferably about 100 ⁇ m or more, which is not too thin, considering the ease of handling of the IC bridge 10 produced as described above.
  • the second carrier substrate B2 is turned upside down, and the second carrier substrate B2 is peeled off, and as shown in FIG. 3E, it is separated into pieces.
  • an IC bridge 10 in which the bridge rewiring layer 12 and the bridge resin layer 18 are laminated is obtained.
  • FIGS. 4A to 4C are diagrams showing another example of the method for manufacturing the IC bridge according to the first embodiment. 4A to 4C also show an example of manufacturing two IC bridges at the same time.
  • the bridge resin layer 18 is formed on the first carrier substrate B1 by a coating method or the like, and the bridge resin layer 18 is cured. At this time, the bridge resin layer 18 is ground and polished to form a flat surface. Thereafter, a wiring 14 is formed on the bridge resin layer 18, and a first pad electrode 15 and a second pad electrode 16 are formed on the wiring 14. Thereafter, the dielectric layer 13 is laminated on the first carrier substrate B1 so as to cover the wiring 14, the first pad electrode 15, and the second pad electrode 16. Thereafter, the dielectric layer 13 is polished to expose the first pad electrode 15 and the second pad electrode 16. This forms a bridge rewiring layer 12 in which the wiring 14, the first pad electrode 15, and the second pad electrode 16 are covered with the dielectric layer 13. Note that the bridge rewiring layer 12 may be formed by laminating the wiring 14, the dielectric layer 13, the first pad electrode 15, the second pad electrode 16, and the dielectric layer 13 in this order.
  • the first carrier substrate B1 is peeled off, and as shown in FIG. 4C, it is separated into pieces.
  • an IC bridge 10 in which the bridge rewiring layer 12 and the bridge resin layer 18 are laminated is obtained.
  • 5A to 5C are diagrams illustrating an example of the method for manufacturing the IC module according to the first embodiment. 5A to 5C show an example of manufacturing two IC modules at the same time.
  • a module front-side resin layer 110 in which the first IC chip 21 and the second IC chip 22 are arranged and sealing the first IC chip 21 and the second IC chip 22;
  • - Module rewiring in which first wiring 131, second wiring 132, third wiring 133, and fourth wiring 134 electrically connected to first IC chip 21 and second IC chip 22 are arranged in dielectric layer 136 forming a layer 130;
  • the above-mentioned IC bridge 10 that electrically connects the first IC chip 21 and the second IC chip 22 via the third wiring 133 and the fourth wiring 134 is arranged, and the material of the back side resin layer for the module is sealed. forming a layer 120Z; - Laminate the material layers 120Z of the module front side resin layer 110, the module rewiring layer 130, and the module back side resin layer.
  • the thickness of the IC bridge 10 from the front side to the back side is as thick as about 100 ⁇ m or more, as shown in FIG. This makes it easier to handle the IC bridge 10 during mounting.
  • the method for forming and laminating the material layers 120Z of the module front side resin layer 110, the module rewiring layer 130, and the module back side resin layer is not limited to this, and various methods can be applied. It's okay.
  • the material layer 120Z of the module back side resin layer and the bridge resin layer 18 in the IC bridge 10 are polished simultaneously. This exposes the other end of the first conductor pillar 121 and the other end of the second conductor pillar 122.
  • the thickness of the IC bridge 10 from the front side to the back side is thinned to 10 ⁇ m or more and 50 ⁇ m or less, as shown in FIG. This allows the IC bridge 10 and IC module 100 to be made thinner after mounting.
  • first conductive bumps 141 and second conductive bumps 142 are formed on the back surface, and the IC bridge 10 and IC module 100 shown in FIG. can get.
  • the IC bridge 10 of this embodiment includes the bridge rewiring layer 12 disposed on the front side and the bridge resin layer 18 disposed on the back side. Therefore, by making the thickness of the IC bridge 10 relatively thick to 100 ⁇ m or more or approximately 100 ⁇ m, handling during mounting can be facilitated.
  • the bridge resin layer 18 on the back side of the IC bridge 10 can be easily polished at the same time as the module back resin layer 120 of the IC module 100 is polished, and the thickness of the IC bridge 10 can be reduced to 10 ⁇ m. It can be made as thin as 50 ⁇ m or less. In this way, it is possible to easily reduce the thickness after mounting without impairing handling during mounting.
  • the IC bridge 10 is thinned after mounting, the height of the conductive pillar can be reduced, and the diameter of the conductive pillar can be reduced. Therefore, it is possible to narrow the pitch of the conductive pillars, increase the number of conductive pillars, and achieve high integration. Furthermore, since the height of the conductive pillar can be reduced, manufacturing yield is improved.
  • the hardness of the Si bridge die is very hard compared to the hardness of the module back side resin layer 120 of the IC module 100. If the back side resin layer 120 and the Si bridge die are polished at the same time, it is expected that a step will occur between the module back side resin layer 120 and the Si bridge die on the back side.
  • the hardness of the module back side resin layer 120 of the IC module 100 and the hardness of the bridge resin layer 18 of the IC bridge 10 are both made of, for example, epoxy resin. Since they are almost the same, even if the module back side resin layer 120 and the bridge resin layer 18 are polished at the same time, there will be no step difference between the module back side resin layer 120 and the Si bridge die on the back side. The occurrence of such problems is suppressed, and the accuracy of the flatness of the back surface is improved.
  • FIG. 6 is a sectional view showing an IC module according to the second embodiment.
  • the IC module 100 of the second embodiment shown in FIG. 6 differs from the IC module 100 of the first embodiment shown in FIG. 1 in the configuration of the IC bridge 10.
  • the rest of the configuration of the IC module 100 of the second embodiment is the same as the configuration of the IC module 100 of the first embodiment.
  • the thickness of the module back side resin layer 120 from the front side to the back side is 10 ⁇ m or more and 50 ⁇ m or less. Further, the thickness of the IC bridge 10 from the front side to the back side is 10 ⁇ m or more and 50 ⁇ m or less.
  • conductive pillars 19 are arranged on the module backside resin layer 120 of the IC bridge 10, and the conductive pillars 19 are exposed on the backside.
  • a third conductor bump 143 is arranged at the position of the conductor pillar 19.
  • the positions in the direction from the front side to the back side include the position of the back side surface of the module back side resin layer 120 and the position of the back side surface of the bridge resin layer 18 of the IC bridge 10, which will be described later. That's all there is. That is, the back side surface of the module back side resin layer 120 and the back side surface of the bridge resin layer 18 of the IC bridge 10, which will be described later, are flush with each other and do not have a step.
  • FIG. 7 is a sectional view showing an IC bridge in the IC module shown in FIG. 6, and an IC bridge according to the second embodiment.
  • the IC bridge 10 of the second embodiment shown in FIG. 7 differs from the IC bridge 10 of the first embodiment shown in FIG. 2 in that it further includes a conductive pillar 19.
  • the other configuration of the IC bridge 10 of the second embodiment is the same as the configuration of the IC bridge 10 of the first embodiment.
  • the conductor pillars 19 are arranged within the bridging resin layer 18 and extend from the front side to the back side. One end of the conductor pillar 19 is electrically connected to the wiring 14 of the bridge redistribution layer 12, and the other end of the conductor pillar 19 is not exposed on the back surface.
  • the length from the front side to the back side of the conductor pillar 19 is determined by polishing the material layer 120Z of the back side resin layer for the module and the bridge resin layer 18 of the IC bridge 10 at the same time, as described later. This is the length exposed on the back surface of the bridge resin layer 18 in . Examples of the material for the conductor pillar 19 include metals such as Cu.
  • the thickness of the IC bridge 10 alone before the IC module is mounted is about 100 ⁇ m or more from the front surface to the back surface. This makes it easier to handle the IC bridge 10 when the IC module is mounted.
  • the thickness of the IC bridge 10 after mounting the IC module from the front surface to the back surface is 10 ⁇ m or more and 50 ⁇ m or less. This allows the IC bridge 10 and IC module 100 to be made thinner after mounting.
  • An example of a method for manufacturing the IC bridge 10 and the IC module 100 will be described below.
  • FIGS. 8A to 8E are diagrams illustrating an example of a method for manufacturing an IC bridge according to the second embodiment. 8A to 8E show an example of manufacturing two IC bridges at the same time.
  • a wiring 14 is formed on a flat first carrier substrate B1 made of glass or the like, and a first pad electrode 15 and a second pad electrode 16 are formed on the wiring 14.
  • the dielectric layer 13 is laminated on the first carrier substrate B1 so as to cover the wiring 14, the first pad electrode 15, and the second pad electrode 16.
  • the dielectric layer 13 is polished to expose the first pad electrode 15 and the second pad electrode 16.
  • This forms a bridge rewiring layer 12 in which the wiring 14, the first pad electrode 15, and the second pad electrode 16 are covered with the dielectric layer 13.
  • the bridge rewiring layer 12 may be formed by laminating the wiring 14, the dielectric layer 13, the first pad electrode 15, the second pad electrode 16, and the dielectric layer 13 in this order.
  • the first carrier substrate B1 is turned upside down, and the side of the bridge rewiring layer 12 opposite to the first carrier substrate B1 is placed on a flat second carrier substrate B2 made of glass or the like. After pasting, the first carrier substrate B1 is peeled off from the bridge rewiring layer 12. Thereafter, conductor pillars 19 are formed on the back surface of the bridge rewiring layer 12. As will be described later, the length of the conductor pillar 19 is determined by polishing the back side of the bridge resin layer 18 in the IC bridge 10 after simultaneously polishing the material layer 120Z of the module back side resin layer and the bridge resin layer 18 in the IC bridge 10. It is preferable that the length be such that it is exposed to
  • a bridge resin layer 18 is laminated on the back surface of the bridge rewiring layer 12 by a coating method, etc., and the bridge resin layer 18 is cured, so that the thickness of the bridge resin layer 18 is increased.
  • the back surface of the bridge resin layer 18 is polished to a predetermined thickness.
  • the predetermined thickness is preferably about 100 ⁇ m or more, which is not too thin, considering the ease of handling of the IC bridge 10 produced as described later.
  • the second carrier substrate B2 is turned upside down, and the second carrier substrate B2 is peeled off, and as shown in FIG. 8E, it is separated into pieces.
  • the bridge rewiring layer 12 and the bridge resin layer 18 are laminated, and the IC bridge 10 in which the conductor pillars 19 are arranged on the bridge resin layer 18 is obtained.
  • 9A to 9C are diagrams illustrating an example of a method for manufacturing an IC module according to the second embodiment.
  • 9A to 9C show an example of manufacturing two IC modules at the same time.
  • a module front-side resin layer 110 in which the first IC chip 21 and the second IC chip 22 are arranged and sealing the first IC chip 21 and the second IC chip 22;
  • - Module rewiring in which first wiring 131, second wiring 132, third wiring 133, and fourth wiring 134 electrically connected to first IC chip 21 and second IC chip 22 are arranged in dielectric layer 136 forming a layer 130;
  • the above-mentioned IC bridge 10 that electrically connects the first IC chip 21 and the second IC chip 22 via the third wiring 133 and the fourth wiring 134 is arranged, and the material of the back side resin layer for the module is sealed. forming a layer 120Z; - Laminate the material layers 120Z of the module front side resin layer 110, the module rewiring layer 130, and the module back side resin layer.
  • the thickness of the IC bridge 10 from the front side to the back side is as thick as about 100 ⁇ m or more, as shown in FIG. This makes it easier to handle the IC bridge 10 during mounting.
  • the method for forming and laminating the material layers 120Z of the module front side resin layer 110, the module rewiring layer 130, and the module back side resin layer is not limited to this, and various methods can be applied. It's okay.
  • the material layer 120Z of the module back side resin layer and the bridge resin layer 18 in the IC bridge 10 are polished simultaneously. This exposes the other end of the first conductor pillar 121, the other end of the second conductor pillar 122, and the other end of the conductor pillar 19 in the bridge resin layer 18 of the IC bridge 10.
  • the thickness of the IC bridge 10 from the front side to the back side is thinned to 10 ⁇ m or more and 50 ⁇ m or less, as shown in FIG. This allows the IC bridge 10 and IC module 100 to be made thinner after mounting.
  • first conductor bumps 141, second conductor bumps 142, and third conductor bumps 143 are formed on the back surface, and by dividing them into pieces, the IC shown in FIG. A bridge 10 and an IC module 100 are obtained.
  • the IC bridge 10, IC module 100, and method for manufacturing an IC module according to the second embodiment also obtain the same advantages as the method for manufacturing the IC bridge 10, IC module 100, and IC module according to the first embodiment. be able to.
  • the IC bridge 10 since the conductor pillar 19 is provided on the bridge resin layer 18 on the back side, the IC bridge 10 directly receives power or signals via the conductor pillar 19. , they can be supplied to the first IC chip 21 and/or the second IC chip 22.
  • the IC bridge 10 directly receives the power of the drive circuit in the communication interface circuit between the first IC chip 21 and the second IC chip 22 via the conductive pillar 19, and supplies the power to the first IC chip 21 and/or the second IC chip 22. It can be supplied to the second IC chip 22.
  • the present invention is not limited to the above-described embodiments, and various changes and modifications can be made.
  • the IC bridge 10 bridged between the two IC chips 21 and 22 and the IC module 100 including the same are illustrated.
  • the features of the present invention are not limited thereto, and are also applicable to an IC bridge bridged between three or more IC chips and an IC module including the same.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
PCT/JP2022/033933 2022-09-09 2022-09-09 Icブリッジ、icモジュールおよびicモジュールの製造方法 WO2024053103A1 (ja)

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JP2024545411A JPWO2024053103A1 (enrdf_load_stackoverflow) 2022-09-09 2022-09-09
CN202280099550.6A CN119768918A (zh) 2022-09-09 2022-09-09 Ic桥、ic模块及ic模块的制造方法
PCT/JP2022/033933 WO2024053103A1 (ja) 2022-09-09 2022-09-09 Icブリッジ、icモジュールおよびicモジュールの製造方法

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Citations (6)

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Publication number Priority date Publication date Assignee Title
JP2007287801A (ja) * 2006-04-13 2007-11-01 Sony Corp 電気・光混載三次元半導体モジュール及びハイブリット回路装置並びに携帯型電話機
JP2011044654A (ja) * 2009-08-24 2011-03-03 Shinko Electric Ind Co Ltd 半導体装置
JP2019125779A (ja) * 2017-12-08 2019-07-25 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated ウエハレベルのダイブリッジのための方法及び装置
US20200185367A1 (en) * 2018-12-11 2020-06-11 Advanced Micro Devices, Inc. Integrated circuit module with integrated discrete devices
US20210375768A1 (en) * 2020-05-28 2021-12-02 Taiwan Semiconductor Manufacturing Company Limited Silicon interposer including through-silicon via structures with enhanced overlay tolerance and methods of forming the same
US20220223534A1 (en) * 2021-01-14 2022-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure including a first die and a second die and a bridge die and method of forming the package structure

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007287801A (ja) * 2006-04-13 2007-11-01 Sony Corp 電気・光混載三次元半導体モジュール及びハイブリット回路装置並びに携帯型電話機
JP2011044654A (ja) * 2009-08-24 2011-03-03 Shinko Electric Ind Co Ltd 半導体装置
JP2019125779A (ja) * 2017-12-08 2019-07-25 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated ウエハレベルのダイブリッジのための方法及び装置
US20200185367A1 (en) * 2018-12-11 2020-06-11 Advanced Micro Devices, Inc. Integrated circuit module with integrated discrete devices
US20210375768A1 (en) * 2020-05-28 2021-12-02 Taiwan Semiconductor Manufacturing Company Limited Silicon interposer including through-silicon via structures with enhanced overlay tolerance and methods of forming the same
US20220223534A1 (en) * 2021-01-14 2022-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure including a first die and a second die and a bridge die and method of forming the package structure

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