WO2024051228A1 - 功率器件及功率设备 - Google Patents

功率器件及功率设备 Download PDF

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Publication number
WO2024051228A1
WO2024051228A1 PCT/CN2023/098425 CN2023098425W WO2024051228A1 WO 2024051228 A1 WO2024051228 A1 WO 2024051228A1 CN 2023098425 W CN2023098425 W CN 2023098425W WO 2024051228 A1 WO2024051228 A1 WO 2024051228A1
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WIPO (PCT)
Prior art keywords
area
power device
pin
base island
housing
Prior art date
Application number
PCT/CN2023/098425
Other languages
English (en)
French (fr)
Inventor
李高显
党晓波
严波
王锁海
Original Assignee
苏州汇川控制技术有限公司
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Publication of WO2024051228A1 publication Critical patent/WO2024051228A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present application relates to the technical field of power devices, and in particular to a power device and power equipment.
  • the power device IGBT Insulated Gate Bipolar Transistor, insulated gate bipolar transistor
  • IGBT Insulated Gate Bipolar Transistor, insulated gate bipolar transistor
  • power drive systems generally use discrete device plug-in packaging.
  • the advantages of discrete devices are low device cost, high flexibility, and simple process routes.
  • the circuit topology of the power drive system involves many devices, the production process of discrete devices is adopted. It is complex, and the automated assembly cost of plug-in discrete devices is high and assembly errors are prone to occur, thus making the overall cost higher.
  • the main purpose of this application is to propose a power device aimed at solving the technical pain points of existing device packaging.
  • the power device proposed in this application includes:
  • Lead frame the lead frame includes a base island area and a pin area, the housing and the base island area are enclosed to form a chip accommodation space, the base island area is electrically connected to the pin area, so The pin area at least partially extends out of the housing and is bent in a direction toward the housing to form a welding leg;
  • At least two power device chips are disposed on the surface of the base island region close to the side of the housing;
  • An insulating layer is provided on the surface of the lead frame on the side facing away from the housing.
  • the housing has a first surface and a second surface arranged oppositely, and the second surface is provided with an opening; wherein the first surface is close to the power device when it is installed on the circuit board.
  • the insulating layer is located in the opening, and has a third surface located in the housing and a fourth surface exposed through the opening, and the third surface is opposite to the fourth surface.
  • a copper clad layer is further provided on the fourth surface of the insulating layer.
  • the base island area includes a first carrier area and a second carrier area, and the power device chips are spaced apart on the surfaces of the first carrier area and the second carrier area close to the side of the housing. , used to form the target power topology;
  • the pin area includes a first pin area and a second pin area, the first pin area is electrically connected to the first carrier area, and the second pin area is electrically connected to the second carrier area. connect.
  • the target power topology includes: power IGBT series topology, power IGBT parallel topology, rectifier bridge and braking topology.
  • the lead frame further includes a plurality of pin lead-out areas connected to the base island area, and one end of the pin lead-out area close to the base island area is bonded and connected to the power device chip. , one end of the pin lead-out area away from the base island area is bent in a direction toward the housing to form a Z-shape.
  • the pin area and the base island area are integrally formed
  • the pin area is electrically connected to the base island area through a conductive member.
  • the number of the pin areas and the base island areas is multiple, and each of the pin areas is bonded to one of the base island areas.
  • one end of the welding leg away from the base island region is bent to form an L shape.
  • the power device chip includes: an IGBT chip, a diode chip, and a reverse conduction chip.
  • This application also proposes a power device, which includes the above-mentioned power device.
  • the technical solution of the present application disposes the base island area and the power device chip on the second surface of the casing, so that when the power device of the present application is installed on the circuit board, the base island area and the power device chip are disposed on the casing away from the circuit.
  • One side of the board improves the heat dissipation effect of the power device, meets the requirements for the heat dissipation resistance of the power device, improves the long-term reliability of the power device, and solves the problem of poor heat dissipation effect of the existing device packaging.
  • the structure of the present application is simple, the system integration cost is low, and it can be used for automatic patching to improve the automatic assembly of plug-in discrete devices.
  • Figure 1 is a schematic cross-sectional structural diagram of an embodiment of the power device of the present application.
  • Figure 2 is a schematic structural diagram of an embodiment of the power device of the present application.
  • Figure 3 is a schematic structural diagram of another embodiment of the power device of the present application.
  • Figure 4 is a schematic diagram of the equivalent circuit structure of an embodiment of the power device of the present application.
  • Figure 5 is a schematic structural diagram of a packaged power device according to an embodiment of the present application.
  • Figure 6 is a schematic structural diagram of another embodiment of the power device of the present application.
  • Figure 7 is a schematic diagram of the equivalent circuit structure of another embodiment of the power device of the present application.
  • Figure 8 is a schematic structural diagram of another embodiment of the power device of the present application.
  • FIG. 9 is a schematic diagram of the equivalent circuit structure of another embodiment of the power device of the present application.
  • label name label name 10 case 40 pin area 20 Key Island District 50 Conductive parts 30 Power device chip 60 Pinout area
  • This application proposes a power device.
  • the power device includes:
  • the lead frame includes a base island area 20 and a pin area 40, the housing 10 and the base island area are enclosed to form a chip accommodation space, the base island area 20 and the pin area 40
  • the pin area 40 at least partially extends out of the housing and is bent in a direction toward the housing to form a soldering pin;
  • At least two power device chips 30 are disposed on the surface of the base island region 20 close to the side of the housing 10;
  • An insulating layer is provided on the surface of the lead frame on the side facing away from the housing.
  • the mounting substrate can be implemented using a DBC copper-clad ceramic substrate, an AMB substrate, etc., or it can be implemented by setting a double-layer structure including an insulating layer and a lead frame.
  • the power device chip 30 When the power device chip 30 is disposed in the base island area 20 When on, the heat generated by the power chip is quickly dissipated through the base island area 20, the insulating layer and the external heat dissipation medium.
  • the pin area 40 can be electrically connected to the base island area 20 through conductive parts 50 such as metal copper sheets and binding wires.
  • the pin area 40 is used for electrical connection with the outside.
  • the pin area 40 can also be integrally formed with the base island area 20. Through this integrated arrangement, the electrical connection between the pin area 40 and the base island area 20 can be achieved without the need for additional conductive parts 50.
  • Figure 2 is a schematic diagram of the internal structure of the power device.
  • the power device chip 30 is installed on the base island area 20, and the pin area 40 and the pin lead-out area 60 are arranged on the base island area 20. Both sides and the pins extend out of the housing 10;
  • Figure 5 is a schematic structural diagram of the power device.
  • the pin area 40 and the pin lead-out area 60 extend out of the housing 10, so that the power device can be installed on the circuit board through pin welding. .
  • the housing 10 has a second surface away from the circuit board and a first surface close to the circuit board when the power device is installed on the circuit board. In other words, the power device is installed on the circuit board. At this time, relative to the circuit board, the housing 10 has a top part far away from the circuit board and a bottom part close to the circuit board.
  • the base island area 20 is disposed on the second surface of the housing 10, that is, the base island area 20 and the chip are disposed at the top of the housing 10, and the first surface of the housing 10 is in contact with the circuit board or The distance is very close, resulting in that the heat dissipation space on the first surface of the housing 10 is much smaller than the heat dissipation space on the second surface of the housing 10, and the air circulation on the second surface of the housing 10 is much greater than the air circulation on the first surface of the housing 10. , and there are usually other working components installed on the circuit board.
  • the circuit board will absorb the heat emitted by the other working components, causing the temperature on the surface of the circuit board to increase and thus affecting the heat dissipation effect at the bottom of the housing 10.
  • the heat dissipation effect of the first surface of the casing 10 is much lower than the heat dissipation effect of the second surface of the casing 10. Therefore, arranging the base island area 20 and the chip on the second surface of the casing 10 can effectively improve the heat dissipation effect of the power device. Improves the stability and safety of power devices.
  • the existing technical pain points are the high heat dissipation resistance of power IGBT, and the existing standard module and discrete device packaging and application solutions cannot well meet the requirements of users.
  • This application disposes the base island area 20 and the chip on the second surface of the housing 10, so that when the power device of the application is installed on the circuit board, the base island area 20 and the chip are located at the top of the housing 10, improving It improves the heat dissipation effect of the power device, meets the requirements for the heat dissipation and thermal resistance of the power device, and improves the long-term reliability of the power device.
  • this application can define its package shape and functional pins connected to the power device chip 30 according to the needs of the whole machine application. It is suitable for topologies such as power IGBT, rectifier bridge and braking unit with energy feedback function. It only needs to select the corresponding The power device chip 30 is installed on the base island area 20 , and corresponding functional pins are provided to connect with the power device chip 30 .
  • the pin electrodes of this application can be reflow soldered to the PCB board through SMT patches, and combined into different application topologies through PCB copper foil.
  • the topologies include but are not limited to power IGBT series topology, power IGBT parallel topology, braking topology, and rectifier H-bridge. , rectifier half-bridge, rectifier single tube, power IGBT single tube, power IGBT half-bridge and rectifier half-bridge and brake tube combination, etc., can be applied to motor drive systems with voltage levels of 220V, 380V, 440V, 480V, and 690V.
  • the application has a simple structure and low system integration cost, and can be used for automatic patching to improve the automatic assembly of plug-in discrete devices.
  • the housing 10 has a first surface and a second surface arranged oppositely, and the second surface is provided with an opening; wherein the first surface is the power
  • the device is mounted close to the surface of the circuit board when mounted on the circuit board;
  • the insulating layer is located in the opening, and has a third surface located in the housing and a fourth surface exposed through the opening, and the third surface is opposite to the fourth surface.
  • Figure 2 is a schematic diagram of the internal structure of the power device.
  • the power device chip 30 is installed on the base island area 20, and the pin area 40 and the pin lead-out area 60 are arranged on the base island area 20. Both sides and the pins extend out of the housing 10;
  • Figure 5 is a schematic structural diagram of the power device.
  • the pin area 40 and the pin lead-out area 60 extend out of the housing 10, so that the power device can be installed on the circuit board through pin welding. .
  • the housing 10 has a second surface away from the circuit board and a first surface close to the circuit board when the power device is installed on the circuit board. In other words, the power device is installed on the circuit board. At this time, relative to the circuit board, the housing 10 has a top part far away from the circuit board and a bottom part close to the circuit board.
  • the base island area 20 is disposed on the second surface of the housing 10, that is, the base island area 20 and the chip are disposed at the top of the housing 10, and the first surface of the housing 10 is in contact with the circuit board or The distance is very close, resulting in that the heat dissipation space on the first surface of the housing 10 is much smaller than the heat dissipation space on the second surface of the housing 10, and the air circulation on the second surface of the housing 10 is much greater than the air circulation on the first surface of the housing 10. , and there are usually other working components installed on the circuit board.
  • the circuit board will absorb the heat emitted by the other working components, causing the temperature on the surface of the circuit board to increase and thus affecting the heat dissipation effect at the bottom of the housing 10.
  • the heat dissipation effect of the first surface of the casing 10 is much lower than the heat dissipation effect of the second surface of the casing 10. Therefore, arranging the base island area 20 and the chip on the second surface of the casing 10 can effectively improve the heat dissipation effect of the power device. Improves the stability and safety of power devices.
  • a copper clad layer may be further provided on the fourth surface of the insulating layer.
  • the base island area 20 can be realized by using a double-layer structure substrate.
  • One layer is an alumina ceramic layer, that is, an insulating layer, and the other layer is a copper-clad layer provided on one side of the alumina ceramic layer, that is, the lead frame.
  • the base island area 20 is used to dispose the power device chip 30 to absorb the heat generated when the power device chip 30 is working, so as to quickly dissipate heat to the power device chip 30 .
  • the structure is simpler and the thickness of the base island region 20 is reduced, thereby reducing the overall volume and cost of the power device.
  • the base island area 20 can also be realized by using a three-layer structure substrate, one of which is an insulating layer, which can be made of insulating materials such as alumina ceramics. Copper-clad layers are provided on both sides of the insulating layer, and the third surface The copper clad layer is the base island area 20 of the lead frame, which is used to set the power device chip 30.
  • the base island area 20 can also be realized by directly selecting a DBC copper-clad ceramic board.
  • the DBC copper-clad ceramic board also has a three-layer structure, its insulating layer is a ceramic layer, and the surfaces on both sides are covered with copper. It can be understood that when a DBC copper-clad ceramic plate is selected as the base island area 20, there is no need to process and manufacture the base island area 20 by yourself.
  • the DBC copper-clad ceramic plate can be directly installed and set up as the base island area 20, which reduces the production process. process, reducing production costs and improving production efficiency.
  • the base island area 20 may include a first carrier area and a second carrier area, and the power device chips 30 are spaced apart from the first carrier area and the second carrier area.
  • the surface of the patch area close to one side of the housing is used to form a target power topology;
  • the pin area 40 may include a first pin area and a second pin area, the first pin area is electrically connected to the first carrier area, and the second pin area is electrically connected to the second carrier area. The area is electrically connected.
  • Figure 2 is a schematic structural diagram of an embodiment of a power device.
  • the base island area 20 in the figure is provided with two copper-clad carrier areas, and two power device chips 30 are provided on each copper-clad carrier area.
  • Each power device chip 30 is arranged on different copper-clad carrier areas, so that the heat generated by the power device chip 30 during operation can be dissipated through the corresponding pin area 40, thus avoiding the concentration of heat caused by multiple chips sharing one copper-clad carrier area. And affect the heat dissipation efficiency.
  • the target power topology includes: power IGBT series topology, power IGBT parallel topology, rectifier bridge and braking topology.
  • the power device chip 30 includes: IGBT chip, diode chip, reverse conduction chip, etc. It can be understood that it may also include other possible power device chips, such as a triode chip, etc. Specifically, It is determined according to the actual situation and is not limited in this application specification.
  • FIG. 2 is a schematic structural diagram of an embodiment of a power device.
  • One carrier area is provided with an IGBT chip and a diode chip connected in anti-parallel with the IGBT chip.
  • the other carrier area is provided with The area is provided with IGBT chips and diode chips arranged in series with the IGBT chips on the carrier area, and the IGBT chips and diode chips of the two carrier areas are electrically connected to the corresponding pin lead-out areas 60.
  • the corresponding circuit topology is as follows As shown in Figure 4.
  • Figure 6 is a schematic structural diagram of another embodiment of a power device.
  • two carrier areas are provided.
  • Two diode chips are provided on each carrier area, and the diode chips and corresponding pin lead-out areas 60 are arranged. Electrical connection, its corresponding circuit topology is shown in Figure 7.
  • Figure 8 is a schematic structural diagram of another embodiment of a power device. There are two carrier areas in the figure. Two diode chips are provided in the left carrier area, and a power tube chip is provided in the right carrier area. and diode chips. The power tube chip and the diode chip are electrically connected to the corresponding pin lead-out areas 60. The corresponding circuit topology is shown in Figure 9.
  • this application can define its package shape and functional pins connected to the power device chip 30 according to the needs of the whole machine application, which is suitable for topologies such as power IGBT, rectifier bridge and braking unit with energy feedback function. , it is only necessary to select a corresponding power device chip 30 and install it on the base island area 20 and set corresponding functional pins to connect with the power device chip 30 .
  • the pin electrodes of this application can be reflow soldered to the PCB board through SMT patches, and combined into different application topologies through PCB copper foil.
  • the topology includes but is not limited to rectifier H-bridge, rectifier half-bridge, rectifier single tube, power IGBT single tube,
  • the combination of power IGBT half-bridge, rectifier half-bridge and brake tube can be applied to motor drive systems with voltage levels of 220V, 380V, 440V, 480V and 690V.
  • the application has a simple structure and low system integration cost, and can be used for automatic patching to improve the automatic assembly of plug-in discrete devices.
  • the lead frame may further include a plurality of pin lead-out areas 60 connected to the base island area 20 , and the pin lead-out areas 60 are close to the base island area.
  • One end of 20 is bonded and connected to the power device chip 30 , and one end of the pin lead-out area 60 away from the base island area 20 is bent in a direction toward the housing 10 to form a Z-shape.
  • Figure 2 is a schematic structural diagram of an embodiment of a power device.
  • the lead frame also has a plurality of pin lead-out areas 60.
  • the multiple pin lead-out areas 60 are electrically connected to the corresponding power device chip 30 through conductive members 50. It is used to realize the electrical connection between the power device chip 30 and the external circuit.
  • the plurality of pin lead-out areas 60 may be arranged on the same side of the base island area 20 , or may be arranged separately on the peripheral side of the base island area 20 .
  • the pin lead-out area 60 is also bent along the direction of the housing 10 to form a Z-shape to form soldering feet for soldering, so that the user can solder the power device to the circuit board or other installation through the soldering feet.
  • the pin area and the base island area are integrally formed
  • the pin area is bonded and connected to the base island area through a conductive member.
  • FIG. 2 is a schematic structural diagram of an embodiment of a power device.
  • the base island area 20 and the pin area 40 are integrally formed.
  • the pin area 40 is electrically connected to the copper clad layer of the base island area 20 . It can be understood that the number of pin areas 40 can be set according to the actual situation, and the area of the electrode sheets in the pin area 40 can also be increased according to actual needs. The specific details can be determined according to the actual situation. The embodiments of the present application describe this Not limited.
  • the copper-clad layers of the pin area 40 and the base island area 20 can be integrally formed, thereby reducing the production process and eliminating the need for a metal copper sheet that electrically connects the base island area 20 and the pin area 40 or binding wires and other conductive parts 50, which reduces the overall cost of the power device and improves the heat dissipation efficiency of the power device.
  • FIG. 3 is a schematic structural diagram of an embodiment of a power device.
  • the base island region 20 in the figure has a three-layer structure, and the electrode sheet of the pin region 40 is connected to the base island region 20 through the conductive member 50
  • the conductive member 50 can be a metal copper sheet, a binding wire, etc., and the number of the conductive member 50 can also be multiple.
  • the pin area 40 can also be integrally formed with the base island area 20, thereby improving heat dissipation efficiency.
  • the number of the power device chips 30 may be multiple.
  • the plurality of power device chips 30 are spaced apart from the base island region 20 and away from the housing 10 . on one side of the surface.
  • FIG. 2 is a schematic structural diagram of an embodiment of a power device.
  • the number of power device chips 30 is four, and the four power device chips 30 are equidistantly arranged on the base island area 20. This arrangement ensures that there is a certain interval between the multiple power device chips 30, thereby making the base island.
  • the heat absorbed by the copper-clad layer in the area 20 will not be too concentrated, which is conducive to uniform heat dissipation in the base island area 20 and improves the heat dissipation efficiency of the power device.
  • one end of the welding leg away from the base island region is bent to form an L shape.
  • Figure 1 is a schematic structural diagram of an embodiment of a power device.
  • the pins are bent in the direction toward the housing 10 to form welding legs, and the end of the welding legs away from the base island area is bent to form an L shape.
  • the base island area 20 of the power device and the power device chip 30 are located on the side away from the circuit board, which can effectively improve the heat dissipation effect of the power device and improve Improve the stability and safety of power devices.
  • the power device includes a circuit board and the above-mentioned power device.
  • the specific structure of the power device refers to the above-mentioned embodiments. Since this power device adopts all the technical solutions of all the above-mentioned embodiments, it has at least All the beneficial effects brought by the technical solutions of the above embodiments will not be repeated here.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本申请公开一种功率器件及功率设备，该功率器件包括：壳体；引线框架，所述引线框架包括基岛区和引脚区，所述壳体与所述基岛区围合形成芯片容置空间，所述基岛区与所述引脚区电性连接，所述引脚区至少部分延伸出所述壳体，并沿朝向所述壳体的方向弯折形成焊接脚；至少两个功率器件芯片，设置于所述基岛区靠近所述壳体一侧的表面；绝缘层，所述绝缘层设置在所述引线框架背离所述壳体一侧的表面。

Description

功率器件及功率设备
本申请要求于2022年9月9日提交中国专利局、申请号为202222411601.4、发明名称为“功率器件及功率设备”的中国专利申请的优先权，其全部内容通过引用结合在申请中。
技术领域
本申请涉及功率器件技术领域，特别涉及一种功率器件及功率设备。
 背景技术
功率器件IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极型晶体管)是伺服和变频驱动系统的关键器件，对电机驱动成本和可靠性影响较重，尤其是中功率机型。
 技术问题
目前功率驱动系统一般采用分立器件插件封装，分立器件优点是器件成本低，灵活度高，工艺路线简单，但是由于功率驱动系统的电路拓扑中涉及的器件较多，因此采用分立器件的方案生产工艺复杂，且插件分立器件的自动化装配成本高，容易产生装配误差，从而使得综合成本较高。
 技术解决方案
本申请的主要目的是提出一种功率器件，旨在解决现有的器件封装的技术痛点问题。
为实现上述目的，本申请提出的功率器件，包括：
壳体；
引线框架，所述引线框架包括基岛区和引脚区，所述壳体与所述基岛区围合形成芯片容置空间，所述基岛区与所述引脚区电性连接，所述引脚区至少部分延伸出所述壳体，并沿朝向所述壳体的方向弯折形成焊接脚；
至少两个功率器件芯片，设置于所述基岛区靠近所述壳体一侧的表面；
绝缘层，所述绝缘层设置在所述引线框架背离所述壳体一侧的表面。
在一实施例中，所述壳体具有相对设置的第一表面及第二表面，所述第二表面设有开口；其中，所述第一表面为所述功率器件安装于电路板上时靠近所述电路板的表面；
所述绝缘层位于所述开口内，所述绝缘层具有位于所述壳体内的第三表面和通过所述开口外露的第四表面，所述第三表面与所述第四表面相对。
在一实施例中，所述绝缘层的第四表面上还设有覆铜层。
在一实施例中，所述基岛区包括第一载片区和第二载片区，所述功率器件芯片间隔设置于所述第一载片区和第二载片区靠近所述壳体一侧的表面，用于形成目标功率拓扑；
所述引脚区包括第一引脚区和第二引脚区，所述第一引脚区与所述第一载片区电连接，所述第二引脚区与所述第二载片区电连接。
在一实施例中，所述目标功率拓扑包括：功率IGBT串联拓扑、功率IGBT并联拓扑、整流桥和制动拓扑。
在一实施例中，所述引线框架还包括与所述基岛区相连的多个管脚引出区，所述管脚引出区靠近所述基岛区的一端与所述功率器件芯片键合连接，所述管脚引出区远离所述基岛区的一端沿朝向所述壳体的方向弯折形成Z字形。
在一实施例中，所述引脚区与所述基岛区一体成型设置；
或者，所述引脚区通过导电件与所述基岛区电连接。
在一实施例中，所述引脚区及基岛区的数量为多个，每一所述引脚区与一所述基岛区键合连接。
在一实施例中，所述焊接脚远离所述基岛区的一端弯折形成L形。
在一实施例中，所述功率器件芯片包括：IGBT芯片、二极管芯片、逆导芯片。
本申请还提出一种功率设备，所述功率设备包括上述的功率器件。
 有益效果
本申请技术方案通过将基岛区与功率器件芯片设置在壳体的第二表面上，使得本申请的功率器件被安装在电路板上时，基岛区与功率器件芯片设置在壳体远离电路板的一侧，提高了功率器件的散热效果，满足了对功率器件的散热热阻的要求，提高了功率器件的长期可靠性，解决了现有的器件封装的散热效果较差的问题。此外，本申请的结构简单、系统综合成本低，可用于自动化贴片而改善插件分立器件的自动化装配问题。
 附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图示出的结构获得其他的附图。
图1为本申请功率器件一实施例的截面结构示意图；
图2为本申请功率器件一实施例的结构示意图；
图3为本申请功率器件另一实施例的结构示意图；
图4为本申请功率器件一实施例的等效电路结构示意图；
图5为本申请功率器件一实施例封装后的结构示意图；
图6为本申请功率器件又一实施例的结构示意图；
图7为本申请功率器件又一实施例的等效电路结构示意图；
图8为本申请功率器件再一实施例的结构示意图；
图9为本申请功率器件再一实施例的等效电路结构示意图。
附图标号说明：
标号 名称 标号 名称
10 壳体 40 引脚区
20 基岛区 50 导电件
30 功率器件芯片 60 管脚引出区
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
需要说明，若本申请实施例中有涉及方向性指示（诸如上、下、左、右、前、后……），则该方向性指示仅用于解释在某一特定姿态（如附图所示）下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
另外，若本申请实施例中有涉及“第一”、“第二”等的描述，则该“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
本申请提出一种功率器件。
为解决现有的标准模块和分立器件封装及工业变频和伺服领域应用方案在自动化生产、热设计、成本和整机结构工艺的更高诉求。
参照图1至图3，在一实施例中，所述功率器件包括：
壳体10；
引线框架，所述引线框架包括基岛区20和引脚区40，所述壳体10与所述基岛区围合形成芯片容置空间，所述基岛区20与所述引脚区40电性连接，所述引脚区40至少部分延伸出所述壳体，并沿朝向所述壳体的方向弯折形成焊接脚；
至少两个功率器件芯片30，设置于所述基岛区20靠近所述壳体10一侧的表面；
绝缘层，所述绝缘层设置在所述引线框架背离所述壳体一侧的表面。
在本实施例中，安装基板可以选用DBC覆铜陶瓷基板、AMB基板等来实现，也可以通过设置包括绝缘层及引线框架的双层结构来实现，当功率器件芯片30设置于基岛区20上时，功率芯片所产生的热量通过基岛区20、绝缘层和外部的散热介质快速将热量散发出去。引脚区40可以通过金属铜片、绑定线等导电件50与基岛区20电气连接，引脚区40用于与外部电气连接。引脚区40还可以与基岛区20一体成型设置，通过该种一体成型设置方式，无需额外设置导电件50即可实现引脚区40与基岛区20的电气连接。
参照图2及图5，如图所示，图2为功率器件内部结构示意图，功率器件芯片30安装于基岛区20上，引脚区40及管脚引出区60设置在基岛区20的两侧且引脚伸出壳体10设置；图5为功率器件的结构示意图，引脚区40及管脚引出区60伸出壳体10，使得功率器件能够通过引脚焊接设置于电路板上。
参照图1，壳体10具有在功率器件被安装于电路板上时，远离电路板的第二表面及靠近电路板的第一表面，换而言之，也即功率器件被安装在电路板上时，相对于电路板，壳体10具有远离电路板的顶部和靠近电路板的底部。
在本实施例中，基岛区20设置于壳体10的第二表面上，也即基岛区20与芯片设置在壳体10的顶部位置，壳体10的第一表面与电路板接触或距离很近，导致壳体10第一表面的散热空间远小于壳体10第二表面的散热空间，且壳体10第二表面的空气流通性要远大于壳体10第一表面的空气流通性，并且电路板上通常还安装有其他的工作元器件，电路板会吸收其他工作元器件散发的热量从而导致电路板表面的温度升高进而影响壳体10底部的散热效果，换而言之，壳体10第一表面的散热效果远低于壳体10第二表面的散热效果，因此，将基岛区20与芯片设置在壳体10的第二表面，能够有效提高功率器件的散热效果，提高了功率器件的稳定性和安全性。
现有的技术痛点为功率IGBT的散热热阻较高，以及现有的标准模块和分立器件封装及应用方案不能很好地达到用户所需的要求。本申请通过将基岛区20与芯片设置在壳体10的第二表面上，使得本申请的功率器件被安装在电路板上时，基岛区20与芯片位于壳体10的顶部位置，提高了功率器件的散热效果，满足了对功率器件的散热热阻的要求，提高了功率器件的长期可靠性。
此外，本申请能够根据整机应用的需求定义其封装外形及与功率器件芯片30连接的功能管脚，适用于功率IGBT、整流桥和能量回馈功能的制动单元等拓扑，仅需要选用对应的功率器件芯片30安装于基岛区20上，并设置对应的功能管脚与功率器件芯片30连接。
本申请的管脚电极可以通过SMT贴片回流焊至PCB板材，通过PCB铜箔组合成不同的应用拓扑，拓扑包含而不限于功率IGBT串联拓扑、功率IGBT并联拓扑、制动拓扑、整流H桥、整流半桥、整流单管、功率IGBT单管、功率IGBT半桥和整流半桥和制动管的组合等，可适用于220V、380V、440V、480V、690V电压等级的电机驱动系统。同时，本申请的结构简单、系统综合成本低，可用于自动化贴片而改善插件分立器件的自动化装配问题。
参照图1至图3，在一实施例中，所述壳体10具有相对设置的第一表面及第二表面，所述第二表面设有开口；其中，所述第一表面为所述功率器件安装于电路板上时靠近所述电路板的表面；
所述绝缘层位于所述开口内，所述绝缘层具有位于所述壳体内的第三表面和通过所述开口外露的第四表面，所述第三表面与所述第四表面相对。
参照图2及图5，如图所示，图2为功率器件内部结构示意图，功率器件芯片30安装于基岛区20上，引脚区40及管脚引出区60设置在基岛区20的两侧且引脚伸出壳体10设置；图5为功率器件的结构示意图，引脚区40及管脚引出区60伸出壳体10，使得功率器件能够通过引脚焊接设置于电路板上。
参照图1，壳体10具有在功率器件被安装于电路板上时，远离电路板的第二表面及靠近电路板的第一表面，换而言之，也即功率器件被安装在电路板上时，相对于电路板，壳体10具有远离电路板的顶部和靠近电路板的底部。
在本实施例中，基岛区20设置于壳体10的第二表面上，也即基岛区20与芯片设置在壳体10的顶部位置，壳体10的第一表面与电路板接触或距离很近，导致壳体10第一表面的散热空间远小于壳体10第二表面的散热空间，且壳体10第二表面的空气流通性要远大于壳体10第一表面的空气流通性，并且电路板上通常还安装有其他的工作元器件，电路板会吸收其他工作元器件散发的热量从而导致电路板表面的温度升高进而影响壳体10底部的散热效果，换而言之，壳体10第一表面的散热效果远低于壳体10第二表面的散热效果，因此，将基岛区20与芯片设置在壳体10的第二表面，能够有效提高功率器件的散热效果，提高了功率器件的稳定性和安全性。
参照图1至图3，在一实施例中，所述绝缘层的第四表面上还可以设有覆铜层。
基岛区20可以选用双层结构的基板来实现，其中一层为氧化铝陶瓷层，即绝缘层，另一层为设置在氧化铝陶瓷层一侧表面的覆铜层，也即引线框架的基岛区20，基岛区20用于设置功率器件芯片30，以吸收功率器件芯片30工作时所产生的热量，以对功率器件芯片30进行快速散热。本申请通过选用双层结构的基岛区20，结构更加简单，且减少了基岛区20的厚度，从而降低了功率器件的整体体积和成本。
基岛区20还可以选用三层结构的基板来实现，其中一层为绝缘层，可以选用氧化铝陶瓷等绝缘材料制成，在绝缘层的两侧表面均设有覆铜层，第三表面的覆铜层为引线框架的基岛区20，用于设置功率器件芯片30。
基岛区20还可以直接选用DBC覆铜陶瓷板来实现，DBC覆铜陶瓷板也为三层结构，其绝缘层为陶瓷层，且两侧表面均设有覆铜。可以理解的是，选用DBC覆铜陶瓷板作为基岛区20时，无需自行加工制造基岛区20，可直接将DBC覆铜陶瓷板作为基岛区20进行安装设置，减少了生产时的工艺流程，降低了生产成本，提高了生产效率。
参照图1至图3，在一实施例中，所述基岛区20可以包括第一载片区和第二载片区，所述功率器件芯片30间隔设置于所述第一载片区和第二载片区靠近所述壳体一侧的表面，用于形成目标功率拓扑；
所述引脚区40可以包括第一引脚区和第二引脚区，所述第一引脚区与所述第一载片区电连接，所述第二引脚区与所述第二载片区电连接。
参照图2，图2为功率器件一实施例的结构示意图，图中的基岛区20设有两个覆铜载片区，每一覆铜载片区上设有两个功率器件芯片30，将多个功率器件芯片30分设在不同的覆铜载片区上，使得功率器件芯片30工作时产生的热量能够通过对应的引脚区40散发出去，避免了多个芯片共用一个覆铜载片区导致热量集中而影响散热效率。
在一实施例中，所述目标功率拓扑包括：功率IGBT串联拓扑、功率IGBT并联拓扑、整流桥和制动拓扑。
在一实施例中，所述功率器件芯片30包括：IGBT芯片、二极管芯片、逆导芯片等，当然可以理解的是，还可以包含其它可能的功率器件芯片，例如：三极管芯片等，具体的可以根据实际情况确定，本申请说明书中对此不作限定。
可以理解的是，功率器件芯片30的数量及类型可以根据实际的应用需求设置为多个，以形成对应的功能拓扑。例如，参照图2，图2为功率器件一实施例的结构示意图，图中的设有两个载片区，一载片区上设有一个IGBT芯片及与IGBT芯片反并联的二极管芯片，另一载片区上设有与该载片区上的IGBT芯片串联设置的IGBT芯片及二极管芯片，并将两个载片区的IGBT芯片及二极管芯片与对应的管脚引出区60电连接，其对应的电路拓扑如图4所示。
参照图6，图6为功率器件另一实施例的结构示意图，图中设有两个载片区，每一载片区上设有两个二极管芯片，并将二极管芯片与对应的管脚引出区60电连接，其对应的电路拓扑如图7所示。
参照图8，图8为功率器件又一实施例的结构示意图，图中设有两个载片区，其中左侧载片区上设有两个二极管芯片，右侧载片区上设有一个功率管芯片及二极管芯片，将功率管芯片及二极管芯片与对应的管脚引出区60电连接，其对应的电路拓扑如图9所示。
除上述举例说明的例子外，本申请可以根据整机应用的需求定义其封装外形及与功率器件芯片30连接的功能管脚，适用于功率IGBT、整流桥和能量回馈功能的制动单元等拓扑，仅需要选用对应的功率器件芯片30安装于基岛区20上，并设置对应的功能管脚与功率器件芯片30连接即可。
本申请的管脚电极可以通过SMT贴片回流焊至PCB板材，通过PCB铜箔组合成不同的应用拓扑，拓扑包含而不限于整流H桥，整流半桥、整流单管，功率IGBT单管、功率IGBT半桥和整流半桥和制动管的组合等，可适用于220V、380V、440V、480V、690V电压等级的电机驱动系统。同时，本申请的结构简单、系统综合成本低，可用于自动化贴片而改善插件分立器件的自动化装配问题。
参照图1至图3，在一实施例中，所述引线框架还可以包括与所述基岛区20相连的多个管脚引出区60，所述管脚引出区60靠近所述基岛区20的一端与所述功率器件芯片30键合连接，所述管脚引出区60远离所述基岛区20的一端沿朝向所述壳体10的方向弯折形成Z字形。
参照图2，图2为功率器件一实施例的结构示意图，引线框架中还具有多个管脚引出区60，多个管脚引出区60通过导电件50与对应的功率器件芯片30电连接，用于实现功率器件芯片30与外部电路的电连接。多个管脚引出区60可以均设置于基岛区20的同一侧，也可以分设于基岛区20的周侧。管脚引出区60还沿壳体10的方向弯折形成Z字形，以形成用于焊接的焊接脚，使得用户能够通过焊接脚将功率器件焊接在电路板或其他安装物上。
参照图1至图3，在一实施例中，所述引脚区与所述基岛区一体成型设置；
或者，所述引脚区通过导电件与所述基岛区键合连接。
参照图2，图2为功率器件一实施例的结构示意图，图中的基岛区20与引脚区40是一体成型，引脚区40与所述基岛区20的覆铜层电气连接。可以理解的是，引脚区40可以根据实际情况设置为多个，也可以根据实际需求将引脚区40电极片的面积增大，具体的可以根据实际情况确定，本申请说明书实施例对此不作限定。
本实施例可以将引脚区40与基岛区20的覆铜层一体成型设置，从而能够减少生产时的工艺流程，同时省去了基岛区20与引脚区40电连接的金属铜片或绑定线等导电件50，降低了功率器件的整体成本，提高了功率器件的散热效率。
参照图3，图3为功率器件一实施例的结构示意图，在一实施例中，图中的基岛区20为三层结构，引脚区40的电极片通过导电件50与基岛区20电连接，导电件50可以为金属铜片、绑定线等，导电件50的数量也可以为多个。当基岛区20为三层结构时，引脚区40也可以与基岛区20一体成型设置，进而提高散热效率。
参照图1至图3，在一实施例中，所述功率器件芯片30的数量为可以多个，多个所述功率器件芯片30间隔设置于所述基岛区20远离所述壳体10第一侧的一侧表面上。
可以理解的是，功率器件芯片30的具体数量可以根据实际的应用需求设置为多个，以形成对应的功能拓扑，例如，参照图2，图2为功率器件一实施例的结构示意图，图中功率器件芯片30的数量为四个，且四个功率器件芯片30等距间隔设置于基岛区20上，如此设置，使得多个功率器件芯片30之间均有一定的间隔，从而使得基岛区20覆铜层上吸收的热量不会过于集中，有利于基岛区20进行均匀地散热，提高了功率器件的散热效率。
参照图1至图3，在一实施例中，所述焊接脚远离所述基岛区的一端弯折形成L形。
参照图1，图1为功率器件一实施例的结构示意图，图中引脚沿朝向壳体10的方向弯折形成焊接脚，且焊接脚远离基岛区的一端弯折形成L形，如此，当用户通过焊接脚将功率器件焊接在电路板或其他安装物上时，功率器件的基岛区20及功率器件芯片30则处于远离电路板的一侧，能够有效提高功率器件的散热效果，提高了功率器件的稳定性和安全性。
本申请还提出一种功率设备，该功率设备包括电路板及上述的功率器件，该功率器件的具体结构参照上述实施例，由于本功率设备采用了上述所有实施例的全部技术方案，因此至少具有上述实施例的技术方案所带来的所有有益效果，在此不再一一赘述。
以上所述仅为本申请的优选实施例，并非因此限制本申请的专利范围，凡是在本申请的发明构思下，利用本申请说明书及附图内容所作的等效结构变换，或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (10)

  1. 一种功率器件，其中，所述功率器件包括：
    壳体；
    引线框架，所述引线框架包括基岛区和引脚区，所述壳体与所述基岛区围合形成芯片容置空间，所述基岛区与所述引脚区电性连接，所述引脚区至少部分延伸出所述壳体，并沿朝向所述壳体的方向弯折形成焊接脚；
    至少两个功率器件芯片，设置于所述基岛区靠近所述壳体一侧的表面；
    绝缘层，所述绝缘层设置在所述引线框架背离所述壳体一侧的表面。
  2. 如权利要求1所述的功率器件，其中，所述壳体具有相对设置的第一表面及第二表面，所述第二表面设有开口；其中，所述第一表面为所述功率器件安装于电路板上时靠近所述电路板的表面；
    所述绝缘层位于所述开口内，所述绝缘层具有位于所述壳体内的第三表面和通过所述开口外露的第四表面，所述第三表面与所述第四表面相对。
  3. 如权利要求2所述的功率器件，其中，所述绝缘层的第四表面上还设有覆铜层。
  4. 如权利要求1所述的功率器件，其中，所述基岛区包括第一载片区和第二载片区，所述功率器件芯片间隔设置于所述第一载片区和第二载片区靠近所述壳体一侧的表面，用于形成目标功率拓扑；
    所述引脚区包括第一引脚区和第二引脚区，所述第一引脚区与所述第一载片区电连接，所述第二引脚区与所述第二载片区电连接。
  5. 如权利要求4所述的功率器件，其中，所述目标功率拓扑包括：功率IGBT串联拓扑、功率IGBT并联拓扑、整流桥和制动拓扑。
  6. 如权利要求1所述的功率器件，其中，所述引线框架还包括与所述基岛区相连的多个管脚引出区，所述管脚引出区靠近所述基岛区的一端与所述功率器件芯片键合连接，所述管脚引出区远离所述基岛区的一端沿朝向所述壳体的方向弯折形成Z字形。
  7. 如权利要求1所述的功率器件，其中，所述引脚区与所述基岛区一体成型设置；
    或者，所述引脚区通过导电件与所述基岛区键合连接。
  8. 如权利要求1所述的功率器件，其中，所述焊接脚远离所述基岛区的一端弯折形成L形。
  9. 如权利要求1所述的功率器件，其中，所述功率器件芯片包括：IGBT芯片、二极管芯片、逆导芯片。
  10. 一种功率设备，其中，所述功率设备包括电路板及如权利要求1-9任意一项所述的功率器件。
PCT/CN2023/098425 2022-09-09 2023-06-05 功率器件及功率设备 WO2024051228A1 (zh)

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