CN114823644A - 一种低寄生电感和高散热效率的埋入式功率模块封装结构 - Google Patents

一种低寄生电感和高散热效率的埋入式功率模块封装结构 Download PDF

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CN114823644A
CN114823644A CN202210221535.6A CN202210221535A CN114823644A CN 114823644 A CN114823644 A CN 114823644A CN 202210221535 A CN202210221535 A CN 202210221535A CN 114823644 A CN114823644 A CN 114823644A
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metal pattern
pattern layer
power module
metal
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孙欣楠
陈敏
李博栋
汪小青
张东博
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Zhejiang University ZJU
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Abstract

本发明涉及功率半导体器件封装技术领域，旨在提供一种低寄生电感和高散热效率的埋入式功率模块封装结构。包括由上至下依次布置的顶部绝缘层、顶部金属图案层、焊料层、器件层、底部金属图案层和底部绝缘层；器件层包括至少两个MOSFET功率芯片和若干个金属连接块，并以绝缘填料填充于MOSFET功率芯片和金属连接块之间，使其相互隔离；功率芯片的漏极通过焊料层与顶部金属图案层相接，其源极和栅极分别与底部金属图案层电连接；金属连接块的上下表面分别与顶部金属图案层和底部金属图案层电连接。本发明通过将功率芯片嵌入于绝缘材料内，降低了功率模块的封装体积和重量，提升了模块的功率密度。无需使用键合线和电极引线，有效减小了功率模块的寄生电感。

Description

一种低寄生电感和高散热效率的埋入式功率模块封装结构
技术领域
本发明涉及功率半导体器件封装技术领域，更具体地，涉及一种低寄生电感和高散热效率的埋入式功率模块封装结构。
背景技术
高效和高质量的电能变换是电力电子技术发展的目标，因此要求功率模块向小型轻量、高效率、大功率的方向发展。新一代以碳化硅为代表的宽禁带半导体器件在该发展趋势下展现出开关速度快、热导率高等优越性能，有助于其高频、高温应用，对大幅度提高变换器的功率密度起到非常大的作用。
基于基板和键合线的典型封装结构被用于目前生产中的绝大多数功率模块(如图1所示)。其工作原理是：芯片底部通过焊料连接到覆铜陶瓷基板(DBC)，顶部通过键合线连接至DBC，键合线和DBC的上部铜轨实现电气互连，DBC实现电气绝缘和热管理。在该封装结构中，键合线具有较大的寄生电感，且功率器件产生的热量仅能通过封装底部排出。功率器件的高频化应用使其对寄生参数更加敏感，在相同的寄生电感下会产生更加严重的过电压、寄生振荡以及EMI等问题；功率等级的提高也使得器件工作时产生较高的热量，在单一的散热路径下热量无法及时排出，则会影响功率模块整体的可靠性。因此，传统封装方式已无法满足功率模块高频、高温应用的需求。为解决上述问题，本领域技术人员陆续提出有DBC+PCB混合封装、三维封装、芯片正面平面互连封装等技术，但这些封装工艺均存在结构复杂、成本高等问题，因此难以在实际生产中推广应用。
鉴于封装工艺已成为功率模块向高频、高温发展的瓶颈问题，因而需要开发新的低寄生电感和高效冷却的解决方案，以推动功率模块的发展。
发明内容
本发明要解决的技术问题是，克服现有技术中的不足，提供一种低寄生电感和高散热效率的埋入式功率模块封装结构。
为解决技术问题，本发明的解决方案是：
提供一种低寄生电感和高散热效率的埋入式功率模块封装结构，包括由上至下依次布置的顶部绝缘层、顶部金属图案层、焊料层、器件层、底部金属图案层和底部绝缘层；顶部绝缘层和底部绝缘层均具有局部开口，顶部金属图案层和底部金属图案层在开口位置露出的部分分别作为顶部电极端子和底部电极端子；
所述器件层包括至少两个MOSFET功率芯片和若干个金属连接块，并以绝缘填料填充于MOSFET功率芯片和金属连接块之间，使其相互隔离；
所述MOSFET功率芯片的漏极通过焊料层与顶部金属图案层相接，其源极和栅极分别与底部金属图案层电连接；所述金属连接块的上下表面分别与顶部金属图案层和底部金属图案层电连接。
作为本发明的优选方案，所述绝缘填料还延伸填充于MOSFET功率芯片与底部金属图案层之间，在两者之间的绝缘填料中设盲孔，盲孔内壁具有金属镀层；所述源极和栅极分别通过金属镀层与底部金属图案层电连接。
作为本发明的优选方案，所述绝缘填料还延伸填充于金属连接块与底部金属图案层之间，在两者之间的绝缘填料中设盲孔；盲孔内壁具有金属镀层，金属连接块通过金属镀层与底部金属图案层电连接。
作为本发明的优选方案，所述金属连接块的上表面通过焊料层与顶部金属图案层连接。
作为本发明的优选方案，所述金属连接块与MOSFET功率芯片的高度相等。
作为本发明的优选方案，所述绝缘填料还延伸填充至顶部金属图案层的空缺部位，且与顶部绝缘层的下表面相接；或者，所述绝缘填料还延伸填充至底部金属图案层的空缺部位，且与底部绝缘层的上表面相接。
作为本发明的优选方案，所述顶部绝缘层还向下延伸填充至顶部金属图案层的空缺部位，且与器件层中的绝缘填料相接；或者，所述底部绝缘层还向上延伸填充至顶部金属图案层的空缺部位，且与器件层中的绝缘填料相接。
作为本发明的优选方案，所述埋入式功率模块封装结构的整体呈多层板状结构。
作为本发明的优选方案，所述顶部电极端子和底部电极端子分别有多个。
与现有技术相比，本发明有以下有益效果：
1、本发明通过将功率芯片嵌入于绝缘材料内，降低了功率模块的封装体积和重量，提升了模块的功率密度。
2、本发明无需使用键合线和电极引线，有效减小了功率模块的寄生电感。
3、本发明采用芯片面朝下的放置方式，进一步减小了栅极和源极寄生电感，有效提升了功率器件的开关速度，降低了驱动信号干扰。
4、本发明具有双面电极端子，可为功率模块进一步集成去耦电容等元器件，从而进一步提升功率模块的性能，具有较强的灵活性。
5、本发明中，金属连接块结构增强了模块的电流承载能力，避免过流温升；双面金属图案层的设计使得功率模块可以实现双面散热，提升了功率模块的散热效率。
6、基于上述优点，本发明适合功率模块在大功率密度，高频和高温工作环境下的应用。
附图说明
图1为现有技术中基于基板和键合线的典型封装结构。
图2为根据本发明实施例绘制的低寄生电感和高效热管理的埋入式功率模块封装结构示意图。
图1中的附图标记说明：1-1封装材料；1-2功率芯片；1-3键合线；1-4覆铜陶瓷基板(DBC)；1-5散热基板；1-6DBC焊料；1-7焊料。
图2中的附图标记说明：1功率模块；2MOSFET功率芯片；201源极；202栅极；203漏极；3金属连接块；301金属连接块上表面；302金属连接块下表面；4顶部金属图案层；5底部金属图案层；6焊料层；7盲孔；8器件层；9顶部绝缘层；10底部绝缘层；11顶部电极端子；12底部电极端子。
具体实施方式
下面结合附图对本发明的具体实施方式作进一步详细说明。为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。具体实施例是对本发明进行进一步描述，但本发明的保护范围并不仅限于此。
如图2所示，本发明的埋入式功率模块封装结构包括：由上至下依次布置的顶部绝缘层9、顶部金属图案层4、焊料层6、器件层8、底部金属图案层5和底部绝缘层10，因此该功率模块从整体呈现为多层板状结构。其中，顶部绝缘层9和底部绝缘层10均具有局部开口。顶部金属图案层4和底部金属图案层5在开口位置露出的部分，分别作为顶部电极端子11和底部电极端子12。
器件层8包括至少两个MOSFET功率芯片2和若干个金属连接块3，并以绝缘填料填充于MOSFET功率芯片2和金属连接块3之间，使其相互隔离；其中，MOSFET功率芯片2的漏极203通过焊料层6与顶部金属图案层4相接，其源极201和栅极202分别与底部金属图案层5电相接；所述金属连接块3的上下表面分别与顶部金属图案层4和底部金属图案层5电连接。绝缘填料还延伸填充于MOSFET功率芯片2与底部金属图案层5之间，在两者之间的绝缘填料中设盲孔，盲孔内壁具有金属镀层，源极201和栅极202分别通过金属镀层与底部金属图案层5电连接。类似地，绝缘填料还延伸填充于金属连接块3与底部金属图案层5之间，在两者之间的绝缘填料中设盲孔；盲孔内壁具有金属镀层，金属连接块3通过金属镀层与底部金属图案层5电连接。金属连接块3的上表面通过焊料层6与顶部金属图案层4连接。金属连接块3可选地与MOSFET功率芯片2的高度相等，因此两者下方的盲孔也具有相等的高度。
可选地，绝缘填料还延伸填充至顶部金属图案层4的空缺部位，且与顶部绝缘层9的下表面相接(如图2所示)；或者，所述绝缘填料还延伸填充至底部金属图案层5的空缺部位，且与底部绝缘层10的上表面相接(图中未示出)。可选地，顶部绝缘层9还向下延伸填充至顶部金属图案层4的空缺部位，且与器件层8中的绝缘填料相接(图中未示出)；或者，所述底部绝缘层10还向上延伸填充至顶部金属图案层4的空缺部位，且与器件层8中的绝缘填料相接(如图2所示)。
本发明中，MOSFET功率芯片2的正面向下设源极201和栅极202，背面向上设漏极203；作为现有技术，可选的示例产品的有CREE的CPM2-1200-0080B等。多个MOSFET功率芯片2可构成不同的电气连接关系，以实现相应的功率模块功能。MOSFET功率芯片2的正面向下，可缩短芯片源极201和栅极202到模块下表面的端子及电路板之间的距离，从而起到降低栅极回路寄生电感的作用。具体地，所述MOSFET功率芯片2可以为硅基或碳化硅基，也可以是IGBT等其他功率芯片。
顶部金属图案层4和底部金属图案层5是指图案化的金属层，用于实现电气连接；具体图案则根据模块功能和芯片连接方式确定，图2中的示例是两个芯片串联组成的半桥结构。
金属连接块3用于实现顶部金属图案层4和底部金属图案层5之间的电气连接，具体设置方式取决于功率模块功能，可以根据不同的功能进行灵活改变。例如图2中右侧“单独设置”的金属连接块3的作用是将模块右侧下表面的电极引到顶面的端子上，以集成去耦电容等元器件。在与金属图案层连接时，金属连接块3的上表面和下表面分别采用焊料层和灌注在盲孔中的金属镀层连接，这种连接方式与实现工艺有关。
顶部电极端子11和底部电极端子12可以分别有多个，具体的数量和位置根据功率模块的功能和需求进行确定，本发明不做限制。图2中是以两个MOSFET串联组成的半桥模块为例，底部设置了半桥结构的五个电极端子，顶部设置了两个电极端子以连接吸收电容。在实际生产中，端子具体位置由金属图案层设计方案来确定。作为应用示例，所述底部电极端子12可用于连接电路板，顶部电极端子11可连接去耦电容等元器件。
本发明中埋入式功率模块封装结构的制作流程的示例性说明：
1、在载体上制作顶部金属图案层；
2、焊接芯片和金属连接块；
3、层压塑封材料和底部金属图案层；
4、钻孔、盲孔金属化；
5、去除载体，加工顶部和底部绝缘层，端子表面处理。
综上，本发明应用微过孔、电镀等PCB工艺，通过无键合线、无电极引线，双面散热的芯片埋入式设计，实现低寄生电感和高散热效率的封装结构，同时具有成本低、灵活性高、易开发等优点。基于埋入式封装的功率模块具有体积小、重量轻、无键合线、双面散热等优点，是一种具有很大发展潜力的解决方案。

Claims (9)

1.一种低寄生电感和高散热效率的埋入式功率模块封装结构，其特征在于：包括由上至下依次布置的顶部绝缘层(9)、顶部金属图案层(4)、焊料层(6)、器件层(8)、底部金属图案层(5)和底部绝缘层(10)；顶部绝缘层(9)和底部绝缘层(10)均具有局部开口，顶部金属图案层(4)和底部金属图案层(5)在开口位置露出的部分分别作为顶部电极端子(11)和底部电极端子(12)；
所述器件层(8)包括至少两个MOSFET功率芯片(2)和若干个金属连接块(3)，并以绝缘填料填充于MOSFET功率芯片(2)和金属连接块(3)之间，使其相互隔离；
所述MOSFET功率芯片(2)的漏极(203)通过焊料层(6)与顶部金属图案层(4)相接，其源极(201)和栅极(202)分别与底部金属图案层(5)电连接；所述金属连接块(3)的上下表面分别与顶部金属图案层(4)和底部金属图案层(5)电连接。
2.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述绝缘填料还延伸填充于MOSFET功率芯片(2)与底部金属图案层(5)之间，在两者之间的绝缘填料中设盲孔；盲孔内壁具有金属镀层，所述源极(201)和栅极(202)分别通过金属镀层与底部金属图案层(5)电连接。
3.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述绝缘填料还延伸填充于金属连接块(3)与底部金属图案层(5)之间，在两者之间的绝缘填料中设盲孔；盲孔内壁具有金属镀层，金属连接块(3)通过金属镀层与底部金属图案层(5)电连接。
4.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述金属连接块(3)的上表面通过焊料层(6)与顶部金属图案层(4)连接。
5.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述金属连接块(3)与MOSFET功率芯片(2)的高度相等。
6.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述绝缘填料还延伸填充至顶部金属图案层(4)的空缺部位，且与顶部绝缘层(9)的下表面相接；或者，所述绝缘填料还延伸填充至底部金属图案层(5)的空缺部位，且与底部绝缘层(10)的上表面相接。
7.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述顶部绝缘层(9)还向下延伸填充至顶部金属图案层(4)的空缺部位，且与器件层(8)中的绝缘填料相接；或者，所述底部绝缘层(10)还向上延伸填充至顶部金属图案层(4)的空缺部位，且与器件层(8)中的绝缘填料相接。
8.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述埋入式功率模块封装结构的整体呈多层板状结构。
9.根据权利要求1所述的埋入式功率模块封装结构，其特征在于，所述顶部电极端子(11)和底部电极端子(12)分别有多个。
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