Classifications

• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
  • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
  • C23C14/08—Oxides
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D30/00—Field-effect transistors [FET]
  • H10D30/01—Manufacture or treatment
  • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D30/00—Field-effect transistors [FET]
  • H10D30/60—Insulated-gate field-effect transistors [IGFET]
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D30/00—Field-effect transistors [FET]
  • H10D30/60—Insulated-gate field-effect transistors [IGFET]
  • H10D30/67—Thin-film transistors [TFT]
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
  • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
  • H10D84/01—Manufacture or treatment
  • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
  • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
  • H10D84/01—Manufacture or treatment
  • H10D84/02—Manufacture or treatment characterised by using material-based technologies
  • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
  • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
  • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
  • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
  • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N30/00—Piezoelectric or electrostrictive devices
  • H10N30/01—Manufacture or treatment
  • H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
  • H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
  • H10N30/076—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing by vapour phase deposition
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N30/00—Piezoelectric or electrostrictive devices
  • H10N30/01—Manufacture or treatment
  • H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
  • H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
  • H10N30/079—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing using intermediate layers, e.g. for growth control
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N30/00—Piezoelectric or electrostrictive devices
  • H10N30/80—Constructional details
  • H10N30/85—Piezoelectric or electrostrictive active materials
  • H10N30/853—Ceramic compositions
• • H—ELECTRICITY
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  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N30/00—Piezoelectric or electrostrictive devices
  • H10N30/80—Constructional details
  • H10N30/88—Mounts; Supports; Enclosures; Casings
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials

Definitions

• the present invention relates to crystals, laminated structures, elements, electronic devices, electronic equipment, and systems.
• An object of the present invention is to provide a crystal having excellent crystallinity, a laminated structure, and an element, electronic device, electronic equipment, and system using the same.
• the inventors of the present invention formed at least a compound film on a crystal substrate, and then formed a crystalline metal compound containing as a main component a metal compound containing compounds of Hf, Zr, and Si.
• the stacking is performed by forming the crystalline film using a compound element in the compound film, thereby producing crystals and a stacked structure having excellent crystallinity. can be easily obtained, and when a conductive film, a semiconductor film, and a piezoelectric film are formed on the crystal, it has excellent crystallinity and has excellent electrode properties and various properties of the functional film.
• crystals and laminated structures are particularly suitable as buffer layers for applications, and are also useful for peeling and transfer, and that such crystals and laminated structures can solve the above-mentioned conventional problems all at once. I found out. Further, after obtaining the above knowledge, the present inventors conducted further studies and completed the present invention.
• An electronic device comprising a crystal or a laminate structure, wherein the crystal is the crystal according to any one of [1] to [8], or the laminate structure is the crystal according to any one of [9] or [8] above. 10].
• An electronic device characterized by being the laminated structure according to item 10.
• a method for producing a laminated structure comprising forming at least a compound film on a crystal substrate, and then laminating a crystal film containing a crystal made of a crystalline metal compound containing a metal compound as a main component, the method comprising: .
• a method for manufacturing a laminated structure characterized in that the method is carried out by forming the crystal film using a compound element in the compound film.
• the metal compound contains a compound of Hf, Zr, and Si.
• the laminated structure according to [19] above which has a buried layer comprising: [21] Between the crystal substrate and the crystal film, an amorphous thin film containing a constituent metal of the crystal film and/or the crystal substrate, and one or more of the amorphous thin films embedded in a part of the crystal substrate; The laminated structure according to [19], further comprising a buried layer containing a constituent metal. [22] The laminated structure according to any one of [19] to [21], wherein the constituent metal contains Hf. [23] The laminated structure according to any one of [19] to [22], wherein the amorphous thin film has a thickness of 1 nm to 10 nm.
• the crystal and the laminated structure of the present invention have excellent crystallinity, and elements, electronic devices, electronic equipment, and systems using the crystal and the laminated structure have good characteristics of their respective functional films. It has the effect of becoming a thing.
• FIG. 1 is a diagram schematically showing an example of a preferred embodiment of a laminated structure of the present invention.
• FIG. 3 is a diagram schematically showing an SOI island formation process in peeling and transfer, which is an example of a preferable application of the laminated structure of the present invention.
• FIG. 3 is a diagram schematically showing an HF etching step in peeling/transfer, which is an example of a preferred application of the laminated structure of the present invention.
• FIG. 2 is a diagram schematically showing a step of attaching the laminated structure of the present invention to a flexible substrate in peeling and transfer, which is an example of a preferred application example. It is a figure which shows typically the peeling process in peeling and transfer which is an example of the suitable application example of the laminated structure of this invention.
• FIG. 3 is a diagram schematically showing an example of an insulating film forming step of a preferred method for manufacturing a laminated structure of the present invention.
• a cross-sectional STEM image observed in an example is shown.
• the XPS analysis results in Examples are shown.
• 1 is a diagram schematically showing a preferred example of an insulated gate bipolar transistor (IGBT) obtained in the present invention.
• 11 is a diagram schematically showing an example of a suitable manufacturing process for the insulated gate bipolar transistor (IGBT) of FIG. 10.
• FIG. 1 is a diagram schematically showing a preferred example of a power supply system.
• FIG. 1 is a diagram schematically showing a preferred example of a power supply system.
• FIG. 2 is a diagram schematically showing a preferred example of a system device. It is a figure which shows typically a suitable example of the power supply circuit diagram of a power supply device.
• 1 is a diagram schematically showing a film forming apparatus suitably used in Examples. A cross-sectional STEM image measured in an example is shown. A STEM image measured in an example is shown. A STEM image of a buried layer measured in an example is shown. The XRD measurement results measured in Examples are shown.
• the crystal of the present invention is a crystal made of a crystalline metal compound containing a metal compound as a main component, and is characterized in that the metal compound includes a compound of Hf, Zr, and Si.
• the crystal may be a single crystal or a polycrystal.
• the crystal is preferably a crystal made of a crystalline metal compound containing a metal compound as a main component, and the metal compound is preferably a crystal containing Hf and/or Zr and Si. It is also more preferable that the metal compound contains Hf and Si.
• the crystalline metal compound is not particularly limited as long as it contains the metal compound as a main component, and the metal compound preferably contains a compound of Hf, Zr, and Si.
• the term "main component" may be, for example, as long as the crystal contains compounds of Hf, Zr, and Si in an atomic ratio of 0.5 or more of the metal compounds.
• the atomic ratio of Hf, Zr and Si to all metal elements in the metal compound is preferably 0.7 or more, more preferably 0.8 or more.
• the crystalline metal compound preferably has a cubic or hexagonal crystal structure, and is more preferably (111), (100), (010) or (0001) oriented. Further, in the present invention, it is preferable that the crystalline metal compound contains a compound of Si at 5 atomic % or more based on the crystalline metal compound, and the crystalline metal compound preferably contains a compound of Hf and a compound of Zr. It is also preferable to contain 50 atomic % or more of the compound based on the crystalline metal compound. According to such a preferable range, it can not only be used as an excellent buffer layer, but also exhibit good characteristics as a ferroelectric material, and further improve electrical properties (especially the relationship between the conductive layer and the insulating layer).
• the compound of the crystalline metal compound may also be a known compound, and examples of the compound include oxide, nitride, oxynitride, sulfide, oxysulfide, boride, oxyboride, carbide, and oxynitride.
• examples include carbides, boron carbides, boron nitrides, boron sulfides, carbonitrides, carbon sulfides, and carboborides, but in the present invention, oxides or nitrides are used to reduce stress during heteroepitaxial growth, for example.
• the buffer layer can be more excellent in relaxation and warpage reduction.
• the crystalline metal compound is preferably a crystalline metal oxide, the compound film is preferably an oxide film, and the compound element is preferably oxygen.
• the crystalline metal compound is preferably a crystalline metal oxide, the compound film is preferably an oxide film, and the compound element is preferably oxygen.
• the crystalline metal compound is preferably a crystalline nitride, the compound film is preferably a nitride film, and the compound element is preferably nitrogen.
• the crystal is in the form of a film (hereinafter also referred to as "crystal film"), and when it is in the form of a film, it is preferable that the film thickness is 1 ⁇ m or more in order to improve the breakdown voltage, etc.
• a preferable crystal is such that when at least an oxide film is formed on a crystal substrate and then a crystal film containing a crystal made of a crystalline metal oxide containing a metal oxide as a main component is laminated, the lamination is performed by: This can be easily obtained by forming the crystalline film using oxygen atoms in the oxide film.
• the method for forming the crystal film is not particularly limited, and may be any known method (eg, MBE method, ion plating method, etc.), and the crystal growth conditions can be set as appropriate.
• the present invention also includes a laminated structure obtained by the above method and a method for manufacturing the same.
• FIG. 1 shows a preferred example of the laminated structure, in which the film-like crystal is laminated as a first epitaxial layer 3 on a crystal substrate 1 using an oxide film. Further, on the first epitaxial layer 3, a conductive film, a semiconductor film, or a piezoelectric film is laminated as a second epitaxial layer 4. Note that in this specification, the terms “film” and “layer” may be interchanged depending on the case or the situation. In addition, although oxides are cited as preferred examples of the laminated structure, the present invention is not limited to these preferred examples, and the present invention is also suitable for various compounds such as nitrides. can be applied.
• the laminated structure is produced by forming an oxide film 2 of the crystal substrate 1 on a crystal substrate 1, for example, as shown in FIG. 6, and then using oxygen in the oxide film 2, as shown in FIG. can be easily manufactured by forming a crystal film (first epitaxial layer) 3 made of the crystalline metal oxide on a crystal substrate 1.
• the laminated structure may have the oxide film 2 on the crystal substrate 1, but when the crystal film 3 is formed, all the oxygen in the oxide film 2 is taken in and the oxide film 2 is removed. The film 2 may also disappear.
• preferred embodiments of the present invention will be described in more detail, but the present invention is not limited to these specific examples.
• the crystal substrate (hereinafter also simply referred to as “substrate”) is not particularly limited, such as the substrate material, as long as it does not impede the purpose of the present invention, and may be any known crystal substrate. It may be an organic compound or an inorganic compound. In the present invention, it is preferable that the crystal substrate contains an inorganic compound. In the present invention, it is preferable that the substrate has crystals on part or all of its surface, and it is preferable that the substrate has crystals on all or part of its main surface on the crystal growth side. More preferably, a crystal substrate having crystals on the entire main surface on the crystal growth side is most preferable.
• the crystal is not particularly limited as long as it does not impede the purpose of the present invention, and the crystal structure is also not particularly limited, but may be cubic, tetragonal, trigonal, hexagonal, orthorhombic, or monoclinic. It is preferable that it is a cubic crystal, more preferably a cubic or hexagonal crystal, and most preferably (111), (100) or (0001) oriented. Further, the crystal substrate may have an off-angle, and examples of the off-angle include an off-angle of 0.2° to 12.0°. Here, the "off angle” refers to the angle between the substrate surface and the crystal growth plane.
• the shape of the substrate is not particularly limited as long as it is plate-like and serves as a support for the insulating film.
• the substrate is preferably a Si substrate, more preferably a crystalline Si substrate, and (111) , (100) or (0001) oriented crystalline Si substrate.
• the substrate material include, in addition to the Si substrate, one or more metals belonging to Groups 3 to 15 of the periodic table, or oxides of these metals.
• the shape of the substrate is not particularly limited, and may be approximately circular (for example, circular, oval, etc.) or polygonal (for example, triangular, square, rectangular, pentagonal, hexagonal, heptagonal, etc.). , octagonal, nonagonal, etc.), and various shapes can be suitably used.
• the crystal substrate has a flat surface, but it is also preferable that the crystal substrate has an uneven shape on a part or all of the surface, which improves the quality of crystal growth of the crystal film. This is preferable because it can provide better results.
• the above-mentioned crystal substrate having an uneven shape may be used as long as an uneven part consisting of a recess or a convex part is formed on a part or all of the surface. It is not limited, and it may be an uneven part consisting of a convex part, an uneven part consisting of a concave part, or an uneven part consisting of a convex part and a concave part.
• the uneven portions may be formed from regular protrusions or recesses, or may be formed from irregular protrusions or recesses.
• the uneven portions are formed periodically, and more preferably that they are patterned periodically and regularly.
• the shape of the uneven portion is not particularly limited, and examples thereof include a stripe shape, a dot shape, a mesh shape, or a random shape, but in the present invention, a dot shape or a stripe shape is preferable, and a dot shape is more preferable. .
• the pattern shape of the uneven portions may be a polygonal shape such as a triangle, a quadrangle (for example, a square, a rectangle, or a trapezoid), a pentagon, or a hexagon.
• the shape is circular or elliptical.
• the lattice shape of the dots is a lattice shape such as a square lattice, an orthorhombic lattice, a triangular lattice, a hexagonal lattice, etc., and a triangular lattice shape is used. is more preferable.
• the cross-sectional shape of the recesses or projections of the uneven portion is not particularly limited, but may be, for example, a U-shape, a U-shape, an inverted U-shape, a wave shape, a triangle, a quadrilateral (for example, a square, a rectangle, a trapezoid, etc.). ), polygons such as pentagons and hexagons.
• the thickness of the crystal substrate is not particularly limited, but is preferably 50 to 2000 ⁇ m, more preferably 100 to 1000 ⁇ m.
• the oxide film is not particularly limited as long as it is an oxide film that can incorporate oxygen atoms into the crystal film, and usually contains an oxide material.
• the oxidizing material is not particularly limited as long as it does not impede the object of the present invention, and may be any known oxidizing material. Examples of the oxidizing material include metal or metalloid oxides.
• the oxide film contains the oxidizing material of the crystal substrate, and examples of such an oxide film include a thermal oxide film, a natural oxide film, and the like of the crystal substrate.
• the oxide film may be a sacrificial layer in which part or all of the film disappears or is destroyed when oxygen atoms are taken in; It is preferable that the oxide layer is an oxygen-supplying sacrificial layer in which oxygen atoms are taken in and the oxide film itself disappears during crystal growth. Further, the oxide film may be patterned, for example, in a stripe shape, a dot shape, a mesh shape, or a random shape. Note that the thickness of the oxide film is not particularly limited, but is preferably greater than 1 nm and less than 100 nm.
• the crystal film includes an epitaxial film in which oxygen atoms in the oxide film are incorporated.
• an epitaxial film in which oxygen atoms in the oxide film are incorporated means that oxygen atoms in the oxide film are taken away by the epitaxial film during crystal growth of the epitaxial film.
• the crystal film contains a neutron absorbing material.
• the neutron absorbing material may be a known neutron absorbing material, and in the present invention, such a neutron absorbing material is used to improve adhesion, crystallinity, and functionality by incorporating oxygen from the oxide film. The properties of the film can be improved.
• a suitable example of the neutron absorbing material is hafnium (Hf).
• a second epitaxial layer made of a conductive film, a semiconductor film, or a piezoelectric film is laminated on the crystal film, either directly or via another layer.
• the first epitaxial layer is regularly formed at the interface between the first epitaxial layer and the second epitaxial layer so that the lattice constant is approximately the same as the lattice constant of the second epitaxial layer. It can be transformed into.
• a suitable example of the above-mentioned regular transformation is a transformation in which the shape deforms into a peak-to-valley structure, and in the present invention, the angles formed by adjacent apexes and bottom points of the peak-to-valley structure are Preferably, they are different, and more preferably, the angles are each within a range of 30° to 45°.
• the first epitaxial layer usually has a first crystal plane and a second crystal plane, but due to the transformation, the lattice constant of the first crystal plane and the second crystal plane becomes Since a difference may occur, it is preferable that the difference in lattice constant between the first crystal plane and the second crystal plane is within the range of 0.1% to 20%.
• the difference in lattice constant between the first epitaxial layer and the second epitaxial layer is 0.0.
• a range of 1% to 20% can be easily achieved.
• the conductive film when a conductive film is laminated on the crystal film, and when the conductive film is made of a single crystal film of a conductive metal, it is possible to easily obtain a defect-free film with a large area. Therefore, not only the function as an electrode but also the characteristics of the device etc. can be improved.
• the conductive metal is not particularly limited as long as it does not impede the purpose of the present invention, and examples thereof include gold, silver, platinum, palladium, silver palladium, copper, nickel, and alloys thereof. preferably contains platinum.
• the present invention it is possible to obtain as an electrode a single crystal film that is defect-free in an area of preferably 100 nm 2 or more, and more preferably defect-free in an area of 1000 nm 2 or more.
• a single crystal film can be easily obtained.
• a single crystal film having a thickness of preferably 100 nm or more can be easily obtained as an electrode.
• the laminated structure is preferably used as an electrode substrate in which a crystalline conductive film is laminated on the insulating film. It can be used for.
• the semiconductor film is not particularly limited as long as it contains a semiconductor, and may be any known semiconductor film, but in the present invention it is preferable that it contains a cubic semiconductor.
• the cubic semiconductor include c-BN, c-AlN, c-GaN, c-InN, c-SiC, GaAs, AlAs, InAs, GaP, AlP, InP, and mixed crystal semiconductors thereof. It will be done.
• the piezoelectric film is not particularly limited as long as it is made of a piezoelectric material, and may be a film made of a known piezoelectric material, but in the present invention, a piezoelectric film having a trigonal or hexagonal crystal structure is used. Preferably, it is a material.
• the piezoelectric material include lead zirconate titanate (PZT), other types of ceramic materials having a so-called perovskite structure represented by ABO 3 type, such as barium titanate, lead titanate, and potassium niobate.
• each of the conductive film, the semiconductor film, and the piezoelectric film is not particularly limited, but is preferably 10 nm to 1000 ⁇ m, more preferably 10 nm to 100 ⁇ m.
• the laminated structure is produced in a method for manufacturing a laminated structure in which an insulating film is laminated on a crystal substrate via at least an oxide film, in which the lamination is performed at 350° C. to 700° C. to remove oxygen atoms in the oxide film.
• This can be easily obtained by forming a crystal film using the above method.
• the temperature is in the range of 350° C. to 700° C., oxygen atoms in the oxide film can be easily incorporated into the crystal film to cause crystal growth.
• the crystal film is formed using oxygen gas after the above-described lamination is performed using oxygen atoms in the oxide film.
• a film By forming a film in this manner, a layered structure in which the crystal film is stacked on the crystal substrate, wherein the crystal film and/or the crystal substrate is provided between the crystal substrate and the crystal film. It is possible to easily obtain a laminated structure having an amorphous thin film containing the constituent metals and/or one or more buried layers containing the constituent metals embedded in a part of the crystal substrate.
• the laminated structure has both the amorphous layer and the buried layer because the functionality of the crystalline film can be further improved.
• the amorphous layer and the buried layer each contain a constituent metal of the crystalline film, since this results in better crystallinity of the crystalline film and the like.
• the constituent metal contains Hf, since this further promotes stress relaxation and further enables realization of stress relaxation in multiple stages.
• the thickness of the amorphous thin film is 1 nm to 10 nm because it can further improve the crystallinity of the crystalline film, and the amorphous thin film having such a preferable thickness is preferably used in the present invention. can be easily obtained according to a preferred manufacturing method.
• the buried layer has a substantially inverted triangular cross-sectional shape, since this can further improve the functionality of the crystalline film.
• these preferable laminated structures can be easily obtained by appropriately adjusting the thickness of the oxide film, the timing of introducing the oxygen gas, and the like.
• the means for forming the insulating film is usually suitably used, and the film forming means may be any known film forming means. In the present invention, it is preferable that the film forming means is vapor deposition or sputtering.
• the laminated structure obtained as described above can be used as an element as it is or after being further processed, if desired, according to a conventional method.
• the laminated structure when used in the element, it may be used as it is, or it may be used as it is, or it may be used with other layers (for example, an insulator layer, a semi-insulator layer, a conductor layer, a semiconductor layer, a buffer layer, or other intermediate layer, etc.). ) etc. may be formed before use.
• a functional film for example, a semiconductor film, a piezoelectric film, etc.
• the above-mentioned element is used, for example, in an electronic device (preferably a piezoelectric device), etc., in accordance with a conventional method. More specifically, for example, various electronic devices can be constructed by connecting the element as a piezoelectric element to a power source or an electric/electronic circuit, mounting it on a circuit board, or packaging it.
• the electronic device is preferably a piezoelectric device, and more preferably a piezoelectric device in electronic equipment such as a gyroscope or a motion sensor.
• an amplifier and a rectifier circuit are connected and packaged, it can be used for various sensors such as magnetic sensors.
• the electronic device is suitably used in electronic equipment according to a conventional method.
• the electronic device can be applied to various electronic devices other than those described above, and more specifically includes, for example, a liquid ejection head, a liquid ejection device, a vibration wave motor, an optical device, a vibration device, an imaging device, Suitable examples include piezoelectric acoustic components and audio playback devices, audio recording devices, mobile phones, and various information terminals that include the piezoelectric acoustic components.
• the element is a semiconductor element
• the electronic device is a semiconductor device.
• the semiconductor element or the semiconductor device (hereinafter also collectively referred to as a "semiconductor device") is not particularly limited as long as it does not impede the object of the present invention, and may be a known semiconductor element or semiconductor device. It may be a vertical device or a horizontal device, but in the present invention, a horizontal device is preferred.
• Examples of the semiconductor device include a diode or a transistor (for example, a MOSFET or a JFET), and an insulated gate semiconductor device (for example, a MOSFET or an IGBT) or a semiconductor device having a Schottky gate (for example, a MESFET). etc.) are preferred, MOSFETs and/or IGBTs are more preferred, and lateral MOSFETs and/or lateral IGBTs are most preferred.
• a diode or a transistor for example, a MOSFET or a JFET
• an insulated gate semiconductor device for example, a MOSFET or an IGBT
• a semiconductor device having a Schottky gate for example, a MESFET
• FIG. 10 shows a horizontal IGBT, a horizontal NMOS, and a horizontal PMOS suitable for the present invention.
• an insulating film 26a as the crystal film is formed on a crystal substrate 29, and respective elements are provided on the insulating film 26a.
• the lateral IGBT in FIG. 10 includes a gate electrode 21, an emitter electrode 22, a collector electrode 23, an insulating film 26 as the crystal film, a p-type semiconductor 27, an n-type semiconductor 28, and an n - type semiconductor 28a.
• the PMOS shown in FIG. 10 includes a gate electrode 21, a drain electrode 24, a source electrode 25, an insulating film 26, a p-type semiconductor 27, an n-type semiconductor 28, and an n - type semiconductor 28a. Further, the PMOS shown in FIG. 10 includes a gate electrode 21, a drain electrode 24, a source electrode 25, an insulating film 26, a p-type semiconductor 27, and an n - type semiconductor 28a.
• FIG. 11 shows a preferred manufacturing process for the insulated gate bipolar transistor (IGBT) shown in FIG. 10 and the like.
• IGBT insulated gate bipolar transistor
• an insulating film 26a as the crystal film is formed on a crystal substrate 29, and an n - type semiconductor (for example, a Si semiconductor) 28a is further formed on the insulating film 26a.
• n - type semiconductor for example, a Si semiconductor
• FIG. 11(a) a trench is provided in the laminated structure using a known method, and the surface side of an n - type semiconductor (for example, a Si semiconductor) 28a is further oxidized using a known method.
• FIG. 11(b) the stacked structure shown in FIG.
• FIG. 11(a) is treated with polysilicon 31 using known means to fill the trenches with polysilicon 31, and then a polysilicon layer is formed on the oxidized surface. do.
• FIG. 11(c) the layered structure shown in FIG. 11(b) is polished using known means to obtain the layered structure shown in FIG. 11(c).
• the obtained laminated structure is subjected to various device manufacturing steps using known means.
• the lateral IGBT, lateral NMOS, and lateral PMOS obtained in this way have element isolation using a trench isolation structure, have a small isolation area, and can directly configure an inverter with a power source rectified and smoothed from a commercial power source. It is also possible. Furthermore, a high-voltage output section and a control circuit section can be configured on the same chip, making it possible to realize an excellent power IC. In particular, since each device inside the IC is completely isolated by a dielectric material, it is possible to eliminate the influence of parasitic elements, and a highly reliable system can be realized.
• the semiconductor device can be suitably used as a semiconductor device such as a power module, an inverter or a converter by using known means, and furthermore, the semiconductor device can be used as a semiconductor device such as a semiconductor system using a power supply device, etc. It is suitably used for.
• the power supply device can be manufactured by connecting the semiconductor device to a wiring pattern or the like using a known method.
• FIG. 12 shows an example of a power supply system.
• FIG. 12 shows a power supply system using a plurality of the power supply devices and control circuits.
• the power supply system can be used in a system device in combination with an electronic circuit, as shown in FIG.
• FIG. 14 shows an example of a power supply circuit diagram of the power supply device.
• Figure 14 shows a power supply circuit of a power supply device consisting of a power circuit and a control circuit, in which DC voltage is switched at high frequency by an inverter (consisting of MOSFETAs to D) and converted to AC, and then insulation and transformation are performed by a transformer. , rectified by rectifier MOSFETs (A to B'), smoothed by DCL (smoothing coils L1, L2) and a capacitor, and outputs a DC voltage. At this time, a voltage comparator compares the output voltage with a reference voltage, and a PWM control circuit controls the inverter and rectifier MOSFET so that the desired output voltage is achieved.
• an inverter consisting of MOSFETAs to D
• DCL smoothing coils L1, L2
• Example 1 After treating the crystal growth side of the Si substrate (100) with RIE and heating it in the presence of oxygen to form a thermal oxide film, the metal of the evaporation source and the Si A single crystal of the crystalline metal oxide was formed on the Si substrate by causing a thermal reaction with oxygen in the oxide film on the substrate. Then, by flowing oxygen, lowering the temperature, and increasing the pressure, a single crystal film of a crystalline metal oxide was formed by a vapor deposition method. The conditions of the vapor deposition method during this film formation were as follows. Vapor deposition source: Hf, Zr, Si Voltage: 3.5-4.75V Pressure: 3 ⁇ 10-2 to 6 ⁇ 10-2 Pa Substrate temperature: 450-700°C
• the obtained laminate structure was a laminate structure including a crystal film having good adhesion and crystallinity, and the obtained crystal film had a thickness of 20 ⁇ m and exhibited ferroelectricity.
• a cross-sectional STEM image of the obtained laminated structure is shown in FIG. Further, when the obtained crystal film was examined using an X-ray diffraction device, it was found to be (Hf, Zr, Si)O 2 .
• the XPS analysis results are shown in FIG.
• Example 2 A laminated structure was obtained in the same manner as in Example 1 except that a Si substrate was used instead of (111).
• the obtained laminated structure like Example 1, was a laminated structure containing a crystal film having good adhesion and crystallinity, and exhibited ferroelectricity. Further, when the obtained crystal film was examined using an X-ray diffraction device, it was found to be (Hf, Zr, Si)O 2 .
• Example 3 A laminated structure was obtained in the same manner as in Example 1 except that Zr was not used.
• the obtained laminated structure like Example 1, was a laminated structure containing a crystal film having good adhesion and crystallinity, and exhibited ferroelectricity. Further, when the obtained crystal film was examined using an X-ray diffraction device, it was found to be (Hf, Si)O 2 as shown in FIG.
• the vapor deposition film forming apparatus used in Example 1 is shown in FIG.
• the film forming apparatus in FIG. 15 includes metal sources 101a to 101b, earths 102a to 102h, ICP electrodes 103a to 103b, cut filters 104a to 104b, DC power supplies 105a to 105b, RF power supplies 106a to 106b, lamps 107a to 107b, It includes at least an Ar source 108, a reactive gas source 109, a power source 110, a substrate holder 111, a substrate 112, a cut filter 113, an ICP ring 114, a vacuum chamber 115, and a rotating shaft 116.
• the ICP electrodes 103a to 103b in FIG. 15 have a substantially concave curved shape or a parabolic shape curved toward the center of the substrate 112.
• the substrate 112 is locked onto the substrate holder 111.
• the rotating shaft 116 is rotated using the power source 110 and a rotating mechanism (not shown), and the substrate 112 is rotated.
• the substrate 112 is heated by lamps 107a to 107b, and the inside of the vacuum chamber 115 is evacuated to a vacuum or reduced pressure by a vacuum pump (not shown).
• Ar gas is introduced into the vacuum chamber 115 from the Ar source 108, and the substrate is The surface of the substrate 112 is cleaned by forming argon plasma on the substrate 112 .
• Ar gas is introduced into the vacuum chamber 115, and a reactive gas is also introduced using the reactive gas source 109.
• the lamps 107a to 107b which are lamp heaters, are alternately turned on and off to form a crystal growth film of better quality.
• Example 2 A STEM analysis was performed on the laminated structure obtained in the same manner as in Example 1. A buried layer was formed between the crystal substrate and the crystal film, and an amorphous layer (two layers) was further formed. Further, the first amorphous layer on the crystal substrate contained Si and Zr, which is a constituent metal of the crystal film. Further, the second amorphous layer contained Si of the crystal substrate and Hf and Zr, which are constituent metals of the crystal film.
• FIGS. 16 to 18 the STEM analysis results of a laminated structure containing HfZrO mixed crystal produced in the same manner as in Example 1 are shown in FIGS. 16 to 18. It can be seen from FIG.
• a buried layer 1004 is formed between the crystal substrate 1011 and the epitaxial layer 1001, and furthermore, amorphous layers 1002 and 1003 are formed.
• the first amorphous layer 1002 on the crystal substrate 1011 contains Si of the crystal substrate and Zr which is a constituent metal of the epitaxial layer 1001.
• the second amorphous layer contains Si of the crystal substrate and Hf and Zr, which are the constituent metals of the epitaxial layer 1001.
• the buried layer 1004 has a substantially inverted triangular cross-sectional shape and is an oxide containing Hf and Si.
• FIG. 1 is a diagram showing a preferred example of the laminated structure of the present invention.
• an insulating film 3 is formed on a crystal substrate 1, and a semiconductor layer is further formed as a second epitaxial layer 4 on the insulating film 3.
• FIG. 2 shows a laminated structure obtained in the SOI island forming step in the peeling and transfer.
• the SOI island forming step the stacked structure shown in FIG. 1 is used as an SOI substrate, and photolithography is performed to partially remove the semiconductor layer (second epitaxial layer) 4. By doing so, the laminated structure shown in FIG. 2 is obtained.
• the second epitaxial layer is separated into two islands, and the first island 4a and the second island 4b of the second epitaxial layer are formed on the insulating film 3. There is.
• FIG. 3 shows a laminated structure obtained in the HF etching process in the peeling/transferring process.
• the BOX layer is etched using HF using the stacked structure shown in FIG. 2, and is left in a pillar shape.
• the insulating film has a pillar shape, and the first pillar 3a and the second pillar 3b of the insulating film (first epitaxial layer) are formed on the crystal substrate 1, respectively. There is.
• the adhesion between the crystal substrate and the insulating film is high, and stress relaxation such as normal transformation is observed at the interface between the insulating film and the second epitaxial layer, so it is easy to peel off, for example,
• the HF etching process is not essential and can be omitted.
• FIG. 4 shows a laminated structure obtained in the step of attaching to a flexible substrate in the peeling/transferring process.
• the surface of the SOI layer and a flexible substrate 5 such as PE (polyethylene) are closely pasted using the laminated structure shown in FIG. 3 .
• FIG. 5 shows a laminated structure obtained in the peeling step in peeling/transfer.
• the SOI layer is peeled and transferred onto the flexible substrate.
• the crystal and laminated structure of the present invention are useful for elements, electronic devices, electronic equipment, and systems, and are particularly suitably used as SOI substrates.

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