WO2024029628A1 - 配線基板、配線基板を用いた電子部品実装用パッケージおよび電子モジュール - Google Patents

配線基板、配線基板を用いた電子部品実装用パッケージおよび電子モジュール Download PDF

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Publication number
WO2024029628A1
WO2024029628A1 PCT/JP2023/028615 JP2023028615W WO2024029628A1 WO 2024029628 A1 WO2024029628 A1 WO 2024029628A1 JP 2023028615 W JP2023028615 W JP 2023028615W WO 2024029628 A1 WO2024029628 A1 WO 2024029628A1
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WO
WIPO (PCT)
Prior art keywords
line
opening
wiring board
plan
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/028615
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English (en)
French (fr)
Japanese (ja)
Inventor
芳規 川頭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
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Kyocera Corp
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Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to EP23850181.1A priority Critical patent/EP4568426A1/en
Priority to US19/100,087 priority patent/US20260059654A1/en
Priority to JP2024539224A priority patent/JPWO2024029628A1/ja
Publication of WO2024029628A1 publication Critical patent/WO2024029628A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/026—Coplanar striplines [CPS]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0245—Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09236—Parallel layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09718—Clearance holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/60—Seals

Definitions

  • the present disclosure relates to a wiring board, a package for mounting electronic components using the wiring board, and an electronic module.
  • a wiring board includes a first insulating layer, a second insulating layer, a first ground conductor, and a first signal conductor.
  • the first insulating layer has a first upper surface and a first lower surface opposite to the first upper surface.
  • the second insulating layer is located on the first insulating layer and has a second upper surface and a second lower surface opposite to the second upper surface.
  • the first ground conductor has a first opening and a second opening, and is located on the first lower surface.
  • the first signal conductor has a first line located on the first upper surface and a second line located on the second lower surface. The first line has a first end and a first line extending from the first end.
  • the second line has a second end electrically connected to the first end, and a second line extending from the second end.
  • first end and the second end are located within the first opening.
  • at least a portion of the second line portion is positioned overlapping the second opening.
  • the area of the first opening is larger than the area of the second opening.
  • the first ground conductor includes a plurality of second openings.
  • the plurality of second openings are spaced apart from each other and are located along the second line portion in plan view.
  • the dimensions of the second opening in the direction perpendicular to the direction along the second line portion in plan view are the dimensions of the second opening in the direction perpendicular to the direction along the second line portion. It is larger than the dimension of the second line portion in .
  • the distance between the plurality of second openings in the direction along the second line portion is perpendicular to the direction along the second line portion. It is not constant in direction.
  • the wiring board of (1) to (5) above includes a pair of second ground conductors located between the first insulating layer and the second insulating layer, and electrically connected to the first ground conductor. We are even more prepared. In plan view, the first signal conductor is located between the pair of second ground conductors.
  • the first insulating layer has a first side surface connected to the first upper surface and the first lower surface.
  • the second insulating layer has a second side surface that is connected to the second upper surface and the second lower surface and is located inward from the first side surface in plan view.
  • the first upper surface has a first region located between the first side surface and the second side surface in plan view.
  • the first line extends to the first region in a plan view and has a first connection portion to which an external connection member is connected.
  • the first ground conductor has one or more third openings located overlapping the first connection portion in plan view.
  • the first insulating layer further includes a recessed portion having an opening in the first region. In plan view, the recess is located overlapping at least a portion of the third opening.
  • the wiring boards of (1) to (9) above further include a third ground conductor electrically connected to the first ground conductor and located on the second upper surface.
  • the third ground conductor has one or more fourth openings. In plan view, at least a portion of the second line portion is located overlapping the fourth opening. In plan view, the fourth opening has a portion that overlaps at least a portion of the second opening.
  • An electronic component mounting package includes the wiring board of (1) to (10) above, a substrate, and a frame.
  • the frame is bonded to the top surface of the substrate.
  • the wiring board is fixed to the frame.
  • An electronic module includes the electronic component mounting package of (11) above, an electronic component, and a lid.
  • the electronic component is located on the upper surface of the board and is electrically connected to the wiring board.
  • the lid body is located on the frame body and is positioned to cover the inside of the electronic component mounting package.
  • FIG. 1 is a perspective view of a wiring board, an electronic component mounting package, and an electronic module according to an embodiment of the present disclosure.
  • FIG. 2 is an enlarged view of the main part A shown in FIG. 1 viewed from another angle.
  • FIG. 1 is an exploded perspective view of a wiring board according to an embodiment of the present disclosure.
  • FIG. 7 is a plan view of a wiring board according to an embodiment of the present disclosure, with a third ground conductor omitted.
  • 5 is an enlarged view of main part B shown in FIG. 4.
  • FIG. 6 is a diagram showing a third ground conductor superimposed on the enlarged view of FIG. 5.
  • FIG. FIG. 3 is a plan view of the first ground conductor. It is a top view of a 1st upper surface. It is a top view of a 2nd upper surface.
  • FIG. 3 is a plan view of a third ground conductor.
  • the wiring board may be directed either upward or downward, but for convenience, an orthogonal coordinate system xyz is defined and the positive side of the z direction is assumed to be upward.
  • the first direction refers to, for example, the y direction in the drawings.
  • the second direction intersecting the first direction refers to, for example, the x direction in the drawings.
  • the term "inward” refers to, for example, the positive direction of the y-axis in the drawings.
  • plan view is a concept that includes plan view.
  • FIG. 2 is an enlarged view of a main part A of the wiring board 101, the electronic component mounting package 100, and the electronic module 10 shown in FIG. 1, viewed from the positive direction of the z-axis.
  • the wiring board 101 includes a first insulating layer 1, a second insulating layer 2, a first ground conductor G1, and a first signal conductor S1.
  • the first insulating layer 1 has a first upper surface 1a and a first lower surface 1b opposite to the first upper surface 1a.
  • the material for the first insulating layer 1 include ceramic materials such as aluminum oxide sintered bodies, mullite sintered bodies, silicon carbide sintered bodies, aluminum nitride sintered bodies, and silicon nitride sintered bodies; Dielectric materials such as glass ceramic materials can be used.
  • the first insulating layer 1 may be a single layer, or may have a structure in which a plurality of insulating layers are stacked.
  • the first insulating layer 1 has, for example, a rectangular shape in plan view, a size of 4 mm x 4 mm to 50 mm x 50 mm, and a thickness of 0.5 mm to 10 mm.
  • the second insulating layer 2 is located on the first insulating layer 1 and has a second upper surface 2a and a second lower surface 2b opposite to the second upper surface 2a.
  • the material of the second insulating layer 2 may be the same as or different from the material of the first insulating layer 1, and for example, the same material as the first insulating layer 1 described above can be used.
  • the second insulating layer 2 may be a single layer or may have a structure in which a plurality of insulating layers are stacked.
  • the second insulating layer 2 has, for example, a rectangular shape in a plan view, a size of 4 mm x 4 mm to 50 mm x 50 mm, and a thickness of 0.1 mm to 10 mm.
  • the wiring board 101 may further include a third insulating layer 3 located below the first insulating layer 1 (on the first lower surface 1b side).
  • the material of the third insulating layer 3 may be the same as or different from the material of the first insulating layer 1, and for example, the same material as the first insulating layer 1 described above can be used.
  • the third insulating layer 3 may be a single layer or may have a structure in which a plurality of insulating layers are laminated.
  • the third insulating layer 3 has a rectangular shape, for example, in a plan view, with a size of 4 mm x 4 mm to 50 mm x 50 mm, and a thickness of 0.1 mm to 10 mm. Note that wiring such as a signal conductor or a ground conductor may be formed in the third insulating layer 3.
  • the first ground conductor G1 has a first opening O1 and a second opening O2, and is located on the first lower surface 1b.
  • the material of the first ground conductor G1 include metal materials such as gold, silver, copper, nickel, tungsten, molybdenum, and manganese.
  • the first ground conductor G1 may be formed by sintering a metal paste on the first lower surface 1b, or may be formed using a thin film forming technique such as a vapor deposition method or a sputtering method.
  • the shape of the first opening O1 may be circular or rectangular in plan view.
  • the circular shape mentioned here is not limited to a perfect circle, and may be an elliptical shape or a circle with a part missing.
  • the shape of the second opening O2 may also be circular or rectangular in plan view.
  • the shape of the first opening O1 and the shape of the second opening O2 may be the same or different.
  • the first ground conductor G1 may have a fifth opening O5 and a sixth opening O6.
  • the first signal conductor S1 has a first line S11 located on the first upper surface 1a and a second line S12 located on the second lower surface 2b.
  • the material of the first signal conductor S1 may be the same as or different from the material of the first ground conductor G1, and for example, the same material as the above-described material of the first ground conductor G1 can be mentioned.
  • the first line S11 and the second line S12 do not necessarily need to be made of the same material, and may be made of different materials.
  • the first signal conductor S1 may be formed by the same method as the first ground conductor G1 described above.
  • the first signal conductor S1 has a width of, for example, 0.05 mm to 2 mm, and a length of 1.5 mm to 25 mm.
  • the thickness of the first signal conductor S1 is, for example, 0.01 to 0.1 mm. Note that the width, length, and thickness of the first signal conductor S1 referred to herein can be the dimensions of the first signal conductor S1 in the x direction, the y direction, and the z direction, respectively.
  • Metal plating such as nickel plating or gold plating may be formed on the surface of the first signal conductor S1.
  • an insulating film made of ceramic (for example, alumina coat) or resin may be located on a part of the first signal conductor S1.
  • the insulating film can be provided on the first signal conductor S1 by screen printing. Further, the insulating film may be located only partially on the first signal conductor S1. With such a configuration, it is possible to reduce the possibility that the first signal conductor S1 is short-circuited with other wiring.
  • the wiring board 101 may further include a second signal conductor S2 located alongside the first signal conductor S1.
  • the first signal conductor S1 and the second signal conductor S2 can be a pair of signal conductors that transmit differential signals.
  • the material of the second signal conductor S2 may be the same as or different from the material of the first ground conductor G1, and for example, the same material as the material of the first ground conductor G1 described above may be mentioned.
  • the second signal conductor S2 may include a third line S23 located on the first upper surface 1a and a fourth line S24 located on the second lower surface 2b.
  • the first line S11 has a first end S11e and a first line part S11a extending from the first end S11e.
  • the second line S12 has a second end S12e electrically connected to the first end S11e, and a second line part S12a extending from the second end S12e. There is.
  • the first end S11e and the second end S12e may be located overlapping each other in plan view. In one embodiment, the first end S11e is in direct contact with the second end S12e and overlaps with the second end S12e in plan view.
  • first end S11e and the second end portion S12e may be connected by a via conductor or by castellation.
  • another insulating layer is located between the first insulating layer 1 and the second insulating layer 2, and by providing vias or castellations in the insulating layer, the first end S11e and the second end The portion S12e can be electrically connected.
  • the third line S23 has a third end S23e and a fourth line S23. It may have a third line part S23a extending from the third end part S23e.
  • the fourth line S24 may have a fourth end S24e and a fourth line portion S24a extending from the fourth end S24e.
  • the third end S23e, the third line S23a, the fourth end S24e, and the fourth line S24a are the first end S11e, the first line S11a, the second end S12e, and the second line S12e, respectively. It can have the same configuration as the line portion S12a.
  • the wiring board 101 can adjust the impedance to an appropriate value at the second wire portion S12a and at the location where the first end portion S11e and the second end portion S12e are electrically connected. can do. This will be explained below.
  • the resonance frequency shifts to the high frequency side, resulting in better transmission characteristics of high frequency signals.
  • impedance matching is required.
  • the first ground conductor G1 has a second opening O2 at a position overlapping at least a portion of the second line portion S12a in plan view. Therefore, while maintaining the desired resonant frequency in the second wire portion S12a, the decrease in impedance can be reduced and the impedance can be adjusted to a desired value.
  • the characteristic impedance may decrease at a location where the first end S11e and the second end S12e are electrically connected, so that There is a need to reduce impedance mismatch. Therefore, in plan view, by locating the first end S11e and the second end S12e within the first opening O1, and making the area of the first opening O1 larger than the area of the second opening O2, , the impedance can be adjusted to a desired value both at the connection point between the first end S11e and the second end S12e, and at the second wire section S12a.
  • the fifth opening O5 and the sixth opening O6 are connected to the first ground conductor G1, respectively.
  • the structure can be similar to that of the opening O1 and the second opening O2.
  • the wiring board 101 may include a plurality of signal lines corresponding to the first signal conductor S1 and/or the second signal conductor S2.
  • the first ground conductor G1 has a first opening O1, a second opening O2, a fifth opening O5, and a sixth opening O5, so as to correspond to the plurality of first signal conductors S1 and/or second signal conductors S2. It may have a plurality of openings O6.
  • the second direction (x direction) may be smaller than the dimension L2e of the second end S12e in the second direction (x direction). That is, the width of the first end S11e is smaller than the width of the second end S12e.
  • the second end S12e has a circular shape. Therefore, it is possible to reduce the possibility that the connection point between the first line S11 and the second line S12 will be disconnected due to stacking misalignment.
  • the circular shape mentioned here is not limited to a perfect circle, and may be an elliptical shape or a circle with a part missing.
  • the second end portion S12e may have a rectangular shape or a polygonal shape.
  • the dimension L1e of the first end portion S11e in the x direction and the dimension L1 of the first line portion S11a in the x direction are equal, but may be different.
  • the dimension L2e of the second end S12e in the x direction is larger than the dimension L2 of the second line part S12a in the x direction, but the dimension L2e of the second end S12e in the x direction is The dimension L2 of the second line portion S12a in the direction may be the same.
  • the first ground conductor G1 may include a plurality of second openings O2 (O21, O22, O23).
  • the plurality of second openings O2 may be spaced from each other and located along the second line portion S12a in plan view. With such a configuration, while maintaining the resonant frequency in the second line portion S12a, it is possible to reduce a decrease in impedance and to easily adjust the impedance to a desired value.
  • the number of second openings O2 is three (O21, O22, O23), but the number of second openings O2 may be two, four or more.
  • the number of second openings O2 can be determined depending on the length of the second line portion S12a and the required impedance value. As shown in FIG. 5, the minimum distance LO12 in the y direction between the first opening O1 and the second opening O2 may be larger than distances LO2a and LO2b, which will be described later.
  • the dimension LO2 of the second opening O2 in the direction orthogonal to the direction along the second line portion S12a is the same as the dimension LO2 in the direction orthogonal to the direction along the second line portion S12a. It may be larger than the dimension L2 of the two-wire portion S12a.
  • the second opening O2 can be positioned so as to overlap the second line portion S12a.
  • the direction along the second line portion S12a refers to the y direction.
  • the direction along the second line portion S12a refers to the direction of the second line portion S12a in the curved portion S12c. Points in the tangential direction.
  • the distances between the plurality of second openings O2 in the direction along the second line portion S12a are not constant in the direction orthogonal to the direction along the second line portion S12a. You can. For example, a description will be given using one second opening O21 and the other second opening O22. As shown in FIG. 5, the distance between the second opening O21 and the second opening O22 at any point in the direction along the second line portion S12a is defined as the distance LO2a, and the distance between the second opening O21 and the second opening O22 at any other point is defined as a distance LO2a. The distance from the opening O22 in the direction along the second line portion S12a is defined as a distance LO2b.
  • distance LO2a and distance LO2b are different.
  • the area of the second openings O2 can be increased while reducing the possibility that the plurality of second openings O2 will interfere with each other. Therefore, while maintaining the desired resonance frequency in the second line portion S12a, it is possible to reduce the decrease in impedance and to easily adjust the impedance to a desired value.
  • the second line portion S12a has a curved portion S12c that curves in the positive direction of the x-axis.
  • the distance LO2a is the distance between the second openings O2 on the inside of the curved part S12c (on the positive side of the x-axis with respect to the second line part S12a), and the distance LO2b is the distance between the second openings O2 on the outside of the curved part S12c (the The distance between the second openings O2 on the negative side of the x-axis with respect to the line portion S12a can be set as the distance between the second openings O2.
  • the above-mentioned effect can be achieved even more effectively. That is, in a plan view, the second opening O2 is tilted and positioned in accordance with the second line portion S12a and the curved portion S12c, so that the above-described effects can be suitably achieved.
  • the first signal conductor S1 is located between the pair of second ground conductors G2.
  • the first signal conductor S1 is located side by side with the second ground conductor G2, so the first signal conductor S1 as a signal wiring can have a coplanar structure.
  • the coplanar structure allows high frequency signals to be transmitted smoothly.
  • the pair of second ground conductors G2 may include a second left ground conductor G2L and a second right ground conductor G2R, as shown in FIG.
  • the second left ground conductor G2L includes a second left outer ground conductor G21L located in line with the first line S11, and a second left inner layer ground conductor G22L located in line with the second line S12. Good too.
  • the second right ground conductor G2R includes a second right outer ground conductor G21R located in line with the first line S11, and a second right inner layer ground conductor G22R located in line with the second line S12. Good too.
  • the first insulating layer 1 may further have a first side surface 1c connected to the first upper surface 1a and the first lower surface 1b.
  • the second insulating layer 2 may have a second side surface 2c that is connected to the second upper surface 2a and the second lower surface 2b and is located inwardly with a space from the first side surface 1c in plan view. good.
  • the first upper surface 1a has a first region 11 located between the first side surface 1c and the second side surface 2c in plan view.
  • the first line S11 may extend to the first region 11 in plan view and may include a first connection portion S11b to which the external connection member 8 is connected.
  • the external connection member 8 includes flexible printed circuits (FPC), connection members such as wires and lead terminals, and printed circuit boards (PCB) on which electronic circuits are formed. It is a concept.
  • the external connection member 8 is a flexible substrate.
  • a connection member such as a wire or a lead terminal
  • a circuit board such as a printed circuit board may be connected to the end of the connection member.
  • a printed circuit board may be connected to the wiring board 101 using solder balls or the like. That is, the wiring board 101 may be mounted on a printed circuit board using a ball grid array (BGA).
  • BGA ball grid array
  • the wiring board 101 further includes a pair of second ground conductors G2 (second left ground conductor G2L and second right ground conductor G2R), the second left external ground conductor G21L and the second right external ground conductor G21L
  • the ground conductor of the external connection member 8 may be connected to the ground conductor G21R.
  • the third line S23 is located to extend to the first region 11 in plan view.
  • it may include a second connection portion S23b to which the external connection member 8 is connected.
  • the first ground conductor G1 may have one or more third openings O3 located overlapping the first connection portion S11b in plan view. With such a configuration, it is possible to reduce the possibility that the impedance value at the first connection portion S11b will decrease.
  • the first ground conductor G1 is connected to one or more seventh openings O7 located overlapping the second connection portion S23b in a plan view. It may have.
  • the first insulating layer 1 may further include a recess K1 having an opening in the first region 11.
  • the recess K1 may be located overlapping a part of the third opening O3 in plan view.
  • the wiring board 101 may further include a third ground conductor G3 that is electrically connected to the first ground conductor G1 and located on the second upper surface 2a.
  • the third ground conductor G3 may have one or more fourth openings O4.
  • the fourth opening O4 has a portion that overlaps with a portion of the second opening O2.
  • the fourth opening O4 may be shifted from the third opening O3 in plan view.
  • the third ground conductor G3 has one or more eighth openings O8. may have.
  • at least a portion of the fourth line portion S24a may be located overlapping the eighth opening O8 in plan view.
  • the eighth opening O8 may have a portion that overlaps with a portion of the sixth opening O6 in plan view.
  • an electronic component mounting package 100 includes a wiring board 101, a board 102, and a frame 103.
  • the frame 103 is joined to the upper surface of the board 102, and the wiring board 101 is fixed to the frame 103. Further, the wiring board 101 may be bonded to the upper surface of the board 102.
  • the substrate 102 has an upper surface.
  • the substrate 102 has a rectangular shape in a plan view, and has a size of 10 mm x 10 mm to 50 mm x 50 mm, and a thickness of 0.5 mm to 20 mm.
  • the material of the substrate 102 include metal materials such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or alloys containing these metal materials.
  • the substrate 102 may be a single metal plate or a laminate formed by laminating a plurality of metal plates.
  • the material of the substrate 102 is the above-mentioned metal material
  • the surface of the substrate 102 is plated with nickel or gold using an electroplating method or an electroless plating method in order to reduce oxidation corrosion.
  • a layer may be formed.
  • the material of the substrate 102 is an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or It may also be a ceramic material such as glass ceramics.
  • the board 102 may be a PCB on which an electric circuit is printed.
  • the wiring board 101 may be bonded to the board 102 by BGA.
  • the frame 103 is located on the upper surface of the board 102 and protects the electronic component 104 located inside when viewed from above. That is, in plan view, the frame 103 is located so as to surround the electronic component 104. As shown in FIG. 1, in one embodiment, the outer edge of the upper surface of the board 102 is surrounded by the frame 103 and the wiring board 101. In this way, the frame 103 does not have to surround the entire outer edge of the upper surface of the substrate 102. Further, in one embodiment, the frame 103 is located along the outer edge of the top surface of the substrate 102, but the frame 103 may be located inside the outer edge of the top surface of the substrate 102.
  • the frame 103 may be rectangular in plan view.
  • the wiring board 101 may be bonded to the lower surface of the frame 103. Furthermore, when the wiring board 101 is bonded to the upper surface of the board 102, the wiring board 101 may be sandwiched between the frame 103 and the board 102.
  • the material of the frame 103 may be, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials.
  • the material of the frame 103 is an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, or a silicon nitride sintered body.
  • it may be a ceramic material such as glass ceramics.
  • the frame 103 can be joined to the substrate 102 via a brazing material or the like.
  • the material of the brazing material is, for example, silver, copper, gold, aluminum, or magnesium, and may contain additives such as nickel, cadmium, or phosphorus.
  • the electronic module 10 includes an electronic component mounting package 100, an electronic component 104, and a lid 106. Further, the electronic module 10 may include a seal ring 105.
  • the electronic component 104 may be a component that processes signals, such as converting an optical signal into an electrical signal or converting an electrical signal into an optical signal.
  • the electronic component 104 is located on the upper surface of the board 102 and is housed in the electronic component mounting package 100.
  • Examples of the electronic component 104 include a semiconductor laser (LD) or an optical semiconductor element such as a photodiode (PD), a semiconductor integrated circuit element, and a sensor element such as an optical sensor.
  • Electronic component 104 can be formed from a semiconductor material, such as gallium arsenide or gallium nitride.
  • the electronic module 10 can be used as an optical communication module.
  • the lid 106 is positioned on the frame 103 to cover the inside of the electronic component mounting package 100, and protects the electronic component 104 together with the frame 103.
  • the lid body 106 has a rectangular shape in a plan view, and has a size of 10 mm x 10 mm to 50 mm x 50 mm, and a thickness of 0.5 mm to 2 mm.
  • the material of the lid body 106 include metal materials such as iron, copper, nickel, chromium, cobalt, molybdenum, or tungsten, or alloys made by combining a plurality of these metal materials.
  • the metal member constituting the lid body 106 can be manufactured by subjecting an ingot of such a metal material to a metal processing method such as a rolling method or a punching method.
  • the seal ring 105 has the function of joining the lid 106 and the frame 103.
  • the seal ring 105 is located on the frame 103 and surrounds the electronic component 104 in plan view.
  • Examples of the material for the seal ring 105 include metal materials such as iron, copper, silver, nickel, chromium, cobalt, molybdenum, or tungsten, or alloys made by combining multiple of these metal materials. Note that when the seal ring 105 is not provided on the frame body 103, the lid body 106 may be bonded via a bonding material such as solder, brazing material, glass, or resin adhesive, for example.
  • the impedance can be adjusted more appropriately, so that the signal transmission characteristics in the signal wiring can be improved. This makes it possible to provide an electronic component mounting package and an electronic module that can reduce loss in transmission of signals, particularly high-frequency signals.
  • the present disclosure can be used as a wiring board, a package for mounting electronic components using the wiring board, and an electronic module.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
PCT/JP2023/028615 2022-08-05 2023-08-04 配線基板、配線基板を用いた電子部品実装用パッケージおよび電子モジュール Ceased WO2024029628A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP23850181.1A EP4568426A1 (en) 2022-08-05 2023-08-04 Wiring board, electronic component mounting package using wiring board, and electronic module
US19/100,087 US20260059654A1 (en) 2022-08-05 2023-08-04 Wiring board, electronic component mounting package including wiring board, and electronic module
JP2024539224A JPWO2024029628A1 (https=) 2022-08-05 2023-08-04

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022-125560 2022-08-05
JP2022125560 2022-08-05

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WO2024029628A1 true WO2024029628A1 (ja) 2024-02-08

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EP (1) EP4568426A1 (https=)
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020084876A1 (en) * 2000-12-29 2002-07-04 Wright Mitchel E. Slotted ground plane for controlling the impedance of high speed signals on a printed circuit board
JP2003017618A (ja) * 2001-06-29 2003-01-17 Kyocera Corp 配線基板およびこれを用いた半導体装置
JP2009158511A (ja) * 2007-12-25 2009-07-16 Sumitomo Metal Electronics Devices Inc 入出力端子及び半導体素子収納用パッケージ
WO2010103722A1 (ja) 2009-03-10 2010-09-16 住友ベークライト株式会社 回路基板
JP2016057567A (ja) * 2014-09-12 2016-04-21 日本オクラロ株式会社 光モジュール、光送受信モジュール、及びフレキシブル基板
JP2018200949A (ja) * 2017-05-26 2018-12-20 京セラ株式会社 配線基板、電子部品収納用パッケージおよび電子装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020084876A1 (en) * 2000-12-29 2002-07-04 Wright Mitchel E. Slotted ground plane for controlling the impedance of high speed signals on a printed circuit board
JP2003017618A (ja) * 2001-06-29 2003-01-17 Kyocera Corp 配線基板およびこれを用いた半導体装置
JP2009158511A (ja) * 2007-12-25 2009-07-16 Sumitomo Metal Electronics Devices Inc 入出力端子及び半導体素子収納用パッケージ
WO2010103722A1 (ja) 2009-03-10 2010-09-16 住友ベークライト株式会社 回路基板
JP2016057567A (ja) * 2014-09-12 2016-04-21 日本オクラロ株式会社 光モジュール、光送受信モジュール、及びフレキシブル基板
JP2018200949A (ja) * 2017-05-26 2018-12-20 京セラ株式会社 配線基板、電子部品収納用パッケージおよび電子装置

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JPWO2024029628A1 (https=) 2024-02-08
EP4568426A1 (en) 2025-06-11

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