WO2024016732A1 - 磁性存储器顶电极制备方法以及磁性存储单元 - Google Patents

磁性存储器顶电极制备方法以及磁性存储单元 Download PDF

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WO2024016732A1
WO2024016732A1 PCT/CN2023/086069 CN2023086069W WO2024016732A1 WO 2024016732 A1 WO2024016732 A1 WO 2024016732A1 CN 2023086069 W CN2023086069 W CN 2023086069W WO 2024016732 A1 WO2024016732 A1 WO 2024016732A1
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film layer
material film
metal
tunnel junction
layer
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PCT/CN2023/086069
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English (en)
French (fr)
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申力杰
于志猛
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浙江驰拓科技有限公司
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Publication of WO2024016732A1 publication Critical patent/WO2024016732A1/zh

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details

Definitions

  • the present invention relates to the technical field of magnetic memories, and in particular to a method for preparing a top electrode of a magnetic memory and a magnetic memory unit.
  • the patterned magnetic tunnel junction is usually covered with a dielectric layer, and then the top metal interconnection structure is formed by etching and filling metal.
  • the process window for the top of the magnetic tunnel junction becomes smaller, and it is limited by process limitations such as the filling aspect ratio of the top interconnect metal material, making it difficult to accurately expose the magnet during the etching process. Tunnel knot top.
  • a top electrode with a size larger than the magnetic tunnel junction can be formed on the top of the magnetic tunnel junction and then covered with a dielectric layer.
  • the top electrode can then be exposed by etching to form a top metal interconnect. connection structure.
  • this method will lead to a large height difference between the through holes in the array area and the logic area.
  • a large height difference requires very high etching selectivity ratios and makes the process more difficult.
  • the yield of the finished product is low due to open circuit problems. risk, and also increases the cost of the photomask.
  • the method for preparing the top electrode of a magnetic memory and the magnetic memory unit provided by the present invention can increase the process window at the top of the magnetic tunnel junction without increasing the height of the through holes in the array area and logic area.
  • the present invention provides a method for preparing a top electrode of a magnetic memory, including:
  • the bottom structure has a patterned magnetic tunnel junction, and the top of the magnetic tunnel junction is covered with a metal hard mask;
  • a sidewall layer is formed on the sidewall of the magnetic tunnel junction and the metal hard mask to form a first intermediate structure; wherein the sidewall layer is a single film layer or a stacked film layer;
  • the etching selectivity ratio of the backfill medium to the single film layer or the stacked film layer is higher than a predetermined threshold
  • a top metal interconnect structure is formed on the backfill dielectric.
  • forming a sidewall layer on the sidewalls of the magnetic tunnel junction and the metal hard mask to form the first intermediate structure includes:
  • Anisotropic etching is performed on the metal material film layer to remove the metal material film layer in horizontal areas to form a first intermediate structure.
  • the dielectric material film layer is formed of one or a combination of Al2O3 and SiN.
  • the metal material film layer is formed of one or a combination of Ta, Ti, Al and metal nitrides thereof.
  • over-etching is continued to at least partially expose the sidewalls of the metal hard mask.
  • forming a metal interconnect structure on the backfill dielectric includes:
  • the etched area is filled with metal material to form a top through hole.
  • An intermediate structure includes:
  • Anisotropic self-aligned etching is performed on the dielectric material film layer to remove the dielectric film layer in horizontal areas to form a first intermediate structure.
  • the present invention provides a magnetic storage unit, including:
  • a bottom structure having a patterned magnetic tunnel junction, the top of the magnetic tunnel junction being covered with a metal hard mask;
  • the sidewall layer is in contact with the sidewall of the magnetic tunnel junction.
  • the sidewall layer is a single film layer or a stacked film layer.
  • the etching selectivity ratio between the single film layer or the stacked film layer and the backfill medium exceeds predetermined threshold;
  • a top metal interconnect structure is in contact with the upper surface of the metal hard mask and the upper surface of the sidewall layer.
  • the sidewall layer includes:
  • a dielectric material film layer, the dielectric material film layer is provided on the sidewalls of the magnetic tunnel junction and at least part of the sidewalls of the metal hard mask;
  • the metal material film layer is disposed on the sidewall of the dielectric material film layer and at least part of the sidewall of the metal hard mask, wherein the metal material film layer and the etching of the backfill medium The etching selectivity ratio exceeds a predetermined threshold, and the metal material film layer needs to completely cover the dielectric material film layer.
  • the sidewall layer includes:
  • a dielectric material film layer which is disposed on the sidewalls of the magnetic tunnel junction and at least part of the sidewalls of the metal hard mask, wherein the etching of the dielectric material film layer and the backfill dielectric The selection ratio exceeds a predetermined threshold.
  • a single layer film is formed on the side walls of the magnetic tunnel junction and the metal hard mask.
  • the thickness of the metal material film layer can be used to expand the process window of the top through hole.
  • the dielectric material film layer is used to connect the magnetic tunnel junction and Separated by metal film layers. The thickness of the dielectric material film layer can also be used to expand the process window of the top through hole.
  • the dielectric material film layer should have a high etching selectivity ratio with the subsequent backfill dielectric. Since the technical solution provided by the present invention is to expand the process window of the top through hole by the thickness of the metal material film layer in the horizontal direction without adding additional stacks in the vertical direction, therefore, the technical solution provided by the present invention It is possible to increase the process window at the top of the magnetic tunnel junction without increasing the height of the through holes in the array area and logic area.
  • Figure 1 is a schematic diagram of the bottom interconnection structure of a method for preparing a top electrode of a magnetic memory according to an embodiment of the present invention
  • Figure 2 is a schematic structural diagram of a magnetic tunnel junction prepared by a magnetic memory top electrode preparation method according to another embodiment of the present invention.
  • Figure 3 is a schematic structural diagram of the sidewall layer formed by the preparation method of the top electrode of the magnetic memory according to another embodiment of the present invention.
  • Figure 4 is a schematic structural diagram of a top electrode preparation method of a magnetic memory after forming a top interconnect structure according to another embodiment of the present invention.
  • Figure 5 is a schematic structural diagram of the top electrode preparation method of a magnetic memory after forming a dielectric material film layer according to another embodiment of the present invention.
  • Figure 6 is a schematic structural diagram of a magnetic memory top electrode preparation method after etching a dielectric material film layer according to another embodiment of the present invention.
  • Figure 7 shows another embodiment of the magnetic memory top electrode preparation method of the present invention after forming a metal material film layer. Structural diagram
  • Figure 8 is a schematic structural diagram of a magnetic memory top electrode preparation method after etching a metal material film layer according to another embodiment of the present invention.
  • Figure 9 is a schematic structural diagram of a top electrode preparation method of a magnetic memory after forming a top interconnect structure according to another embodiment of the present invention.
  • Figure 10 is a schematic structural diagram of a magnetic memory top electrode preparation method after forming a dielectric material film layer according to another embodiment of the present invention.
  • Figure 11 is a schematic structural diagram of a magnetic memory top electrode preparation method after etching a dielectric material film layer according to another embodiment of the present invention.
  • FIG. 12 is a schematic structural diagram of a top electrode preparation method of a magnetic memory after forming a top interconnect structure according to another embodiment of the present invention.
  • Embodiments of the present invention provide a method for preparing a top electrode of a magnetic memory, as shown in Figures 1-4, including:
  • the bottom structure has a patterned magnetic tunnel junction 5, the top of the magnetic tunnel junction 5 is covered with a metal hard mask 6;
  • a bottom interconnection structure needs to be prepared on the substrate 1 first. From bottom to top, there are patterned bottom metal 2, bottom via hole 3, and bottom electrode 4. The bottom via hole 3 is optional. Structure. Generally, in order to ensure that Cu contamination is avoided during the etching process of the magnetic tunnel junction 5, the bottom electrode 4 should be Non-Cu materials, such as Ta, Ti or their metal nitrides; in addition, to ensure device performance, the surface roughness of the bottom electrode 4 is generally less than 0.3nm. After completing the previous steps, the structure is shown in Figure 1. Based on the structure shown in Figure 1, the magnetic tunnel junction 5 material and the hard mask material are deposited on the flat surface of the bottom electrode 4 and patterned to separate the memory cells from each other.
  • an over-etching step is added after etching to remove metal backsplash generated on the sidewalls of the magnetic tunnel junction 5 .
  • the magnetic tunnel junction 5 and the metal hard mask 6 are patterned, and a bottom structure is formed after patterning.
  • the bottom circuit structure is shown in Figure 2.
  • a sidewall layer 7 is formed on the sidewalls of the magnetic tunnel junction and the metal hard mask to form a first intermediate structure; wherein the sidewall layer 7 is a single film layer or a stacked film layer;
  • the sidewall layer 7 is formed on at least part of the sidewall of the magnetic tunnel junction and the metal hard mask sidewall to protect the magnetic tunnel junction.
  • the etching selectivity ratio of the backfill medium 8 to the single film layer or the stacked film layer is higher than a predetermined threshold
  • a backfill medium 8 is formed on the first intermediate structure to cover the magnetic tunnel connection and the sidewall layer 7.
  • the etching selectivity ratio between the backfill medium 8 and the sidewall layer 7 is higher than a predetermined threshold, for example, higher than 10: 1.
  • a top metal interconnect structure is formed on the backfill dielectric 8 .
  • the top through hole 9 during the process of etching the top through hole 9, not only the metal hard mask has a blocking effect on the etching, but the sidewall layer 7 also has a blocking effect on the etching.
  • the top through hole 9 is partially deviated, The sidewalls of the magnetic tunnel junction will not be exposed and damaged, so there is a larger process window in this step.
  • the magnetic tunnel junction is formed on the side wall of the magnetic tunnel junction and the metal hard mask.
  • the single film layer or the stacked film layer expands the area where the top of the magnetic tunnel junction can have a high etching selectivity ratio with the backfill dielectric 8, thereby increasing the process window during the preparation process of the top through hole 9.
  • the thickness of the metal material film layer 72 can be used to expand the process window of the top through hole 9 .
  • the dielectric material film layer 71 is used to expand the process window of the top through hole 9 .
  • the magnetic tunnel junction 5 and the metal material film layer 72 are separated.
  • the thickness of the dielectric material film layer 71 can also be used to expand the process window of the top through hole 9 .
  • the dielectric material film layer 71 should have a high etching selectivity ratio with the subsequent backfill dielectric 8 . Since the technical solution provided by this embodiment is to expand the process window of the top through hole 9 by the thickness of the metal material film layer 72 in the horizontal direction without adding additional stacks in the vertical direction, therefore, this embodiment The technical solution provided can increase the process window at the top of the magnetic tunnel junction 5 without increasing the height of the through holes in the array area and logic area.
  • the large etching selectivity ratio of dielectric to metal can be used to increase the process window for the preparation of the top circuit structure and reduce the risk of short circuits.
  • forming a sidewall layer on the sidewalls of the magnetic tunnel junction and the metal hard mask to form the first intermediate structure includes:
  • a protective layer that is, the dielectric material film layer 71 is deposited in situ.
  • the dielectric material film layer 71 is formed of an insulating material and has Certain mechanical strength and water vapor isolation, such as Al 2 O 3 , SiN, etc. After the dielectric material film layer 71 is formed, the structure is as shown in FIG. 5 .
  • anisotropic etching refers to an etching method that has a selectivity for the etching direction, usually an etching method that exhibits different etching rates based on different crystallographic planes.
  • anisotropic etching of the dielectric material film layer 71 through anisotropic etching of the dielectric material film layer 71, the dielectric material film layer 71 formed horizontally on the upper surface of the metal hard mask 6 and the dielectric material film layer 71 formed horizontally on the upper surface of the bottom interconnect structure can be etched. It is etched away, leaving the dielectric material film layer 71 formed vertically on the side walls of the magnetic tunnel junction 5 and the metal hard mask 6 .
  • the second intermediate structure is shown in Figure 6.
  • a metal material film layer 72 is formed on the second intermediate structure; wherein the etching selectivity ratio of the backfill medium 8 and the metal material film layer 72 is higher than a predetermined threshold;
  • the above-mentioned retained dielectric material film layer 71 and metal hard mask 6 form protection for the magnetic tunnel junction 5 .
  • a layer of metal material is further deposited to form a metal material film layer 72.
  • the metal material can be, for example, Ta, Ti, Al and metal nitrides thereof. After the metal material film layer 72 is formed, its structure is as shown in FIG. 7 .
  • the metal material film layer 72 is anisotropically etched, and the metal material film layer 72 formed horizontally on the upper surface of the metal hard mask 6 and the metal material film layer 72 formed horizontally on the surface of the bottom interconnect structure are It is etched away, leaving the metal material film layer 72 formed on the dielectric material layer and/or the vertical surface of the side wall of the metal hard mask 6 .
  • the first intermediate structure is shown in Figure 8. After continuing to form the top metal interconnection structure on the first intermediate structure, its structure is as shown in Figure 9.
  • dielectric material needs to be filled first, the dielectric material is etched, and the etched through holes and grooves are filled with metal material to form the top interconnection structure.
  • the top through hole 9 and the top metal interconnection line 10 can be etched twice and filled once, or they can be filled separately by etching twice.
  • the top metal interconnect structure After the top metal interconnect structure is formed, its structure is shown in Figure 9.
  • the sidewall layer 7 has a stacked film layer structure, and the stacked film layer includes a dielectric material film layer 71 and a metal material film layer 72 .
  • the dielectric material film layer 71 is formed of one or a combination of Al 2 O 3 and SiN.
  • the dielectric material film layer 71 should be made of insulating material and have certain mechanical strength and the function of isolating moisture.
  • a single material can be selected, or a mixture or composite of two materials can be used.
  • the metal material film layer 72 is formed of one or a combination of Ta, Ti, Al and metal nitrides thereof.
  • the metal material film layer 72 is used to increase the process window of the top through hole 9 . Therefore, the metal material film layer 72 needs to be a material that can have a high etching selectivity ratio with the backfill dielectric 8 . In this embodiment, for the material selection of the metal material film layer 72, one of the aforementioned materials can be selected, or a mixture or composite material of several of the aforementioned materials can be selected.
  • over-etching is continued to at least partially expose the sidewalls of the metal hard mask 6 .
  • the metal material film layer 72 in order to reduce the difference in through hole height between the array area and the logic area, in this embodiment, after anisotropic etching is performed on the dielectric material layer, over-etching is continued to make the metal hard mask 6 The sidewalls are partially exposed, so that when the metal material film layer 72 is formed, the metal material film layer 72 can contact the sidewalls of the metal hard mask 6 to avoid magnetic tunnel junction sidewalls caused by etching of the dielectric material film layer 71 is destroyed, and at the same time, it is beneficial to reduce the thickness of the overall structure and reduce the difference in the height of the through holes in the array area and the logic area.
  • forming a metal interconnection structure on the backfill medium 8 includes:
  • the etched area is filled with metal material to form a top through hole 9 .
  • a larger etching selectivity ratio of dielectric to metal is used to increase the process window for the preparation of the top through hole 9 and reduce the risk of short circuit.
  • the top through hole 9 may be a part that contacts the metal hard mask 6 and the metal material film layer 72 , or it may cover the entire metal hard mask 6 and contact the metal material film layer 72 .
  • forming a sidewall layer on the sidewalls of the magnetic tunnel junction and the metal hard mask to form the first intermediate structure includes:
  • a dielectric material film layer 71 is formed on the bottom structure; wherein the etching selectivity ratio between the backfill medium 8 and the dielectric material film layer exceeds a predetermined threshold;
  • the material forming the dielectric material film layer includes but is not limited to aluminum oxide.
  • the dielectric material film layer 71 and the backfill dielectric 8 have a high etching selectivity ratio, which can block the etching process and expand the process window of the top through hole 9. At the same time, it can also protect the side walls of the magnetic tunnel junction. After the dielectric material film layer 71 is formed, its structure is as shown in FIG. 10 .
  • Anisotropic self-aligned etching is performed on the dielectric material film layer 71 to remove the dielectric material film layer in the horizontal area to form a first intermediate structure.
  • anisotropic etching refers to an etching method that has a selectivity for the etching direction, usually an etching method that exhibits different etching rates based on different crystallographic planes.
  • anisotropic etching of the dielectric material film layer 71 through anisotropic etching of the dielectric material film layer 71, the dielectric material film layer 71 formed horizontally on the upper surface of the metal hard mask 6 and the dielectric material film layer 71 formed horizontally on the upper surface of the bottom interconnect structure can be formed. 71 is etched away, while the dielectric material film layer 71 formed vertically on the side walls of the magnetic tunnel junction 5 and the metal hard mask 6 remains.
  • the removal of the dielectric material film layer 71 formed horizontally is beneficial to reducing the depth difference of the top through hole 9 in the logic area and the array area, while the retention of the dielectric material film layer 71 formed vertically on the side wall can reduce the depth of the top through hole 9
  • the etching forms a blocking effect and expands the process window for etching the top through hole 9 .
  • the structure after etching is completed is shown in Figure 11. After the subsequent formation of the backfill dielectric 8 and the top metal interconnect structure, the formed junction The structure is shown in Figure 12.
  • the sidewall layer 7 has a single-layer film structure, including a dielectric material film layer 71 .
  • An embodiment of the present invention also provides a magnetic storage unit, including:
  • a bottom structure having a patterned magnetic tunnel junction, the top of the magnetic tunnel junction being covered with a metal hard mask;
  • the sidewall layer is in contact with the sidewall of the magnetic tunnel junction.
  • the sidewall layer is a single film layer or a stacked film layer.
  • the etching selectivity ratio between the single film layer or the stacked film layer and the backfill medium exceeds predetermined threshold;
  • a top metal interconnect structure is in contact with the upper surface of the metal hard mask and the upper surface of the sidewall layer.
  • the sidewall layer includes:
  • a dielectric material film layer, the dielectric material film layer is provided on the sidewalls of the magnetic tunnel junction and part of the sidewalls of the metal hard mask;
  • the metal material film layer is provided on the sidewall of the dielectric material film layer and part of the sidewall of the metal hard mask, wherein the etching of the metal material film layer and the backfill dielectric
  • the selection ratio exceeds a predetermined threshold, and the metal material film layer needs to completely cover the dielectric material film layer.
  • the sidewall layer includes:
  • a dielectric material film layer, the dielectric material film layer is disposed on the sidewalls of the magnetic tunnel junction and part of the sidewalls of the metal hard mask, wherein the etching selection of the dielectric material film layer and the backfill dielectric ratio exceeds a predetermined threshold.

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Abstract

本发明提供一种磁性存储器顶电极制备方法，包括：提供一底部结构，所述底部结构具有图形化的磁性隧道结，所述磁性隧道结顶部覆盖有金属硬掩膜；在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构；其中，所述侧壁层为单层膜层或堆叠膜层；在所述第一中间结构上形成回填介质，所述回填介质与单层膜层或所述堆叠膜层的刻蚀选择比高于预定阈值；在所述回填介质上形成顶部金属互连结构。本发明提供的磁性存储器顶电极制备方法，能够在不增大阵列区和逻辑区通孔高度的前提下，增大磁性隧道结顶部的工艺窗口。

Description

磁性存储器顶电极制备方法以及磁性存储单元 技术领域
本发明涉及磁性存储器技术领域，尤其涉及一种磁性存储器顶电极制备方法以及磁性存储单元。
背景技术
在磁性隧道结的制备过程中，通常在图形化之后的磁性隧道结上覆盖介质层，再通过刻蚀和填充金属形成顶部的金属互连结构。但是，随着磁性隧道结的尺寸减小，磁性隧道接顶部的工艺窗口变小，又受限于顶部互连金属材料填充深宽比等工艺限制，很难在刻蚀过程中准确的暴露磁性隧道结顶部。
为了增大磁性隧道结顶部的工艺窗口，可以在磁性隧道结的顶部形成一个尺寸大于磁性隧道结的顶电极后再覆盖介质层，再通过刻蚀的方式使顶电极暴露后形成顶部的金属互连结构。但是，这种方式会导致阵列区和逻辑区的通孔高度差异较大，较大高度差对刻蚀选择比的要求非常高，工艺难度较大，因为开路问题造成成品的良率较低的风险，同时也增加了光罩成本。
发明内容
本发明提供的磁性存储器顶电极制备方法以及磁性存储单元，能够在不增大阵列区和逻辑区通孔高度的前提下，增大磁性隧道结顶部的工艺窗口。
第一方面，本发明提供一种磁性存储器顶电极制备方法，包括：
提供一底部结构，所述底部结构具有图形化的磁性隧道结，所述磁性隧道结顶部覆盖有金属硬掩膜；
在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构；其中，所述侧壁层为单层膜层或堆叠膜层；
在所述第一中间结构上形成回填介质，所述回填介质与单层膜层或所述堆叠膜层的刻蚀选择比高于预定阈值；
在所述回填介质上形成顶部金属互连结构。
可选地，在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构包括：
在所述底部结构上形成介质材料膜层；
对所述介质材料膜层进行各向异性刻蚀，去除水平区域的介质材料膜层，以形成第二中间结构；
在所述第二中间结构上形成金属材料膜层；其中，所述回填介质与所述金属材料膜层的刻蚀选择比高于预定阈值；
对所述金属材料膜层进行各向异性刻蚀，去除水平区域的金属材料膜层，以形成第一中间结构。
可选地，所述介质材料膜层采用Al2O3和SiN中的一种或两种的组合形成。
可选地，所述金属材料膜层采用Ta、Ti、Al及其金属氮化物中的一种或几种的组合形成。
可选地，对所述介质材料层进行各向异性刻蚀后，继续进行过刻蚀，以使所述金属硬掩膜的侧壁至少部分暴露。
可选地，在所述回填介质上形成金属互连结构包括：
对所述回填介质对应于所述磁隧道结单元的位置进行刻蚀，至少暴露出金属硬掩膜的部分上表面和金属材料膜层的部分上表面；
对刻蚀的区域采用金属材料进行填充，以形成顶部通孔。
可选地，在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第 一中间结构包括：
在所述底部结构上形成介质材料膜层；其中，所述回填介质与所述介质膜层的刻蚀选择比超过预定阈值；
对所述介质材料膜层进行各向异性自对准刻蚀，去除水平区域的介质膜层，以形成第一中间结构。
第二方面，本发明提供一种磁性存储单元，包括：
底部结构，所述底部结构具有图形化的磁性隧道结，所述磁性隧道结顶部覆盖有金属硬掩膜；
侧壁层，与所述磁性隧道结侧壁接触，所述侧壁层为单层膜层或堆叠膜层，所述单层膜层或所述堆叠膜层与回填介质的刻蚀选择比超过预定阈值；
回填介质，覆盖所述底部结构和所述侧壁层；
顶部金属互连结构，与所述金属硬掩膜上表面和所述侧壁层上表面接触。
可选地，所述侧壁层包括：
介质材料膜层，所述介质材料膜层设置在所述磁性隧道结的侧壁和所述金属硬掩膜的至少部分侧壁；
金属材料膜层，所述金属材料膜层设置在所述介质材料膜层的侧壁和所述金属硬掩膜的至少部分侧壁，其中，所述金属材料膜层与所述回填介质的刻蚀选择比超过预定阈值，且所述金属材料膜层需完全覆盖所述介质材料膜层。
可选地，所述侧壁层包括：
介质材料膜层，所述介质材料膜层设置在所述磁隧道结的侧壁和所述金属硬掩膜的至少部分侧壁，其中，所述介质材料膜层与所述回填介质的刻蚀选择比超过预定阈值。
在本发明的技术方案中，通过在磁隧道结和金属硬掩膜的侧壁形成单层膜 层或者堆叠膜层，将磁隧道结顶部能够与回填介质具有高刻蚀选择比的区域进行扩大，从而，增大了顶部通孔在制备过程中的工艺窗口。在本发明提供的技术方案中，可以利用金属材料膜层的厚度对顶部通孔的工艺窗口进行扩大，这种情况下，为了避免磁性隧道结的短路，通过介质材料膜层对磁性隧道结和金属材料膜层进行分隔。也可以采用介质材料膜层的厚度对顶部通孔的工艺窗口进行扩大，在这种情况下，介质材料膜层应当与后续的回填介质具有高刻蚀选择比。由于本发明提供的技术方案是在水平方向上以金属材料膜层的厚度对顶部通孔的工艺窗口进行扩大，并未在竖直方向上增加额外的叠层，因此，本发明提供的技术方案能够在不增大阵列区和逻辑区通孔高度的前提下，增大磁性隧道结顶部的工艺窗口。
附图说明
图1为本发明一实施例磁性存储器顶电极制备方法底部互连结构示意图；
图2为本发明另一实施例磁性存储器顶电极制备方法制备磁性隧道结后的结构示意图；
图3为本发明另一实施例磁性存储器顶电极制备方法形成侧壁层后的结构示意图；
图4为本发明另一实施例磁性存储器顶电极制备方法形成顶部互连结构后的结构示意图；
图5为本发明另一实施例磁性存储器顶电极制备方法形成介质材料膜层后的结构示意图；
图6为本发明另一实施例磁性存储器顶电极制备方法刻蚀介质材料膜层后的结构示意图；
图7为本发明另一实施例磁性存储器顶电极制备方法形成金属材料膜层后 的结构示意图；
图8为本发明另一实施例磁性存储器顶电极制备方法刻蚀金属材料膜层后的结构示意图；
图9为本发明另一实施例磁性存储器顶电极制备方法形成顶部互连结构后的结构示意图；
图10为本发明另一实施例磁性存储器顶电极制备方法形成介质材料膜层后的结构示意图；
图11为本发明另一实施例磁性存储器顶电极制备方法刻蚀介质材料膜层后的结构示意图；
图12为本发明另一实施例磁性存储器顶电极制备方法形成顶部互连结构后的结构示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例提供一种磁性存储器顶电极制备方法，如图1-4所示，包括：
提供一底部结构，所述底部结构具有图形化的磁性隧道结5，所述磁性隧道结5顶部覆盖有金属硬掩膜6；
在一些实施例中，首先需要在衬底1上制备底部互连结构，自下而上依次为图形化的底部金属2，底部通孔3，底部电极4，其中，底部通孔3为可选的结构。一般的，为保证磁隧道结5刻蚀过程中避免出现Cu污染，底部电极4应为 非Cu材料，如Ta，Ti或其金属氮化物；另外，为保证器件性能，底部电极4的表面粗糙度一般小于0.3nm。完成前述步骤后，结构如图1所示。在图1所示的结构基础上，在平整的底部电极4表面沉积磁性隧道结5材料及硬掩模材料并对其进行图形化，使存储单元彼此分立。一般的，为保证器件性能，会在刻蚀后增加过刻蚀步骤去除磁隧道结5侧壁产生的金属反溅。形成磁性隧道结5和金属硬掩膜6后，对磁性隧道结5和金属硬掩膜6进行图形化，图形化之后形成底部结构。底部电路结构如图2所示。
在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层7，以形成第一中间结构；其中，所述侧壁层7为单层膜层或堆叠膜层；
在一些实施例中，如图3所示，侧壁层7形成于磁性隧道结的侧壁以及金属硬掩膜侧壁的至少部分区域，对磁性隧道结起到保护作用。
在所述第一中间结构上形成回填介质8，所述回填介质8与单层膜层或所述堆叠膜层的刻蚀选择比高于预定阈值；
在所述第一中间结构上形成回填介质8，将磁性隧道接以及侧壁层7进行覆盖，回填介质8与侧壁层7的刻蚀选择比高于预定的阈值，例如，高于10:1，当对顶部通孔9进行刻蚀时，即使顶部通孔9的刻蚀位置部分偏离了金属硬掩膜而对准了侧壁层7，侧壁层7也能够阻挡刻蚀的进程，从而避免磁性隧道结的侧面裸露而被破坏。
在所述回填介质8上形成顶部金属互连结构。
在一些实施例中，在刻蚀顶部通孔9的过程中，不仅金属硬掩膜对于刻蚀具有阻挡作用，侧壁层7也对刻蚀具有阻挡作用，当顶部通孔9局部偏离时，不会使磁性隧道结的侧壁暴露而被破坏，因此，在本步骤中具有较大的工艺窗口。
在本实施例提供的技术方案中，通过在磁隧道结和金属硬掩膜的侧壁形成 单层膜层或者堆叠膜层，将磁隧道结顶部能够与回填介质8具有高刻蚀选择比的区域进行扩大，从而，增大了顶部通孔9在制备过程中的工艺窗口。在本实施例提供的技术方案中，可以利用金属材料膜层72的厚度对顶部通孔9的工艺窗口进行扩大，这种情况下，为了避免磁性隧道结5的短路，通过介质材料膜层71对磁性隧道结5和金属材料膜层72进行分隔。也可以采用介质材料膜层71的厚度对顶部通孔9的工艺窗口进行扩大，在这种情况下，介质材料膜层71应当与后续的回填介质8具有高刻蚀选择比。由于本实施例提供的技术方案是在水平方向上以金属材料膜层72的厚度对顶部通孔9的工艺窗口进行扩大，并未在竖直方向上增加额外的叠层，因此，本实施例提供的技术方案能够在不增大阵列区和逻辑区通孔高度的前提下，增大磁性隧道结5顶部的工艺窗口。在顶部电路结构的刻蚀中，能够利用介质与金属较大的刻蚀选择比，为顶部电路结构制备增加工艺窗口，减少短路风险。
作为一种可选的实施方式，如图5-9所示，在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构包括：
在所述底部结构上形成介质材料膜层71；
在一些实施例中，在对磁性隧道结5和金属硬掩膜6完成刻蚀后，原位沉积保护层，即介质材料膜层71，优选地，介质材料膜层71采用绝缘材料形成并有一定的机械强度和隔绝水气作用，如Al2O3，SiN等。在形成介质材料膜层71之后，结构如图5所示。
对所述介质材料膜层71进行各向异性自对准刻蚀，去除水平区域的介质材料膜层，以形成第二中间结构；
在一些实施例中，各向异性刻蚀是指对刻蚀方向具有选择比的刻蚀方式，通常是依据不同的结晶学平面呈现出不同的腐蚀速率的刻蚀方法。在本步骤 中，通过对介质材料膜层71的各向异性刻蚀，能使金属硬掩膜6上表面水平形成的介质材料膜层71以及底部互连结构上表面水平形成的介质材料膜层71被刻蚀掉，而保留了磁性隧道结5和金属硬掩膜6侧壁处竖直形成的介质材料膜层71。其中，第二中间结构如图6所示。
在所述第二中间结构上形成金属材料膜层72；其中，所述回填介质8与所述金属材料膜层72的刻蚀选择比高于预定阈值；
在一些实施例中，上述保留的介质材料膜层71与金属硬掩膜6对磁性隧道结5形成了保护。在上述的第一中间结构上，继续沉积一层金属材料形成金属材料膜层72，金属材料例如可以为Ta，Ti，Al及其金属氮化物。在形成金属材料膜层72之后，其结构如图7所示。
对所述金属材料膜层72进行各向异性自对准刻蚀，去除水平区域的金属材料膜层72，以形成第一中间结构；
在一些实施例中，对金属材料膜层72进行各向异性刻蚀，将金属硬掩膜6上表面水平形成的金属材料膜层72以及底部互连结构上表面水平形成的金属材料膜层72刻蚀掉，保留了在介质材料层和/或者金属硬掩膜6侧壁竖直面上形成的金属材料膜层72。其中，第一中间结构如图8所示。继续在所述第一中间结构上形成顶部金属互连结构后，其结构如图9所示。在一些实施例中，顶部金属互连结构的形成过程中，首先需要填充介质材料，再对介质材料进行刻蚀，对刻蚀后的通孔和凹槽中填充金属材料形成顶部互连结构。对于顶部互连结构来说，顶部通孔9和顶部金属互连线10可以采用两次刻蚀，一次填充的方式，也可以采用两次刻蚀分别填充的方式。在形成顶部金属互连结构之后，其结构如图9所示。采用本实施方式制备的存储单元中，其侧壁层7为堆叠膜层结构，堆叠膜层包括了介质材料膜层71和金属材料膜层72。
作为一种可选的实施方式，所述介质材料膜层71采用Al2O3和SiN中的一种或两种的组合形成。
在一些实施例中，介质材料膜层71应当采用绝缘材料，并且具备一定的机械强度和隔绝水气的作用。Al2O3和SiN中的一种或两种的组合形成作为介质材料膜层71时，可以选择单独一种材料，也可以采用两种的混合或者复合材料。
作为一种可选的实施方式，所述金属材料膜层72采用Ta、Ti、Al及其金属氮化物中的一种或几种的组合形成。
在一些实施例中，金属材料膜层72是用来增加顶部通孔9的工艺窗口的，因此，需要使金属材料膜层72为能够与回填介质8具有高刻蚀选择比的材料。在本实施方式中，对于金属材料膜层72的材料选择，可以选择前述的一种，也可以选择前述的几种材料的混合或复合材料。
作为一种可选的实施方式，对所述介质材料层进行各向异性刻蚀后，继续进行过刻蚀，以使所述金属硬掩膜6的侧壁至少部分暴露。
在一些实施例中，为了减少阵列区和逻辑区通孔高度的差异，在本实施方式中，对介质材料层进行各向异性刻蚀后，继续进行过刻蚀，使金属硬掩膜6的侧壁部分暴露，从而，在形成金属材料膜层72时，金属材料膜层72能够与金属硬掩膜6的侧壁接触，避免因介质材料膜层71被刻蚀而导致磁性隧道结侧壁被破坏，同时，有利于减少整体结构的厚度，缩小阵列区和逻辑区通孔高度的差异。
作为一种可选的实施方式，在所述回填介质8上形成金属互连结构包括：
对所述回填介质8对应于所述磁隧道结5单元的位置进行刻蚀，至少暴露出金属硬掩膜6的部分上表面和金属材料膜层72的部分上表面；
对刻蚀的区域采用金属材料进行填充，以形成顶部通孔9。
在一些实施例中，刻蚀中，利用介质与金属较大的刻蚀选择比，为顶部通孔9的制备增加工艺窗口，减少短路风险。对于顶部通孔9来说，可以接触金属硬掩膜6和金属材料膜层72的部分，也可以覆盖整个金属硬掩膜6并接触金属材料膜层72的部分。
作为一种可选的实施方式，如图10-12所示，在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构包括：
在所述底部结构上形成介质材料膜层71；其中，所述回填介质8与所述介质材料膜层的刻蚀选择比超过预定阈值；
在一些实施例中，介质材料膜层的形成材料包括但不限于氧化铝。介质材料膜层71与回填介质8具有高刻蚀选择比，能够对刻蚀进程形成阻挡，扩大顶部通孔9的工艺窗口，同时，还能够对磁性隧道结的侧壁形成保护。在形成介质材料膜层71之后，其结构如图10所示。
对所述介质材料膜层71进行各向异性自对准刻蚀，去除水平区域的介质材料膜层，以形成第一中间结构。
在一些实施例中，各向异性刻蚀是指对刻蚀方向具有选择比的刻蚀方式，通常是依据不同的结晶学平面呈现出不同的腐蚀速率的刻蚀方法。在本步骤中，通过对介质材料膜层71的各向异性刻蚀，能使金属硬掩膜6上表面水平形成的介质材料膜层71以及底部互连结构上表面水平形成的介质材料膜层71被刻蚀掉，而保留了磁性隧道结5和金属硬掩膜6侧壁处竖直形成的介质材料膜层71。水平形成的介质材料膜层71的去除，有利于缩小逻辑区域和阵列区域的顶部通孔9深度差异，而侧壁竖直形成的介质材料膜层71的保留，则能够对顶部通孔9的刻蚀形成阻挡作用，扩大顶部通孔9刻蚀的工艺窗口。刻蚀完成后的结构如图11所示。在后续继续形成回填介质8和顶部金属互连结构后，形成的结 构如图12所示。采用本实施方式制备的存储单元中，其侧壁层7为单层膜层结构，包括了介质材料膜层71。
本发明实施例还提供一种磁性存储单元，包括：
底部结构，所述底部结构具有图形化的磁性隧道结，所述磁性隧道结顶部覆盖有金属硬掩膜；
侧壁层，与所述磁性隧道结侧壁接触，所述侧壁层为单层膜层或堆叠膜层，所述单层膜层或所述堆叠膜层与回填介质的刻蚀选择比超过预定阈值；
回填介质，覆盖所述底部结构和所述侧壁层；
顶部金属互连结构，与所述金属硬掩膜上表面和所述侧壁层上表面接触。
可选地，所述侧壁层包括：
介质材料膜层，所述介质材料膜层设置在所述磁性隧道结的侧壁和所述金属硬掩膜的部分侧壁；
金属材料膜层，所述金属材料膜层设置在所述介质材料膜层的侧壁和所述金属硬掩膜的部分侧壁，其中，所述金属材料膜层与所述回填介质的刻蚀选择比超过预定阈值，且所述金属材料膜层需完全覆盖所述介质材料膜层。
可选地，所述侧壁层包括：
介质材料膜层，所述介质材料膜层设置在所述磁隧道结的侧壁和所述金属硬掩膜的部分侧壁，其中，所述介质材料膜层与所述回填介质的刻蚀选择比超过预定阈值。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以权利要求的保护范围为准。

Claims (10)

  1. 一种磁性存储器顶电极制备方法，其特征在于，包括：
    提供一底部结构，所述底部结构具有图形化的磁性隧道结，所述磁性隧道结顶部覆盖有金属硬掩膜；
    在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构；其中，所述侧壁层为单层膜层或堆叠膜层；
    在所述第一中间结构上形成回填介质，所述回填介质与单层膜层或所述堆叠膜层的刻蚀选择比高于预定阈值；
    在所述回填介质上形成顶部金属互连结构。
  2. 根据权利要求1所述的方法，其特征在于，在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构包括：
    在所述底部结构上形成介质材料膜层；
    对所述介质材料膜层进行各向异性自对准刻蚀，去除水平区域的介质材料膜层，以形成第二中间结构；
    在所述第二中间结构上形成金属材料膜层；其中，所述回填介质与所述金属材料膜层的刻蚀选择比高于预定阈值；
    对所述金属材料膜层进行各向异性自对准刻蚀，去除水平区域的金属材料膜层，以形成第一中间结构。
  3. 根据权利要求2所述的方法，其特征在于，所述介质材料膜层采用Al2O3和SiN中的一种或两种的组合形成。
  4. 根据权利要求2所述的方法，其特征在于，所述金属材料膜层采用Ta、Ti、Al及其金属氮化物中的一种或几种的组合形成。
  5. 根据权利要求1所述的方法，其特征在于，对所述介质材料层进行各向异性刻蚀后，继续进行过刻蚀，以使所述金属硬掩膜的侧壁至少部分暴露。
  6. 根据权利要求1所述的方法，其特征在于，在所述回填介质上形成顶部金属互连结构包括：
    对所述回填介质对应于所述磁隧道结单元的位置进行刻蚀，至少暴露出金属硬掩膜的部分上表面和金属材料膜层的部分上表面；
    对刻蚀的区域采用金属材料进行填充，以形成顶部通孔。
  7. 根据权利要求1所述的方法，其特征在于，在所述磁隧道结和所述金属硬掩膜的侧壁形成侧壁层，以形成第一中间结构包括：
    在所述底部结构上形成介质材料膜层；其中，所述回填介质与所述介质膜层的刻蚀选择比超过预定阈值；
    对所述介质材料膜层进行各向异性自对准刻蚀，去除水平区域的介质膜层，以形成第一中间结构。
  8. 一种磁性存储单元，其特征在于，包括：
    底部结构，所述底部结构具有图形化的磁性隧道结，所述磁性隧道结顶部覆盖有金属硬掩膜；
    侧壁层，与所述磁性隧道结侧壁接触，所述侧壁层为单层膜层或堆叠膜层，所述单层膜层或所述堆叠膜层与回填介质的刻蚀选择比超过预定阈值；
    回填介质，覆盖所述底部结构和所述侧壁层；
    顶部金属互连结构，与所述金属硬掩膜上表面和所述侧壁层上表面接触。
  9. 根据权利要求8所述磁性存储单元，其特征在于，所述侧壁层包括：
    介质材料膜层，所述介质材料膜层设置在所述磁性隧道结的侧壁和所述金属硬掩膜的部分侧壁；
    金属材料膜层，所述金属材料膜层设置在所述介质材料膜层的侧壁和所述金属硬掩膜的部分侧壁，其中，所述金属材料膜层与所述回填介质的刻蚀选择比超过预定阈值，且所述金属材料膜层需完全覆盖所述介质材料膜层。
  10. 根据权利要求8所述的磁性存储单元，其特征在于，所述侧壁层包括：
    介质材料膜层，所述介质材料膜层设置在所述磁隧道结的侧壁和所述金属硬掩膜的部分侧壁，其中，所述介质材料膜层与所述回填介质的刻蚀选择比超过预定阈值。
PCT/CN2023/086069 2022-07-19 2023-04-04 磁性存储器顶电极制备方法以及磁性存储单元 WO2024016732A1 (zh)

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