WO2024014784A1 - Procédé de collage de plaquettes et système de collage de plaquettes - Google Patents

Procédé de collage de plaquettes et système de collage de plaquettes Download PDF

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Publication number
WO2024014784A1
WO2024014784A1 PCT/KR2023/009551 KR2023009551W WO2024014784A1 WO 2024014784 A1 WO2024014784 A1 WO 2024014784A1 KR 2023009551 W KR2023009551 W KR 2023009551W WO 2024014784 A1 WO2024014784 A1 WO 2024014784A1
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Prior art keywords
wafer
gas
wafer bonding
plasma discharge
annealing
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PCT/KR2023/009551
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English (en)
Korean (ko)
Inventor
염근영
장윤종
위룽
문무겸
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성균관대학교산학협력단
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Publication of WO2024014784A1 publication Critical patent/WO2024014784A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere

Definitions

  • the present invention relates to a wafer bonding method and a wafer bonding system. More specifically, wafer bonding can block factors that may act as defects, can be processed at low temperatures, and can bond wafers economically due to process simplification. It relates to a method and wafer bonding system.
  • Conventional wafer bonding was a method of forming a silanol bond by generating -OH groups on the Si surface using H 2 O, etc. after surface treatment using plasma, and then forming a siloxane bond through an annealing process to achieve wafer bonding. If a defect occurs to achieve bonding, it has a significant impact on bonding energy, so management of contamination, etc. is essential. In particular, an annealing process at a high temperature is essential to form strong bonding energy.
  • a method that does not use H 2 O is Surface Activated Bonding (SAB), which removes contaminants on the surface and attaches them using a fast ion beam in a high vacuum.
  • SAB Surface Activated Bonding
  • it requires a high vacuum and uses an ion beam.
  • the present inventor discovered that wafers can be bonded in a plasma discharge state without additional treatment such as existing H 2 O, and through this, existing defects that can act as defects are blocked and low temperature invented a wafer bonding method and wafer bonding system that can be processed in a process that is inexpensive and cost-effective by simplifying the process.
  • Patent Document 1 Korean Patent No. 10-1503027
  • the technical problem to be achieved by the present invention is a wafer activation step of activating the wafer surface by performing a plasma discharge in a gas atmosphere between opposing wafers; and a wafer bonding step of forming a chemical bond by bonding opposing wafers with activated wafer surfaces while maintaining the plasma discharge.
  • a wafer bonding system which includes a plasma discharge unit that activates the wafer surface by performing a plasma discharge in a gas atmosphere between opposing wafers; and a wafer pressurizing unit that bonds opposing wafers with activated wafer surfaces to form a chemical bond while maintaining the plasma discharge.
  • an embodiment of the present invention includes a wafer activation step of activating the wafer surface by performing a plasma discharge in a gas atmosphere between opposing wafers; and a wafer bonding step of forming a chemical bond by bonding opposing wafers with activated wafer surfaces while maintaining the plasma discharge.
  • the gas may be characterized as including one or more selected from the group consisting of helium gas, neon gas, argon gas, krypton gas, and xenon gas.
  • the gas may further include one or more selected from the group consisting of oxygen, nitrogen, and water vapor.
  • an annealing step of annealing the bonded wafers may be further included after the wafer bonding step.
  • the annealing step may be characterized as annealing at a temperature of 500° C. or less for a time of 10 hours or less.
  • the wafer may be heated before or during the wafer activation step.
  • the plasma discharge is performed by providing a short circuit prevention layer on the opposite side of the activated surface of the opposing wafer, and contacting an electrode with the surface opposite to the surface where the short circuit prevention layer is in contact with the wafer. It may be a feature.
  • the short circuit prevention layer may be one or more selected from the group consisting of ceramic and quartz.
  • another embodiment of the present invention includes a plasma discharge unit that activates the wafer surface by performing a plasma discharge in a gas atmosphere between opposing wafers; and a wafer pressurizing unit that bonds opposing wafers with activated wafer surfaces to form a chemical bond while maintaining the plasma discharge.
  • the gas may be characterized as including one or more selected from the group consisting of helium gas, neon gas, argon gas, krypton gas, and xenon gas.
  • the gas may further include one or more selected from the group consisting of oxygen, nitrogen, and water vapor.
  • the wafer may further include an annealing unit that anneals the bonded wafers after bonding the wafer.
  • the annealing portion may be annealed at a temperature of 500° C. or less for 10 hours or less.
  • the wafer heating unit may further include a wafer heating unit that heats the wafer.
  • the plasma discharge is performed by providing a short circuit prevention layer on the opposite side of the activated surface of the opposing wafer, and contacting an electrode with the surface opposite to the surface where the short circuit prevention layer is in contact with the wafer. It may be a feature.
  • the short circuit prevention layer may be one or more selected from the group consisting of ceramic and quartz.
  • FIG. 1 is a conceptual diagram showing a wafer bonding method according to an embodiment of the present invention.
  • Figure 2 is a conceptual diagram showing the implementation of a wafer bonding method in a system according to an embodiment of the present invention.
  • Figure 3 is a diagram showing an experiment measuring contact angle according to plasma treatment time according to an embodiment of the present invention.
  • Figure 4 is a diagram showing a graph measuring the contact angle according to plasma treatment time according to an embodiment of the present invention.
  • Figure 5 is a diagram showing an SEM photograph of a cross section of a wafer bonded using a wafer bonding method according to an embodiment of the present invention.
  • an embodiment of the present invention includes a wafer activation step of activating the wafer surface by performing a plasma discharge in a gas atmosphere between opposing wafers; and a wafer bonding step of forming a chemical bond by bonding opposing wafers with activated wafer surfaces while maintaining the plasma discharge.
  • FIG. 1 is a conceptual diagram showing a wafer bonding method according to an embodiment of the present invention.
  • a plasma discharge is generated between the wafers in a gas atmosphere to activate the wafer surface.
  • the wafer surface can form a desired functional group on the wafer surface by the gas.
  • the plasma discharge can also be maintained in the wafer bonding step in which chemical bonds are formed by bonding opposing wafers with activated wafer surfaces.
  • a wafer bonding step of forming a chemical bond is performed by bonding opposing wafers with activated wafer surfaces while maintaining the plasma discharge. Since the process used does not exist in the wafer bonding process, the above problems may not occur.
  • the wafer may be a silicon-based wafer or a Group 3-5 wafer. Preferably, it may be a silicon-based wafer.
  • the gas may be characterized as including one or more selected from the group consisting of helium gas, neon gas, argon gas, krypton gas, and xenon gas.
  • the gas is an inert gas and can be a direct factor in the formation of hydrophilic groups during wafer bonding due to plasma formation and can also help plasma discharge when additional gas is introduced.
  • the additional gas may further include one or more selected from the group consisting of oxygen, nitrogen, and water vapor.
  • it may be oxygen.
  • the conventional wafer bonding technology proceeds by forming a silanol bond using water after plasma surface treatment and then forming a siloxane bond through an annealing process. This method not only involves many processes, but also generates H 2 O bubbles at the interface after bonding the wafer, or H 2 O bubbles and H 2 gas bubbles generated when silanol bonds change to siloxane bonds, resulting in bubbles after annealing. There was a problem in that it could not escape out of the wafer and stayed at the interface, causing defects.
  • a wafer bonding step of forming a chemical bond is performed by bonding opposing wafers with activated wafer surfaces while maintaining the plasma discharge. Since the process used does not exist in the wafer bonding process, the above problems can be solved.
  • the plasma can be generated using pulsed DC or alternating current voltage as an energy source.
  • the range of the DC or AC voltage may be 0 to 5 kV. Alternating voltage can also be applied using pulses.
  • the plasma can be generated using high frequency as an energy source.
  • the plasma can be generated at atmospheric pressure and sub-atmospheric pressure. For example, the pressure may be 5 torr or less.
  • an annealing step of annealing the bonded wafers may be further included after the wafer bonding step.
  • wafer bonding that was weakly bonded can be strengthened.
  • the annealing step may be characterized as annealing at a low temperature of 500°C or less for less than 10 hours.
  • the annealing time is suitable within 10 hours, but if it is longer than 10 hours, it may be inefficient.
  • the annealing process is performed at a low temperature, and if the temperature is high, damage may occur to the wafer or its devices, so annealing can be performed below 500°C.
  • the wafer may be heated before or during the wafer activation step.
  • annealing can be performed additionally in the wafer activation state during bonding, thereby making the bonding energy higher than before.
  • the plasma discharge is performed by providing a short circuit prevention layer on the opposite side of the activated surface of the opposing wafer, and contacting an electrode with the surface opposite to the surface where the short circuit prevention layer is in contact with the wafer. It may be a feature. By providing the short circuit prevention layer, it is possible to prevent a short circuit from occurring in the wafer bonding step, thereby maintaining the plasma discharge state.
  • the short circuit prevention layer may be one or more selected from the group consisting of ceramic and quartz.
  • the short circuit prevention layer has insulating properties and may preferably be ceramic.
  • another embodiment of the present invention includes a plasma discharge unit that activates the wafer surface by performing a plasma discharge in a gas atmosphere between opposing wafers; and a wafer pressurizing unit that bonds opposing wafers with activated wafer surfaces to form a chemical bond while maintaining the plasma discharge.
  • Figure 2 is a conceptual diagram showing the implementation of a wafer bonding method in a system according to an embodiment of the present invention.
  • the surface of the wafer can be activated by opposing two wafers and generating a plasma discharge between the wafers in a gas atmosphere.
  • the wafer surface can form a desired functional group on the wafer surface by the gas.
  • Opposing wafers whose surfaces are activated by the wafer pressure fixing unit can be bonded to form a chemical bond.
  • H 2 O bubbles, H 2 gas bubbles, etc. are generated at the interface, so the bubbles cannot escape out of the wafer after annealing and form a surface at the interface. You can solve problems that may cause defects by staying at .
  • the plasma discharge is performed to activate the wafer surface
  • the plasma discharge is maintained and opposing wafers with activated wafer surfaces are bonded to form a chemical bond. Since the process of using water does not exist in the wafer bonding process, the wafer surface is activated. Problems like this may not occur.
  • the wafer may be a silicon-based wafer or a Group 3-5 wafer. Preferably, it may be a silicon-based wafer.
  • the gas may be characterized as including one or more selected from the group consisting of helium gas, neon gas, argon gas, krypton gas, and xenon gas.
  • the gas is an inert gas and can be a direct factor in the formation of hydrophilic groups during wafer bonding due to plasma formation and can also help plasma discharge when additional gas is introduced.
  • the additional gas may further include one or more selected from the group consisting of oxygen, nitrogen, and water vapor.
  • it may be oxygen.
  • the conventional wafer bonding technology proceeds by forming a silanol bond using water after plasma surface treatment and then forming a siloxane bond through an annealing process. This method not only involves many processes, but also generates H 2 O bubbles at the interface after bonding the wafer, or H 2 O bubbles and H 2 gas bubbles generated when silanol bonds change to siloxane bonds, resulting in bubbles after annealing. There was a problem in that it could not escape out of the wafer and stayed at the interface, causing defects.
  • a wafer bonding step of forming a chemical bond is performed by bonding opposing wafers with activated wafer surfaces while maintaining the plasma discharge. Since the process used does not exist in the wafer bonding process, the above problems can be solved.
  • the plasma can be generated using pulsed DC or alternating current voltage as an energy source.
  • the range of the DC or AC voltage may be 0 to 5 kV. Alternating voltage can also be applied using pulses.
  • the plasma can be generated using high frequency as an energy source.
  • the plasma can be generated at atmospheric pressure and sub-atmospheric pressure. For example, the pressure may be 5 torr or less.
  • the wafer may further include an annealing unit that anneals the bonded wafers after bonding the wafer.
  • an annealing step of annealing the bonded wafers may be further included after the wafer bonding step.
  • wafer bonding that was weakly bonded can be strengthened.
  • the annealing step may be characterized as annealing at a low temperature of 500°C or less for less than 10 hours.
  • the annealing time is suitable within 10 hours, but if it is longer than 10 hours, it may be inefficient.
  • the annealing process is performed at a low temperature, and if the temperature is high, damage may occur to the wafer or its devices, so annealing can be performed below 500°C.
  • the wafer heating unit may further include a wafer heating unit that heats the wafer.
  • a wafer heating unit that heats the wafer annealing is additionally performed while the wafer is activated during bonding, and through this, bonding energy can be made higher than before.
  • the plasma discharge is performed by providing a short circuit prevention layer on the opposite side of the activated surface of the opposing wafer, and contacting an electrode with the surface opposite to the surface where the short circuit prevention layer is in contact with the wafer. It may be a feature.
  • the short circuit prevention layer may be one or more selected from the group consisting of ceramic and quartz.
  • the short circuit prevention layer has insulating properties and may preferably be ceramic.
  • annealing of the wafer begins in an annealing equipment.
  • bonding is completed.
  • contact angle measurement was performed by placing a water droplet on the sample and measuring the angle between the sample and the water droplet, and the results are shown in Figures 3 to 5.
  • Figure 3 is a diagram showing an experiment measuring contact angle according to plasma treatment time according to an embodiment of the present invention.
  • Figure 4 is a diagram showing a graph measuring the contact angle according to plasma treatment time according to an embodiment of the present invention.
  • Figure 5 is a diagram showing an SEM photograph of a cross section of a wafer bonded using a wafer bonding method according to an embodiment of the present invention.
  • the wafer is a silicon wafer, and the boundary between Si and SiO 2 (Dielectric Layer) is clearly visible, and it can be seen that the bonding is well formed to the extent that the interface between SiO 2 is difficult to clearly distinguish.
  • Si and SiO 2 Dielectric Layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

Un mode de réalisation de la présente invention concerne un procédé de collage de plaquettes et un système de collage de plaquettes. Plus précisément, l'invention concerne un procédé de collage de plaquettes et un système de collage de plaquettes qui peuvent bloquer des facteurs qui peuvent agir en tant que défauts, permettre un traitement à basse température, et coller des plaquettes de manière économique en raison d'une simplification de processus.
PCT/KR2023/009551 2022-07-15 2023-07-06 Procédé de collage de plaquettes et système de collage de plaquettes WO2024014784A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2022-0087248 2022-07-15
KR1020220087248A KR102586083B1 (ko) 2022-07-15 2022-07-15 웨이퍼 본딩 방법 및 웨이퍼 본딩 시스템

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100442310B1 (ko) * 2001-11-28 2004-07-30 최우범 플라즈마 전처리를 구비한 기판접합장치 및 그 제어방법
KR20080105956A (ko) * 2007-06-01 2008-12-04 참앤씨(주) 웨이퍼 본딩방법
KR20090021833A (ko) * 2007-08-28 2009-03-04 주식회사 실트론 Ｓｏｉ 웨이퍼의 제조방법
JP2011025302A (ja) * 2009-07-29 2011-02-10 Hiroshima Univ プラズマ基板表面処理接合方法とその装置

Family Cites Families (2)

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Publication number Priority date Publication date Assignee Title
DE10344113A1 (de) * 2003-09-24 2005-05-04 Erich Thallner Vorrichtung und Verfahren zum Verbinden von Wafern
KR101503027B1 (ko) 2010-11-19 2015-03-18 한국전자통신연구원 웨이퍼 접합방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100442310B1 (ko) * 2001-11-28 2004-07-30 최우범 플라즈마 전처리를 구비한 기판접합장치 및 그 제어방법
KR20080105956A (ko) * 2007-06-01 2008-12-04 참앤씨(주) 웨이퍼 본딩방법
KR20090021833A (ko) * 2007-08-28 2009-03-04 주식회사 실트론 Ｓｏｉ 웨이퍼의 제조방법
JP2011025302A (ja) * 2009-07-29 2011-02-10 Hiroshima Univ プラズマ基板表面処理接合方法とその装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
D PASQUARIELLO, K HJORT: "Plasma-assisted InP-to-Si low temperature wafer bonding", IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, INC. (IEEE), NEW YORK, 1 January 2002 (2002-01-01), New York , pages 118 - 131, XP055198319, Retrieved from the Internet <URL:http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=991407> DOI: 10.1109/2944.991407 *

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