WO2024012162A1 - Manufacturing method for p-type ibc battery - Google Patents

Manufacturing method for p-type ibc battery Download PDF

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WO2024012162A1
WO2024012162A1 PCT/CN2023/101137 CN2023101137W WO2024012162A1 WO 2024012162 A1 WO2024012162 A1 WO 2024012162A1 CN 2023101137 W CN2023101137 W CN 2023101137W WO 2024012162 A1 WO2024012162 A1 WO 2024012162A1
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layer
type
silicon substrate
type doped
manufacturing
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PCT/CN2023/101137
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French (fr)
Chinese (zh)
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张博
屈小勇
刘大伟
高嘉庆
张婷
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青海黄河上游水电开发有限责任公司西宁太阳能电力分公司
青海黄河上游水电开发有限责任公司西安太阳能电力分公司
青海黄河上游水电开发有限责任公司
国家电投集团黄河上游水电开发有限责任公司
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Publication of WO2024012162A1 publication Critical patent/WO2024012162A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • H01L31/076—Multiple junction or tandem solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • H01L31/077—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type the devices comprising monocrystalline or polycrystalline materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H01L31/182—Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to the technical field of photovoltaic power generation, and in particular, to a method for manufacturing a P-type IBC battery.
  • a solar cell is a device that converts the sun's light energy into electrical energy. Solar cells use the photovoltaic principle to generate carriers, and then use electrodes to extract the carriers, thereby facilitating the efficient use of electrical energy.
  • the IBC cell is one of the photovoltaic cells with the highest conversion efficiency at present.
  • the cell is based on monocrystalline silicon.
  • the p-n junction and metal electrode are located on the back of the cell. There is no metal electrode on the front to block light, so it can achieve very high short-circuit current and conversion efficiency.
  • IBC batteries can be divided into N-type IBC and P-type IBC batteries according to the matrix type. P-type IBC is increasingly favored by the industry due to its simple process and low cost.
  • the present invention provides a method for manufacturing a P-type IBC battery.
  • the manufacturing method includes:
  • etch the N-type doped layer and the first SiO 2 layer sequentially to expose a partial area of one side surface of the P-type silicon substrate;
  • Electrodes are respectively formed on the N-type doped layer and the P-type doped layer.
  • the phosphorus doping of the first intrinsic polysilicon layer includes:
  • the phosphosilicate glass formed during the doping process is cleaned by HF solution.
  • the boron doping of the second intrinsic polysilicon layer includes:
  • a laser doping process is used to diffuse the boron particles of the borosilicate glass layer into the second intrinsic polysilicon layer.
  • the width of the laser spot of the laser doping process is 10um ⁇ 300um, and the laser power is 20W ⁇ 80W.
  • the pulse width is 0.5us ⁇ 2us, and the laser frequency is ⁇ 20KHz;
  • the borosilicate glass layer and the borosilicate glass formed during the doping process are cleaned by HF solution.
  • the method includes:
  • the P-type silicon substrate after texturing is annealed and oxidized
  • a back silicon nitride layer and a front silicon nitride layer are formed.
  • the temperature of the annealing and oxidation is 850°C to 950°C
  • the duration is 10min to 30min
  • the oxygen introduction amount is ⁇ 8000sccm.
  • the mask layer is a silicon nitride film with a thickness of 50 nm to 70 nm.
  • the process includes:
  • a tunnel oxide layer is provided between the P-type silicon substrate, the N-type doped layer and the P-type doped layer, thereby improving the performance of the P-type IBC battery. photoelectric conversion efficiency.
  • Figure 1 is a flow chart of a manufacturing method of a P-type IBC battery according to an embodiment of the present invention.
  • This embodiment provides a method for manufacturing a P-type IBC battery, including:
  • Step S1 Sequentially layer and form a first SiO 2 layer and a first intrinsic polysilicon layer on one side surface of the P-type silicon substrate.
  • Step S2 Perform phosphorus doping on the first intrinsic polysilicon layer to form an N-type doped layer.
  • Step S3 Form a mask layer on the N-type doped layer, and pattern and groove the mask layer.
  • the mask layer is a silicon nitride film with a thickness of 50 nm to 70 nm.
  • Step S4 Use the mask layer as a mask to sequentially etch the N-type doped layer and the first SiO 2 layer to expose a partial area of one side surface of the P-type silicon substrate.
  • Step S5 Sequentially stack a second SiO 2 layer and a second intrinsic polysilicon layer on the partial area.
  • Step S6 Doping the second intrinsic polysilicon layer with boron to form a P-type doped layer.
  • Step S7 Form electrodes on the N-type doped layer and the P-type doped layer respectively.
  • doping the first intrinsic polysilicon layer with phosphorus includes: diffusing phosphorus impurities in an environment of 850°C to 900°C for 20 minutes. The phosphosilicate glass formed during the doping process is then washed with HF solution.
  • boron doping the second intrinsic polysilicon layer includes:
  • a borosilicate glass layer is deposited on the second intrinsic polysilicon layer.
  • a laser doping process is then used to diffuse the boron particles of the borosilicate glass layer into the second intrinsic polysilicon layer.
  • the laser spot width of the laser doping process is 10um ⁇ 300um
  • the laser power is 20W ⁇ 80W
  • the pulse width It is 0.5us ⁇ 2us
  • the laser frequency is ⁇ 20KHz.
  • the borosilicate glass layer and the borosilicate glass formed during the doping process are then cleaned by HF solution.
  • the method includes:
  • the P-type silicon substrate is put into a KOH solution with a mass concentration of 5% to 20% to be etched for 10s to 300s, and then cleaned with pure water.
  • the cleaned P-type silicon substrate is then placed into a KOH solution with a volume concentration of 1% to 3% for texturing for 7 to 10 minutes.
  • the texturized P-type silicon substrate is annealed and oxidized.
  • a back silicon nitride layer and a front silicon nitride layer are then formed.
  • the temperature of the annealing and oxidation is 850°C to 950°C
  • the duration is 10min to 30min
  • the oxygen introduction amount is ⁇ 8000sccm.
  • the process includes:
  • the P-type silicon substrate is put into a H 2 O 2 solution with a volume concentration of 0.2% to 1% to clean the surface of oil stains. Then, the P-type silicon substrate is put into a NaOH solution with a mass concentration of 5% to 20% for neutralization, and the metal ions and oxide layer are cleaned. Then wash and dry.
  • a tunnel oxide layer is provided between the P-type silicon substrate, the N-type doped layer and the P-type doped layer, thereby improving the P-type IBC The photoelectric conversion efficiency of the battery.

Abstract

Disclosed in the present invention is a manufacturing method for a P-type IBC battery. The manufacturing method comprises: sequentially forming a first SiO2 layer and a first intrinsic polycrystalline silicon layer in a stacked manner on a side surface of a P-type silicon substrate; performing phosphorus doping on the first intrinsic polycrystalline silicon layer to form an N-type doped layer; forming a mask layer on the N-type doped layer, and performing patterned slotting on the mask layer; sequentially etching the N-type doped layer and the first SiO2 layer by taking the mask layer as a mask, so as to expose a partial region of the side surface of the P-type silicon substrate; sequentially forming a second SiO2 layer and a second intrinsic polycrystalline silicon layer in a stacked manner in the partial region; performing boron doping on the second intrinsic polycrystalline silicon layer to form a P-type doped layer; and respectively forming electrodes on the N-type doped layer and the P-type doped layer. By means of the present invention, the photoelectric conversion efficiency of a P-type IBC battery is improved.

Description

一种P型IBC电池的制作方法A method of making a P-type IBC battery 技术领域Technical field
本发明涉及光伏发电技术领域，尤其涉及一种P型IBC电池的制作方法。The present invention relates to the technical field of photovoltaic power generation, and in particular, to a method for manufacturing a P-type IBC battery.
背景技术Background technique
目前，随着化石能源的逐渐耗尽，太阳电池作为新的能源替代方案，使用越来越广泛。太阳电池是将太阳的光能转换为电能的装置。太阳电池利用光生伏特原理产生载流子，然后使用电极将载流子引出，从而利于将电能有效利用。Currently, with the gradual depletion of fossil energy, solar cells are becoming more and more widely used as a new energy alternative. A solar cell is a device that converts the sun's light energy into electrical energy. Solar cells use the photovoltaic principle to generate carriers, and then use electrodes to extract the carriers, thereby facilitating the efficient use of electrical energy.
IBC电池是目前转换效率最高的光伏电池之一，该电池以单晶硅为基体，p-n结及金属电极均位于电池背面，正面无金属电极遮光，可以获得非常高的短路电流和转换效率。IBC电池按照基体类型可分为N型IBC及P型IBC电池，P型IBC由于工艺简单，成本较低，目前越来越受到行业青睐。The IBC cell is one of the photovoltaic cells with the highest conversion efficiency at present. The cell is based on monocrystalline silicon. The p-n junction and metal electrode are located on the back of the cell. There is no metal electrode on the front to block light, so it can achieve very high short-circuit current and conversion efficiency. IBC batteries can be divided into N-type IBC and P-type IBC batteries according to the matrix type. P-type IBC is increasingly favored by the industry due to its simple process and low cost.
但由于表面钝化问题，P型IBC电池转换效率受到制约，通过叠加钝化接触结构，可大幅提升P型IBC电池转换效率。However, due to the surface passivation problem, the conversion efficiency of P-type IBC cells is restricted. By superimposing passivation contact structures, the conversion efficiency of P-type IBC cells can be greatly improved.
发明内容Contents of the invention
鉴于现有技术存在的不足，本发明提供了一种P型IBC电池的制作方法，该制作方法包括：In view of the shortcomings of the existing technology, the present invention provides a method for manufacturing a P-type IBC battery. The manufacturing method includes:
在P型硅基片的一侧表面上依序层叠形成第一SiO2层和第一本征多晶硅层；Sequentially stacking a first SiO 2 layer and a first intrinsic polysilicon layer on one side surface of the P-type silicon substrate;
对所述第一本征多晶硅层进行磷掺杂，以形成N型掺杂层；Perform phosphorus doping on the first intrinsic polysilicon layer to form an N-type doped layer;
在所述N型掺杂层上形成掩膜层，并对所述掩膜层进行图案化开槽；Form a mask layer on the N-type doped layer, and pattern and groove the mask layer;
以所述掩膜层作为掩膜，依序刻蚀所述N型掺杂层和所述第一SiO2层，以露出所述P型硅基片的一侧表面的部分区域；Using the mask layer as a mask, etch the N-type doped layer and the first SiO 2 layer sequentially to expose a partial area of one side surface of the P-type silicon substrate;
在所述部分区域上依序层叠形成第二SiO2层和第二本征多晶硅层；Sequentially stacking a second SiO 2 layer and a second intrinsic polysilicon layer on the partial area;
对所述第二本征多晶硅层进行硼掺杂，以形成P型掺杂层；Boron doping the second intrinsic polysilicon layer to form a P-type doped layer;
在所述N型掺杂层和所述P型掺杂层上分别形成电极。Electrodes are respectively formed on the N-type doped layer and the P-type doped layer.
优选地，所述对所述第一本征多晶硅层进行磷掺包括：Preferably, the phosphorus doping of the first intrinsic polysilicon layer includes:
在850℃～900℃环境下，将磷杂质扩散20分钟； Diffuse phosphorus impurities for 20 minutes in an environment of 850°C to 900°C;
通过HF溶液清洗在掺杂过程中形成的磷硅玻璃。The phosphosilicate glass formed during the doping process is cleaned by HF solution.
优选地，所述对所述第二本征多晶硅层进行硼掺杂包括：Preferably, the boron doping of the second intrinsic polysilicon layer includes:
在所述第二本征多晶硅层上沉积形成硼硅玻璃层；depositing a borosilicate glass layer on the second intrinsic polysilicon layer;
采用激光掺杂工艺将所述硼硅玻璃层的硼粒子扩散到所述第二本征多晶硅层中，所述激光掺杂工艺的激光光斑的宽度为10um～300um，激光功率为20W～80W，脉冲宽度为0.5us～2us，激光频为≥20KHz；A laser doping process is used to diffuse the boron particles of the borosilicate glass layer into the second intrinsic polysilicon layer. The width of the laser spot of the laser doping process is 10um~300um, and the laser power is 20W~80W. The pulse width is 0.5us~2us, and the laser frequency is ≥20KHz;
通过HF溶液清洗所述硼硅玻璃层和在掺杂过程中形成的硼硅玻璃。The borosilicate glass layer and the borosilicate glass formed during the doping process are cleaned by HF solution.
优选地，在所述N型掺杂层和所述P型掺杂层上分别形成电极之前包括：Preferably, before forming electrodes on the N-type doped layer and the P-type doped layer respectively, the method includes:
将所述P型硅基片放入质量浓度为5％～20％的KOH溶液中腐蚀10s～300s，之后利用纯水进行清洗；Put the P-type silicon substrate into a KOH solution with a mass concentration of 5% to 20% to be etched for 10s to 300s, and then clean it with pure water;
将清洗后的所述P型硅基片放入体积浓度为1％～3％的KOH溶液中进行7min～10min的制绒；Put the cleaned P-type silicon substrate into a KOH solution with a volume concentration of 1% to 3% for texturing for 7 to 10 minutes;
对制绒后的所述P型硅基片进行退火氧化；The P-type silicon substrate after texturing is annealed and oxidized;
形成背面氮化硅层和正面氮化硅层。A back silicon nitride layer and a front silicon nitride layer are formed.
优选地，所述退火氧化的温度为850℃～950℃，时长为10min～30min，氧气通入量为≥8000sccm。Preferably, the temperature of the annealing and oxidation is 850°C to 950°C, the duration is 10min to 30min, and the oxygen introduction amount is ≥8000sccm.
优选地，所述掩膜层为氮化硅膜，厚度为50nm～70nm。Preferably, the mask layer is a silicon nitride film with a thickness of 50 nm to 70 nm.
优选地，在P型硅基片的一侧表面上依序层叠形成第一SiO2层和第一本征多晶硅层之前包括：Preferably, before sequentially stacking and forming the first SiO 2 layer and the first intrinsic polysilicon layer on one side surface of the P-type silicon substrate, the process includes:
将所述P型硅基片放入体积浓度为0.2％～1％的H2O2溶液中进行表面油污清洗；Put the P-type silicon substrate into a H 2 O 2 solution with a volume concentration of 0.2% to 1% to clean the surface of oil stains;
之后将所述P型硅基片放入质量浓度为5％～20％的NaOH溶液中进行中和，并清洗金属离子和氧化层；Then put the P-type silicon substrate into a NaOH solution with a mass concentration of 5% to 20% for neutralization, and clean the metal ions and oxide layer;
之后进行水洗和烘干处理。Then wash and dry.
采用本发明的制作方法来制作的P型IBC电池结构中，P型硅基片与N型掺杂层和P型掺杂层之间均设置有隧穿氧化层，从而提高了P型IBC电池的光电转换效率。 In the P-type IBC battery structure produced by the manufacturing method of the present invention, a tunnel oxide layer is provided between the P-type silicon substrate, the N-type doped layer and the P-type doped layer, thereby improving the performance of the P-type IBC battery. photoelectric conversion efficiency.
附图说明Description of drawings
图1为本发明实施例的P型IBC电池的制作方法的流程图。Figure 1 is a flow chart of a manufacturing method of a P-type IBC battery according to an embodiment of the present invention.
具体实施方式Detailed ways
为使本发明的目的、技术方案和优点更加清楚，下面结合附图对本发明的具体实施方式进行详细说明。这些优选实施方式的示例在附图中进行了例示。附图中所示和根据附图描述的本发明的实施方式仅仅是示例性的，并且本发明并不限于这些实施方式。In order to make the purpose, technical solutions and advantages of the present invention clearer, specific implementation modes of the present invention will be described in detail below with reference to the accompanying drawings. Examples of these preferred embodiments are illustrated in the accompanying drawings. The embodiments of the invention shown in and described with reference to the drawings are merely exemplary and the invention is not limited to these embodiments.
在此，还需要说明的是，为了避免因不必要的细节而模糊了本发明，在附图中仅仅示出了与根据本发明的方案密切相关的结构和/或处理步骤，而省略了与本发明关系不大的其他细节。Here, it should also be noted that, in order to avoid obscuring the present invention with unnecessary details, only the structures and/or processing steps closely related to the solution according to the present invention are shown in the drawings, and the details related to them are omitted. Other details are less relevant to the invention.
本实施例提供了一种P型IBC电池的制作方法，包括：This embodiment provides a method for manufacturing a P-type IBC battery, including:
步骤S1、在P型硅基片的一侧表面上依序层叠形成第一SiO2层和第一本征多晶硅层。Step S1: Sequentially layer and form a first SiO 2 layer and a first intrinsic polysilicon layer on one side surface of the P-type silicon substrate.
步骤S2、对所述第一本征多晶硅层进行磷掺杂，以形成N型掺杂层。Step S2: Perform phosphorus doping on the first intrinsic polysilicon layer to form an N-type doped layer.
步骤S3、在所述N型掺杂层上形成掩膜层，并对所述掩膜层进行图案化开槽。其中，所述掩膜层为氮化硅膜，厚度为50nm～70nm。Step S3: Form a mask layer on the N-type doped layer, and pattern and groove the mask layer. Wherein, the mask layer is a silicon nitride film with a thickness of 50 nm to 70 nm.
步骤S4、以所述掩膜层作为掩膜，依序刻蚀所述N型掺杂层和所述第一SiO2层，以露出所述P型硅基片的一侧表面的部分区域。Step S4: Use the mask layer as a mask to sequentially etch the N-type doped layer and the first SiO 2 layer to expose a partial area of one side surface of the P-type silicon substrate.
步骤S5、在所述部分区域上依序层叠形成第二SiO2层和第二本征多晶硅层。Step S5: Sequentially stack a second SiO 2 layer and a second intrinsic polysilicon layer on the partial area.
步骤S6、对所述第二本征多晶硅层进行硼掺杂，以形成P型掺杂层。Step S6: Doping the second intrinsic polysilicon layer with boron to form a P-type doped layer.
步骤S7、在所述N型掺杂层和所述P型掺杂层上分别形成电极。Step S7: Form electrodes on the N-type doped layer and the P-type doped layer respectively.
具体地，对所述第一本征多晶硅层进行磷掺包括：在850℃～900℃环境下，将磷杂质扩散20min。之后通过HF溶液清洗在掺杂过程中形成的磷硅玻璃。Specifically, doping the first intrinsic polysilicon layer with phosphorus includes: diffusing phosphorus impurities in an environment of 850°C to 900°C for 20 minutes. The phosphosilicate glass formed during the doping process is then washed with HF solution.
具体地，对所述第二本征多晶硅层进行硼掺杂包括：Specifically, boron doping the second intrinsic polysilicon layer includes:
在所述第二本征多晶硅层上沉积形成硼硅玻璃层。之后采用激光掺杂工艺将所述硼硅玻璃层的硼粒子扩散到所述第二本征多晶硅层中。其中，所述激光掺杂工艺的激光光斑的宽度为10um～300um，激光功率为20W～80W，脉冲宽度 为0.5us～2us，激光频为≥20KHz。之后通过HF溶液清洗所述硼硅玻璃层和在掺杂过程中形成的硼硅玻璃。A borosilicate glass layer is deposited on the second intrinsic polysilicon layer. A laser doping process is then used to diffuse the boron particles of the borosilicate glass layer into the second intrinsic polysilicon layer. Wherein, the laser spot width of the laser doping process is 10um~300um, the laser power is 20W~80W, and the pulse width It is 0.5us～2us, and the laser frequency is ≥20KHz. The borosilicate glass layer and the borosilicate glass formed during the doping process are then cleaned by HF solution.
优选地，在所述N型掺杂层和所述P型掺杂层上分别形成电极之前包括：Preferably, before forming electrodes on the N-type doped layer and the P-type doped layer respectively, the method includes:
将所述P型硅基片放入质量浓度为5％～20％的KOH溶液中腐蚀10s～300s，之后利用纯水进行清洗。之后将清洗后的所述P型硅基片放入体积浓度为1％～3％的KOH溶液中进行7min～10min的制绒。之后对制绒后的所述P型硅基片进行退火氧化。之后形成背面氮化硅层和正面氮化硅层。其中，所述退火氧化的温度为850℃～950℃，时长为10min～30min，氧气通入量为≥8000sccm。The P-type silicon substrate is put into a KOH solution with a mass concentration of 5% to 20% to be etched for 10s to 300s, and then cleaned with pure water. The cleaned P-type silicon substrate is then placed into a KOH solution with a volume concentration of 1% to 3% for texturing for 7 to 10 minutes. Then, the texturized P-type silicon substrate is annealed and oxidized. A back silicon nitride layer and a front silicon nitride layer are then formed. Wherein, the temperature of the annealing and oxidation is 850°C to 950°C, the duration is 10min to 30min, and the oxygen introduction amount is ≥8000sccm.
优选地，在P型硅基片的一侧表面上依序层叠形成第一SiO2层和第一本征多晶硅层之前包括：Preferably, before sequentially stacking and forming the first SiO 2 layer and the first intrinsic polysilicon layer on one side surface of the P-type silicon substrate, the process includes:
将所述P型硅基片放入体积浓度为0.2％～1％的H2O2溶液中进行表面油污清洗。之后将所述P型硅基片放入质量浓度为5％～20％的NaOH溶液中进行中和，并清洗金属离子和氧化层。之后进行水洗和烘干处理。The P-type silicon substrate is put into a H 2 O 2 solution with a volume concentration of 0.2% to 1% to clean the surface of oil stains. Then, the P-type silicon substrate is put into a NaOH solution with a mass concentration of 5% to 20% for neutralization, and the metal ions and oxide layer are cleaned. Then wash and dry.
采用本实施例的制作方法来制作的P型IBC电池结构中，P型硅基片与N型掺杂层和P型掺杂层之间均设置有隧穿氧化层，从而提高了P型IBC电池的光电转换效率。In the P-type IBC cell structure produced by the manufacturing method of this embodiment, a tunnel oxide layer is provided between the P-type silicon substrate, the N-type doped layer and the P-type doped layer, thereby improving the P-type IBC The photoelectric conversion efficiency of the battery.
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。 Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art will understand that various changes, modifications, and substitutions can be made to these embodiments without departing from the principles and spirit of the invention. and modifications, the scope of the invention is defined by the appended claims and their equivalents.

Claims (7)

  1. 一种P型IBC电池的制作方法，其特征在于，包括：A method for manufacturing a P-type IBC battery, which is characterized by including:
    在P型硅基片的一侧表面上依序层叠形成第一SiO2层和第一本征多晶硅层；Sequentially stacking a first SiO 2 layer and a first intrinsic polysilicon layer on one side surface of the P-type silicon substrate;
    对所述第一本征多晶硅层进行磷掺杂，以形成N型掺杂层；Perform phosphorus doping on the first intrinsic polysilicon layer to form an N-type doped layer;
    在所述N型掺杂层上形成掩膜层，并对所述掩膜层进行图案化开槽；Form a mask layer on the N-type doped layer, and pattern and groove the mask layer;
    以所述掩膜层作为掩膜，依序刻蚀所述N型掺杂层和所述第一SiO2层，以露出所述P型硅基片的一侧表面的部分区域；Using the mask layer as a mask, etch the N-type doped layer and the first SiO 2 layer sequentially to expose a partial area of one side surface of the P-type silicon substrate;
    在所述部分区域上依序层叠形成第二SiO2层和第二本征多晶硅层；Sequentially stacking a second SiO 2 layer and a second intrinsic polysilicon layer on the partial area;
    对所述第二本征多晶硅层进行硼掺杂，以形成P型掺杂层；Boron doping the second intrinsic polysilicon layer to form a P-type doped layer;
    在所述N型掺杂层和所述P型掺杂层上分别形成电极。Electrodes are respectively formed on the N-type doped layer and the P-type doped layer.
  2. 根据权利要求1所述的P型IBC电池的制作方法，其特征在于，所述对所述第一本征多晶硅层进行磷掺包括：The manufacturing method of a P-type IBC battery according to claim 1, wherein the phosphorus doping of the first intrinsic polysilicon layer includes:
    在850℃～900℃环境下，将磷杂质扩散20分钟；Diffuse phosphorus impurities for 20 minutes in an environment of 850°C to 900°C;
    通过HF溶液清洗在掺杂过程中形成的磷硅玻璃。The phosphosilicate glass formed during the doping process is cleaned by HF solution.
  3. 根据权利要求1所述的P型IBC电池的制作方法，其特征在于，所述对所述第二本征多晶硅层进行硼掺杂包括：The manufacturing method of a P-type IBC cell according to claim 1, wherein the boron doping of the second intrinsic polysilicon layer includes:
    在所述第二本征多晶硅层上沉积形成硼硅玻璃层；depositing a borosilicate glass layer on the second intrinsic polysilicon layer;
    采用激光掺杂工艺将所述硼硅玻璃层的硼粒子扩散到所述第二本征多晶硅层中；Using a laser doping process to diffuse boron particles of the borosilicate glass layer into the second intrinsic polysilicon layer;
    通过HF溶液清洗所述硼硅玻璃层和在掺杂过程中形成的硼硅玻璃。The borosilicate glass layer and the borosilicate glass formed during the doping process are cleaned by HF solution.
  4. 根据权利要求3所述的P型IBC电池的制作方法，其特征在于，在所述N型掺杂层和所述P型掺杂层上分别形成电极之前包括：The manufacturing method of a P-type IBC battery according to claim 3, characterized in that before forming electrodes on the N-type doped layer and the P-type doped layer respectively, the method includes:
    将所述P型硅基片放入质量浓度为5％～20％的KOH溶液中腐蚀10s～300s，之后利用纯水进行清洗；Put the P-type silicon substrate into a KOH solution with a mass concentration of 5% to 20% to be etched for 10s to 300s, and then clean it with pure water;
    将清洗后的所述P型硅基片放入体积浓度为1％～3％的KOH溶液中进行7min～10min的制绒；Put the cleaned P-type silicon substrate into a KOH solution with a volume concentration of 1% to 3% for texturing for 7 to 10 minutes;
    对制绒后的所述P型硅基片进行退火氧化； The P-type silicon substrate after texturing is annealed and oxidized;
    形成背面氮化硅层和正面氮化硅层。A back silicon nitride layer and a front silicon nitride layer are formed.
  5. 根据权利要求4所述的P型IBC电池的制作方法，其特征在于，所述退火氧化的温度为850℃～950℃，时长为10min～30min，氧气通入量为≥8000sccm。The manufacturing method of P-type IBC battery according to claim 4, characterized in that the temperature of the annealing and oxidation is 850°C to 950°C, the duration is 10min to 30min, and the oxygen introduction amount is ≥8000sccm.
  6. 根据权利要求1所述的P型IBC电池的制作方法，其特征在于，所述掩膜层为氮化硅膜，厚度为50nm～70nm。The method of manufacturing a P-type IBC battery according to claim 1, wherein the mask layer is a silicon nitride film with a thickness of 50 nm to 70 nm.
  7. 根据权利要求1所述的P型IBC电池的制作方法，其特征在于，在P型硅基片的一侧表面上依序层叠形成第一SiO2层和第一本征多晶硅层之前包括：The manufacturing method of a P-type IBC battery according to claim 1, characterized in that before sequentially stacking and forming the first SiO 2 layer and the first intrinsic polysilicon layer on one side surface of the P-type silicon substrate, the method includes:
    将所述P型硅基片放入体积浓度为0.2％～1％的H2O2溶液中进行表面油污清洗；Put the P-type silicon substrate into a H 2 O 2 solution with a volume concentration of 0.2% to 1% to clean the surface of oil stains;
    之后将所述P型硅基片放入质量浓度为5％～20％的NaOH溶液中进行中和，并清洗金属离子和氧化层；Then put the P-type silicon substrate into a NaOH solution with a mass concentration of 5% to 20% for neutralization, and clean the metal ions and oxide layer;
    之后进行水洗和烘干处理。 Then wash and dry.
PCT/CN2023/101137 2022-07-15 2023-06-19 Manufacturing method for p-type ibc battery WO2024012162A1 (en)

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