CN115692516A - Novel TOPCON battery and manufacturing method thereof - Google Patents

Novel TOPCON battery and manufacturing method thereof Download PDF

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CN115692516A
CN115692516A CN202211391304.6A CN202211391304A CN115692516A CN 115692516 A CN115692516 A CN 115692516A CN 202211391304 A CN202211391304 A CN 202211391304A CN 115692516 A CN115692516 A CN 115692516A
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silicon
layer
battery
doped
front side
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马玉超
叶巨洋
方灵新
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Chint New Energy Technology Co Ltd
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Chint New Energy Technology Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention relates to the field of photovoltaic device manufacturing, in particular to a novel TOPCON battery and a manufacturing method thereof.A silicon oxide layer and a polysilicon layer are sequentially arranged on the front surface and the back surface of n-type base silicon subjected to slotting to obtain a silicon wafer to be doped, and then double-sided doping is carried out; removing the polysilicon layer and the silicon oxide layer of the non-SE region on the front surface of the doped silicon wafer to obtain a battery prepositive object; cleaning the battery precursor, and removing the vitrified silicon; arranging an alumina passivation layer on the front surface of the battery preposition object with the removed vitrified silicon; arranging a front silicon nitride layer on the surface of the aluminum oxide passivation layer, and arranging a back silicon nitride layer on the surface of the back polysilicon to obtain a photovoltaic silicon wafer; and carrying out surface metallization on the photovoltaic silicon wafer to obtain the novel TOPCON battery. The invention increases the contact area of the silicon oxide layer positioned on the front surface and the polycrystalline silicon layer positioned on the front surface with the n-type base silicon, and improves the short-circuit current and the filling factor of the cell.

Description

Novel TOPCON battery and manufacturing method thereof
Technical Field
The invention relates to the field of photovoltaic device manufacturing, in particular to a novel TOPCON battery and a manufacturing method thereof.
Background
In the field of photovoltaic power generation, a metal electrode of a traditional PERC battery is directly contacted with a silicon substrate, so that a large number of minority carrier recombination centers can be generated, and the efficiency is negatively influenced. The TOPCon battery is characterized in that a layer of ultrathin tunneling oxide layer and a highly doped polycrystalline silicon film are prepared in a metal electrode contact area to form a passivation contact structure, so that the power generation efficiency is improved.
However, most of TOPCon batteries with fully passivated back surfaces are on the market, and the front silver electrode is still directly contacted with the boron diffusion electrode, so that the metal composition is high, and passivation contact is avoided, so that the open-circuit voltage and the filling factor of the solar battery cannot be improved continuously.
Therefore, how to improve the contact performance of the front electrode of the TOPCON solar cell is an urgent problem to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a novel TOPCON cell and a manufacturing method thereof, and aims to solve the problem that the contact performance of a front electrode of the TOPCON solar cell in the prior art is poor.
In order to solve the above technical problems, the present invention provides a method for manufacturing a novel TOPCON battery, comprising:
slotting an SE area of the n-type base silicon to obtain a groove;
depositing a silicon oxide layer and a polysilicon layer on the front surface and the back surface of the grooved n-type substrate silicon in sequence to obtain a silicon wafer to be doped;
carrying out boron doping on the front side of the silicon wafer to be doped, and carrying out phosphorus doping on the back side of the silicon wafer to be doped;
removing the polysilicon layer and the silicon oxide layer of the non-SE region on the front surface of the doped silicon wafer to obtain a battery prepositive object;
cleaning the battery precursor, and removing the vitrified silicon;
arranging an alumina passivation layer on the front surface of the battery preposition object with the removed vitrified silicon;
arranging a front silicon nitride layer on the surface of the aluminum oxide passivation layer, and arranging a back silicon nitride layer on the surface of the back polycrystalline silicon layer to obtain a photovoltaic silicon wafer;
and carrying out surface metallization on the photovoltaic silicon wafer to obtain the novel TOPCON battery.
Optionally, in the method for manufacturing a novel TOPCON cell, the removing the polysilicon layer and the silicon oxide layer in the non-SE region on the front surface of the doped silicon wafer to obtain a cell precursor includes:
setting a mask layer in an SE region of the doped silicon wafer;
and carrying out acid cleaning on the front surface of the silicon wafer provided with the mask layer, and removing the polycrystalline silicon layer and the silicon oxide layer in the non-SE region on the front surface to obtain the battery precursor.
Optionally, in the method for manufacturing a novel TOPCON cell, before cleaning the cell precursor and removing the silicon glass, the method further includes:
and carrying out boron heavily doping on the SE region on the front surface of the n-type matrix silicon by utilizing laser heavily doping.
Optionally, in the method for manufacturing the novel TOPCON cell, the power of the laser light re-doping ranges from 25 w to 35 w, inclusive.
Optionally, in the manufacturing method of the novel TOPCON cell, before providing the groove for the SE region of the n-type base silicon, the method further includes:
putting the n-type substrate silicon into a potassium hydroxide solution for surface texturing; the potassium hydroxide solution has a concentration range of 0.5% to 2%, inclusive, and the potassium hydroxide solution has a temperature range of 40 ℃ to 60 ℃, inclusive.
Optionally, in the method for manufacturing a novel TOPCON cell, after the photovoltaic silicon wafer is subjected to surface metallization, the method further includes:
performing light injection hydrogen passivation on the photovoltaic silicon wafer to obtain the novel TOPCON battery; the temperature range of the light-implanted hydrogen passivation is 300-500 degrees celsius, inclusive.
A novel TOPCON battery comprises n-type base silicon, wherein the front side of the n-type base silicon comprises a groove arranged in an SE region, the groove sequentially comprises a front side silicon oxide layer and a front side boron-doped polycrystalline silicon layer from inside to outside, the front side of the n-type base silicon comprises an aluminum oxide passivation layer, a front side silicon nitride layer and a front side electrode, the aluminum oxide passivation layer is arranged on the whole surface of the aluminum oxide passivation layer and covers the front side boron-doped polycrystalline silicon layer, the front side silicon nitride layer is arranged on the outer surface of the aluminum oxide passivation layer, the front side silicon nitride layer penetrates through the front side silicon nitride layer and the aluminum oxide passivation layer, and the front side electrode is in contact with the front side boron-doped polycrystalline silicon layer;
the back electrode is arranged on the back surface of the n-type base silicon and comprises a back silicon oxide layer, a back phosphorus-doped polycrystalline silicon layer, a back silicon nitride layer and a back electrode which penetrates through the back silicon nitride layer and is in contact with the back phosphorus-doped polycrystalline silicon layer.
Optionally, in the novel TOPCON cell, the sheet resistance of the front-side boron-doped polysilicon layer ranges from 100 ohms to 120 ohms, inclusive.
Optionally, in the novel TOPCON cell, the sheet resistance of the back side phosphorus-doped polysilicon layer ranges from 36 ohms to 48 ohms, inclusive.
Optionally, in the novel TOPCON cell, the front side silicon nitride layer and/or the back side silicon nitride layer has a thickness ranging from 70 nanometers to 80 nanometers, inclusive. .
According to the manufacturing method of the novel TOPCON battery provided by the invention, a groove is formed in an SE (selective emitter) area of n-type base silicon to obtain a groove; depositing a silicon oxide layer and a polysilicon layer on the front surface and the back surface of the grooved n-type substrate silicon in sequence to obtain a silicon wafer to be doped; carrying out boron doping on the front side of the silicon wafer to be doped, and carrying out phosphorus doping on the back side of the silicon wafer to be doped; removing the polysilicon layer and the silicon oxide layer of the non-SE region on the front surface of the doped silicon wafer to obtain a battery prepositive object; cleaning the battery precursor, and removing the vitrified silicon; arranging an alumina passivation layer on the front surface of the battery preposition object with the removed vitrified silicon; arranging a front silicon nitride layer on the surface of the aluminum oxide passivation layer, and arranging a back silicon nitride layer on the surface of the back polycrystalline silicon layer to obtain a photovoltaic silicon wafer; and carrying out surface metallization on the photovoltaic silicon wafer to obtain the novel TOPCON battery.
According to the invention, selective passivation contact is carried out only in the front metal area of the battery, namely the silicon oxide layer and the polycrystalline silicon layer are arranged only in the front metal area, so that the absorption of free carriers on the front of the battery can be reduced, the metal composition of the metal area and the nonmetal area is reduced, and the open-circuit voltage and the filling factor of the battery piece are improved. The invention also provides a novel TOPCON battery with the beneficial effects.
Drawings
In order to more clearly illustrate the embodiments or technical solutions of the present invention, the drawings used in the embodiments or technical solutions of the present invention will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flow chart of a specific embodiment of a method for manufacturing a novel TOPCON battery according to the present invention;
fig. 2 is a schematic flow chart of another embodiment of the method for manufacturing a novel TOPCON battery according to the present invention;
fig. 3 is a schematic structural diagram of a novel TOPCON battery according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The core of the invention is to provide a method for manufacturing a novel TOPCON battery, wherein a flow diagram of one embodiment of the method is shown in FIG. 1, which is called as a first embodiment and comprises the following steps:
s101: and (4) slotting the SE area of the n-type base silicon to obtain a groove.
Before this step, may also include:
placing the n-type substrate silicon in a potassium hydroxide solution for surface texturing; the potassium hydroxide solution has a concentration range of 0.5% to 2%, inclusive, and the potassium hydroxide solution has a temperature range of 40 ℃ to 60 ℃, inclusive.
The n-type substrate silicon can form a pyramid appearance in the environment; the weight loss is controlled to be 0.25g-0.35g in the surface texturing process, and the reflectivity is controlled to be 9.5% -10.5%.
Before surface texturing, the method further comprises the step of removing a damaged layer on the surface of the silicon wafer at the temperature of 40-60 ℃ by using a KOH solution with the concentration of 8-12%.
After finishing the surface texturing, the back surface of the n-star based silicon can be further polished, specifically, the back surface and the edge of a silicon wafer of a texturing sheet are etched and polished by using 8-12% KOH solution in chain equipment; the weight is removed by 0.2mg-0.3mg, the back surface reflectivity is 37% -40%, and the size of the tower base is 5 μm-12 μm.
The grooves may be obtained by physical etching or by chemical etching. For example, the front surface of the polished silicon wafer is etched according to a laser SE area pattern with the power of 60W-70W to form a hole shape, so that silicon dioxide and polycrystalline silicon are conveniently laminated in the hole.
S102: and sequentially depositing a silicon oxide layer and a polysilicon layer on the front surface and the back surface of the grooved n-type substrate silicon to obtain the silicon wafer to be doped.
Of course, the silicon oxide layer on the front side may be provided simultaneously with the silicon oxide layer on the back side, and the polysilicon layer on the front side may be provided simultaneously with the polysilicon layer on the back side.
Specifically, the double-sided silicon oxide layer is uniformly laminated on both sides under the conditions of 580-630 ℃, 18000-19000 sccm of oxygen flow, 700-900 mbar of oxidation pressure and 10-20 min of oxidation time, and the thickness ranges from 1.5nm to 1.7nm.
Specifically, the double-sided polysilicon layer is SiH at 580-630 deg.C 4 The flow rate is 800sccm-1200sccm, the pressure is 280mbar-320mbar, the time is 30min-50min,amorphous silicon with the thickness of about 100nm is evenly laminated on the two surfaces, and crystallized at the temperature of 800-850 ℃ to form polycrystalline silicon.
S103: and carrying out boron doping on the front side of the silicon wafer to be doped and carrying out phosphorus doping on the back side of the silicon wafer to be doped.
The boron doping conditions include: performing front doping at 850-1050 deg.C, 480sccm oxygen flow, 100sccm-300sccm BCl3 flow, 250-300 mbar pressure, and 40-60 min for a target sheet resistance of 100-120 Ω.
The phosphorus doping conditions include: POCl is added at the temperature of 800-870 ℃ and the oxygen flow of 2100000sccm 3 The flow rate is 10500000sccm, the pressure is 200mbar-400mbar, the time is 20min-35min, back doping is carried out, and the target sheet resistance is 36 omega-48 omega.
S104: and removing the polycrystalline silicon layer and the silicon oxide layer of the non-SE region on the front surface of the doped silicon wafer to obtain the battery precursor.
In the step, the front side and the edge can be etched by adopting an HF solution in chain type equipment, silicon dioxide and polysilicon outside the groove are washed away together, and a silicon oxide layer and a polysilicon layer in the punched hole are reserved.
As a specific embodiment, the method for front-side selective removal of the epitaxial layer comprises:
a1: and setting a mask layer in an SE region of the doped silicon wafer.
A2: and carrying out acid cleaning on the front surface of the silicon wafer provided with the mask layer, and removing the polycrystalline silicon layer and the silicon oxide layer in the non-SE region on the front surface to obtain the battery precursor.
The mask layer is an acid-resistant mask.
S105: and cleaning the battery front object to remove the vitrified silicon.
The vitrified silicon may include BSG, PSG and BPSG, and specifically, the front side BSG may be removed with a 35% -45% HF solution, and the back side PSG may be removed with an 8% -12% HF solution.
S106: and arranging an aluminum oxide passivation layer on the front surface of the cell front object from which the vitrified silicon is removed.
S107: and arranging a front silicon nitride layer on the surface of the aluminum oxide passivation layer, and arranging a back silicon nitride layer on the surface of the back polycrystalline silicon layer to obtain the photovoltaic silicon wafer.
S108: and carrying out surface metallization on the photovoltaic silicon wafer to obtain the novel TOPCON battery.
The surface metallization means that a front metal electrode and a back metal electrode are respectively disposed on both sides of the battery, and specifically, may include:
and printing a metal grid line in the laser SE area pattern, and sintering at the temperature of 770-800 ℃.
As a preferred embodiment, after performing the surface metallization, the method further comprises:
performing light injection hydrogen passivation on the photovoltaic silicon wafer to obtain the novel TOPCON battery; the temperature range of the light-implanted hydrogen passivation is 300 degrees celsius to 500 degrees celsius, including endpoints, such as any of 300.0 degrees celsius, 463.2 degrees celsius, or 500.0 degrees celsius. The light intensity of the light injection was 10sun.
The manufacturing method of the novel TOPCON battery provided by the invention comprises the steps of slotting in an SE (selective emitter) area of n-type base silicon to obtain a groove; depositing a silicon oxide layer and a polysilicon layer on the front surface and the back surface of the grooved n-type substrate silicon in sequence to obtain a silicon wafer to be doped; carrying out boron doping on the front side of the silicon wafer to be doped, and carrying out phosphorus doping on the back side of the silicon wafer to be doped; removing the polysilicon layer and the silicon oxide layer of the non-SE region on the front surface of the doped silicon wafer to obtain a battery precursor; cleaning the battery precursor, and removing the vitrified silicon; arranging an alumina passivation layer on the front surface of the battery front object with the vitrified silicon removed; arranging a front silicon nitride layer on the surface of the aluminum oxide passivation layer, and arranging a back silicon nitride layer on the surface of the back polycrystalline silicon layer to obtain a photovoltaic silicon wafer; and carrying out surface metallization on the photovoltaic silicon wafer to obtain the novel TOPCON battery. According to the invention, selective passivation contact is carried out only in the front metal area of the battery, namely the silicon oxide layer and the polycrystalline silicon layer are arranged only in the front metal area, so that the absorption of free carriers on the front of the battery can be reduced, the metal composition of the metal area and the nonmetal area is reduced, and the open-circuit voltage and the filling factor of the battery piece are improved.
On the basis of the first specific embodiment, the front surface of the battery piece is further subjected to patterning processing to obtain a second specific embodiment, a flow diagram of which is shown in fig. 2, and the method includes:
s201: and (4) slotting in an SE region of the n-type base silicon to obtain a groove.
S202: and sequentially depositing a silicon oxide layer and a polysilicon layer on the front surface and the back surface of the grooved n-type substrate silicon to obtain the silicon wafer to be doped.
S203: and carrying out boron doping on the front side of the silicon wafer to be doped, and carrying out phosphorus doping on the back side of the silicon wafer to be doped.
S204: and removing the polycrystalline silicon layer and the silicon oxide layer of the non-SE region on the front surface of the doped silicon wafer to obtain the battery precursor.
S205: and carrying out boron heavily doping on the SE region on the front surface of the n-type matrix silicon by utilizing laser heavily doping.
Specifically, the power range for the laser re-doping is 25 watts to 35 watts, inclusive, such as any of 25.0 watts, 31.8 watts, or 35.0 watts.
S206: and cleaning the battery front object to remove the vitrified silicon.
S207: and arranging an alumina passivation layer on the front surface of the cell front object with the removed vitrified silicon.
S208: and arranging a front silicon nitride layer on the surface of the aluminum oxide passivation layer, and arranging a back silicon nitride layer on the surface of the back polycrystalline silicon layer to obtain the photovoltaic silicon wafer.
S209: and carrying out surface metallization on the photovoltaic silicon wafer to obtain the novel TOPCON battery.
The difference between this embodiment and the foregoing embodiment is that laser is further used for re-doping before removing the silicon glass in this embodiment, and the remaining steps are the same as those in the foregoing embodiment, and are not further described herein.
In the embodiment, after double-sided doping, the reaction generated vitrified silicon byproduct is not removed urgently, but the vitrified silicon is used for heavily doping the front SE region of the cell through laser heavy doping, BSG in the front SE region is burnt out, part of boron in the BSG is driven into the corresponding front polysilicon layer, heavy doping is realized, and organic compounds or organic complexes belonging to impurities can be burnt out.
The invention provides a novel TOPCON battery at the same time, the structure schematic diagram of one specific embodiment of which is shown in FIG. 3, and is called as the third specific embodiment, the TOPCON battery comprises n-type base silicon 10, the front surface of the n-type base silicon 10 comprises a groove arranged in an SE region, the groove sequentially comprises a front surface silicon oxide layer 20 and a front surface boron-doped polycrystalline silicon layer 30 from inside to outside, the front surface of the n-type base silicon 10 comprises an aluminum oxide passivation layer 40 which is arranged on the whole surface and covers the front surface boron-doped polycrystalline silicon layer 30, a front surface silicon nitride layer 50 arranged on the outer surface of the aluminum oxide passivation layer 40, a front surface electrode 91 which penetrates through the front surface silicon nitride layer 50 and the aluminum oxide passivation layer 40 and is in contact with the front surface boron-doped polycrystalline silicon layer 30;
the n-type base silicon 10 sequentially comprises a back silicon oxide layer 60, a back phosphorus-doped polysilicon layer 70, a back silicon nitride layer 80 and a back electrode 92 penetrating through the back silicon nitride layer 80 and contacting with the back phosphorus-doped polysilicon layer 70 from the back to the outside.
As a preferred embodiment, the sheet resistance of the front-side boron-doped polysilicon layer 30 ranges from 100 ohms to 120 ohms, inclusive, such as any of 100.0 ohms, 115.3 ohms, or 120.0 ohms.
Additionally, the sheet resistance of the back side phosphorus doped polysilicon layer 70 ranges from 36 ohms to 48 ohms, inclusive, such as any of 36.0 ohms, 40.1 ohms, or 48.0 ohms.
Also, the front side silicon nitride layer 50 and/or the back side silicon nitride layer 80 have a thickness ranging from 70 nanometers to 80 nanometers, inclusive, such as any of 70.0 nanometers, 72.3 nanometers, or 80.0 nanometers
The novel TOPCON battery in the present embodiment corresponds to the above method for manufacturing the novel TOPCON battery, and please refer to the foregoing for details and advantages, which are not repeated herein.
The novel TOPCON cell provided by the invention comprises n-type base silicon 10, wherein the front surface of the n-type base silicon 10 comprises a groove arranged in an SE region, the groove sequentially comprises a front surface silicon oxide layer 20 and a front surface boron-doped polycrystalline silicon layer 30 from inside to outside, the front surface of the n-type base silicon 10 comprises an aluminum oxide passivation layer 40 which is arranged on the whole surface and covers the front surface boron-doped polycrystalline silicon layer 30, a front surface silicon nitride layer 50 which is arranged on the outer surface of the aluminum oxide passivation layer 40, a front surface electrode 91 which penetrates through the front surface silicon nitride layer 50 and the aluminum oxide passivation layer 40 and is in contact with the front surface boron-doped polycrystalline silicon layer 30; the n-type substrate silicon 10 sequentially comprises a back silicon oxide layer 60, a back phosphorus-doped polysilicon layer 70, a back silicon nitride layer 80, a back electrode 92 penetrating through the back silicon nitride layer 80 and contacting with the back phosphorus-doped polysilicon layer 70 from the back to the outside. According to the invention, selective passivation contact is carried out only in the front metal region of the battery, namely the front silicon oxide layer 20 and the front polysilicon layer are arranged only in the front metal region, so that the absorption of free current carriers on the front of the battery can be reduced, the metal composition of the metal region and the nonmetal region is reduced, and the open-circuit voltage and the filling factor of the battery piece are improved.
In the present specification, the embodiments are described in a progressive manner, and each embodiment focuses on differences from other embodiments, and the same or similar parts between the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It should be noted that, in the present specification, relational terms such as first and second, and the like are used only for distinguishing one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
The invention provides a novel TOPCON battery and a manufacturing method thereof. The principles and embodiments of the present invention are explained herein using specific examples, which are presented only to assist in understanding the method and its core concepts. It should be noted that, for those skilled in the art, without departing from the principle of the present invention, it is possible to make various improvements and modifications to the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.

Claims (10)

1. A manufacturing method of a novel TOPCON battery is characterized by comprising the following steps:
slotting an SE area of the n-type base silicon to obtain a groove;
depositing a silicon oxide layer and a polysilicon layer on the front surface and the back surface of the grooved n-type substrate silicon in sequence to obtain a silicon wafer to be doped;
carrying out boron doping on the front side of the silicon wafer to be doped, and carrying out phosphorus doping on the back side of the silicon wafer to be doped;
removing the polysilicon layer and the silicon oxide layer of the non-SE region on the front surface of the doped silicon wafer to obtain a battery prepositive object;
cleaning the battery preposition object, and removing the vitrified silicon;
arranging an alumina passivation layer on the front surface of the battery front object with the vitrified silicon removed;
arranging a front silicon nitride layer on the surface of the aluminum oxide passivation layer, and arranging a back silicon nitride layer on the surface of the back polycrystalline silicon layer to obtain a photovoltaic silicon wafer;
and carrying out surface metallization on the photovoltaic silicon wafer to obtain the novel TOPCON battery.
2. The method of claim 1, wherein the removing the polysilicon layer and the silicon oxide layer of the non-SE region of the front surface of the doped silicon wafer to obtain the cell precursor comprises:
setting a mask layer in an SE region of the doped silicon wafer;
and carrying out acid cleaning on the front side of the silicon wafer provided with the mask layer, and removing the polysilicon layer and the silicon oxide layer in the non-SE area on the front side to obtain the battery prepositive object.
3. The method of claim 1, wherein prior to cleaning the cell precursor and removing the vitrified silicon, the method further comprises:
and carrying out boron heavily doping on the SE region on the front surface of the n-type matrix silicon by utilizing laser heavily doping.
4. The method of claim 3, wherein the laser light re-doping is performed at a power range of 25 w to 35 w, inclusive.
5. The method of claim 1, further comprising, prior to providing a recess in the SE region of the n-type bulk silicon:
putting the n-type substrate silicon into a potassium hydroxide solution for surface texturing; the potassium hydroxide solution has a concentration range of 0.5% to 2%, inclusive, and the potassium hydroxide solution has a temperature range of 40 ℃ to 60 ℃, inclusive.
6. The method of claim 1, further comprising, after surface metallization of the photovoltaic silicon wafer:
performing light injection hydrogen passivation on the photovoltaic silicon wafer to obtain the novel TOPCON battery; the temperature range of the light-implanted hydrogen passivation is 300-500 degrees celsius, inclusive.
7. A novel TOPCON battery comprises n-type base silicon and is characterized in that the front side of the n-type base silicon comprises a groove arranged in an SE region, the groove sequentially comprises a front side silicon oxide layer and a front side boron-doped polycrystalline silicon layer from inside to outside, the front side of the n-type base silicon comprises an aluminum oxide passivation layer, a front side silicon nitride layer and a front side electrode, the aluminum oxide passivation layer is arranged on the whole surface of the aluminum oxide passivation layer and covers the front side boron-doped polycrystalline silicon layer, the front side silicon nitride layer is arranged on the outer surface of the aluminum oxide passivation layer, the front side electrode penetrates through the front side silicon nitride layer and the aluminum oxide passivation layer and is in contact with the front side boron-doped polycrystalline silicon layer;
the back electrode is arranged on the back surface of the n-type base silicon and comprises a back silicon oxide layer, a back phosphorus-doped polycrystalline silicon layer, a back silicon nitride layer and a back electrode which penetrates through the back silicon nitride layer and is in contact with the back phosphorus-doped polycrystalline silicon layer.
8. The novel TOPCON cell of claim 7 wherein said front side boron doped polysilicon layer has a sheet resistance in the range of 100 to 120 ohms, inclusive.
9. The novel TOPCON cell of claim 7 wherein said back side phosphorus doped polysilicon layer has a sheet resistance in the range of 36 to 48 ohms, inclusive.
10. The novel TOPCON cell of claim 7 wherein said front side silicon nitride layer and/or said back side silicon nitride layer has a thickness in the range of 70 nm to 80 nm, inclusive.
CN202211391304.6A 2022-11-08 2022-11-08 Novel TOPCON battery and manufacturing method thereof Pending CN115692516A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115832069A (en) * 2023-02-13 2023-03-21 通威太阳能(眉山)有限公司 Passivation contact structure, solar cell, preparation method and photovoltaic module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115832069A (en) * 2023-02-13 2023-03-21 通威太阳能(眉山)有限公司 Passivation contact structure, solar cell, preparation method and photovoltaic module

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