WO2024001892A1 - 数据收发系统、数据接收方法及数据发送方法 - Google Patents

数据收发系统、数据接收方法及数据发送方法 Download PDF

Info

Publication number
WO2024001892A1
WO2024001892A1 PCT/CN2023/101513 CN2023101513W WO2024001892A1 WO 2024001892 A1 WO2024001892 A1 WO 2024001892A1 CN 2023101513 W CN2023101513 W CN 2023101513W WO 2024001892 A1 WO2024001892 A1 WO 2024001892A1
Authority
WO
WIPO (PCT)
Prior art keywords
data
type
storage unit
physical layer
processing
Prior art date
Application number
PCT/CN2023/101513
Other languages
English (en)
French (fr)
Inventor
丁家隆
Original Assignee
深圳市中兴微电子技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市中兴微电子技术有限公司 filed Critical 深圳市中兴微电子技术有限公司
Publication of WO2024001892A1 publication Critical patent/WO2024001892A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0059—Convolutional codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Definitions

  • Embodiments of the present disclosure relate to the field of communications, specifically, to a data transceiving system, a data receiving method, and a data sending method.
  • Wireless communication technology has emerged as the times require, and has gradually replaced traditional communication technology and become the mainstream technology in the communication field.
  • the application fields of wireless communication technology are becoming more and more extensive and occupy an important position.
  • V2X vehicle wireless communication technology, vehicle to Rapid communication between vehicles, vehicles and base stations, base stations and base stations, etc., and ultimately communication between vehicles and all entities that may affect the vehicles, in order to achieve the purpose of improving vehicle safety, improving traffic efficiency, and becoming more environmentally friendly.
  • V2X communication needs to meet high reliability, low latency, and bandwidth requirements. While meeting the needs, costs and other issues need to be considered.
  • the current delay requirement of LTE-V2X is 50ms, which puts higher requirements on communication terminal equipment.
  • Embodiments of the present disclosure provide a data transceiver system, a data receiving method, and a data sending method to at least solve the problem that terminal devices existing in related technologies cannot meet the communication needs of some specific communication protocols in terms of high reliability and low latency. The problem.
  • a data transceiver system including: a radio frequency interface, wherein the radio frequency interface is configured to transmit and receive data; and a modem, wherein the modem is connected to the radio frequency interface and is configured to transmit and receive data.
  • Perform a demodulation operation on a type of data perform a modulation operation on a second type of data, and send the second type of data after performing the modulation operation to the radio frequency interface.
  • the first type of data is transmitted through the The data received by the radio frequency interface, the second type of data is data to be sent through the radio frequency interface; a storage unit, wherein the storage unit is connected to the modem and is configured to store the first type of data.
  • the modem is configured to store the first type of data after the demodulation operation into the storage unit, and reading from the storage unit is completed.
  • the second type of data processed by encoding of the physical layer; a hardware accelerator, wherein the hardware accelerator is connected to the storage unit and is configured to perform the following operations: read information that has not been processed by the physical layer from the storage unit.
  • the second type of data is stored in the storage unit.
  • a data receiving method is provided. The method is applied to the system described in the above embodiment, including: receiving the first type of data through the radio frequency interface; The first type of data is subjected to a demodulation operation, and the first type of data after the demodulation operation is stored in the storage unit; the unprocessed data is read from the storage unit through the hardware accelerator. Perform physical layer channel decoding processing on the first type of data and perform the physical layer channel decoding processing on it, and store the first type data after performing the physical layer channel decoding processing in the in the above storage unit.
  • a data sending method is provided. The method is applied to the system described in the above embodiment, including: reading from the storage unit without performing physical layer through the hardware accelerator. channel coding the second type of data and subjecting it to the physical layer channel coding process, and storing the second type data after performing the physical layer channel coding process into the storage unit ; Read the second type of data that has completed the encoding process of the physical layer from the storage unit through the modem and perform a modulation operation on it, and convert the second type of data after the modulation operation has been performed.
  • the class data is sent to the radio frequency interface for transmission through the radio frequency interface.
  • Figure 1 is a structural block diagram of a data transceiver system according to an embodiment of the present disclosure
  • Figure 2 is a structural block diagram of a data transceiver system according to a specific embodiment of the present disclosure
  • Figure 3 is a hardware structure block diagram of a terminal of a data sending and receiving method according to an embodiment of the present disclosure
  • Figure 4 is a flow chart of a data receiving method according to an embodiment of the present disclosure.
  • Figure 5 is a flow chart of a data sending method according to an embodiment of the present disclosure.
  • Figure 6 is a flow chart of data reception processing according to a specific embodiment of the present disclosure.
  • FIG. 7 is a flowchart of data transmission processing according to a specific embodiment of the present disclosure.
  • a data transceiver system includes: a radio frequency interface 12 (hereinafter referred to as a radio frequency interface), wherein the radio frequency interface 12 is configured to send and receive data; a modem 14 (hereinafter referred to as a modem), wherein the modem is connected to the radio frequency interface and is configured to perform a demodulation operation on the first type of data and a modulation operation on the second type of data, and The second type of data after performing the modulation operation is sent to the radio frequency interface.
  • the first type of data is the data received through the radio frequency interface.
  • the second type of data is the data to be passed through.
  • the data sent by the radio frequency interface; the storage unit 16 (hereinafter referred to as the storage unit), wherein the storage unit is connected to the modem and is configured to store the first type of data and the second type of data, the The modem is configured to store the first type of data that has undergone the demodulation operation into the storage unit, and to read the second type of data that has completed the encoding process of the physical layer from the storage unit.
  • hardware accelerator 18 wherein the hardware accelerator is connected to the storage unit, Set to perform the following operations: read the first type of data that has not been subjected to channel decoding processing of the physical layer from the storage unit and perform the channel decoding processing of the physical layer on it, and perform the channel decoding processing of the physical layer
  • the first type of data after channel decoding is stored in the storage unit; the second type of data without physical layer channel coding is read from the storage unit and the physical layer is performed on it.
  • channel coding processing of the physical layer and storing the second type data after performing the channel coding processing of the physical layer into the storage unit.
  • the data transceiver system may additionally include a processor, a controller, etc.
  • the processor may be used to implement other physical layer processing processes.
  • the storage unit can be used to store initial transmission content and final reception results, etc. The operations performed by the processor will be described in detail later.
  • the radio frequency interface, modem, storage unit, hardware accelerator and other components included in the data sending and receiving system cooperate with each other to complete the sending and receiving processing of communication data.
  • a special hardware accelerator is used to handle the high latency requirements.
  • the data processing delay can be effectively reduced. That is to say, the various modules in the data sending and receiving system work together to complete the processing of communication data, which solves the problem that terminal equipment in related technologies cannot meet the high requirements of specific communication protocols. Issues such as reliability and low latency communication requirements can be achieved to reduce data processing latency and improve the reliability of data transmission.
  • the above-mentioned data transceiver system further includes a processor, wherein the processor is connected to the storage unit and configured to perform the following operations: obtain from the storage unit the data that has not undergone other decoding processing of the physical layer.
  • the first type of data is subjected to other decoding processing of the physical layer, and the first type of data that has been subjected to other decoding processing of the physical layer is stored in the storage unit; from the Reading the second type of data without other encoding processing of the physical layer from the storage unit and performing other encoding processing of the physical layer on it, and performing other encoding processing of the physical layer on the second type of data
  • the second type of data is stored in the storage unit; wherein, other decoding processing of the physical layer includes processing other than the signal decoding processing of the physical layer, and other encoding processing of the physical layer includes processing other than the signal decoding processing of the physical layer.
  • the processor may be configured to perform other decoding processing and/or other encoding of the physical layer on data included in the storage unit that does not use a hardware accelerator to perform other decoding processing and/or other encoding processing of the physical layer.
  • the processor can perform other decoding processing and/or other encoding processing on data with lower processing delay requirements in the LTE-V2X transceiver processing process.
  • the processor can process encoding at different stages, and it is also necessary It should be noted that the above-mentioned illustration of the processor and the above-mentioned hardware accelerator is only an exemplary embodiment.
  • the processor and hardware accelerator are not limited to the above-mentioned examples. Other devices or modules with similar processing capabilities can also replace the above-mentioned processor. and hardware accelerators.
  • the processor is further configured to obtain the first type of data without other demodulation operations from the storage unit and perform the other demodulation operations on it, and perform the said The first type of data after other demodulation operations are stored in the storage unit, wherein the other demodulation operations include demodulation operations other than the demodulation operations performed by the modem; the processor It is also configured to read the second type of data without other modulation operations from the storage unit and perform the other modulation operations on it, and store the second type of data after performing the other modulation operations. Stored into the storage unit, wherein the other modulation operations include modulation operations other than the modulation operations performed by the modem.
  • the processor may be configured to perform other demodulation operations and/or other adjustment operations on data included in the storage unit that does not use a modem to perform other demodulation operations and/or other adjustment operations.
  • the processor may Perform other demodulation operations and/or other adjustment operations on the modulation and demodulation part of the LTE-V2X transceiver processing process, which has a relatively flexible calculation method.
  • the processor includes at least one of the following: a central processing unit (CPU), a digital signal processor (DSP), and a management control unit (MCU).
  • the processor may be composed of a CPU, a DSP, an MCU, etc., and is used to complete some communication data, such as other relatively simple processing of the physical layer of LTE-V2X.
  • the radio frequency interface is configured to receive the first type of data from the target chip, and is configured to send the second type of data to the target chip.
  • the radio frequency interface can be configured to implement data and command docking with the antenna chip (ie, the target chip).
  • the radio frequency interface can receive the data modulated by the modem and send it to the radio frequency through sedes (serializer-deserializer). chip.
  • the radio frequency chip data is first sent to the radio frequency interface through sedes, and then sent to the modem after being converted by the radio frequency interface.
  • the radio frequency interface is only an exemplary embodiment, and the radio frequency interface is not limited to the above-mentioned antenna.
  • Chip communication, radio frequency interface can also communicate with other chips that can send and receive data.
  • the channel decoding process of the physical layer includes at least one of the following operations: turbo decoding process, convolution decoding process, rate dematching process, and deinterleaving process.
  • the channel decoding processing operation of the physical layer can be completed by the cooperation of a hardware accelerator and a processor, wherein some relatively complex channel decoding processing (for example, the ones listed in this embodiment) can be completed by the hardware accelerator.
  • the processor completes some relatively simple channel decoding processes, thereby achieving the effect of reducing the delay of the channel decoding process.
  • the channel coding processing of the physical layer includes at least one of the following operations: turbo coding processing, convolutional coding processing, rate matching processing, and interleaving processing.
  • a hardware accelerator and a processor can be used to cooperate to complete the above-mentioned channel coding processing operation of the physical layer.
  • the hardware accelerator can be used to complete some more complex channel coding processing (for example, as shown in this embodiment). At least one of the listed channel coding processes), the processor completes some relatively simple channel coding processes, thereby achieving the effect of reducing the delay of the channel coding process.
  • the demodulation operation includes at least one of the following: power estimation and compensation, notching, first filtering, downsampling, first phase rotation, first spectrum shifting, and FFT transformation.
  • the modem and the processor can be used to cooperate to perform the above-mentioned demodulation operation on the received data (ie, data received from the outside world, etc.), in which the modem can complete some relatively complex demodulation processing (for example, at least one demodulation operation listed in this embodiment), the processor completes some relatively simple demodulation processing, thereby achieving the effect of reducing the delay of the demodulation operation.
  • the modem can complete some relatively complex demodulation processing
  • the processor completes some relatively simple demodulation processing, thereby achieving the effect of reducing the delay of the demodulation operation.
  • it can be based on the actual application scenario. All or part of the above demodulation operations are selected for processing, and the order of the demodulation operations is not limited.
  • the modulation operation includes at least one of the following: second filtering, windowing, roll-off, IFFT transformation, second phase rotation, and second spectrum shifting.
  • a modem and a processor can be used to work together to perform modulation operations on some communication data, such as data sent by LTE-V2X (that is, data to be sent out, etc.), in which the modem can complete some more complex operations.
  • Modulation processing for example, at least one modulation operation listed in this embodiment
  • the processor completes some relatively simple modulation processing, thereby achieving the effect of reducing the delay of the modulation operation.
  • All or part of the modulation operations are selected from the above modulation operations for processing, and the order of the modulation operations is not limited.
  • the data transceiver system includes an LTE-V2X data transceiver system.
  • LTE-V2X data transceiver uses LTE-V2X data transceiver as an example to describe the embodiments of the present disclosure in detail:
  • FIG. 2 is a structural block diagram of a data transceiver system according to a specific embodiment of the present disclosure. As shown in Figure 2, the data transceiver system is used to complete LTE-V2X transceiver. The initial transmission content and final reception result are stored inside the storage unit. Each module Functions like Down:
  • Module C (corresponding to the above-mentioned storage unit) stores the initial transmission content and final reception result, and completes three modules B (corresponding to the above-mentioned modem), D (corresponding to the above-mentioned hardware accelerator), and E (corresponding to the above-mentioned processor) Interactive intermediate data storage.
  • Module A (corresponding to the above-mentioned radio frequency interface) has two basic functions: receiving the data modulated by module B and sending it to the radio frequency chip through sedes (serializer-deserializer). And the RF chip data is first sent to module A through sedes, and then sent to module B after conversion.
  • sedes serializer-deserializer
  • the B module performs a series of modulation operations such as filtering, windowing, roll-off, IFFT transformation, phase rotation, spectrum shifting and other modulation operations on the data sent by LTE-V2X (that is, the data to be sent out, etc.).
  • a series of demodulation operations such as power estimation and compensation, notching, filtering, downsampling, phase rotation, spectrum shifting, FFT transformation, etc. on the received data (that is, data received from the outside world, etc.).
  • the D module mainly completes the channel coding and decoding of LTE-V2X, including: data turbo (corresponding to the above-mentioned Turbo decoding processing and the above-mentioned Turbo encoding processing) and convolutional coding and decoding (corresponding to the above-mentioned convolution decoding processing) and the above-mentioned convolutional encoding processing), rate matching and de-matching (corresponding to the above-mentioned rate matching processing and the above-mentioned rate de-matching processing), interleaving and deinterleaving (corresponding to the above-mentioned interleaving processing and deinterleaving processing) and other functions.
  • data turbo corresponding to the above-mentioned Turbo decoding processing and the above-mentioned Turbo encoding processing
  • convolutional coding and decoding corresponding to the above-mentioned convolution decoding processing
  • rate matching and de-matching corresponding to the above-mentioned rate matching processing and the above-mentioned rate
  • the E module is composed of CPU or DSP or MCU, etc., and is used to complete other processing of the physical layer of LTE-V2X.
  • FIG. 3 is a hardware structure block diagram of a terminal of a data sending and receiving method according to an embodiment of the present disclosure.
  • the terminal may include one or more (only one is shown in Figure 3) target processors 302 (the target processor 302 is a different device from the aforementioned "processor”.
  • the target processor 302 It may include the functions implemented by the aforementioned "processor", where the target processor 302 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 304 for storing data, where,
  • the above-mentioned mobile terminal may also include a transmission device 306 and an input and output device 308 for communication functions.
  • a processing device such as a microprocessor MCU or a programmable logic device FPGA
  • FPGA programmable logic device
  • the above-mentioned mobile terminal may also include a transmission device 306 and an input and output device 308 for communication functions.
  • the structure shown in FIG. 3 is only illustrative, and it does not limit the structure of the above-mentioned mobile terminal.
  • the mobile terminal may also include more or fewer components than shown in FIG. 3 , or have a different configuration than that shown in FIG. 3 .
  • the memory 304 can be used to store computer programs, for example, software programs and modules of application software, such as computer programs corresponding to the data sending and receiving methods in the embodiments of the present disclosure.
  • the target processor 302 executes the computer program by running the computer program stored in the memory 304.
  • Various functional applications and data processing implement the data sending and receiving methods described in the embodiments of the present disclosure.
  • Memory 304 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory.
  • the memory 304 may further include memory located remotely relative to the target processor 302, and these remote memories may be connected to the mobile terminal through a network. Examples of the above-mentioned networks include but are not limited to the Internet, intranets, local area networks, mobile communication networks and combinations thereof.
  • the transmission device 306 is used to receive or send data via a network.
  • Specific examples of the above-mentioned network may include a wireless network provided by a communication provider of the mobile terminal.
  • the transmission device 306 includes a network adapter (Network Interface Controller, NIC), which can be connected to other network devices through a base station to communicate with the Internet.
  • the transmission device 306 may be a radio frequency (Radio Frequency, RF) module, which is used to communicate with the Internet wirelessly.
  • RF Radio Frequency
  • FIG. 4 is a flow chart of a data receiving method according to an embodiment of the present disclosure. As shown in Figure 4, the process includes follows these steps:
  • Step S402 receive the first type of data through the radio frequency interface
  • Step S404 perform a demodulation operation on the first type of data through the modem, and store the first type of data after the demodulation operation into the storage unit;
  • Step S406 Read the first type of data that has not been subjected to physical layer channel decoding processing from the storage unit through the hardware accelerator and perform the physical layer channel decoding processing on it, and execute the The first type of data processed by channel decoding of the physical layer is stored in the storage unit.
  • the execution subject of the above steps may be the above-mentioned data transceiver system, or may be a controller or control system located in or connected to the data transceiver system, or a device with control capabilities.
  • the above-mentioned The execution subject of the steps may also be other processing equipment or processing units with similar processing capabilities.
  • the modem can be used to demodulate the first type of data received by the radio frequency interface, and the first type of data after the demodulation operation can be stored in the storage unit, and then the hardware accelerator can be used to demodulate the first type of data from the storage unit. Reading the first type of data without physical layer channel decoding processing, performing physical layer channel decoding processing, and storing the first type of data after performing physical layer channel decoding processing into the storage unit.
  • the various components included in the data transceiver system such as radio frequency interfaces, modems, storage units, and hardware accelerators, can cooperate with each other to complete the transceiver processing of communication data.
  • Accelerators can handle processes with high latency requirements and slow processing, which can effectively reduce data processing latency.
  • various modules in the data transceiver system work together to complete the processing of communication data, solving the problem of terminal equipment existing in related technologies.
  • the problem of being unable to meet the communication needs of specific communication protocols in terms of high reliability and low latency can be achieved by reducing data processing latency and improving the reliability of data transmission.
  • the modem can give priority to the demodulation operation on the first type of data received by the radio frequency interface, which has high processing delay requirements and relatively fixed calculation methods.
  • the hardware accelerator can give priority to the data obtained from the storage unit and has not been subjected to the physical layer.
  • the first type of data that is processed by channel decoding and has high processing delay requirements and a relatively fixed calculation method is subjected to channel decoding processing at the physical layer.
  • the method further includes: using a processor to obtain the first type of data that has not been subjected to other decoding processing of the physical layer from the storage unit and perform other decoding processing of the physical layer on it, and storing the first type of data after performing other decoding processing of the physical layer into the storage unit, wherein the processor is connected to the storage unit, and the other decoding processing of the physical layer includes Processing other than the signal decoding process of the physical layer.
  • the processor may preferentially perform other decoding processing of the physical layer on the first type of data obtained from the storage unit that has not been subjected to other decoding processing of the physical layer and has low processing delay requirements and a relatively flexible calculation method. .
  • the method further includes: using the processor to obtain the first type of data without other demodulation operations from the storage unit and perform the other demodulation operations on it, and The first type of data after performing the other demodulation operations is stored in the storage unit, wherein the other demodulation operations include demodulation operations other than the demodulation operations performed by the modem.
  • the processor may preferentially perform other demodulation operations on the first type of data obtained from the storage unit that has not been subjected to other demodulation operations and has low processing delay requirements and a relatively flexible calculation method.
  • FIG. 5 is a flow chart of a data sending method according to an embodiment of the present disclosure. As shown in Figure 5, the process includes the following steps:
  • Step S502 Read the second type of data that has not been subjected to physical layer channel coding processing from the storage unit through the hardware accelerator and perform the physical layer channel coding processing on it, and execute the The second type of data processed by the channel coding of the physical layer is stored in the storage unit;
  • Step S504 Read the second type of data that has completed the encoding process of the physical layer from the storage unit through the modem and perform a modulation operation on it, and convert the data after performing the modulation operation.
  • the second type of data is sent to the radio frequency interface for transmission through the radio frequency interface.
  • the execution subject of the above steps may be the above-mentioned data transceiver system, or may be a controller or control system located in or connected to the data transceiver system, or a device with control capabilities.
  • the above-mentioned The execution subject of the steps can also be other processing equipment or processing units with similar processing capabilities.
  • the modem can be used to demodulate the first type of data received by the radio frequency interface, and the first type of data after the demodulation operation can be stored in the storage unit, and then the hardware accelerator can be used to demodulate the first type of data from the storage unit. Reading the first type of data without physical layer channel decoding processing, performing physical layer channel decoding processing, and storing the first type of data after performing physical layer channel decoding processing into the storage unit.
  • the various components included in the data transceiver system such as radio frequency interfaces, modems, storage units, and hardware accelerators, can cooperate with each other to complete the transceiver processing of communication data.
  • Accelerators can handle processes with high latency requirements and slow processing, which can effectively reduce data processing latency.
  • various modules in the data transceiver system work together to complete the processing of communication data, solving the problem of terminal equipment existing in related technologies.
  • the problem of being unable to meet the communication needs of specific communication protocols in terms of high reliability and low latency can be achieved by reducing data processing latency and improving the reliability of data transmission.
  • the method further includes: using a processor to read the second type of data that has not been subjected to other encoding processing of the physical layer from the storage unit and perform other encoding processing of the physical layer on it. , and store the second type of data after performing other encoding processing of the physical layer into the storage unit, wherein the processor is connected to the storage unit, and the other encoding processing of the physical layer Including processing other than the signal encoding processing of the physical layer.
  • the processor may preferentially perform other encoding of the physical layer on the second type of data that is read from the storage unit without other encoding processing of the physical layer and has lower processing delay requirements and a more flexible calculation method. deal with.
  • the method further includes: reading the second type of data without other modulation operations from the storage unit through the processor and performing the other modulation operations on it, and executing The second type of data after performing the other modulation operations is stored in the storage unit, wherein the other modulation operations include modulation operations other than the modulation operations performed by the modem.
  • the processor may preferentially perform other modulation operations on the second type of data that is read from the storage unit without other modulation operations and has lower processing delay requirements and a more flexible calculation method.
  • Figure 6 is a flow chart of data receiving processing according to a specific embodiment of the present disclosure. As shown in Figure 6, the process includes the following steps:
  • Step S602 start receiving processing
  • Step S604 open the radio frequency interface and start receiving antenna data
  • Step S606 perform digital front-end demodulation operation on the received data
  • Step S608 Write the data processed in step S506 into the storage unit (corresponding to the above-mentioned C module);
  • Step S610 the processor (corresponding to the above-mentioned E module) performs corresponding measurement, channel estimation, and demodulation on the written data (some of the more complex demodulation operations are processed in the above-mentioned module B and the above-mentioned module D, and some of the relatively simple ones are processed in the above-mentioned module B and the above-mentioned module D.
  • the demodulation operation is handled in the above-mentioned module E) and other operations.
  • Step S612 perform a first judgment to determine whether the decoder needs to be called
  • Step S614 if the above-mentioned first judgment result is no, end the process;
  • Step S616 if the first judgment result is yes, the decoder is called to perform corresponding decoding (mainly tuibo decoding), deinterleaving, rate matching and other operations during the processing of step S610. After the processing is completed, the data is written to the storage unit;
  • step S618 a second judgment is performed to determine whether the processing is completed. If the second judgment result is no, step S610 is executed. If the second judgment result is yes, step S614 is executed.
  • Figure 7 is a flow chart of data sending processing according to a specific embodiment of the present disclosure. As shown in Figure 7, the process includes the following steps:
  • Step S702 start sending processing
  • Step S704 use the above-mentioned module D and the above-mentioned module E to write the data to be processed into the storage unit;
  • Step S706 call the encoder to perform data encoding (corresponding to the above Turbo encoding, more complex encoding can be processed in module D);
  • Step S708 The processor performs partial adjustment, precoding and other tasks on the storage unit.
  • the processed data is written into the storage unit;
  • Step S710 read the storage unit data and perform filtering, IFFT, spectrum shifting, phase rotation and other operations;
  • Step S712 Send the data processed in step S712 at a fixed rate
  • Step S714 The radio frequency interface sends data to the radio frequency chip.
  • a special storage unit can be used for the physical layer processing of LTE-V2X to interact with the intermediate results of each part of the calculation.
  • the processing delay requirements are high and the calculation method is relatively fixed.
  • Partial processing of modulation and demodulation, channel encoding and decoding, etc. can be carried out using specialized hardware processing units.
  • Other processing processes of the LTE-V2X physical layer can be carried out using CPU or DSP or MCU etc. for processing.
  • the method according to the above embodiments can be implemented by means of software plus the necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is Better implementation.
  • the technical solutions of the embodiments of the present disclosure can be embodied in the form of software products in essence or those that contribute to the existing technology.
  • the computer software products are stored in a storage medium (such as ROM/RAM, magnetic disc, optical disk), including several instructions to cause a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of the present disclosure.
  • each module or each step of the above-mentioned embodiments of the present disclosure can be implemented by a general computing device, and they can be concentrated on a single computing device, or distributed among multiple computing devices. over a network, they may be implemented with program code executable by a computing device, such that they may be stored in a storage device for execution by the computing device, and in some cases, may be executed in a sequence different from that described here.
  • the steps shown or described are either made separately into individual integrated circuit modules, or multiple modules or steps among them are made into a single integrated circuit module. As such, disclosed embodiments are not limited to any specific combination of hardware and software.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Transceivers (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

本公开实施例提供了一种数据收发系统、数据接收方法及数据发送方法，该系统包括射频接口，用于收发数据；调制解调器，与射频接口连接，用于对第一类数据及第二类数据分别做解调及调制操作，以及将调制后的第二类数据发送给射频接口；存储单元，与调制解调器连接，用于存储第一类数据和第二类数据；硬件加速器，与存储单元连接，用于从存储单元中读取未做物理层信道解码处理的第一类数据并做物理层信道解码处理及将做物理层信道解码处理后的第一类数据存至存储单元；从存储单元中读取未做物理层信道编码处理的第二类数据并做物理层信道编码处理及将做物理层信道编码处理后的第二类数据存至存储单元。

Description

数据收发系统、数据接收方法及数据发送方法
相关申请的交叉引用
本公开基于2022年6月30日提交的发明名称为“数据收发系统、数据接收方法及数据发送方法”的中国专利申请CN202210764111.4，并且要求该专利申请的优先权，通过引用将其所公开的内容全部并入本公开。
技术领域
本公开实施例涉及通信领域，具体而言，涉及一种数据收发系统、数据接收方法及数据发送方法。
背景技术
随着科学技术的不断发展，传统的通信技术已无法满足人们日益增加的通信需求，无线通信技术便应运而生，并逐渐代替了传统通信技术，成为通信领域的主流技术。随着无线通信技术的飞速发展，无线通信技术的应用领域也越来越广泛，且占据着重要地位。
相关技术中，一些通信技术对于传输要求越来越高，例如，V2X(车用无线通信技术，vehicle to X)是未来的汽车安全和自动驾驶的关键技术之一，采用V2X技术能实现车与车，车与基站，基站与基站等的快速通信，并最终实现车与一切可能影响车辆的实体通信，以达到提高汽车安全性，提高交通效率，更加绿色环保等目的。但V2X通信需要满足高可靠性，低延时，以及带宽需求，在满足需求的同时还需要考虑成本等问题。而当前的LTE-V2X的延时要求是50ms，因此给通信终端设备提出了较高要求。
可见，在相关技术中，目前的通信终端设备无法满足一些特定的通信协议的高可靠性以及低延时等方面的通信需求，针对相关技术中存在的上述问题，目前尚未提出有效的解决方案。
发明内容
本公开实施例提供了一种数据收发系统、数据接收方法及数据发送方法，以至少解决相关技术中存在的终端设备无法满足一些特定的通信协议的高可靠性以及低延时等方面的通信需求的问题。
根据本公开的一个实施例，提供了一种数据收发系统，包括：射频接口，其中，所述射频接口设置为收发数据；调制解调器，其中，所述调制解调器与所述射频接口连接，设置为对第一类数据进行解调操作，以及对第二类数据进行调制操作，并将执行了所述调制操作后的所述第二类数据发送给所述射频接口，所述第一类数据为通过所述射频接口所接收到的数据，所述第二类数据为待通过所述射频接口进行发送的数据；存储单元，其中，所述存储单元与所述调制解调器连接，设置为存储所述第一类数据和所述第二类数据，所述调制解调器设置为将进行了所述解调操作后的所述第一类数据存储至所述存储单元中，以及，从所述存储单元中读取完成了物理层的编码处理的所述第二类数据；硬件加速器，其中，所述硬件加速器与所述存储单元连接，设置为执行以下操作：从所述存储单元中读取未进行物理层的信 道解码处理的所述第一类数据并对其进行所述物理层的信道解码处理，以及将执行了所述物理层的信道解码处理后的所述第一类数据存储至所述存储单元中；从所述存储单元中读取未进行物理层的信道编码处理的所述第二类数据并对其进行所述物理层的信道编码处理，以及将执行了所述物理层的信道编码处理后的所述第二类数据存储至所述存储单元中。
根据本公开的另一个实施例，提供了一种数据接收方法，该方法应用于上述实施例所述的系统中，包括：通过所述射频接口接收所述第一类数据；通过所述调制解调器对所述第一类数据进行解调操作，并将进行了所述解调操作后的所述第一类数据存储至所述存储单元中；通过所述硬件加速器从所述存储单元中读取未进行物理层的信道解码处理的所述第一类数据并对其进行所述物理层的信道解码处理，以及将执行了所述物理层的信道解码处理后的所述第一类数据存储至所述存储单元中。
根据本公开的另一个实施例，提供了一种数据发送方法，该方法应用于上述实施例所述的系统中，包括：通过所述硬件加速器从所述存储单元中读取未进行物理层的信道编码处理的所述第二类数据并对其进行所述物理层的信道编码处理，以及将执行了所述物理层的信道编码处理后的所述第二类数据存储至所述存储单元中；通过所述调制解调器从所述存储单元中读取完成了所述物理层的编码处理的所述第二类数据并对其进行调制操作，以及将执行了所述调制操作后的所述第二类数据发送给所述射频接口，以通过所述射频接口进行发送。
附图说明
图1是根据本公开实施例的数据收发系统的结构框图；
图2是根据本公开具体实施例的数据收发系统的结构框图；
图3是本公开实施例的数据收发方法的终端的硬件结构框图；
图4是根据本公开实施例的数据接收方法的流程图；
图5是根据本公开实施例的数据发送方法的流程图；
图6是根据本公开具体实施例的数据接收处理的流程图；
图7是根据本公开具体实施例的数据发送处理的流程图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本公开实施例。
需要说明的是，本公开实施例的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
为了解决相关技术中存在的问题，在本实施例中，提供了一种数据收发系统，如图1所示，该系统包括：射频接口12(后续简称为射频接口)，其中，所述射频接口12设置为收发数据；调制解调器14(后续简称为调制解调器)，其中，所述调制解调器与所述射频接口连接，设置为对第一类数据进行解调操作，以及对第二类数据进行调制操作，并将执行了所述调制操作后的所述第二类数据发送给所述射频接口，所述第一类数据为通过所述射频接口所接收到的数据，所述第二类数据为待通过所述射频接口进行发送的数据；存储单元16(后续简称为存储单元)，其中，所述存储单元与所述调制解调器连接，设置为存储所述第一类数据和所述第二类数据，所述调制解调器设置为将进行了所述解调操作后的所述第一类数据存储至所述存储单元中，以及，从所述存储单元中读取完成了物理层的编码处理的所述第二类数据；硬件加速器18(后续简称为硬件加速器)，其中，所述硬件加速器与所述存储单元连接， 设置为执行以下操作：从所述存储单元中读取未进行物理层的信道解码处理的所述第一类数据并对其进行所述物理层的信道解码处理，以及将执行了所述物理层的信道解码处理后的所述第一类数据存储至所述存储单元中；从所述存储单元中读取未进行物理层的信道编码处理的所述第二类数据并对其进行所述物理层的信道编码处理，以及将执行了所述物理层的信道编码处理后的所述第二类数据存储至所述存储单元中。
在上述实施例中，数据收发系统中除了包括有射频接口、调制解调器、存储单元、硬件加速器之外，还可以额外包括有处理器、控制器等，处理器可以用于实现其他物理层处理过程，此外，存储单元可以用于存储初始发送内容和最终接收结果等，后续会对处理器所执行的操作进行具体说明。
在上述实施例中，由数据收发系统中包括的射频接口、调制解调器、存储单元、硬件加速器等各个组件相互配合着完成通信数据的收发处理，其中，采用了专门的硬件加速器来处理时延要求高以及处理慢的过程，可以有效降低数据的处理时延，也就是说通过数据收发系统中的各个模块共同协作完成通信数据的处理，解决了相关技术中存在的终端设备无法满足特定通信协议的高可靠性以及低延时等方面的通信需求的问题，达到降低数据处理时延，提高数据传输的可靠性的效果。
在一个实施例中，上述数据收发系统还包括处理器，其中，所述处理器与所述存储单元连接，设置为执行以下操作：从所述存储单元中获取未进行物理层的其他解码处理的所述第一类数据并对其进行所述物理层的其他解码处理，以及将执行了所述物理层的其他解码处理后的所述第一类数据存储至所述存储单元中；从所述存储单元中读取未进行物理层的其他编码处理的所述第二类数据并对其进行所述物理层的其他编码处理，以及将执行了所述物理层的其他编码处理后的所述第二类数据存储至所述存储单元中；其中，所述物理层的其他解码处理包括除所述物理层的信号解码处理外的处理，所述物理层的其他编码处理包括除所述物理层的信号编码处理外的处理。在本实施例中，处理器可以设置为对存储单元中包括的未采用硬件加速器进行物理层的其他解码处理和/或其他编码处理的数据进行所述物理层的其他解码处理和/或其他编码处理，例如，处理器可以对LTE-V2X收发处理过程中处理时延要求较低的数据等进行其他解码处理和/或其他编码处理，此外，处理器可以对不同阶段的编码进行处理，还需要说明的是，上述处理器和上述硬件加速器的举例说明仅是一种示例性实施例，处理器和硬件加速器并不仅限于上述举例，其他具备类似处理能力的设备或模块也可以替代上述的处理器和硬件加速器。
在一个实施例中，所述处理器还设置为从所述存储单元中获取未进行其他解调操作的所述第一类数据并对其进行所述其他解调操作，以及将执行了所述其他解调操作后的所述第一类数据存储至所述存储单元中，其中，所述其他解调操作包括除所述调制解调器所执行的解调操作之外的解调操作；所述处理器还设置为从所述存储单元中读取未进行其他调制操作的所述第二类数据并对其进行所述其他调制操作，以及将执行了所述其他调制操作后的所述第二类数据存储至所述存储单元中，其中，所述其他调制操作包括除所述调制解调器所执行的调制操作之外的调制操作。在本实施例中，处理器可以设置为对存储单元中包括的未采用调制解调器进行其他解调操作和/或其他调整操作的数据进行其他解调操作和/或其他调整操作，例如，处理器可以对LTE-V2X收发处理过程中计算方式比较灵活的调制解调的部分处理等进行其他解调操作和/或其他调整操作。
在一个实施例中，所述处理器包括以下至少之一：中央处理器CPU，数字信号处理器DSP，管理控制单元MCU。在本实施例中，处理器可以由CPU或DSP或MCU等组成，用于完成一些通信数据，例如LTE-V2X的物理层较为简单的其他处理。
在一个实施例中，所述射频接口设置为接收来自目标芯片的所述第一类数据，以及，设置为向所述目标芯片发送所述第二类数据。在本实施例中，射频接口可以设置为实现与天线芯片(即目标芯片)的数据和命令对接，例如，射频接口可以接收调制解调器调制后的数据并通过sedes(串行解串器)发送到射频芯片。以及射频芯片数据先通过sedes发送到射频接口，经过射频接口转换后发送到调制解调器，还需要说明的是，上述射频接口的举例说明仅是一种示例性实施例，射频接口并不仅限于上述与天线芯片通信，射频接口还可以实现和其他的能够进行数据收发的芯片进行通信。
在一个实施例中，所述物理层的信道解码处理包括以下操作至少之一：Turbo译码处理、卷积译码处理、速率解匹配处理、解交织处理。在本实施例中，可以采用硬件加速器和处理器等共同协作完成的物理层的信道解码处理操作，其中，可以由硬件加速器完成一些较为复杂的信道解码处理(例如，本实施例中所列举的至少一种信道解码处理)，由处理器完成一些较为简单的信道解码处理，从而达到降低信道解码处理的时延的效果。
在一个实施例中，所述物理层的信道编码处理包括以下操作至少之一：Turbo编码处理、卷积编码处理、速率匹配处理、交织处理。在本实施例中，可以采用硬件加速器和处理器等共同协作完成上述的物理层的信道编码处理操作，同样地，可以由硬件加速器完成一些较为复杂的信道编码处理(例如，本实施例中所列举的至少一种信道编码处理)，由处理器完成一些较为简单的信道编码处理，从而达到降低信道编码处理的时延的效果。
在一个实施例中，所述解调操作包括以下至少之一：功率估计和补偿，陷波，第一滤波，降采样，第一相位旋转，第一频谱搬移，FFT变换。在本实施例中，可以采用调制解调器和处理器共同协作对接收到的数据(即从外界接收到的数据等)进行上述的解调操作，其中，可以由调制解调器完成一些较为复杂的解调处理(例如，本实施例中所列举的至少一种解调操作)，由处理器完成一些较为简单的解调处理，从而达到降低解调操作的时延的效果，此外，可以根据实际应用的场景从上述解调操作中选择全部或部分解调操作进行处理，且解调操作的顺序不做限定。
在一个实施例中，所述调制操作包括以下至少之一：第二滤波，加窗，滚降，IFFT变换，第二相位旋转，第二频谱搬移。在本实施例中，可以采用调制解调器和处理器共同协作对一些通信数据，例如，LTE-V2X发送的数据(即待向外发送的数据等)进行调制操作，其中，可以由调制解调器完成一些较为复杂的调制处理(例如，本实施例中所列举的至少一种调制操作)，由处理器完成一些较为简单的调制处理，从而达到降低调制操作的时延的效果，此外，可以根据实际应用的场景从上述调制操作中选择全部或部分调制操作进行处理，且调制操作的顺序不做限定。
在一个实施例中，所述数据收发系统包括LTE-V2X数据收发系统。
显然，上述所描述的实施例仅仅是本公开实施例一部分的实施例，而不是全部的实施例。
下面以LTE-V2X数据收发为例，结合实施例对本公开实施例进行具体说明：
图2是根据本公开具体实施例的据收发系统的结构框图，如图2所示，数据收发系统用于完成LTE-V2X的收发，初始发送内容和最终接收结果存放在存储单元内部，各模块功能如 下：
1、C模块(对应于上述存储单元)存放初始发送内容和最终接收结果，并完成B(对应于上述调制解调器)，D(对应于上述硬件加速器)，E(对应于上述处理器)三个模块的交互中间数据存放。
2、A模块(对应于上述射频接口)具有两个基本功能：接收B模块调制的数据并通过sedes(串行解串器)发送到射频芯片。以及射频芯片数据先通过sedes发送到A模块，经过转换后发送到B模块。
3、B模块对LTE-V2X发送的数据(即待向外发送的数据等)进行滤波，加窗，滚降，IFFT变换，相位旋转，频谱搬移等一系列调制操作。对接收到的数据(即从外界接收到的数据等)进行功率估计和补偿，陷波，滤波，降采样，相位旋转，频谱搬移，FFT变换等一系列解调制操作。
4、D模块主要完成LTE-V2X的信道编解码，包括：数据的turbo(对应于上述的Turbo译码处理和上述的Turbo编码处理)和卷积编译码(对应于上述的卷积译码处理和上述的卷积编码处理)，速率匹配和解匹配(对应于上述的速率匹配处理和上述的速率解匹配处理)，交织和解交织(对应于上述的交织处理和解交织处理)等功能。
5、E模块是由CPU或DSP或MCU等组成，用于完成LTE-V2X的物理层其他处理。
下面结合实施例对本公开实施例中所涉及到的数据收发操作进行说明。
首先，需要说明的是，本公开实施例中所提供的方法实施例可以在移动终端、计算机终端或者类似的运算装置中执行。以运行在计算机终端上为例，图3是本公开实施例的数据收发方法的终端的硬件结构框图。如图3所示，该终端可以包括一个或多个(图3中仅示出一个)目标处理器302(该目标处理器302与前述的“处理器”是不同的器件，该目标处理器302可以包括前述的“处理器”所实现的功能，其中，目标处理器302可以包括但不限于微处理器MCU或可编程逻辑器件FPGA等的处理装置)和用于存储数据的存储器304，其中，上述移动终端还可以包括用于通信功能的传输设备306以及输入输出设备308。本领域普通技术人员可以理解，图3所示的结构仅为示意，其并不对上述移动终端的结构造成限定。例如，移动终端还可包括比图3中所示更多或者更少的组件，或者具有与图3所示不同的配置。
存储器304可用于存储计算机程序，例如，应用软件的软件程序以及模块，如本公开实施例中的数据收发方法对应的计算机程序，目标处理器302通过运行存储在存储器304内的计算机程序，从而执行各种功能应用以及数据处理，即实现本公开实施例中所述的数据收发方法。存储器304可包括高速随机存储器，还可包括非易失性存储器，如一个或者多个磁性存储装置、闪存、或者其他非易失性固态存储器。在一些实例中，存储器304可进一步包括相对于目标处理器302远程设置的存储器，这些远程存储器可以通过网络连接至移动终端。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
传输装置306用于经由一个网络接收或者发送数据。上述的网络具体实例可包括移动终端的通信供应商提供的无线网络。在一个实例中，传输装置306包括一个网络适配器(Network Interface Controller，NIC)，其可通过基站与其他网络设备相连从而可与互联网进行通讯。在一个实例中，传输装置306可以为射频(Radio Frequency，RF)模块，其用于通过无线方式与互联网进行通讯。
下面分别对本公开实施例中所涉及到的数据接收方法和数据发送方法分别进行说明：
在本实施例中提供了一种数据接收方法，该方法可以应用于上述的数据收发系统中，图4是根据本公开实施例的数据接收方法的流程图，如图4所示，该流程包括如下步骤：
步骤S402，通过所述射频接口接收所述第一类数据；
步骤S404，通过所述调制解调器对所述第一类数据进行解调操作，并将进行了所述解调操作后的所述第一类数据存储至所述存储单元中；
步骤S406，通过所述硬件加速器从所述存储单元中读取未进行物理层的信道解码处理的所述第一类数据并对其进行所述物理层的信道解码处理，以及将执行了所述物理层的信道解码处理后的所述第一类数据存储至所述存储单元中。
其中，上述步骤的执行主体可以是上述的数据收发系统，或者还可以是位于数据收发系统中的或者与数据收发系统连接的控制器、或控制系统，或者是具备控制能力的设备，此外，上述步骤的执行主体还可以是其他的具备类似处理能力的处理设备或处理单元等。
在上述实施例中，可以通过调制解调器对射频接口接收的第一类数据进行解调操作，并将进行了解调操作之后的第一类数据存储至存储单元中，再通过硬件加速器对从存储单元中读取未进行物理层的信道解码处理的第一类数据进行物理层信道解码处理，以及将执行了物理层的信道解码处理后第一类数据存储至存储单元中。通过在数据收发系统中应用数据接收方法，可以实现由数据收发系统中包括的射频接口、调制解调器、存储单元、硬件加速器等各个组件相互配合着完成通信数据的收发处理，其中，采用了专门的硬件加速器来处理时延要求高以及处理慢的过程，可以有效降低数据的处理时延，也就是说通过数据收发系统中的各个模块共同协作完成通信数据的处理，解决了相关技术中存在的终端设备无法满足特定通信协议的高可靠性以及低延时等方面的通信需求的问题，达到降低数据处理时延，提高数据传输的可靠性的效果。
在本实施例中，调制解调器可以优先对射频接口接收的处理时延要求高、计算方式比较固定的第一类数据进行解调操作，硬件加速器可以优先对从存储单元中获取的未进行物理层的信道解码处理的且处理时延要求高的、计算方式比较固定的第一类数据进行物理层的信道解码处理。
在一个实施例中，所述方法还包括：通过处理器从所述存储单元中获取未进行物理层的其他解码处理的所述第一类数据并对其进行所述物理层的其他解码处理，以及将执行了所述物理层的其他解码处理后的所述第一类数据存储至所述存储单元中，其中，所述处理器与所述存储单元连接，所述物理层的其他解码处理包括除所述物理层的信号解码处理外的处理。在本实施例中，处理器可以优先对从存储单元中获取未进行物理层的其他解码处理的且处理时延要求较低的、计算方式比较灵活的第一类数据进行物理层的其他解码处理。
在一个实施例中，所述方法还包括：通过所述处理器从所述存储单元中获取未进行其他解调操作的所述第一类数据并对其进行所述其他解调操作，以及将执行了所述其他解调操作后的所述第一类数据存储至所述存储单元中，其中，所述其他解调操作包括除所述调制解调器所执行的解调操作之外的解调操作。在本实施例中，处理器可以优先对从存储单元中获取未进行其他解调操作的且处理时延要求较低的、计算方式比较灵活的第一类数据进行其他解调操作。
在本实施例中还提供了一种数据发送方法，该方法可以应用于上述的数据收发系统中， 图5是根据本公开实施例的数据发送方法的流程图，如图5所示，该流程包括如下步骤：
步骤S502，通过所述硬件加速器从所述存储单元中读取未进行物理层的信道编码处理的所述第二类数据并对其进行所述物理层的信道编码处理，以及将执行了所述物理层的信道编码处理后的所述第二类数据存储至所述存储单元中；
步骤S504，通过所述调制解调器从所述存储单元中读取完成了所述物理层的编码处理的所述第二类数据并对其进行调制操作，以及将执行了所述调制操作后的所述第二类数据发送给所述射频接口，以通过所述射频接口进行发送。
其中，上述步骤的执行主体可以是上述的数据收发系统，或者还可以是位于数据收发系统中的或者与数据收发系统连接的控制器、或控制系统，或者是具备控制能力的设备，此外，上述步骤的执行主体还可以是其他的具备类似处理能力的处理设备或处理单元等。
在上述实施例中，可以通过调制解调器对射频接口接收的第一类数据进行解调操作，并将进行了解调操作之后的第一类数据存储至存储单元中，再通过硬件加速器对从存储单元中读取未进行物理层的信道解码处理的第一类数据进行物理层信道解码处理，以及将执行了物理层的信道解码处理后第一类数据存储至存储单元中。通过在数据收发系统中应用数据接收方法，可以实现由数据收发系统中包括的射频接口、调制解调器、存储单元、硬件加速器等各个组件相互配合着完成通信数据的收发处理，其中，采用了专门的硬件加速器来处理时延要求高以及处理慢的过程，可以有效降低数据的处理时延，也就是说通过数据收发系统中的各个模块共同协作完成通信数据的处理，解决了相关技术中存在的终端设备无法满足特定通信协议的高可靠性以及低延时等方面的通信需求的问题，达到降低数据处理时延，提高数据传输的可靠性的效果。
在一个实施例中，所述方法还包括：通过处理器从所述存储单元中读取未进行物理层的其他编码处理的所述第二类数据并对其进行所述物理层的其他编码处理，以及将执行了所述物理层的其他编码处理后的所述第二类数据存储至所述存储单元中，其中，所述处理器与所述存储单元连接，所述物理层的其他编码处理包括除所述物理层的信号编码处理外的处理。在本实施例中，处理器可以优先对从存储单元中读取未进行物理层的其他编码处理的且处理时延要求较低的、计算方式比较灵活的第二类数据进行物理层的其他编码处理。
在一个实施例中，所述方法还包括：通过所述处理器从所述存储单元中读取未进行其他调制操作的所述第二类数据并对其进行所述其他调制操作，以及将执行了所述其他调制操作后的所述第二类数据存储至所述存储单元中，其中，所述其他调制操作包括除所述调制解调器所执行的调制操作之外的调制操作。在本实施例中，处理器可以优先对从存储单元中读取未进行其他调制操作的且处理时延要求较低的、计算方式比较灵活的第二类数据进行其其他调制操作。
显然，上述所描述的实施例仅仅是本公开实施例一部分的实施例，而不是全部的实施例。
下面结合具体实施例对本公开实施例进行具体说明：
图6是根据本公开具体实施例的数据接收处理的流程图，如图6所示，该流程包括如下步骤：
步骤S602，开始接收处理；
步骤S604，打开射频接口开始接收天线数据；
步骤S606，对接收到的数据进行数字前端的解调操作；
步骤S608，将步骤S506处理完成后的数据写入存储单元(对应于上述C模块)；
步骤S610，处理器(对应于上述E模块)对写入的数据进行相应的测量，信道估计，解调(部分比较复杂的解调操作在上述模块B和上述模块D中处理，部分比较简单的解调操作在上述模块E中处理)等操作。
步骤S612，进行第一判断，以判断是否需要调用译码器；
步骤S614，在上述第一判断结果为否的情况下，结束处理；
步骤S616，在上述第一判断结果为是的情况下，在步骤S610的处理过程中调用译码器进行相应的译码(主要是tuibo译码)，解交织，解速率匹配等操作。处理完成后将数据写入存储单元；
步骤S618，进行第二判断，以判断处理是否结束，在所述第二判断结果为否的情况下，执行步骤S610，在上述第二判断结果为是的情况下，执行步骤S614。
图7是根据本公开具体实施例的数据发送处理的流程图，如图7所示，该流程包括如下步骤：
步骤S702，开始发送处理；
步骤S704，采用上述模块D和上述模块E将待处理数据写入存储单元；
步骤S706，调用编码器进行数据编码(对应于上述Turbo编码，比较复杂的编码可以放到模块D中处理)；
步骤S708，处理器对存储单元进行部分调整，预编码等工作。处理完成后的数据写入存储单元；
步骤S710，读出存储单元数据，进行滤波，IFFT，频谱搬移，相位旋转等操作；
步骤S712，将步骤S712处理完成后的数据按照固定速率进行发送；
步骤S714，射频接口发送数据到射频芯片。
由前述实施可知，在本公开实施例中可以采用一个专门的存储单元，用于LTE-V2X的物理层处理各部分计算的中间结果交互。将LTE-V2X收发处理过程中处理时延要求高，计算方式比较固定的调制解调的部分处理，信道编解码等可以采用专门的硬件处理单元进行，将LTE-V2X物理层其他的处理过程采用CPU或DSP或MCU等进行处理。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本公开实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本公开各个实施例所述的方法。
本实施例中的具体示例可以参考上述实施例及示例性实施方式中所描述的示例，本实施例在此不再赘述。
显然，本领域的技术人员应该明白，上述的本公开实施例的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个 集成电路模块来实现。这样，本公开实施例不限制于任何特定的硬件和软件结合。
以上所述仅为本公开实施例的优选实施例而已，并不用于限制本公开实施例，对于本领域的技术人员来说，本公开实施例可以有各种更改和变化。凡在本公开实施例的原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开实施例的保护范围之内。

Claims (16)

  1. 一种数据收发系统，包括：
    射频接口，其中，所述射频接口设置为收发数据；
    调制解调器，其中，所述调制解调器与所述射频接口连接，设置为对第一类数据进行解调操作，以及对第二类数据进行调制操作，并将执行了所述调制操作后的所述第二类数据发送给所述射频接口，所述第一类数据为通过所述射频接口所接收到的数据，所述第二类数据为待通过所述射频接口进行发送的数据；
    存储单元，其中，所述存储单元与所述调制解调器连接，设置为存储所述第一类数据和所述第二类数据，所述调制解调器设置为将进行了所述解调操作后的所述第一类数据存储至所述存储单元中，以及，从所述存储单元中读取完成了物理层的编码处理的所述第二类数据；
    硬件加速器，其中，所述硬件加速器与所述存储单元连接，设置为执行以下操作：从所述存储单元中读取未进行物理层的信道解码处理的所述第一类数据并对其进行所述物理层的信道解码处理，以及将执行了所述物理层的信道解码处理后的所述第一类数据存储至所述存储单元中；从所述存储单元中读取未进行物理层的信道编码处理的所述第二类数据并对其进行所述物理层的信道编码处理，以及将执行了所述物理层的信道编码处理后的所述第二类数据存储至所述存储单元中。
  2. 根据权利要求1所述的系统，其中，还包括：
    处理器，其中，所述处理器与所述存储单元连接，设置为执行以下操作：从所述存储单元中获取未进行物理层的其他解码处理的所述第一类数据并对其进行所述物理层的其他解码处理，以及将执行了所述物理层的其他解码处理后的所述第一类数据存储至所述存储单元中；从所述存储单元中读取未进行物理层的其他编码处理的所述第二类数据并对其进行所述物理层的其他编码处理，以及将执行了所述物理层的其他编码处理后的所述第二类数据存储至所述存储单元中；
    其中，所述物理层的其他解码处理包括除所述物理层的信号解码处理外的处理，所述物理层的其他编码处理包括除所述物理层的信号编码处理外的处理。
  3. 根据权利要求2所述的系统，其中，
    所述处理器还设置为从所述存储单元中获取未进行其他解调操作的所述第一类数据并对其进行所述其他解调操作，以及将执行了所述其他解调操作后的所述第一类数据存储至所述存储单元中，其中，所述其他解调操作包括除所述调制解调器所执行的解调操作之外的解调操作；
    所述处理器还设置为从所述存储单元中读取未进行其他调制操作的所述第二类数据并对其进行所述其他调制操作，以及将执行了所述其他调制操作后的所述第二类数据存储至所述存储单元中，其中，所述其他调制操作包括除所述调制解调器所执行的调制操作之外的调制操作。
  4. 根据权利要求2或3所述的系统，其中，所述处理器包括以下至少之一：
    中央处理器CPU，数字信号处理器DSP，管理控制单元MCU。
  5. 根据权利要求1所述的系统，其中，
    所述射频接口设置为接收来自目标芯片的所述第一类数据，以及，设置为向所述目标芯片发送所述第二类数据。
  6. 根据权利要求1所述的系统，其中，所述物理层的信道解码处理包括以下操作至少之一：
    Turbo译码处理、卷积译码处理、速率解匹配处理、解交织处理。
  7. 根据权利要求1所述的系统，其中，所述物理层的信道编码处理包括以下操作至少之一：
    Turbo编码处理、卷积编码处理、速率匹配处理、交织处理。
  8. 根据权利要求1所述的系统，其中，所述解调操作包括以下至少之一：
    功率估计和补偿，陷波，第一滤波，降采样，第一相位旋转，第一频谱搬移，FFT变换。
  9. 根据权利要求1所述的系统，其中，所述调制操作包括以下至少之一：
    第二滤波，加窗，滚降，IFFT变换，第二相位旋转，第二频谱搬移。
  10. 根据权利要求1至9中任一项所述的系统，其中，所述数据收发系统包括LTE-V2X数据收发系统。
  11. 一种数据接收方法，应用于权利要求1至10中任一项所述的系统中，包括：
    通过所述射频接口接收所述第一类数据；
    通过所述调制解调器对所述第一类数据进行解调操作，并将进行了所述解调操作后的所述第一类数据存储至所述存储单元中；
    通过所述硬件加速器从所述存储单元中读取未进行物理层的信道解码处理的所述第一类数据并对其进行所述物理层的信道解码处理，以及将执行了所述物理层的信道解码处理后的所述第一类数据存储至所述存储单元中。
  12. 根据权利要求11所述的方法，其中，所述方法还包括：
    通过处理器从所述存储单元中获取未进行物理层的其他解码处理的所述第一类数据并对其进行所述物理层的其他解码处理，以及将执行了所述物理层的其他解码处理后的所述第一类数据存储至所述存储单元中，其中，所述处理器与所述存储单元连接，所述物理层的其他解码处理包括除所述物理层的信号解码处理外的处理。
  13. 根据权利要求12所述的方法，其中，所述方法还包括：
    通过所述处理器从所述存储单元中获取未进行其他解调操作的所述第一类数据并对其进行所述其他解调操作，以及将执行了所述其他解调操作后的所述第一类数据存储至所述存储单元中，其中，所述其他解调操作包括除所述调制解调器所执行的解调操作之外的解调操作。
  14. 一种数据发送方法，应用于权利要求1至10中任一项所述的系统中，包括：
    通过所述硬件加速器从所述存储单元中读取未进行物理层的信道编码处理的所述第二类数据并对其进行所述物理层的信道编码处理，以及将执行了所述物理层的信道编码处理后的所述第二类数据存储至所述存储单元中；
    通过所述调制解调器从所述存储单元中读取完成了所述物理层的编码处理的所述第二类数据并对其进行调制操作，以及将执行了所述调制操作后的所述第二类数据发送给所述射频 接口，以通过所述射频接口进行发送。
  15. 根据权利要求14所述的方法，其中，所述方法还包括：
    通过处理器从所述存储单元中读取未进行物理层的其他编码处理的所述第二类数据并对其进行所述物理层的其他编码处理，以及将执行了所述物理层的其他编码处理后的所述第二类数据存储至所述存储单元中，其中，所述处理器与所述存储单元连接，所述物理层的其他编码处理包括除所述物理层的信号编码处理外的处理。
  16. 根据权利要求15所述的方法，其中，所述方法还包括：
    通过所述处理器从所述存储单元中读取未进行其他调制操作的所述第二类数据并对其进行所述其他调制操作，以及将执行了所述其他调制操作后的所述第二类数据存储至所述存储单元中，其中，所述其他调制操作包括除所述调制解调器所执行的调制操作之外的调制操作。
PCT/CN2023/101513 2022-06-30 2023-06-20 数据收发系统、数据接收方法及数据发送方法 WO2024001892A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202210764111.4A CN117375651A (zh) 2022-06-30 2022-06-30 数据收发系统、数据接收方法及数据发送方法
CN202210764111.4 2022-06-30

Publications (1)

Publication Number Publication Date
WO2024001892A1 true WO2024001892A1 (zh) 2024-01-04

Family

ID=89383272

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2023/101513 WO2024001892A1 (zh) 2022-06-30 2023-06-20 数据收发系统、数据接收方法及数据发送方法

Country Status (2)

Country Link
CN (1) CN117375651A (zh)
WO (1) WO2024001892A1 (zh)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101345869A (zh) * 2008-07-11 2009-01-14 华为技术有限公司 一种信号接收方法、系统及视频解码装置
CN102136848A (zh) * 2011-01-27 2011-07-27 厦门日华科技股份有限公司 一种收发各种警报信息并可进行声码话通信的装置
CN103188034A (zh) * 2011-12-29 2013-07-03 联芯科技有限公司 Lte系统pdsch信道解调译码处理方法和装置
US20130322501A1 (en) * 2011-02-10 2013-12-05 Nec Corporation Encoding/decoding processor and wireless communication apparatus
CN103888844A (zh) * 2014-03-12 2014-06-25 上海昕芯电子科技有限公司 高集成度的无线视频传输方法和系统

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101345869A (zh) * 2008-07-11 2009-01-14 华为技术有限公司 一种信号接收方法、系统及视频解码装置
CN102136848A (zh) * 2011-01-27 2011-07-27 厦门日华科技股份有限公司 一种收发各种警报信息并可进行声码话通信的装置
US20130322501A1 (en) * 2011-02-10 2013-12-05 Nec Corporation Encoding/decoding processor and wireless communication apparatus
CN103188034A (zh) * 2011-12-29 2013-07-03 联芯科技有限公司 Lte系统pdsch信道解调译码处理方法和装置
CN103888844A (zh) * 2014-03-12 2014-06-25 上海昕芯电子科技有限公司 高集成度的无线视频传输方法和系统

Also Published As

Publication number Publication date
CN117375651A (zh) 2024-01-09

Similar Documents

Publication Publication Date Title
WO2018201831A1 (zh) 通信方法和装置
CN103841002A (zh) 语音传输方法、终端、语音服务器及语音传输系统
WO2016154968A1 (zh) 编码方法、装置、基站和用户设备
US20220368494A1 (en) Uplink re-transmission with compact memory usage
WO2019056369A1 (zh) 通信方法和装置
WO2018201984A1 (zh) 数据的传输方法和设备
WO2015042802A1 (zh) 基带处理系统、基带信号处理方法和基站
RU2739925C1 (ru) Способ передачи данных путем преобразования и относящийся к нему продукт
WO2017193281A1 (zh) 数据发送方法、数据接收方法及发送设备与接收设备
WO2024001892A1 (zh) 数据收发系统、数据接收方法及数据发送方法
CN112087403A (zh) 基于分布式机器学习的信息传输方法和装置
EP4366253A1 (en) Data processing method and apparatus
WO2021088091A1 (zh) 通信方法及装置
WO2024103298A1 (zh) 数据传输的方法和装置
CN114599041B (zh) 一种计算和通信的融合方法
WO2024050777A1 (zh) 传输配置方法、装置及系统
WO2022257533A1 (zh) 一种数据传输方法、装置、存储介质及电子装置
WO2024020904A1 (zh) 智能反射表面irs的相移配置的发送、接收方法及装置
WO2024007273A1 (zh) 峰值数据速率的确定方法及装置
WO2023088032A1 (zh) 数据发送的方法和装置
US20230113300A1 (en) Data Processing Method, Apparatus, and Device
WO2017113356A1 (zh) 一种传输数据的方法、装置和系统
WO2023207783A1 (zh) 一种通信方法、装置及系统
WO2024007224A1 (zh) 一种基于反馈的自适应传输方法
WO2024007270A1 (zh) 层2缓存大小的确定方法及装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23830071

Country of ref document: EP

Kind code of ref document: A1