WO2024000415A1 - 显示基板及其制作方法、显示装置 - Google Patents

显示基板及其制作方法、显示装置 Download PDF

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Publication number
WO2024000415A1
WO2024000415A1 PCT/CN2022/102848 CN2022102848W WO2024000415A1 WO 2024000415 A1 WO2024000415 A1 WO 2024000415A1 CN 2022102848 W CN2022102848 W CN 2022102848W WO 2024000415 A1 WO2024000415 A1 WO 2024000415A1
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WIPO (PCT)
Prior art keywords
sub
light
base substrate
layer
main body
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PCT/CN2022/102848
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English (en)
French (fr)
Inventor
惠燕
石佺
李军
李海博
周瑞
李坡
陶欢
陈颖冰
张楠
刘肖楠
张磊
卢焱锴
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Priority to PCT/CN2022/102848 priority Critical patent/WO2024000415A1/zh
Publication of WO2024000415A1 publication Critical patent/WO2024000415A1/zh

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  • At least one embodiment of the present disclosure relates to a display substrate, a manufacturing method thereof, and a display device.
  • the performance requirements of high brightness and low power consumption of the display device can be met as much as possible by isolating the light-emitting material layer between adjacent sub-pixels to reduce signal crosstalk, thereby optimizing display performance.
  • Embodiments of the present disclosure provide a display substrate, a manufacturing method thereof, and a display device.
  • Embodiments of the present disclosure provide a display substrate.
  • the display substrate includes: a base substrate, a plurality of sub-pixels, a pixel defining layer and a planarization layer.
  • Each sub-pixel in the plurality of sub-pixels includes a light-emitting element, the light-emitting element includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate,
  • the first electrode is located between the light-emitting functional layer and the base substrate.
  • the light-emitting functional layer includes a plurality of film layers;
  • the pixel defining layer includes a main body and a plurality of openings. The openings are formed by the main body.
  • the opening exposes at least a portion of the first electrode;
  • a planarization layer is disposed between the base substrate and the pixel defining layer, wherein the main body part includes a first main body sub-part and a second Main body sub-section, the first main body sub-section is located on a side of the second main body sub-section close to the base substrate, and the second main body sub-section protrudes relative to the first main body sub-section to form a partition structure , at least one of the plurality of film layers is disconnected at the partition structure of the main body part, and the light-emitting functional layer of the first electrode located in the opening on the side away from the base substrate is located at the The orthographic projection on the base substrate at least partially overlaps with the orthographic projection of the light-emitting functional layer located on the side of the main body part away from the base substrate on the base substrate.
  • the partition structure in the pixel defining layer is arranged in an unclosed ring shape along the circumferential direction of the opening, and the second electrodes of adjacent light-emitting elements are in The unclosed annular parts are at least partially connected, and the length of the unclosed annular gap is 5-20 microns.
  • a minimum slope angle between at least part of the side surface of the second body sub-part and a plane parallel to the base substrate is 60 degrees to 90 degrees.
  • the minimum size of the opening is 1.2-1.5 times the maximum size of the first body sub-section.
  • the maximum size of the first body sub-section is 0.4-0.8 times the maximum size of the second body sub-section; along the direction perpendicular to the substrate In the direction of the substrate 01 , the maximum dimension N1 of the first body sub-part 10011 is 1-1.8 times the maximum dimension N2 of the second body sub-part 10012 .
  • the first electrode includes a crystallized conductive metal oxide.
  • the orthographic projection of the portion of the light-emitting functional layer located on the side of the second body sub-portion away from the base substrate on the base substrate is different from the light-emitting functional layer.
  • Orthographic projections of the portions located in the openings on the base substrate at least partially overlap.
  • the orthographic projection of the portion of the second electrode located on the side of the second body sub-portion away from the base substrate on the base substrate is different from the second electrode. Orthographic projections of the portions located in the openings on the base substrate at least partially overlap.
  • the partition structure includes a groove, and the light-emitting functional layer extends into the groove; the display substrate further includes a residual portion, the residual portion is located in the groove, and the The orthographic projection of the remaining portion on the base substrate falls into the orthographic projection of the partition structure on the base substrate.
  • An embodiment of the present disclosure also provides a display device, including the display substrate described in any one of the above.
  • An embodiment of the present disclosure also provides a method for manufacturing a display substrate, which includes: forming a planarization layer on the base substrate; forming a first conductive film on the planarization layer, and patterning the first conductive film, to form a first electrode; forming a second conductive film on the first electrode, and patterning the second conductive film to form a sacrificial structure; forming a pixel defining film on the sacrificial structure, and patterning the The pixel defining film is patterned to form a pixel defining layer that includes a body portion and a plurality of openings that expose at least a portion of the first electrode; and the sacrificial structure is removed such that the body portion includes A first main body sub-part and a second main body sub-part, the first main body sub-part is located on a side of the second main body sub-part close to the base substrate, and the second main body sub-part is relative to the first main body The sub-part protrudes to form a partition structure in the main
  • forming the first electrodes includes: forming a first spacer between adjacent first electrodes; forming the sacrificial structure includes: forming a second spacer between adjacent sacrificial structures. Spacers, along the arrangement direction of adjacent sub-pixels, such that the orthographic projection of the first spacer region on the base substrate falls into the orthographic projection of the second spacer region on the base substrate, and Such that the minimum size of the second spacer area is greater than or equal to the minimum size of the first spacer area.
  • the minimum size of the opening is smaller than the minimum size of the sacrificial structure, and the orthographic projection of the opening on the base substrate falls into the The sacrificial structure is in an orthographic projection on the base substrate.
  • the manufacturing method further includes: forming a support structure located on a side of the pixel defining layer away from the base substrate, wherein the support structure is on a side of the base substrate.
  • the orthographic projection at least partially overlaps the orthographic projection of the second spacer region on the base substrate.
  • the thickness of the second conductive film is 1-3 times the thickness of the first conductive film; the thickness of the pixel defining film is 3 times the thickness of the second conductive film. -8 times.
  • the material of the first conductive film includes conductive metal oxide
  • the material of the second conductive film includes metal
  • the conductive metal oxide includes indium tin oxide, and the metal includes any one of aluminum, silver, and a metal stack formed of titanium/aluminum/titanium.
  • the manufacturing method further includes: performing heat treatment on the display substrate to crystallize the first electrode. .
  • removing the sacrificial structure includes: etching and removing the sacrificial structure using a wet etching process.
  • the material of the second conductive film includes metal
  • etching and removing the sacrificial structure using a wet etching process includes: using an acidic etching liquid to etch and remove the sacrificial structure made of the metal.
  • the middle film layer is etched.
  • Figure 1 is a schematic cross-sectional view of a display substrate.
  • FIG 2 is a plan view of a display substrate provided according to an embodiment of the present disclosure.
  • FIG. 3 is a cross-sectional view of a display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 4 is a cross-sectional view of another display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 5 is a cross-sectional view of yet another display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 6 is a cross-sectional view of yet another display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 7 is a schematic plan view of a display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 8 is a schematic plan view of another display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 9 is a schematic plan view of another display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 10A is a schematic diagram of a partition structure with a notch provided in the display substrate shown in FIG. 7 .
  • FIG. 10B is a schematic diagram of another partition structure with a notch provided in the display substrate shown in FIG. 7 .
  • FIG. 10C is a schematic diagram of yet another display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 11 is a schematic diagram of a display device according to an embodiment of the present disclosure.
  • 12 to 20 are schematic flow diagrams of a method for manufacturing a display substrate according to at least one embodiment of the present disclosure.
  • the Tandem structure replaces one light-emitting layer in the light-emitting element in the OLED display substrate with two light-emitting layers and adds a charge generation layer (CGL) between the two light-emitting layers. , forming a dual-layer design and realizing dual light-emitting devices in series.
  • CGL charge generation layer
  • the display substrate using the Tandem structure greatly reduces the light-emitting current of the light-emitting element, improves the life of the light-emitting element, and is beneficial to Develop and mass-produce new technologies with high lifespan such as for vehicles.
  • the tandem structure display device has the advantages of long life, low power consumption, and high brightness.
  • FIG. 1 is a schematic diagram of a display substrate.
  • the display substrate includes a planarization layer PLN, a pixel defining layer PDL, an electrode E1, a light-emitting functional layer FL, and an electrode E2.
  • the light-emitting functional layer FL includes a charge generation layer (CGL), a hole transport layer HTL, a light-emitting layer, and an electron transport layer ETL.
  • FIG. 1 shows the light-emitting element EM1 and the light-emitting element EM2 of adjacent sub-pixels.
  • the light-emitting element EM1 is configured to emit red light
  • the light-emitting element EM2 is configured to emit green light.
  • the light-emitting element EM1 corresponds to the light-emitting layer R' that emits red light
  • the light-emitting element EM2 corresponds to the light-emitting layer G' that emits green light.
  • the charge generation layer (CGL) of the light-emitting element EM1 and the light-emitting element EM2 can have an integrated structure and be produced using an opening mask. It should be noted that, for clarity of illustration, FIG. 1 only shows some film layers in the display substrate. For example, the display substrate also includes other multiple film layers, such as encapsulation layers.
  • the charge generation layer (CGL) in the light-emitting element has strong conductivity
  • the charge generation layer (CGL) of two adjacent organic light-emitting elements is a continuous film layer, which is easy to cause the gap between adjacent sub-pixels (for example, at the position shown by the dotted line box in Figure 1 ) produces crosstalk.
  • a green sub-pixel may cause an adjacent red sub-pixel to emit light.
  • the light-emitting area of the light-emitting element is defined by the pixel defining layer PDL.
  • At least one embodiment of the present disclosure provides a display substrate, including: a base substrate, a plurality of sub-pixels, a pixel defining layer and a planarization layer.
  • Each sub-pixel in the plurality of sub-pixels includes a light-emitting element.
  • the light-emitting element includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate.
  • the first electrode is located between the light-emitting functional layer and the base substrate.
  • the light-emitting functional layer includes a plurality of film layers;
  • the pixel defining layer includes a main body and a plurality of openings, each opening is defined by the main body, and the opening exposes at least a part of the first electrode;
  • the planarization layer is provided on the substrate between the base substrate and the pixel defining layer, wherein the main body part includes a first main body sub-part and a second main body sub-part, the first main body sub-part is located on a side of the second main body sub-part close to the base substrate, and the second main body sub-part The part protrudes relative to the first main body sub-part to form a partition structure, and at least one of the plurality of film layers is disconnected at the partition structure of the main body part; the light emitting light on the side of the first electrode located in the opening away from the base substrate
  • the orthographic projection of the functional layer on the base substrate at least partially overlaps the orthographic projection of the light-emitting functional layer located on the side of the main body away from
  • At least one layer of the multiple film layers of the light-emitting functional layer can be disconnected at the partition structure, which is beneficial to reducing the distance between adjacent sub-pixels.
  • the probability of crosstalk is beneficial to meet the arrangement requirements of high pixel density to improve the display performance of the substrate.
  • FIG. 2 is a plan view of a display substrate provided according to an embodiment of the present disclosure.
  • FIG. 3 is a cross-sectional view of a display substrate provided by at least one embodiment of the present disclosure.
  • the display substrate includes a base substrate 01 , a plurality of sub-pixels 10 , a pixel defining layer 100 and a planarization layer 110 .
  • the display substrate includes a display area A located on the base substrate 01.
  • a plurality of sub-pixels 10 are provided in the display area A, such as a plurality of first sub-pixels 010, a plurality of second sub-pixels 020 and a plurality of third sub-pixels. 030.
  • Multiple sub-pixels 10 are arranged at intervals in the display area A to form multiple pixel rows and pixel columns.
  • the planarization layer 110 may be an insulating layer, and the material of the insulating layer may include organic materials.
  • the planarization layer 110 may be a structure including at least one layer, for example, it may be an insulating layer including two layers, but is not limited thereto.
  • each of the plurality of sub-pixels 10 includes a light-emitting element 234
  • the light-emitting element 234 includes a light-emitting functional layer 130 and first electrodes located on both sides of the light-emitting functional layer 130 in a direction perpendicular to the substrate substrate 01 120 and the second electrode 140.
  • the first electrode 120 is located between the light-emitting functional layer 130 and the base substrate 01.
  • the light-emitting functional layer 130 includes a plurality of film layers.
  • the plurality of film layers include charge generation as shown in Figure 3. layer 133, and the first light-emitting layer 131 and the second light-emitting layer 132 located on both sides of the charge generation layer 133.
  • the light-emitting element 234 is configured to drive the sub-pixel 234 to emit light.
  • the pixel defining layer 100 includes a main body 1001 and a plurality of openings 1002 .
  • the openings 1002 are defined by the main body 1001 , and the openings 1002 expose at least a portion of the first electrode 120 .
  • the planarization layer 110 is provided between the base substrate 01 and the pixel definition layer 100.
  • the main body part 1001 includes a first main body sub-part 10011 and a second main body sub-part 10012.
  • the first main body sub-part 10011 is located between the second main body sub-part 10012. Close to one side of the base substrate 01 , the second body sub-portion 10012 includes a protrusion relative to the first body sub-portion 10011 to form a partition structure 10013 .
  • At least one of the plurality of film layers in the light-emitting functional layer 130 is disconnected at the partition structure 10013 of the main body 1001 and is located on the side of the first electrode 120 in the opening 1002 away from the base substrate 01
  • the orthographic projection of the light-emitting functional layer 130 on the base substrate 01 at least partially overlaps with the orthographic projection of the light-emitting functional layer 130 located on the side of the main body 1001 away from the base substrate 01 on the base substrate 01 .
  • the partition structure 10013 includes a groove 10014, and the light-emitting functional layer 130 can extend into the groove 10014.
  • At least one film layer in the light-emitting functional layer 130 is disconnected at the partition structure 10013 between adjacent sub-pixels 10, which is beneficial to reducing crosstalk between adjacent sub-pixels to optimize display. Effect.
  • the planarization layer 110 may be made of a light-transmitting insulating material to enhance the transmittance of the display substrate.
  • the plurality of sub-pixels 10 may include two adjacent sub-pixels 10 arranged along the X direction.
  • adjacent sub-pixels have an arrangement direction, which can be roughly the extending direction of the line connecting the centers of the light-emitting areas of adjacent sub-pixels or the line connecting the closest distances, or the light-emitting areas of adjacent sub-pixels are distributed along the X direction, that is, the above-mentioned direction. It's the X direction.
  • the light-emitting functional layer 130 may include a stacked first light-emitting layer 131 , a charge generation layer 133 and a second light-emitting layer 132 .
  • the charge generation layer 133 has strong conductivity, which can make the light-emitting functional layer It has the advantages of long life, low power consumption and high brightness.
  • the sub-pixel 10 can nearly double the luminous brightness by providing the charge generating layer 133 in the light-emitting functional layer 130 .
  • the light-emitting functional layer 130 may also include a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), a light coupling layer CPL, and an electron injection layer (EIL). wait.
  • HIL hole injection layer
  • HTL hole transport layer
  • ETL electron transport layer
  • CPL light coupling layer
  • EIL electron injection layer
  • the above-mentioned film layers are all common film layers of multiple sub-pixels 10, and can be called a common layer.
  • the first luminescent layer 131 and the second luminescent layer 132 may be luminescent layers that emit light of the same color.
  • the first light-emitting layer 131 (or the second light-emitting layer 132) in the sub-pixel 10 that emits light of different colors emits light of different colors.
  • the embodiments of the present disclosure are not limited to this.
  • the first luminescent layer 131 and the second luminescent layer 132 may be luminescent layers that emit light of different colors.
  • the light-emitting layer can mix the light emitted by the multi-layer light-emitting layers included in the sub-pixel 10 into white light, and adjust the color of the light emitted by each sub-pixel by providing a color filter layer.
  • the first electrode 110 may be an anode
  • the second electrode 120 may be a cathode.
  • the cathode may be formed from a material with high conductivity and low work function.
  • the cathode may be made of a metallic material.
  • the anode may be formed from a transparent conductive material with a high work function.
  • the pixel defining layer 100 is located on a side of the first electrode 120 of the light-emitting element 234 away from the base substrate 01 , and the pixel defining layer 100 includes a plurality of openings 1002 and a main body portion 1001 surrounding the plurality of openings 1002 , the plurality of light-emitting elements 234 are at least partially located in the plurality of openings 1002 .
  • FIG. 3 schematically shows that the side of the first electrode 120 of the light-emitting element 234 away from the second electrode 140 is also provided with a structural layer 011.
  • the structural layer 011 may include a layer where the active semiconductor pattern is located, a film layer where the gate line is located, The film layer where the data line is located, multiple insulation layers and other film layers.
  • the material of the pixel defining layer 100 may include polyimide, acrylic, polyethylene terephthalate, or the like.
  • the opening 1002 of the pixel defining layer 100 is configured to define a light emitting area of the light emitting element 234 .
  • the light-emitting elements 234 of multiple sub-pixels 10 may be arranged in one-to-one correspondence with the multiple openings 1002 .
  • the light emitting element 234 may include a portion located in the opening 1002 and a portion overlapping the main body portion 1001 in a direction perpendicular to the base substrate 01 .
  • the opening 1002 of the pixel defining layer 100 is configured to expose the first electrode 120 of the light-emitting element 234 , and the exposed first electrode 120 is at least partially in contact with the light-emitting functional layer 130 in the light-emitting element 234 .
  • the first electrode 120 and the second electrode 140 located on both sides of the light-emitting functional layer 130 can drive the light-emitting functional layer 234 in the opening 1002 of the pixel defining layer 100. Make a glow.
  • the above-mentioned light-emitting area may refer to an effective light-emitting area of the light-emitting element 234, and the shape of the light-emitting area may refer to a two-dimensional shape.
  • the shape of the light-emitting area may be the same as the shape of the opening 1002 of the pixel defining layer 100.
  • the main body part 1001 of the pixel definition layer 100 includes a first main body sub-part 10011 and a second main body sub-part 10012.
  • the first main body sub-part 10011 is located near the substrate substrate 01 of the second main body sub-part 10012. side.
  • the first main body sub-part 10011 and the second main body sub-part 10012 are integrally formed, but are not limited thereto.
  • the second main body sub-part 10012 protrudes relative to the first main body sub-part 10011 along the )structure.
  • the main body portion 1001 formed with the undercut structure is approximately in the shape of a “mushroom”.
  • At least one of the plurality of film layers in the light-emitting functional layer 130 is disconnected at the partition structure 10013 of the main body 1001 .
  • the at least one film layer that is disconnected in the light-emitting functional layer 130 can be At least one film layer in the above common layer.
  • at least one film layer (such as a charge generation layer) in the light-emitting functional layer of two adjacent sub-pixels is arranged at an interval, which can increase the resistance of the light-emitting functional layer between the adjacent sub-pixels, thereby reducing the resistance between the two adjacent sub-pixels.
  • the probability of crosstalk is generated, and when adjacent sub-pixels emit different colors, it is beneficial to improve the color mixing of the display substrate, reduce power consumption, and extend the life of the display substrate.
  • the light-emitting functional layer 130 includes a portion located within the opening 1002 and a portion disposed on the side of the main body 1001 away from the base substrate 01 .
  • the thickness of the part of the light-emitting functional layer 130 located in the middle of the opening 1002 maximum, while the thickness of the portion located at the edge of the opening 1002 gradually decreases.
  • the partition structure 10013 includes a groove 10014, and the structures on both sides of the light-emitting functional layer 130 can extend into the groove 10014.
  • the orthogonal projection of the light-emitting functional layer 130 located on the side of the first electrode 120 away from the base substrate 01 in the opening 1002 and the light-emitting functional layer 130 located on the side of the main body 1001 away from the base substrate 01 on the base substrate 01 is at least Partially overlapped.
  • the portion of the light-emitting functional layer 130 that gradually decreases in thickness on both sides of the opening 1002 is different from the portion located on the main body portion.
  • the orthographic projections of the light-emitting functional layer 130 on the side of 1001 away from the base substrate 01 on the base substrate 01 at least partially overlap, but are not limited to this.
  • the above dimensions are 1/5-1/4.
  • the above dimensions are 1/4-1/3.
  • the above dimensions are 1/5-4/15.
  • this part of the light-emitting functional layer 130 may at least partially overlap with the sidewall 10016 of the main body 10013 .
  • the second electrode 140 is disposed On the side of the light-emitting functional layer 130 away from the first electrode 120, the second electrode 140 is spaced apart from the first electrode 120 through the light-emitting functional layer 130 to reduce the probability of short circuit.
  • the maximum size of the main body 1001 in the X direction can be reduced, thereby increasing the maximum size of the opening 1002 in the X direction.
  • the aperture ratio of the pixel defining layer 100 becomes larger, thereby allowing the opening 1002 to expose a larger light-emitting area in the light-emitting element 130, and at the same time reducing the pixel defining layer spacing between pixels to achieve high resolution performance of the display substrate .
  • the minimum slope angle ⁇ between at least part of the side surface of the second body sub-portion 10012 and the plane L1 parallel to the base substrate 01 is 60 degrees to 90 degrees.
  • the angle between at least part of the side surface of the second main body sub-part 10012 and the plane L1 parallel to the base substrate 01 is a slope angle
  • the slope angle between the side surface of the edge portion of the second main body sub-part 10012 and the plane L1 is is the minimum slope angle ⁇ .
  • the minimum slope angle ⁇ may be 60 degrees to 80 degrees.
  • the minimum slope angle ⁇ may be 75 degrees to 95 degrees.
  • the minimum slope angle ⁇ may be 70 degrees to 90 degrees.
  • the minimum slope angle ⁇ may be 60 degrees.
  • the minimum slope angle ⁇ may be 65 degrees to 75 degrees.
  • the minimum slope angle ⁇ may be 65 degrees to 85 degrees.
  • the minimum slope angle ⁇ may be 75 degrees to 85 degrees.
  • the minimum slope angle ⁇ may be 80 degrees to 95 degrees.
  • the minimum slope angle ⁇ may be 60 degrees to 70 degrees.
  • the minimum slope angle ⁇ may be 60 degrees.
  • setting the minimum slope angle ⁇ between at least part of the side surface of the second main body sub-part 10012 and the plane L1 parallel to the base substrate 01 to 60 degrees to 90 degrees can be beneficial to at least one film layer in the light-emitting element 234 during isolation.
  • the structure 10013 is disconnected without affecting the normal display of the sub-pixel 10, which is beneficial to improving the display performance of the display substrate.
  • the minimum size M1 of the opening 1002 is 1.2-1.5 times the maximum size M2 of the first body sub-section 10011 . That is, the opening area of the opening 1002 can be enlarged as much as possible, thereby increasing the area of the light-emitting area of the light-emitting element 234 to enhance the display effect.
  • the minimum dimension M1 of the opening 1002 may be 1.2-1.5 times the maximum dimension M2 of the first body sub-portion 10011.
  • the minimum dimension M1 of the opening 1002 may be 1.2-1.4 times the maximum dimension M2 of the first body sub-portion 10011.
  • the minimum dimension M1 of the opening 1002 may be 1.2-1.3 times the maximum dimension M2 of the first body sub-portion 10011.
  • the minimum dimension M1 of the opening 1002 may be 1.2-1.25 times the maximum dimension M2 of the first body sub-portion 10011.
  • the minimum dimension M1 of the opening 1002 may be 1.2-1.35 times the maximum dimension M2 of the first body sub-portion 10011.
  • the minimum dimension M1 of the opening 1002 may be 1.2-1.45 times the maximum dimension M2 of the first body sub-portion 10011.
  • the minimum dimension M1 of the opening 1002 may be 1.3-1.5 times the maximum dimension M2 of the first body sub-portion 10011.
  • the minimum dimension M1 of the opening 1002 may be 1.4-1.5 times the maximum dimension M2 of the first body sub-portion 10011.
  • the maximum size M2 of the first body sub-section 10011 is 0.4-0.8 times the maximum size M3 of the second body sub-section 10012, within this range, the protrusion degree of the second main body sub-part 10012 relative to the first main body sub-part 10011 can be made more appropriate.
  • the maximum dimension N1 of the first body sub-part 10011 is 1-1.8 times the maximum dimension N2 of the second body sub-part 10012 .
  • the maximum dimension N1 of the first main body sub-part 10011 is larger than the maximum dimension N2 of the second main body sub-part 10012, it may be beneficial to the isolation of at least one of the plurality of film layers in the light-emitting functional layer 130 in the main body part 1001. Structure is broken at 10013.
  • the maximum size M2 of the first body sub-section 10011 may be 0.4-0.7 times the maximum size M3 of the second body sub-section 10012.
  • the maximum dimension M2 of the first body sub-section 10011 may be 0.5-0.6 times the maximum dimension M3 of the second body sub-section 10012.
  • the maximum dimension M2 of the first body sub-section 10011 may be 0.4-0.6 times the maximum dimension M3 of the second body sub-section 10012.
  • the maximum dimension M2 of the first body sub-section 10011 may be 0.5-0.7 times the maximum dimension M3 of the second body sub-section 10012.
  • the maximum dimension M2 of the first body sub-section 10011 may be 0.5-0.8 times the maximum dimension M3 of the second body sub-section 10012.
  • the maximum dimension M2 of the first body sub-section 10011 may be 0.4-0.8 times the maximum dimension M3 of the second body sub-section 10012.
  • the maximum dimension N1 of the first body sub-part 10011 may be 1-1.6 times the maximum dimension N2 of the second body sub-part 10012 .
  • the maximum dimension N1 of the first body sub-section 10011 may be 1.2-1.6 times the maximum dimension N2 of the second body sub-section 10012.
  • the maximum dimension N1 of the first body sub-section 10011 may be 1.3-1.6 times the maximum dimension N2 of the second body sub-section 10012.
  • the maximum dimension N1 of the first body sub-section 10011 may be 1.2-1.4 times the maximum dimension N2 of the second body sub-section 10012.
  • the maximum dimension N1 of the first body sub-section 10011 may be 1.3-1.5 times the maximum dimension N2 of the second body sub-section 10012.
  • the maximum dimension N1 of the first body sub-section 10011 may be 1.1-1.4 times the maximum dimension N2 of the second body sub-section 10012.
  • the maximum dimension N1 of the first body sub-section 10011 may be 1.4-1.6 times the maximum dimension N2 of the second body sub-section 10012.
  • the maximum dimension N1 of the first body sub-section 10011 may be 1.4-1.5 times the maximum dimension N2 of the second body sub-section 10012.
  • the first electrode 120 includes a crystallized conductive metal oxide.
  • the process of forming the main body part 1001 includes processes such as heat treatment.
  • the first electrode 120 may be crystallized to prevent the etching process on the main body part 1001 from being affected.
  • the crystallized first electrode 120 can be less affected by the wet etching solution when the main body 1001 is wet etched, so as to protect the inherent characteristics of the first electrode 120 itself.
  • the orthographic projection of the portion of the light-emitting functional layer 130 located on the side of the second body sub-portion 10012 away from the base substrate 01 on the base substrate 01 is different from the portion of the light-emitting functional layer 130 located in the opening 1002 .
  • the partial orthographic projections on the base substrate 01 at least partially overlap.
  • the light-emitting functional layer 130 includes a plurality of film layers, and the plurality of film layers are disconnected at the partition structure 10013 , so that the plurality of film layers include a plurality of film layers disposed on the second body sub-section 10012 away from the substrate. 01, and the portion located in opening 1002.
  • the light-emitting functional layer 130 located in the opening 1002 can extend into the grooves 10014 on both sides of the opening 1002 according to the disconnection position and conditions.
  • the orthographic projection of the portion of the light-emitting functional layer 130 located on the side of the second body sub-portion 10012 away from the base substrate 01 on the base substrate 01 can be aligned with the portion of the light-emitting functional layer 130 located in the opening 1002 .
  • the orthographic projections on the base substrate 01 at least partially overlap.
  • the orthographic projection of the portion of the second electrode 140 located on the side of the second body sub-portion 10012 away from the base substrate 01 on the base substrate 01 is different from the portion of the second electrode 140 located in the opening 1002 .
  • the partial orthographic projections on the base substrate 01 at least partially overlap.
  • the second electrode 140 is located on a side of the light-emitting element 130 away from the base substrate 01 , and at least part of the second electrode 140 is disconnected at the partition structure 10013 , so that the second electrode 140 includes a A portion of the second body sub-portion 10012 on a side away from the base substrate, and a portion located in the opening 1002 .
  • the part of the second electrode 140 located in the opening 1002 may extend into the grooves 10014 on both sides of the opening 1002, thereby making the orthographic projection of this part of the second electrode 140 on the substrate 01 , at least partially overlaps with the orthographic projection of the portion of the light-emitting functional layer 130 located in the opening 1002 on the base substrate 01 .
  • FIG. 4 is a cross-sectional view of another display substrate provided by at least one embodiment of the present disclosure.
  • the sum of the minimum thicknesses of the light-emitting functional layer 130 in the light-emitting element 11 and the portion of the second electrode 140 located in the groove 10014 increases, and the minimum size between two adjacent main portions 1001 increases (for example, approximately equal to M1), thereby increasing the area of the light-emitting area of the light-emitting element 234 exposed by the opening 1002, thereby enhancing the display Effect.
  • the sum of the minimum thicknesses of the portions of the light-emitting functional layer 130 and the second electrode 140 extending into the groove 10014 may be 1/3-1 of the sum of the maximum thicknesses of the light-emitting functional layer 130 and the second electrode 140 .
  • the sum of the minimum thicknesses of the portions of the light-emitting functional layer 130 and the second electrode 140 extending into the groove 10014 may be 1/2-1 of the sum of the maximum thicknesses of the light-emitting functional layer 130 and the second electrode 140 .
  • the sum of the minimum thickness of the portions of the light-emitting functional layer 130 and the second electrode 140 extending into the groove 10014 may be 1/4-1/2 of the sum of the maximum thicknesses of the light-emitting functional layer 130 and the second electrode 140 .
  • the sum of the minimum thickness of the portions of the light-emitting functional layer 130 and the second electrode 140 extending into the groove 10014 may be 1/3-1/2 of the sum of the maximum thicknesses of the light-emitting functional layer 130 and the second electrode 140 .
  • the maximum size of the light-emitting area exposed by the opening 1002 may be 75%-100% of the minimum size M1 of the opening 1002 .
  • the maximum size of the light-emitting area exposed by the opening 1002 may be 75%-95% of the minimum size M1 of the opening 1002 .
  • the maximum size of the light-emitting area exposed by the opening 1002 may be 80%-100% of the minimum size M1 of the opening 1002 .
  • the maximum size of the light-emitting area exposed by the opening 1002 may be 85%-95% of the minimum size M1 of the opening 1002 .
  • the maximum size of the light-emitting area exposed by the opening 1002 may be 70%-90% of the minimum size M1 of the opening 1002 .
  • the area of the light-emitting area exposed by the opening 1002 can be maximized to enhance the display effect of the display substrate.
  • FIG. 5 is a cross-sectional view of yet another display substrate provided by at least one embodiment of the present disclosure.
  • the difference in the display substrate shown in FIG. 5 is that the partition structure 10013 includes a groove 10014 and the light-emitting functional layer 130 extends to the groove. in slot 10014.
  • the display substrate 01 further includes a residual portion 90 located in the groove 10014, and the orthographic projection of the residual portion 90 on the base substrate 01 falls into the orthographic projection of the partition structure 10013 on the base substrate 01.
  • the remaining portion 90 may be a film layer structure left in the process of forming the main body portion 1001 .
  • the main body part 1001 it is necessary to provide an additional film layer as a sacrificial structure and remove the sacrificial structure to form the first main body sub-part 10011 and the second main body sub-part 10012. During this process, if the sacrificial structure is not completely removed, a residual portion 90 as shown in FIG. 5 may be formed.
  • the size of the remaining portion 90 in the Z direction is smaller than the size of the first body sub-portion 10011 in the Z direction, and the size of the remaining portion 90 in the X direction is smaller than the size of the groove 10014 in the X direction, Therefore, the orthographic projection of the remaining portion 90 on the base substrate 01 can fall into the orthographic projection of the partition structure 10013 on the base substrate 01 .
  • the size of the remaining portion 90 in the X direction can be determined according to factors such as the sacrificial structure removal time and the degree of removal.
  • FIG. 5 is only for illustration, but is not limited thereto.
  • the maximum size of the remaining portion 90 in the X direction is no larger than the maximum size of the groove 10014 in the direction X
  • the orthographic projection of the remaining portion 90 on the base substrate 01 is The groove 10014 inserted into the partition structure 10013 is in the orthographic projection on the base substrate 01 to avoid affecting the light-emitting performance of the light-emitting element 234.
  • the maximum size of the remaining portion 90 in the Z direction may be the same as the groove 10014, or may be different.
  • the shapes of the remaining portions 90 located in the grooves 10014 of different sub-pixels may be different, depending on the removal time and degree of removal of the sacrificial structure, and embodiments of the present disclosure do not limit this.
  • the maximum dimension of the remaining portion 90 in the X direction is 1/6-1 of the maximum dimension of the groove 10014 in the X direction.
  • the maximum dimension of the remaining portion 90 in the X direction is 1/4-1/3 of the maximum dimension of the groove 10014 in the X direction.
  • the maximum dimension of the remaining portion 90 in the X direction is 1/4-2/3 of the maximum dimension of the groove 10014 in the X direction.
  • the maximum dimension of the remaining portion 90 in the X direction is 1/3-1/2 of the maximum dimension of the groove 10014 in the X direction.
  • the maximum dimension of the remaining portion 90 in the X direction is 1/3-2/3 of the maximum dimension of the groove 10014 in the X direction.
  • the thickness of the sacrificial structure can be set to be uniform, and the removal time and degree of removal of the sacrificial structure can also be set to the same to simplify the process flow and improve the quality of the sub-pixel structure. consistency.
  • flexible design can also be carried out according to actual process conditions.
  • the sacrificial structures in some sub-pixels may be completely removed, while the sacrificial structures in some sub-pixels may not be completely removed, and embodiments of the present disclosure do not limit this.
  • the portion of the light-emitting functional layer 130 may at least partially overlap with the remaining portion 90 in the groove 10014 .
  • the second electrode 140 is disposed on the side of the light-emitting functional layer 130 away from the first electrode 120, and is spaced from the first electrode 120 through the light-emitting functional layer 130, and the second electrode 140 does not overlap with the remaining portion, so that Reduce the risk of circuit failure.
  • part of the developing solution may not be fully utilized or removed and may partially remain in the groove 10014 of the main body 1001, for example.
  • the main body portion 1001 formed with an undercut structure also has the function of improving structures such as residual film.
  • FIG. 6 is a schematic diagram of yet another display substrate provided by at least one embodiment of the present disclosure.
  • the planarization layer 110 in the display substrate and its structure on the side away from the base substrate 01 can be basically the same as the display substrate in FIG. 3 .
  • the display substrate includes a buffer layer 0114 , an insulating layer 0113 , an insulating layer 0112 , an insulating layer 0111 , and a planarization layer 110 arranged in sequence.
  • the insulating layer 0113, the insulating layer 0112, and the insulating layer 0111 can be made of inorganic materials, such as silicon nitride (SiNx) or silicon oxide (SiOx).
  • the buffer layer 0114 can be used to improve the water and oxygen resistance of the base substrate 01 .
  • the display substrate further includes a pixel circuit configured to drive the light-emitting element to emit light.
  • the pixel circuit can adopt a 2T1C, 3T1C or 7T1C design.
  • the pixel circuit may include a plurality of transistors and a storage capacitor.
  • the plurality of transistors may include a thin film transistor 21.
  • the thin film transistor 21 includes a gate electrode 211, an active layer 212, a source electrode 210, and a drain electrode 213.
  • the first electrode 120 and Drain 213 is connected.
  • the source electrode 210 and the drain electrode 213 of the thin film transistor may be identical in structure and interchangeable in name.
  • the pixel circuit may include a capacitor 31 , and the capacitor 31 includes a first plate 310 and a second plate 320 arranged oppositely.
  • the display substrate further includes a support structure 10016 disposed on a side of the main body 1001 away from the base substrate, configured as a support layer, and configured to support the FMM (high precision) during the evaporation process of the display substrate. mask).
  • the support structure 10016 may be made of the same material as the main body 1001 .
  • support structure 10016 may be integrally formed with body portion 1001 .
  • Figure 6 also shows an encapsulation layer 41.
  • the encapsulation layer 41 includes a first encapsulation layer 411, a second encapsulation layer 412, and a third encapsulation layer 413.
  • the first encapsulation layer 411 and the third encapsulation layer 413 are inorganic layers and can be formed using a chemical vapor deposition (CVD) process.
  • the second encapsulation layer 412 is an organic layer and can be formed using an inkjet printing process. As shown in FIG. 6 , the thickness of the second encapsulation layer 412 is greater than the thickness of the first encapsulation layer 411 . As shown in FIG. 6 , the thickness of the second encapsulation layer 412 is greater than the thickness of the third encapsulation layer 413 to achieve better encapsulation effect.
  • Figure 7 is a schematic plan view of a display substrate provided by at least one embodiment of the present disclosure
  • Figure 8 is a schematic plan view of another display substrate provided by at least one embodiment of the present disclosure
  • Figure 9 is a schematic plan view of a display substrate provided by at least one embodiment of the present disclosure. Another schematic diagram of the planar structure of the display substrate.
  • the plurality of sub-pixels 10 include a plurality of first-color sub-pixels 101 , a plurality of second-color sub-pixels 102 and a plurality of third-color sub-pixels 103 .
  • one of the first color sub-pixel 101 and the third color sub-pixel 103 emits red light, and the other emits blue light; the second color sub-pixel 102 emits green light.
  • Figure 7 schematically shows that the first color sub-pixel 101 emits red light and is a red sub-pixel; the third color sub-pixel 103 emits blue light and is a blue sub-pixel; the second color sub-pixel 102 emits green light and is a green sub-pixel. pixels.
  • a plurality of first color sub-pixels 101 and a plurality of third color sub-pixels 103 are alternately arranged along both the X direction and the Y direction parallel to the base substrate 01 to form a plurality of first pixel rows 051 and a plurality of first pixel columns 052, a plurality of second color sub-pixels 101 arranged in an array along the X direction and the Y direction to form a plurality of second pixel rows 053 and a plurality of second pixel columns 054, a plurality of first pixels
  • the row 051 and the plurality of second pixel rows 053 are alternately arranged along the Y direction and are staggered from each other in the X direction.
  • the plurality of first pixel columns 052 and the plurality of second pixel columns 054 are alternately arranged along the X direction and are staggered from each other in the Y direction.
  • the arrangement of multiple sub-pixels shown in FIG. 7 may be a Magic arrangement.
  • the partition structure proposed by at least one embodiment of the present disclosure can be applied to different pixel arrangement structures.
  • the arrangement of the sub-pixels and the shape of the light-emitting area shown in FIGS. 8 and 9 are different from the sub-pixels shown in FIG. 7 .
  • the plurality of sub-pixels 10 include a plurality of third color sub-pixels 104 , a plurality of fourth color sub-pixels 105 and a plurality of fifth color sub-pixels 106 .
  • Figure 8 schematically shows that the third color sub-pixel 104 emits red light and is a red sub-pixel; the fourth color sub-pixel 105 emits blue light and is a blue sub-pixel; the fifth color sub-pixel 106 emits green light and is a green sub-pixel. pixels.
  • a plurality of third color sub-pixels 104 and a plurality of fifth color sub-pixels 106 are alternately arranged along the Y direction parallel to the base substrate 01 to form a plurality of third pixel columns 061, and a plurality of fourth color sub-pixels 105 are evenly arranged.
  • a plurality of fourth pixel columns 062 are formed between adjacent third pixel columns 061 .
  • the shapes of the light-emitting areas of the third color sub-pixel 104, the fourth color sub-pixel 105 and the fifth color sub-pixel 106 are all rectangular, and the shape of the light-emitting area of the fourth color sub-pixel 105 is approximately square.
  • the arrangement of multiple sub-pixels shown in FIG. 8 may be an SRGB arrangement.
  • the plurality of sub-pixels 10 include a plurality of sixth-color sub-pixels 107 , a plurality of seventh-color sub-pixels 108 , a plurality of eighth-color sub-pixels 109 and a ninth-color sub-pixel 109 .
  • Figure 8 schematically shows that the sixth color sub-pixel 107 is a sub-pixel that emits red light and is a red sub-pixel; the seventh color sub-pixel 108 is a sub-pixel that emits blue light and is a blue sub-pixel; the eighth color sub-pixel 107 is a sub-pixel that emits blue light and is a blue sub-pixel.
  • the pixel 109 and the ninth color sub-pixel 109 have the same emission color, and both are sub-pixels that emit green light, and are green sub-pixels.
  • a plurality of sub-pixels are alternately arranged along both the X direction and the Y direction parallel to the base substrate.
  • the eighth color sub-pixel 109 and the ninth color sub-pixel 109 may be arranged oppositely, and the areas of the light-emitting areas are equal.
  • the area of the light-emitting area of the sixth color sub-pixel 107 is the largest.
  • the arrangement of multiple sub-pixels shown in FIG. 8 may be a GGRB arrangement.
  • each sub-pixel can be surrounded by an annular partition structure 10013, and the partition structure 10013 can also be provided in a form without a gap.
  • the partition structure 10013 can also be provided in a form without a gap.
  • two adjacent sub-pixels At least one film layer of the light-emitting layer between them is disconnected at the partition structure to reduce the risk of crosstalk.
  • the second electrodes of different sub-pixels can be connected through the conductive light coupling layer CPL to form a common electrode structure.
  • the partition structure 10013 surrounding each sub-pixel may also be configured to include at least one gap to facilitate the second electrode from breaking between adjacent sub-pixels.
  • Figure 10A is a schematic diagram of a partition structure with a gap provided in the display substrate shown in Figure 7;
  • Figure 10B is a schematic diagram of another partition structure with a gap provided in the display substrate shown in Figure 7;
  • Figure 10C is At least one embodiment of the present disclosure provides a schematic diagram of yet another display substrate.
  • the arrangement of the partition structures 10013 of different sub-pixels may be different.
  • the partition structure 10013 in the pixel defining layer 100 can be arranged in an unclosed ring shape along the circumferential direction of the opening 1002 , and the second electrode 140 of the adjacent light-emitting element 234
  • the unclosed annular gaps are at least partially connected to ensure the continuity of the second electrode 140 between adjacent sub-pixels.
  • the length H of the unclosed annular gap may be 5-20 microns.
  • the first color sub-pixel 101, the second color sub-pixel 102 and the third color sub-pixel 103 each include a partition structure 10013 arranged in an unclosed ring shape, and the partition structure 10013 of each sub-pixel surrounds the sub-pixel.
  • the light-emitting area is set up, and the non-closed annular partition structure 10013 includes a gap.
  • the second electrode 140 is disconnected at the partition structure 10013 of the sub-pixel and connected at the gap of the partition structure 10013 of adjacent sub-pixels to ensure the continuity of the connection.
  • the non-closed ring-shaped partition structure 10013 may be C-shaped.
  • the length H of the gap of the non-closed annular partition structure 10013 may be 15-20 microns.
  • the above dimensions may be 10-20 microns.
  • the above dimensions may be 8-15 microns.
  • the above dimensions may be 5-15 microns.
  • the above dimensions may be 10-15 microns.
  • the above dimensions may be 12-25 microns.
  • the above dimensions may be 16-24 microns.
  • the above dimensions may be 14-18 microns.
  • the above dimensions may be 18-22 microns. But it is not limited to this, and the embodiments of the present disclosure are not limited to this.
  • the partition structure 10013 in the sub-pixel includes a residual portion 90
  • the residual portion 90 is located in the groove 10014 of the partition structure 10013.
  • the remaining portion The figure enclosed by 90 can also be a non-closed ring.
  • the shapes of the remaining portions 90 at different positions in the circumferential direction of the same light-emitting element 234 may be different.
  • the unclosed annular remaining portion 90 may also include a plurality of notches.
  • the size of the unclosed annular residual portion 90 may also be non-uniform, which is not limited in the embodiments of the present disclosure.
  • the length of the gap of the unclosed annular residual portion 90 may be 1/4-1 of the length of the gap of the unclosed annular partition structure 10013 .
  • the above dimensions can be 1/4-1/3.
  • the above dimensions can be 1/4-1/2.
  • the above dimensions can be 1/3-1/2.
  • the above dimensions can be 1/3-2/3.
  • the above dimensions can be 1/2-2/3.
  • the above dimensions may be 2/3-3/4.
  • the partition structure 10013 in the pixel defining layer 100 may include multiple sub-sections, and the multiple sub-sections are annularly arranged along the circumference of the opening 1002 to surround the light emitting element 234 Luminous area.
  • the partition structure 10013 surrounding the opening 1002 may include at least one gap, that is, the partition structure 10013 does not form a complete circle around the light-emitting area of the sub-pixel.
  • the second electrodes 140 in the light-emitting elements 234 of adjacent sub-pixels 10 can be connected to each other at the gap to facilitate application of the same signal. For example, as shown in FIG.
  • the second electrodes 140 of the two can be connected through a region where the partition structure 10013 is not formed, for example, through the first region 100-1 and the first region 100-1.
  • the second area 100-2 realizes the connection of the second electrode 140, but is not limited thereto.
  • the second electrode 140 may be a part of the pixel defining layer 100 in the sub-pixel 101 where the partition structure 10013 is not formed and a part of the pixel defining layer 100 of the sub-pixel 102 where the partition structure 10013 is not formed. Partially connected.
  • a secondary mask can also be used to add auxiliary connection electrodes to connect the second electrodes 140 of different sub-pixels, or other layers in the light-emitting element 234 can also be made conductive, for example, to make them emit light.
  • the optical coupling layer CPL in the component is electrically conductive. That is, the second electrodes 140 of different sub-pixels may be connected through the conductive light coupling layer CPL, but are not limited thereto.
  • the boundary outline of the light-emitting area of the sub-pixel may include multiple straight edges, and/or arc-shaped edges connecting adjacent straight lines, and the boundary outline of the partition structure 10013 surrounding the light-emitting area may include straight edges with the light-emitting area.
  • the corresponding straight edge profile, and/or, the curved edge profile corresponding to the curved edge may include straight edges with the light-emitting area.
  • the second main body sub-part 10012 protrudes in the X direction relative to the first main body sub-part 10011 to form a groove 10014. Therefore, for the corresponding For two adjacent sub-pixels, when the pixel defining layer 100 between them is arranged in the form of a partition structure 10013, in the The minimum distance of the orthographic projection of the center on the base substrate will increase, that is, the orthographic projection of the partition structure 10013 on the base substrate will be further away from the orthographic projection of the center of the light-emitting area of each sub-pixel on the base substrate.
  • the orthogonal projected area of the pixel defining layer on the substrate that is configured as the partition structure 10013 is smaller than the area of the pixel definition layer that is not configured as the partition structure 10013 on the substrate. the orthographic projection area. Therefore, by arranging a partition structure, embodiments of the present disclosure can reduce crosstalk between adjacent sub-pixels and at the same time increase the area of the light-emitting area of the light-emitting element to enhance the display effect.
  • the sub-pixel 101 may be a first-color sub-pixel 101
  • the sub-pixel 102 may be a second-color sub-pixel 102
  • the plurality of sub-pixels 10 also include a sub-pixel 103, and the emitting color of the sub-pixel 103 is different from the sub-pixel 101 and the sub-pixel 102, and is a third color sub-pixel 103.
  • the partition structure 10013 may be located between the adjacent first color sub-pixel 101 and the third color sub-pixel 103, and/or the partition structure 10013 may be located between the adjacent second color sub-pixel 102 and the third color sub-pixel. 103, and/or, the partition structure 10013 may be located between adjacent first color sub-pixels 101 and second color sub-pixels 102.
  • the number of partition structures 10013 surrounding the light-emitting area of one sub-pixel may include four.
  • four partition structures 10013 may be located at four corners of the light-emitting area respectively.
  • the four partition structures 10013 may be respectively parallel to the four sides of the light-emitting area.
  • the number of partition structures 10013 surrounding one sub-pixel may include three.
  • the partition structure 10013 of the same sub-pixel can be located at the corner of the light-emitting area, or can be located parallel to the edge of the light-emitting area.
  • the location and quantity of the partition structures 10013 can be determined according to the design requirements of the actual layout, and the embodiments of the present disclosure do not limit this.
  • the difference between the display substrate shown in FIG. 10C is that the second electrode 140 is not disconnected at the partition structure 10013 .
  • the maximum size of the groove 10014 of the main body portion 1001 in the display substrate shown in FIG. 10C in the Z direction may be relatively reduced, but is not limited thereto.
  • the light-emitting functional layer 130 is disconnected at the partition structure 10013 , the second electrode 140 is provided on a side of the light-emitting functional layer 130 away from the base substrate 01 , and the second electrode 140 is continuously provided at the partition structure 10013 .
  • the portion of the second electrode 140 located on the side of the main body 1001 away from the base substrate 01 is connected to the portion of the second electrode 140 located within the opening 1002 to form a bending area 1401 located on both sides of the opening 1002 .
  • the thickness of the portion of the second electrode 140 located in the bending area 1401 is smaller than the thickness of the portion of the second electrode 140 located in the middle of the opening 1002 .
  • the thickness of the portion of the second electrode 140 located in the bending area 1401 is smaller than the thickness of the portion of the second electrode 140 located on the side of the main body portion 1001 away from the base substrate 01 , but is not limited thereto.
  • the thickness of the portion of the second electrode 140 located in the bending area 1401 is 1/4-3/4 of the thickness of the portion of the second electrode 140 located on the side of the main body 1001 away from the base substrate 01 .
  • the above dimensions can be 1/3-3/4.
  • the above dimensions can be 1/2-3/4.
  • the above dimensions can be 1/4-2/3.
  • the above dimensions can be 1/3-2/3.
  • the arrangement of the partition structure 10013 can only disconnect at least one film layer in the light-emitting functional layer 130 without destroying the continuity of the second electrode 140 , and thus can more easily It is good to ensure that the second electrode 140 between adjacent sub-pixels is normally connected.
  • the continuous state of the second electrode 140 shown in FIG. 10C is only illustrative.
  • the shape of the second electrode 140 (such as , thickness) can change accordingly, and there is no limit to this.
  • FIG. 11 is a schematic diagram of a display device according to an embodiment of the present disclosure.
  • An embodiment of the present disclosure also provides a display device, including any of the above display substrates.
  • the display device 600 includes a display substrate 500 .
  • the display substrate 500 is any of the above display substrates.
  • the display substrate mentioned in the embodiments of the present disclosure may also be called a display panel.
  • the display substrate may be a flexible display substrate, but is not limited thereto.
  • the display substrate disposes a partition structure between adjacent sub-pixels, and causes at least one film layer in the light-emitting functional layer, for example, a charge generation layer, to be disconnected at the location where the partition structure is located.
  • a display device including the display substrate can also avoid crosstalk between adjacent sub-pixels, and therefore has higher product yield and higher display quality.
  • the area of the light-emitting area of the light-emitting element can also be increased to enhance the display effect.
  • the display substrate can adopt a Tandem structure to increase the pixel density. Therefore, a display device including the display substrate has the advantages of long life, low power consumption, high brightness, and high resolution.
  • the display device can be a display device such as an organic light-emitting diode display device, as well as any product or component with a display function such as a television, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, etc. including the display device. Examples include but are not limited to this.
  • 12 to 20 are schematic flow diagrams of a method for manufacturing a display substrate according to at least one embodiment of the present disclosure.
  • At least one embodiment of the present disclosure also provides a method for manufacturing a display substrate, including: forming a planarization layer 110 on the base substrate 01 ; forming a first conductive film on the planarization layer 110 012, and patterning the first conductive film 012 to form the first electrode 120; forming a second conductive film 013 on the first electrode 120, and patterning the second conductive film 013 to form the sacrificial structure 150; on the sacrificial A pixel defining film 014 is formed on the structure 150, and the pixel defining film 014 is patterned to form a pixel defining layer 100.
  • the pixel defining layer includes a main body 1001 and a plurality of openings 1002, each opening 1002 can expose at least a portion of the first electrode 120 ; Remove the sacrificial structure 150, so that the main body part 1001 includes a first main body sub-part 10011 and a second main body sub-part 10012, the first main body sub-part 10011 is located on a side of the second main body sub-part 10012 close to the base substrate 01, The two main body sub-parts 10012 protrude relative to the first main body sub-part 10011 to form a partition structure 10013 in the main body part 1001; a light-emitting functional layer 130 and a second electrode 140 are sequentially formed on the pixel defining layer.
  • the light-emitting functional layer 130 includes a plurality of film layers, at least one of the plurality of film layers is disconnected at the partition structure 10013, the partition structure 10013 includes a groove 1004, and the light-emitting functional layer 130 extends into the groove 1004.
  • the manufacturing method of the display substrate may include preparing the base substrate 01 on a glass carrier.
  • the base substrate 01 may be a flexible base substrate.
  • forming the base substrate 01 may include sequentially forming a stacked first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer on a glass carrier.
  • the first flexible material layer and the second flexible material layer are made of materials such as polyimide (PI), polyethylene terephthalate (PET) or surface-treated polymer soft film.
  • the first inorganic material layer and the second inorganic material layer are made of silicon nitride (SiNx) or silicon oxide (SiOx) to improve the water and oxygen resistance of the substrate.
  • the inorganic material layer is also called a barrier layer.
  • the material of the semiconductor layer is amorphous silicon (a-si).
  • the preparation process includes: first coating a layer of polyimide on a glass carrier, and then curing the film to form a first flexible (PI1 ) layer; then deposit a layer of barrier film on the first flexible layer to form a first barrier (Barrier1) layer covering the first flexible layer; then deposit a layer of amorphous silicon film on the first barrier layer to form a layer covering the first barrier layer.
  • amorphous silicon (a-si) layer of the barrier layer then apply a layer of polyimide on the amorphous silicon layer, and then solidify the film to form a second flexible (PI2) layer; then apply a layer of polyimide on the second flexible layer
  • PI2 polyimide
  • a layer of barrier film is deposited to form a second barrier (Barrier2) layer covering the second flexible layer, and finally the preparation of the base substrate 01 is completed.
  • the manufacturing method of the display substrate may include preparing other film layers 011 on the base substrate 01 .
  • other film layers 011 may include a driving structure layer, and the driving structure layer includes a plurality of the above-mentioned pixel circuits 21 .
  • forming the driving structure layer may include sequentially depositing a first insulating film and an active layer film on the base substrate 01, patterning the active layer film through a patterning process, and forming a buffer layer 0114 covering the entire base substrate 01, and The active layer pattern is provided on the buffer layer 0114, and the active layer pattern at least includes the active layer 212.
  • the second insulating film and the first metal film are deposited in sequence, and the first metal film is patterned through a patterning process to form a second insulating layer 0113 covering the active layer 212, and a first gate metal disposed on the second insulating layer 0113.
  • layer pattern, the first gate metal layer pattern at least includes the gate electrode 211 and the first plate 310 .
  • the third insulating film and the second metal film are deposited sequentially, and the second metal film is patterned through a patterning process to form a third insulating layer 0112 covering the gate electrode 211, and a second gate metal layer disposed on the third insulating layer 0112.
  • the second gate metal layer pattern at least includes a second electrode plate 320, and the position of the second electrode plate 320 corresponds to the position of the first electrode plate 310.
  • a fourth insulating film is deposited, and the fourth insulating film is patterned through a patterning process to form a fourth insulating layer 0111 covering the second electrode plate 320. At least two first via holes N1 are opened in the fourth insulating layer 0111.
  • the fourth insulating layer 0111, the third insulating layer 0112 and the second insulating layer 0113 in the two first via holes N1 are etched away, exposing the surface of the active layer 212 of the active layer pattern. Subsequently, a third metal film is deposited, and the third metal film is patterned through a patterning process to form a source-drain metal layer pattern on the fourth insulating layer 0111.
  • the source-drain metal layer pattern at least includes the source electrode 210 and the drain electrode located in the display area. 213.
  • the source electrode 210 and the drain electrode 213 may be connected to the active layer 212 in the active layer pattern through the first via hole N1 respectively.
  • the buffer layer 0114, the second insulating layer 0113, the third insulating layer 0112 and the fourth insulating layer 0111 are made of silicon oxide (SiOx), silicon nitride (SiNx) and oxynitride. Any one or more types of silicon (SiON) can be a single layer, multi-layer or composite layer.
  • the first metal film, the second metal film and the third metal film use metal materials, such as any one of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo).
  • the active layer pattern uses amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide (Oxide) technology, silicon technology, and organic technology.
  • a-IGZO amorphous indium gallium zinc oxide
  • ZnON zinc oxynitride
  • IZTO indium zinc tin oxide
  • a-Si amorphous silicon
  • p-Si polycrystalline silicon
  • One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide (Oxide) technology, silicon technology, and organic technology.
  • planarization layer 110 on the base substrate 01 includes: coating a flat film of organic material on the base substrate 01 forming the aforementioned pattern to form a flat film covering the entire base substrate 01 .
  • Planarization (PLN) layer 110 and through masking, exposure, and development processes, a plurality of second via holes N2 are formed on the planarization layer 100 in the display area.
  • the flat layer 200 in the plurality of second via holes N2 is developed, exposing the surfaces of the drain electrodes 213 of the transistors 21 of the pixel circuits of the plurality of sub-pixels respectively.
  • a first conductive film 012 is deposited on the planarization layer 110 and patterned to form a first electrode 120 .
  • the first electrode 120 is connected to the drain electrode 213 of the transistor 21 through the second via N2 in the planarization layer 110 .
  • a second conductive film 013 is formed on the first electrode 120 and patterned to form a sacrificial structure 150 .
  • the material of the first conductive film includes conductive metal oxide
  • the material of the second conductive film includes metal material.
  • conductive metal oxides include indium tin oxide and metals include aluminum or silver.
  • the first conductive film or the second conductive film may be a single-layer structure or a multi-layer composite structure.
  • the sacrificial structure 150 may adopt any one of a metal stack formed of aluminum (Al), silver (Ag), and titanium (Ti)/aluminum (Al)/titanium (Ti).
  • the first electrode 120 when forming the first electrode 120 , it also includes forming a first spacer region 1210 between adjacent first electrodes 120 through a patterning process.
  • the first spacer region 1210 may separate the first electrodes 120 of adjacent sub-pixels.
  • the first electrode 150 when forming the first electrode 150 , it also includes forming a second spacer region 1510 between adjacent sacrificial structures 150 through a patterning process.
  • the first spacer region 1210 The orthographic projection on the base substrate 01 falls into the orthographic projection of the second spacer region 1510 on the base substrate, and makes the minimum size of the second spacer region 1510 greater than or equal to the minimum size of the first spacer region, whereby, The minimum size of the first main body sub-part 10011 in the X direction can be made larger than the size of the first spacing area 1210, so that the structure of the main body part 1001 is more stable.
  • the formed pixel defining layer 100 includes a plurality of openings 1002.
  • the openings 1002 are along the arrangement direction of adjacent sub-pixels (ie, along the X direction).
  • the minimum size of is smaller than the minimum size of the sacrificial structure 150 , and the orthographic projection of the opening 1002 on the base substrate 01 falls into the orthographic projection of the sacrificial structure 150 on the base substrate 01 . Therefore, after the sacrificial structure 150 is subsequently removed, an undercut structure can be formed in the main body portion 1001 .
  • the minimum dimension of opening 1002 may be 50%-95% of the minimum dimension of sacrificial structure 150 .
  • the minimum dimension of opening 1002 may be 60%-85% of the minimum dimension of sacrificial structure 150 .
  • the minimum dimension of opening 1002 may be 70%-80% of the minimum dimension of sacrificial structure 150 .
  • the pixel defining layer 100 when forming the pixel defining layer 100 , it also includes forming a support structure 10016 located on a side of the pixel defining layer 100 away from the base substrate, wherein the support structure 10016 is on the base substrate 01
  • the orthographic projection of the second spacer region 1510 at least partially overlaps with the orthographic projection of the second spacer region 1510 on the base substrate 01 .
  • the support structure 10016 may be integrally formed with the main body part 1001 and made of the same material, and configured to support an FMM (high-precision mask) during the evaporation process of the display substrate.
  • the thickness of the second conductive film 013 is 1-3 times the thickness of the first conductive film 012; the thickness of the pixel defining film 014 is 3-3 times the thickness of the second conductive film 013. 8 times. That is, the thickness of the first main body sub-part 10011 may be approximately 1-3 times the thickness of the first electrode 120 , and the thickness of the main body part 1001 may be 3-8 times the thickness of the sacrificial structure 150 . Therefore, according to actual layout design requirements, the main body part can form an effective partition structure 10013 to disconnect at least one film layer in the light-emitting functional layer.
  • the thickness of the second conductive film 013 is 1.5-3 times the thickness of the first conductive film 012; the thickness of the pixel defining film 014 is 5-8 times the thickness of the second conductive film 013.
  • the thickness of the second conductive film 013 is 1.5-2.5 times the thickness of the first conductive film 012; the thickness of the pixel defining film 014 is 4-7 times the thickness of the second conductive film 013.
  • the thickness of the second conductive film 013 is 1.8-2.5 times the thickness of the first conductive film 012; the thickness of the pixel defining film 014 is 4.5-6.5 times the thickness of the second conductive film 013.
  • the thickness of the second conductive film 013 is 2-2.5 times the thickness of the first conductive film 012; the thickness of the pixel defining film 014 is 4.5-6.5 times the thickness of the second conductive film 013.
  • the thickness of the second conductive film 013 is 2.5-3 times the thickness of the first conductive film 012; the thickness of the pixel defining film 014 is 5.5-7.5 times the thickness of the second conductive film 013.
  • the manufacturing method further includes: performing heat treatment on the display substrate 01 to crystallize the first electrode 120 .
  • a wet etching process may be used to etch and remove the sacrificial structure 150 .
  • the first electrode 120 (for example, the first electrode using indium tin oxide) will be crystallized at a high temperature, thereby being subsequently removed.
  • the risk of being removed by etching by the etching solution can be reduced.
  • the material of the second conductive film 013 is made of metal such as aluminum or silver
  • an acidic etching solution can be used to remove the metal.
  • the produced intermediate film layer that is, the sacrificial mechanism 150
  • the acidic etching solution may include HNO 3 (nitric acid) and other materials, but is not limited thereto, and the embodiments of the present disclosure are not limited thereto.
  • the removal time and removal degree of the sacrificial structure 150 can be controlled according to actual process requirements.
  • the removal time and removal degree can be set relatively conservatively, so that the sacrificial structure 150 may not be completely removed, but may have a certain residual portion 90 (as shown in FIG. 5 ), and the residual portion 90 may be located in the groove. 10014 without affecting the luminous performance of the display substrate.
  • the luminescent functional layer 130 when forming the luminescent functional layer 130 , at least one of the multiple film layers of the luminescent functional layer 130 is disconnected at the partition structure 10013 , and a part of the luminescent functional layer 130 is disposed on the main body. On the side of 1001 away from the base substrate 01 , a portion of the light-emitting functional layer 130 is located in the opening 1002 and extends into the groove 10014 .
  • the second electrode 140 is disposed on a side of the light-emitting functional layer 130 away from the base substrate, and the second electrode 140 may be unbroken at the partition structure 10013 to ensure continuity between adjacent sub-pixels 10 sex.
  • the manufacturing method of the display substrate further includes forming an encapsulation layer 41 , that is, sequentially forming a first encapsulation layer 411 and a second encapsulation layer on the side of the second electrode 140 away from the base substrate 01 . layer 412 and the third encapsulation layer 413, so that the display substrate has a good encapsulation effect and prevents the intrusion of water vapor or impurities.

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Abstract

一种显示基板及其制作方法、以及显示装置。显示基板包括衬底基板、多个子像素，像素限定层以及平坦化层，多个子像素中的每个子像素包括发光元件；像素限定层包括主体部及多个开口；平坦化层设置在衬底基板和像素限定层之间，主体部包括第一主体子部和第二主体子部，第二主体子部相对于第一主体子部突出，以形成隔断结构，多个膜层中的至少一层在主体部的隔断结构处断开，位于开口中的第一电极的远离衬底基板一侧的发光功能层在衬底基板上的正投影与位于主体部的远离衬底基板一侧的发光功能层在衬底基板上的正投影至少部分交叠。隔断结构可将发光功能层中的至少一个膜层断开，有利于减轻相邻子像素之间发生串扰。

Description

显示基板及其制作方法、显示装置 技术领域
本公开至少一个实施例涉及一种显示基板及其制作方法、显示装置。
背景技术
随着显示技术的发展，用户对显示装置的性能要求越来越高。在一些产品中，通过将相邻子像素之间的用于发光的材料层隔断以减轻信号发生串扰的方式可以尽量满足显示装置高亮度和低功耗的性能需求，以优化显示性能。
发明内容
本公开的实施例提供一种显示基板及其制作方法、以及显示装置。
本公开实施例提供一种显示基板，显示基板包括：衬底基板、多个子像素，像素限定层以及平坦化层。所述多个子像素中的每个子像素包括发光元件，所述发光元件包括发光功能层以及沿垂直于所述衬底基板的方向位于所述发光功能层两侧的第一电极和第二电极，所述第一电极位于所述发光功能层与所述衬底基板之间，所述发光功能层包括多个膜层；像素限定层包括主体部及多个开口，所述开口由所述主体部所限定，所述开口暴露所述第一电极的至少一部分；平坦化层设置在所述衬底基板和所述像素限定层之间，其中，所述主体部包括第一主体子部和第二主体子部，所述第一主体子部位于所述第二主体子部的靠近所述衬底基板的一侧，所述第二主体子部相对于第一主体子部突出，以形成隔断结构，所述多个膜层中的至少一层在所述主体部的隔断结构处断开，位于所述开口中的第一电极的远离所述衬底基板一侧的所述发光功能层在所述衬底基板上的正投影与位于所述主体部的远离所述衬底基板一侧的所述发光功能层在所述衬底基板上的正投影至少部分交叠。
例如，根据本公开的实施例，对于同一个所述开口，所述像素限定层中的隔断结构沿所述开口的周向设置为不封闭的环形，相邻发光元件的所述第二电极在不封闭的环形处至少部分相连，所述不封闭的环形的缺口的长度为5-20微米。
例如，根据本公开的实施例，所述第二主体子部的至少部分侧面与平行于所述衬底基板的平面的最小坡度角为60度-90度。
例如，根据本公开的实施例，沿相邻子像素的排列方向，所述开口的最 小尺寸为所述第一主体子部的最大尺寸的1.2-1.5倍。
例如，根据本公开的实施例，沿相邻子像素的排列方向，所述第一主体子部的最大尺寸为所述第二主体子部的最大尺寸的0.4-0.8倍；沿垂直于衬底基板01的方向，第一主体子部10011的最大尺寸N1为第二主体子部10012的最大尺寸N2的1-1.8倍。
例如，根据本公开的实施例，所述第一电极包括晶化的导电的金属氧化物。
例如，根据本公开的实施例，所述发光功能层的位于所述第二主体子部远离所述衬底基板一侧的部分在所述衬底基板上的正投影，与所述发光功能层的位于所述开口中的部分在所述衬底基板上的正投影至少部分交叠。
例如，根据本公开的实施例，所述第二电极的位于所述第二主体子部远离所述衬底基板一侧的部分在所述衬底基板上的正投影，与所述第二电极的位于所述开口中的部分在所述衬底基板上的正投影至少部分交叠。
例如，根据本公开的实施例，所述隔断结构包括凹槽，所述发光功能层延伸至所述凹槽中；显示基板还包括残留部，所述残留部位于所述凹槽中，所述残留部在所述衬底基板上的正投影落入所述隔断结构在所述衬底基板上的正投影中。
本公开实施例还提供一种显示装置，包括上述任一项所述的显示基板。
本公开实施例还提供一种显示基板的制作方法，包括：在衬底基板上形成平坦化层；在所述平坦化层上形成第一导电薄膜，并对所述第一导电薄膜进行构图，以形成第一电极；在所述第一电极上形成第二导电薄膜，并对所述第二导电薄膜进行构图，以形成牺牲结构；在所述牺牲结构上形成像素限定薄膜，并对所述像素限定薄膜进行构图以形成像素限定层，所述像素限定层包括主体部和多个开口，所述开口暴露所述第一电极的至少一部分；去除所述牺牲结构，以使得所述主体部包括第一主体子部和第二主体子部，所述第一主体子部位于所述第二主体子部的靠近所述衬底基板的一侧，所述第二主体子部相对于第一主体子部突出，以在所述主体部中形成隔断结构；在所述像素限定层上依次形成发光功能层和第二电极，所述发光功能层包括多个膜层，所述多个膜层中的至少一层在所述隔断结构处断开，所述隔断结构包括凹槽，所述发光功能层延伸至所述凹槽中。
例如，根据本公开的实施例，形成所述第一电极包括：形成位于相邻第 一电极之间的第一间隔区；形成所述牺牲结构包括：形成位于相邻牺牲结构之间的第二间隔区，沿相邻子像素的排列方向，使得所述第一间隔区在所述衬底基板上的正投影落入所述第二间隔区在所述衬底基板上的正投影中，且使得所述第二间隔区的最小尺寸大于或等于所述第一间隔区的最小尺寸。
例如，根据本公开的实施例，沿相邻子像素的排列方向，所述开口的最小尺寸小于所述牺牲结构的最小尺寸，并且所述开口在所述衬底基板上的正投影落入所述牺牲结构在所述衬底基板上的正投影中。
例如，根据本公开的实施例，所述的制作方法还包括：形成位于所述像素限定层远离所述衬底基板一侧的支撑结构，其中，所述支撑结构在所述衬底基板上的正投影与所述第二间隔区在所述衬底基板上的正投影至少部分交叠。
例如，根据本公开的实施例，所述第二导电薄膜的厚度为所述第一导电薄膜的厚度的1-3倍；所述像素限定薄膜的厚度为所述第二导电薄膜的厚度的3-8倍。
例如，根据本公开的实施例，所述第一导电薄膜的材料包括导电的金属氧化物，所述第二导电薄膜的材料包括金属。
例如，根据本公开的实施例，所述导电的金属氧化物包括氧化铟锡，所述金属包括铝、银以及钛/铝/钛形成的金属叠层中的任意一种。
例如，根据本公开的实施例，在形成所述牺牲结构之后，并在去除所述牺牲结构之前，所述制作方法还包括：对所述显示基板进行热处理，以使得所述第一电极晶化。
例如，根据本公开的实施例，去除所述牺牲结构包括：采用湿刻工艺对所述牺牲结构进行刻蚀去除。
例如，根据本公开的实施例，所述第二导电薄膜的材料包括金属，所述采用湿刻工艺对所述牺牲结构进行刻蚀去除包括：使用酸性刻蚀液对由所述金属制成的中间膜层进行刻蚀。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为一种显示基板的截面示意图。
图2为根据本公开的实施例提供的显示基板的平面图。
图3为本公开至少一个实施例提供的一种显示基板的截面图。
图4为本公开至少一个实施例提供的另一种显示基板的截面图。
图5为本公开至少一实施例提供的再一种显示基板的截面图。
图6为本公开至少一实施例提供的再一种显示基板的截面图。
图7为本公开至少一个实施例提供的显示基板的平面结构示意图。
图8为本公开至少一个实施例提供的另一种显示基板的平面结构示意图。
图9为本公开至少一个实施例提供的再一种显示基板的平面结构示意图。
图10A为图7所示的显示基板中设置带有缺口的一种隔断结构的示意图。
图10B为图7所示的显示基板中设置带有缺口的另一种隔断结构的示意图。
图10C为本公开至少一个实施例提供的再一种显示基板的示意图。
图11为本公开一实施例提供的一种显示装置的示意图。
图12至图20为本公开至少一个实施例所示的显示基板的制作方法流程示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
本公开实施例中使用的“垂直”以及“相同”等特征均包括严格意义的“垂直”、“相同”等特征，以及“大致垂直”、“大致相同”等包含一定误差的情况， 考虑到测量和与特定量的测量相关的误差(也就是，测量系统的限制)，表示在本领域的普通技术人员所确定的对于特定值的可接受的偏差范围内。本公开实施例中的“中心”可以包括严格的位于几何中心的位置以及位于几何中心周围一小区域内的大致中心的位置。例如，“大致”能够表示在一个或多个标准偏差内，或者在所述值的10％或者5％内。
随着显示技术的不断发展，致力于实现低功耗、高品质的新一代目标向显示装置的发展提出了越来越高的要求。Tandem结构作为一种新兴的OLED显示基板结构，其通过将OLED显示基板中的发光元件中的一个发光层替换为两个发光层，并在该两个发光层之间增加电荷产生层(CGL)，形成双叠层设计，实现了双发光器件串联。与传统的采用一层发光功能层的发光元件的OLED显示基板相比，在相同发光强度下，采用Tandem结构的显示基板极大地降低了发光元件的发光电流，提升了发光元件的寿命，有利于车载等高寿命新技术开发量产。Tandem结构的显示装置具有寿命长、功耗低、亮度高等优点。
图1为一种显示基板的示意图。如图1所示，显示基板包括平坦化层PLN、像素限定层PDL、电极E1、发光功能层FL以及电极E2。发光功能层FL包括电荷产生层(CGL)、空穴传输层HTL、发光层以及电子传输层ETL。图1示出了相邻子像素的发光元件EM1和发光元件EM2，发光元件EM1被配置为发红色光，发光元件EM2被配置为发绿色光。即发光元件EM1对应于发红色光的发光层R’，发光元件EM2对应于发绿色光的发光层G’。如图1所示，发光元件EM1和发光元件EM2的电荷产生层(CGL)可为一体结构，采用开口掩膜来制作。需要说明的是，为了图示清晰，图1仅示出了显示基板中的部分膜层，例如，显示基板还包括其他多个膜层，例如封装层等。
然而，随着产品分辨率的不断提高，显示基板中的像素间的像素限定层间距不断缩小，同时，由于发光元件中的电荷产生层(CGL)具有较强的导电性，当电荷产生层(CGL)设置为整面膜层时，相邻两个有机发光元件的电荷产生层(CGL)是连续膜层，容易使得相邻子像素之间(例如，在图1中虚线框所示出的位置)产生串扰，例如，在低灰阶下绿色子像素可能带动邻近的红色子像素发光。并且，现有的显示基板中，发光元件的发光区由像素限定层PDL所限定，当发光区的面积越大时，发光元件的发光强度越高，越有利于提升显示基板的显示性能。
本公开至少一实施例提供一种显示基板，包括：衬底基板、多个子像素、像素限定层以及平坦化层。多个子像素中的每个子像素包括发光元件，发光元件包括发光功能层以及沿垂直于衬底基板的方向位于发光功能层两侧的第一电极和第二电极，第一电极位于发光功能层与衬底基板之间，发光功能层包括多个膜层；像素限定层包括主体部及多个开口，每个开口由主体部所限定，开口暴露第一电极的至少一部分；平坦化层设置在衬底基板和像素限定层之间，其中，主体部包括第一主体子部和第二主体子部，第一主体子部位于第二主体子部的靠近衬底基板的一侧，第二主体子部相对于第一主体子部突出，以形成隔断结构，多个膜层中的至少一层在主体部的隔断结构处断开；位于开口中的第一电极的远离衬底基板一侧的发光功能层在衬底基板上的正投影与位于主体部的远离衬底基板一侧的发光功能层在衬底基板上的正投影至少部分交叠。
本公开的实施例通过在显示基板中相邻子像素之间设置隔断结构，可以使得发光功能层的多个膜层的至少一层在隔断结构处断开，有利于降低相邻子像素之间产生串扰的几率，有利于满足高像素密度的排布需求，以提升基板的显示性能。
下面结合附图对本公开实施例提供的显示基板以及显示装置进行描述。
图2为根据本公开的实施例提供的显示基板的平面图。图3为本公开至少一个实施例提供的一种显示基板的截面图。
参考图2和图3，显示基板包括衬底基板01、多个子像素10、像素限定层100以及平坦化层110。例如，显示基板包括位于衬底基板01上的显示区A，显示区A内设置有多个子像素10，例如多个第一子像素010，多个第二子像素020以及多个第三子像素030，多个子像素10在显示区A内间隔排布，以形成多个像素行和像素列。
例如，平坦化层110可以为绝缘层，绝缘层的材料可以包括有机材料。例如，平坦化层110可以是包括至少一层的结构，例如，可以为包括两层的绝缘层，但不限于此。
结合图2和图3，多个子像素10中的每个子像素包括发光元件234，发光元件234包括发光功能层130以及沿垂直于衬底基板01的方向位于发光功能层130两侧的第一电极120和第二电极140，第一电极120位于发光功能层130与衬底基板01之间，发光功能层130包括多个膜层，例如，多个膜层包 括如图3所示出的电荷产生层133，以及位于电荷产生层133两侧的第一发光层131和第二发光层132。例如，发光元件234被配置为驱动子像素234发光。
如图3所示，像素限定层100包括主体部1001及多个开口1002，开口1002由主体部1001所限定，开口1002暴露第一电极120的至少一部分。平坦化层110设置在衬底基板01和像素限定层100之间，主体部1001包括第一主体子部10011和第二主体子部10012，第一主体子部10011位于第二主体子部10012的靠近衬底基板01的一侧，第二主体子部10012包括相对于第一主体子部10011的突出，以形成隔断结构10013。
如图3所示，发光功能层130中的多个膜层中的至少一层在主体部1001的隔断结构10013处断开，位于开口1002中的第一电极120的远离衬底基板01一侧的发光功能层130在衬底基板01上的正投影与位于主体部1001的远离衬底基板01一侧的发光功能层130在衬底基板01上的正投影至少部分交叠。
如图3所示，隔断结构10013包括凹槽10014，发光功能层130可延伸至凹槽10014中。
本公开的实施例通过将发光功能层130中的至少一层膜层在位于相邻子像素10之间的隔断结构10013处断开，有利于减轻相邻子像素之间发生串扰，以优化显示效果。
例如，如图3所示，平坦化层110可以采用透光的绝缘材料，以增强显示基板的投射率。
例如，如图3所示，多个子像素10可以包括沿X方向排列的相邻两个子像素10。例如，相邻子像素具有排列方向，该方向可以大致是相邻子像素的发光区中心连线或最近距离连线的延伸方向，或者相邻子像素的发光区沿X方向分布，即上述方向就是X方向。
例如，如图3所示，发光功能层130可以包括层叠设置的第一发光层131、电荷产生层133以及第二发光层132，电荷产生层133具有较强的导电性，可以使得发光功能层具有寿命长、功耗低以及可实现高亮度的优点。例如，相对于没有设置电荷产生层的发光功能层，子像素10通过在发光功能层130中设置电荷产生层133可以将发光亮度提高近一倍。例如，各子像素10中，发光功能层130还可以包括空穴注入层(HIL)、空穴传输层(HTL)、电子传输层(ETL)、光耦合层CPL、和电子注入层(EIL)等。例如，上述膜层均为多个子像 素10的共用膜层，可以称为共通层。
例如，如图3所示，同一个子像素10中，第一发光层131和第二发光层132可以为发射相同颜色光的发光层。例如，发不同颜色光的子像素10中的第一发光层131(或第二发光层132)发射不同颜色光。当然，本公开实施例不限于此，例如，同一子像素10中，第一发光层131和第二发光层132可以为发射不同颜色光的发光层，通过在同一子像素10中设置发射不同颜色光的发光层可以使得子像素10包括的多层发光层发射的光混合为白光，通过设置彩膜层来调节每个子像素出射光的颜色。
例如，如图3所示，第一电极110可以为阳极，第二电极120可以为阴极。例如，阴极可由高导电性和低功函数的材料形成，例如，阴极可采用金属材料制成。例如，阳极可由具有高功函数的透明导电材料形成。
例如，如图3所示，像素限定层100位于发光元件234的第一电极120远离衬底基板01的一侧，且像素限定层100包括多个开口1002以及围绕多个开口1002的主体部1001，多个发光元件234至少部分位于多个开口1002中。图3示意性的示出发光元件234的第一电极120远离第二电极140的一侧还设置有结构层011，例如，结构层011可以包括有源半导体图案所在层、栅线所在膜层、数据线所在膜层、多个绝缘层等膜层。例如，像素限定层100的材料可以包括聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等。
例如，如图3所示，像素限定层100的开口1002被配置为限定发光元件234的发光区。例如，多个子像素10的发光元件234可以与多个开口1002一一对应设置。例如，发光元件234可以包括位于开口1002中的部分，以及在垂直于衬底基板01的方向与主体部1001交叠的部分。
例如，如图3所示，像素限定层100的开口1002被配置为暴露发光元件234的第一电极120，且暴露的第一电极120至少部分与发光元件234中的发光功能层130接触。例如，当发光功能层130位于像素限定层100的开口1002中时，位于发光功能层130两侧的第一电极120和第二电极140能够驱动像素限定层100的开口1002中的发光功能层234进行发光。例如，上述发光区可以指发光元件234的有效发光的区域，发光区的形状指二维形状，例如发光区的形状可以与像素限定层100的开口1002的形状相同。
例如，如图3所示，像素限定层100的主体部1001包括第一主体子部10011和第二主体子部10012，第一主体子部10011位于第二主体子部10012的靠近 衬底基板01的一侧。例如，第一主体子部10011与第二主体子部10012是一体形成的，但不限于此。对于同一个主体部1001，沿X方向第二主体子部10012相对于第一主体子部10011突出，以形成隔断结构10013，由此，在第二主体子部10012的边缘构成了底切(undercut)结构。例如，形成底切结构后的主体部1001近似呈“蘑菇”的形状。
如图3所示，发光功能层130中的多个膜层中的至少一层在主体部1001的隔断结构10013处断开，例如，发光功能层130中断开的至少一层膜层可以为上述共通层中的至少一层膜层。此时，相邻两个子像素的发光功能层中至少一个膜层(如电荷产生层)间隔设置，可以增加相邻子像素之间发光功能层的电阻，从而降低该相邻两个子像素之间产生串扰的几率，并且当该相邻子像素的发光颜色不同时，有利于实现显示基板的混色改善，降低功耗，并延长显示基板的寿命。
如图3所示，发光功能层130包括位于开口1002内的部分，以及设置在主体部1001远离衬底基板01一侧的部分。当发光功能层130在隔断结构10013处隔断后，对于位于开口1002中的第一电极120的远离衬底基板01一侧的发光功能层130，该部分发光功能层130的位于开口1002中部的厚度最大，而位于开口1002边缘的部分的厚度逐渐减小。
如图3所示，隔断结构10013包括凹槽10014，发光功能层130的两侧结构可延伸至凹槽10014中。位于开口1002中的第一电极120的远离衬底基板01一侧的发光功能层130与位于主体部1001的远离衬底基板01一侧的发光功能层130在衬底基板01上的正投影至少部分交叠。例如，对于位于位于开口1002中的第一电极120的远离衬底基板01一侧的发光功能层130，该部分发光功能层130在开口1002两侧的厚度逐渐减小的部分，与位于主体部1001的远离衬底基板01一侧的发光功能层130在衬底基板01上的正投影至少部分交叠，但不限于此。
参考图3，例如，在方向X上，在同一个开口1002中，发光功能层130的延伸至凹槽10014中的部分的最大尺寸为发光功能层130的最大尺寸的1/5-1/3。例如，在方向X上，上述尺寸为1/5-1/4。例如，在方向X上，上述尺寸为1/4-1/3。例如，在方向X上，上述尺寸为1/5-4/15。
例如，参考图3，当发光功能层130位于隔断结构10013的凹槽10014中时，该部分发光功能层130可以与主体部10013的侧壁10016至少部分交 叠，此时，第二电极140设置在发光功能层130远离第一电极120的一侧，且第二电极140通过发光功能层130与第一电极120间隔设置，以降低短路发生的几率。
例如，当相邻的两个子像素10之间的主体部1001形成隔断结构10013后，可以使得主体部1001在X方向上的最大尺寸减小，从而可以使得开口1002在X方向上的最大尺寸增加，像素限定层100的开口率变大，由此可以使得开口1002能够暴露发光元件130中更大面积的发光区，同时能够缩小像素间的像素限定层间距，以实现显示基板的高分辨率性能。
例如，如图3所示，第二主体子部10012的至少部分侧面与平行于衬底基板01的平面L1的最小坡度角β为60度-90度。
如图3所示，第二主体子部10012的至少部分侧面与平行于衬底基板01的平面L1的角度为坡度角，位于第二主体子部10012的边缘部分的侧面与平面L1的坡度角为最小坡度角β。
例如，最小坡度角β可以为60度-80度。例如，最小坡度角β可以为75度-95度。例如，最小坡度角β可以为70度-90度。例如，最小坡度角β可以为60度。例如，最小坡度角β可以为65度-75度。例如，最小坡度角β可以为65度-85度。例如，最小坡度角β可以为75度-85度。例如，最小坡度角β可以为80度-95度。例如，最小坡度角β可以为60度-70度。例如，最小坡度角β可以为60度。
例如，将第二主体子部10012的至少部分侧面与平行于衬底基板01的平面L1的最小坡度角β设置为60度-90度，可以有利于发光元件234中的至少一个膜层在隔断结构10013处断开，同时又不影响子像素10的正常显示，有利于提升显示基板的显示性能。
例如，如图3所示，沿相邻子像素10的排列方向，即X方向，开口1002的最小尺寸M1为第一主体子部10011的最大尺寸M2的1.2-1.5倍。也即，可以使得开口1002的开口面积尽量扩大，从而使得发光元件234的发光区面积增加，以增强显示效果。
例如，沿X方向，开口1002的最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.2-1.5倍。例如，开口1002的最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.2-1.4倍。例如，开口1002的最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.2-1.3倍。例如，开口1002的 最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.2-1.25倍。例如，开口1002的最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.2-1.35倍。例如，开口1002的最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.2-1.45倍。例如，开口1002的最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.3-1.5倍。例如，开口1002的最小尺寸M1可以为第一主体子部10011的最大尺寸M2的1.4-1.5倍。
例如，如图3所示，沿相邻子像素的排列方向(例如，X方向)，第一主体子部10011的最大尺寸M2为第二主体子部10012的最大尺寸M3的0.4-0.8倍，在该范围内，可以使得第二主体子部10012相对于第一主体子部10011的突出程度更加适宜。
例如，如图3所示，沿垂直于衬底基板01的方向(例如，Z方向)，第一主体子部10011的最大尺寸N1为第二主体子部10012的最大尺寸N2的1-1.8倍。例如，当第一主体子部10011的最大尺寸N1大于第二主体子部10012的最大尺寸N2时，可以有利于发光功能层130中的多个膜层中的至少一层在主体部1001的隔断结构10013处断开。
例如，沿相邻子像素的排列方向，第一主体子部10011的最大尺寸M2可以为第二主体子部10012的最大尺寸M3的0.4-0.7倍。例如，第一主体子部10011的最大尺寸M2可以为第二主体子部10012的最大尺寸M3的0.5-0.6倍。例如，第一主体子部10011的最大尺寸M2可以为第二主体子部10012的最大尺寸M3的0.4-0.6倍。例如，第一主体子部10011的最大尺寸M2可以为第二主体子部10012的最大尺寸M3的0.5-0.7倍。例如，第一主体子部10011的最大尺寸M2可以为第二主体子部10012的最大尺寸M3的0.5-0.8倍。例如，第一主体子部10011的最大尺寸M2可以为第二主体子部10012的最大尺寸M3的0.4-0.8倍。
例如，沿垂直于衬底基板01的方向，第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1-1.6倍。例如，第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1.2-1.6倍。例如，第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1.3-1.6倍。例如，第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1.2-1.4倍。例如，第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1.3-1.5倍。例如， 第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1.1-1.4倍。例如，第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1.4-1.6倍。例如，第一主体子部10011的最大尺寸N1可以为第二主体子部10012的最大尺寸N2的1.4-1.5倍。
例如，如图3所示，第一电极120包括晶化的导电的金属氧化物。
例如，在形成主体部1001的过程中，包括热处理等过程。在热处理的过程中，第一电极120可以进行晶化，以防止在主体部1001进行刻蚀的过程受到影响。例如，经过晶化后的第一电极120可以减少在主体部1001进行湿刻的同时，受到湿刻溶液的影响，以保护第一电极120自身的固有特性。
例如，如图3所示，发光功能层130的位于第二主体子部10012远离衬底基板01一侧的部分在衬底基板01上的正投影，与发光功能层130的位于开口1002中的部分在衬底基板01上的正投影至少部分交叠。
例如，如图3所示，发光功能层130包括多个膜层，多个膜层在隔断结构10013处断开，从而使得多个膜层包括设置在第二主体子部10012的远离衬底基板01的一侧的部分，以及位于开口1002中的部分。例如，位于开口1002中的发光功能层130可根据断开位置及情况，延伸至开口1002两侧的凹槽10014中。由此，可以使得发光功能层130的位于第二主体子部10012远离衬底基板01一侧的部分在衬底基板01上的正投影，与发光功能层130的位于开口1002中的部分在衬底基板01上的正投影至少部分交叠。
例如，如图3所示，第二电极140的位于第二主体子部10012远离衬底基板01一侧的部分在衬底基板01上的正投影，与第二电极140的位于开口1002中的部分在衬底基板01上的正投影至少部分交叠。
例如，如图3所示，第二电极140位于发光元件130的远离衬底基板01的一侧，第二电极140的至少部分在隔断结构10013处断开，从而使得第二电极140包括设置在第二主体子部10012的远离衬底基板的一侧的部分，以及位于开口1002中的部分。例如，根据断开位置的不同，第二电极140位于开口1002中的部分可延伸至开口1002两侧的凹槽10014中，由此使得该部分第二电极140在衬底基板01上的正投影，与发光功能层130的位于开口1002中的部分在衬底基板01上的正投影至少部分交叠。
图4为本公开至少一个实施例提供的另一种显示基板的截面图。
例如，相比于图3示出的显示基板，在图4所示的显示基板中，发光元 件11中的发光功能层130与第二电极140的位于凹槽10014中的部分的最小厚度之和增大，且相邻两个主体部1001之间的的最小尺寸增大(例如，近似等于M1)，由此，使得开口1002所暴露的发光元件234的发光区面积增大，从而可以增强显示效果。
例如，发光功能层130与第二电极140的延伸至凹槽10014中的部分的最小厚度之和可以为发光功能层130与第二电极140的最大厚度之和的1/3-1。例如，发光功能层130与第二电极140的延伸至凹槽10014中的部分的最小厚度之和可以为发光功能层130与第二电极140的最大厚度之和的1/2-1。发光功能层130与第二电极140的延伸至凹槽10014中的部分的最小厚度之和可以为发光功能层130与第二电极140的最大厚度之和的1/4-1/2。发光功能层130与第二电极140的延伸至凹槽10014中的部分的最小厚度之和可以为发光功能层130与第二电极140的最大厚度之和的1/3-1/2。
例如，在X方向上，开口1002所暴露的发光区的最大尺寸可以为开口1002的最小尺寸M1的75％-100％。例如，在X方向上，开口1002所暴露的发光区的最大尺寸可以为开口1002的最小尺寸M1的75％-95％。例如，在X方向上，开口1002所暴露的发光区的最大尺寸可以为开口1002的最小尺寸M1的80％-100％。例如，在X方向上，开口1002所暴露的发光区的最大尺寸可以为开口1002的最小尺寸M1的85％-95％。例如，在X方向上，开口1002所暴露的发光区的最大尺寸可以为开口1002的最小尺寸M1的70％-90％。如此设置，可以尽量增大开口1002所暴露的发光区的面积，以增强显示基板的显示效果。
图5为本公开至少一实施例提供的再一种显示基板的截面图。
例如，如图5所示，相比于图3所示出的显示基板，在图5所示的显示基板中的不同之处在于，隔断结构10013包括凹槽10014，发光功能层130延伸至凹槽10014中。显示基板01还包括残留部90，残留部90位于凹槽10014中，并且残留部90在衬底基板01上的正投影落入隔断结构10013在衬底基板01上的正投影中。
例如，如图5所示，残留部90可以是在形成主体部1001的过程中所留下的膜层结构。例如，在形成主体部1001时，需要通过设置额外的膜层以作为牺牲结构，并通过将牺牲结构去除掉以形成第一主体子部10011以及第二主体子部10012。在这一过程中，若牺牲结构未被完全去除，可形成如图5 所示的残留部90。如图5所示，残留部90在Z方向上的尺寸小于第一主体子部10011在Z方向上的尺寸，且残留部90在X方向上的尺寸小于凹槽10014在X方向上的尺寸，由此残留部90在衬底基板01上的正投影可落入隔断结构10013在衬底基板01上的正投影中。例如，残留部90在X方向上的尺寸可根据牺牲结构去除时间以及去除程度等因素决定，图5仅作为示意，但不限于此。
例如，如图5所示，对于任意子像素，残留部90在X方向上的最大尺寸不大于凹槽10014在方向X上的最大尺寸，且残留部90在衬底基板01上的正投影落入隔断结构10013的凹槽10014在在衬底基板01上的正投影中，以避免影响发光元件234的发光性能。例如，残留部90在Z方向上的最大尺寸可以与凹槽10014相同，也可以不相同。例如，位于不同子像素的凹槽10014内的残留部90的形态可以是不同的，取决于牺牲结构的去除时间以及去除程度，本公开的实施例对此不作限制。例如，残留部90在X方向上的最大尺寸为凹槽10014在方向X上的最大尺寸的1/6-1。例如，残留部90在X方向上的最大尺寸为凹槽10014在方向X上的最大尺寸的1/4-1/3。例如，残留部90在X方向上的最大尺寸为凹槽10014在方向X上的最大尺寸的1/4-2/3。例如，残留部90在X方向上的最大尺寸为凹槽10014在方向X上的最大尺寸的1/3-1/2。例如，残留部90在X方向上的最大尺寸为凹槽10014在方向X上的最大尺寸的1/3-2/3。
例如，在形成多个子像素的隔离结构10013时，牺牲结构的厚度可以设置为均匀的，并且牺牲结构的去除时间和去除程度也可以设置为相同的，以简化工艺流程，并提高子像素结构的一致性。当然，在实际的操作过程中，也可以根据实际的工艺条件进行灵活设计。例如，部分子像素中的牺牲结构可以完全去除，而部分子像素中的牺牲结构可以不完全去除，本公开的实施例对此不作限制。
例如，参考图5，当发光功能层130位于隔断结构10013的凹槽10014中时，该部分发光功能层130可以与凹槽10014内的残留部90至少部分交叠。此时，第二电极140设置在发光功能层130远离第一电极120的一侧，并通过发光功能层130与第一电极120间隔设置，并且，第二电极140与残留部不交叠，以减小电路故障发生的风险。
例如，当形成主体部1001时，在进行显影等步骤中，部分显影液也可能 未被完全利用或清除从而可以部分余留在例如，主体部1001的凹槽10014中。
由此，形成底切结构的主体部1001还具有改善残膜等结构的作用。
图6为本公开至少一实施例提供的再一种显示基板的示意图。
例如，如图6所示，显示基板中的平坦化层110及其远离衬底基板01一侧的结构可以与图3中的显示基板基本相同，相关描述可以参考前述实施例的说明，在此不作赘述。
例如，如图6所示，沿垂直于衬底基板01的方向，也即Z方向，显示基板包括依次设置的缓冲层0114、绝缘层0113、绝缘层0112、绝缘层0111、平坦化层110。例如，绝缘层0113、绝缘层0112、绝缘层0111可采用无机材料制成，例如，可以采用氮化硅(SiNx)或氧化硅(SiOx)等。例如，缓冲层0114可用于提高衬底基板01的抗水氧能力。
例如，如图6所示，显示基板还包括像素电路，被配置为驱动发光元件进行发光。例如，像素电路可以采用2T1C、3T1C或7T1C设计。例如，像素电路可以包括多个晶体管和一个存储电容，例如多个晶体管可以包括薄膜晶体管21，薄膜晶体管21包括栅极211、有源层212、源极210、漏极213，第一电极120与漏极213相连。薄膜晶体管的源极210和漏极213在结构上可相同，在称谓上可互换。
例如，如图6所示，像素电路可以包括电容31，电容31包括相对设置的第一极板310和第二极板320。
例如，如图6所示，显示基板还包括设置于主体部1001远离衬底基板一侧的支撑结构10016，被配置为作为支撑层，配置为在显示基板的蒸镀过程中支撑FMM(高精度掩膜板)。例如，支撑结构10016可以采用与主体部1001相同的材料。例如，支撑结构10016可以与主体部1001一体形成。
例如，图6还示出了封装层41。例如，封装层41包括第一封装层411、第二封装层412、以及第三封装层413。例如，第一封装层411和第三封装层413为无机层，可采用化学气相沉积(CVD)工艺形成。第二封装层412为有机层，可采用喷墨打印工艺形成。如图6所示，第二封装层412的厚度大于第一封装层411的厚度。如图6所示，第二封装层412的厚度大于第三封装层413的厚度，以实现较好的封装效果。
图7为本公开至少一个实施例提供的显示基板的平面结构示意图；图8为本公开至少一个实施例提供的另一种显示基板的平面结构示意图；图9为 本公开至少一个实施例提供的再一种显示基板的平面结构示意图。
例如，如图7所示，多个子像素10包括多个第一颜色子像素101、多个第二颜色子像素102以及多个第三颜色子像素103。例如，第一颜色子像素101和第三颜色子像素103之一发红光，另一个发蓝光；第二颜色子像素102发绿光。图7示意性的示出第一颜色子像素101发红光，为红色子像素；第三颜色子像素103发蓝光，为蓝色子像素；第二颜色子像素102发绿光，为绿色子像素。
例如，如图7所示，多个第一颜色子像素101和多个第三颜色子像素103沿平行于衬底基板01的X方向和Y方向均交替设置以形成多个第一像素行051和多个第一像素列052，多个第二颜色子像素101沿X方向和Y方向均阵列排布以形成多个第二像素行053和多个第二像素列054，多个第一像素行051和多个第二像素行053沿Y方向交替设置且在X方向上彼此错开，多个第一像素列052和多个第二像素列054沿X方向交替设置且在Y方向上彼此错开。例如，图7所示出的多个子像素的排列方式可以为Magic排列方式。
例如，本公开至少一个实施例提出的隔断结构可以适用于不同的像素排布结构中。如图8和图9所示出的子像素的排列方式以及发光区的形状与图7所示出的子像素不同。
例如，如图8所示，多个子像素10包括多个第三颜色子像素104、多个第四颜色子像素105以及多个第五颜色子像素106。图8示意性的示出第三颜色子像素104发红光，为红色子像素；第四颜色子像素105发蓝光，为蓝色子像素；第五颜色子像素106发绿光，为绿色子像素。多个第三颜色子像素104和多个第五颜色子像素106沿平行于衬底基板01的Y方向均交替设置以形成多个第三像素列061，多个第四颜色子像素105均匀设置于相邻的第三像素列061之间，以形成多个第四像素列062。第三颜色子像素104、第四颜色子像素105以及第五颜色子像素106的发光区的形状均为矩形，并且第四颜色子像素105的发光区的形状近似呈正方形。例如，图8所示出的多个子像素的排列方式可以为SRGB排列方式。
例如，如图9所示，多个子像素10包括多个第六颜色子像素107、多个第七颜色子像素108、多个第八颜色子像素109以及第九颜色子像素109。图8示意性的示出了第六颜色子像素107为发红光的子像素，为红色子像素；第七颜色子像素108为发蓝光的子像素，为蓝色子像素；第八颜色子像素109 以及第九颜色子像素109的发光颜色相同，均为发绿光的子像素，为绿色子像素。多个子像素沿平行于衬底基板的X方向和Y方向均交替设置。第八颜色子像素109以及第九颜色子像素109可以相对设置，并且发光区的面积相等。多个子像素中，第六颜色子像素107的发光区的面积最大。例如，图8所示出的多个子像素的排列方式可以为GGRB排列方式。
例如，在如图7-图9示出的显示基板中，每个子像素可以均被环形的隔断结构10013围绕，隔断结构10013也可以设置为无缺口的形式，此时，相邻的两个子像素之间的发光层的至少一个膜层在隔断结构处断开，以减小串扰发生的风险。例如，为使得第二电极的连续性，可通过导电的光耦合层CPL将不同子像素的第二电极相连，以形成共电极的结构。例如，在本公开的一些实施例中，环绕每个子像素的隔断结构10013也可以设置为包括至少一个缺口的形式，以利于第二电极在相邻子像素之间不发生断裂。
图10A为图7所示的显示基板中设置带有缺口的一种隔断结构的示意图；图10B为图7所示的显示基板中设置带有缺口的另一种隔断结构的示意图；图10C为本公开至少一个实施例提供的再一种显示基板的示意图。
例如，在本公开的一些实施例中，不同子像素的隔断结构10013的设置情况可以不同。例如，如图10A-图10B所示，对于同一个开口1002，像素限定层100中的隔断结构10013沿开口1002的周向可以设置为不封闭的环形，相邻发光元件234的第二电极140在不封闭的环形的缺口处至少部分相连，以保证相邻子像素之间的第二电极140的连续性。不封闭的环形的缺口的长度H可以为5-20微米。
参考图3和图10A，第一颜色子像素101、第二颜色子像素102以及第三颜色子像素103均包括设置为不封闭环形的隔断结构10013，每个子像素的隔断结构10013均围绕子像素的发光区设置，不封闭环形的隔断结构10013包括一个缺口。第二电极140在子像素的隔断结构10013处断开，并在相邻子像素的隔断结构10013的缺口处实现连接，以保证连接的连续性。
例如，在本公开的一些实施例中，不封闭环形的隔断结构10013可以为C型。
例如，参考图3和图10A，不封闭环形的隔断结构10013的缺口的长度H可以为15-20微米。例如，上述尺寸可以为10-20微米。例如，上述尺寸可以为8-15微米。例如，上述尺寸可以为5-15微米。例如，上述尺寸可以为10-15 微米。例如，上述尺寸可以12-25微米。例如，上述尺寸可以为16-24微米。例如，上述尺寸可以14-18微米。例如，上述尺寸可以为18-22微米。但不限于此，本公开的实施例对此不作限定。
例如，参考图3、图5和图10A，当子像素中的隔断结构10013包括残留部90时，残留部90位于隔断结构10013的凹槽10014中，对于同一个子像素的发光元件234，残留部90所围成的图形也可以是非封闭的环形。例如，在同一个发光元件234的周向上的不同位置处的残留部90的形态可以是不相同的。例如，不封闭的环形的残留部90也可以包括多个缺口。例如，不封闭的环形的残留部90的尺寸也可以是非均匀的，本公开的实施例对此不作限定。例如，不封闭的环形的残留部90的缺口长度可以为不封闭环形的隔断结构10013的缺口的长度的1/4-1。例如，上述尺寸可以为1/4-1/3。例如，上述尺寸可以为1/4-1/2。例如，上述尺寸可以为1/3-1/2。例如，上述尺寸可以为1/3-2/3。例如，上述尺寸可以为1/2-2/3。例如，上述尺寸可以为2/3-3/4。
例如，参考图3和图10B，对于同一个开口1002，像素限定层100中的隔断结构10013可以包括多个子部分，且多个子部分沿开口1002的周向呈环形设置，以围绕发光元件234的发光区。例如，围绕开口1002的隔断结构10013可以包括至少一个缺口，也即隔断结构10013未围绕子像素的发光区而形成完整的一圈。此时，相邻子像素10的发光元件234中的第二电极140可以在缺口处彼此相连，以利于施加相同的信号。例如，如图10B所示，对于相邻的子像素101和子像素102，二者的第二电极140可通过未形成隔断结构10013的区域实现连接，例如，可通过第一区100-1和第二区100-2实现第二电极140的连接，但不限于此。例如，第二电极140可以在子像素101中的像素限定层100中的任意一处未形成隔断结构10013的部分与子像素102中的像素限定层100中的任意一处未形成隔断结构10013的部分实现连接。
例如，在本公开的一些实施例中，为了降低第二电极140的断线风险。在隔断结构处，还可以采用二次掩模的方式，增设辅助连接电极以使得不同子像素的第二电极140相连，或者，也可以使得发光元件234中的其他膜层导电，例如可以使得发光元件中的光耦合层CPL导电。即，不同子像素的第二电极140可以通过导电的光耦合层CPL相连，但不限于此。
例如，参考图3、图10A和图10B，对于同一个子像素，隔断结构10013的至少部分边界和与其紧邻的子像素的发光区的边界轮廓大致相同。例如， 子像素的发光区的边界轮廓可以包括多条直边，和/或，连接相邻直线的弧形边，围绕该发光区的隔断结构10013的边界轮廓中可以包括与发光区的直边对应的直边轮廓，和/或，与弧形边对应的弧边轮廓。例如参考图3和图10，对于同一个子像素，由于主体部1001设置时，第二主体子部10012相对于第一主体子部10011在X方向上突出，以形成凹槽10014，因此，对于相邻的两个子像素，当二者之间的像素限定层100设置成隔断结构10013的形式时，在X方向上，该隔断结构10013在衬底基板上的正投影与每个子像素的发光区的中心在衬底基板上的正投影的最小距离将增加，也即该隔断结构10013在衬底基板上的正投影将更加远离每个子像素的发光区的中心在衬底基板上的正投影。由此，对于相邻的两个子像素，设置为隔断结构10013的形式的像素限定层在衬底基板上的正投影面积，小于未设置为隔断结构10013的形式的像素限定层在衬底基板上的正投影面积。因此，本公开的实施例通过设置隔断结构，可以在减小相邻子像素之间发生串扰的同时，还可以增大发光元件的发光区面积，以增强显示效果。
例如，参考图3、图10A和图10B，根据发光颜色的不同，例如，子像素101可以为第一颜色子像素101，子像素102可以为第二颜色子像素102。多个子像素10还包括子像素103，且子像素103的发光颜色与子像素101和子像素102不同，为第三颜色子像素103。例如，隔断结构10013可以位于相邻的第一颜色子像素101和第三颜色子像素103之间，和/或，隔断结构10013可以位于相邻的第二颜色子像素102与第三颜色子像素103之间，和/或，隔断结构10013可以位于相邻的第一颜色子像素101和第二颜色子像素102之间。
例如，参考图3、图10A和图10B，围绕一个子像素的发光区的隔断结构10013的数量可以包括四个。例如，四个隔断结构10013可以分别位于发光区的四个角部。例如，四个隔断结构10013可以分别平行于发光区的四个边部。例如，围绕一个子像素的隔断结构10013的数量可以包括3个。例如，同一个子像素的隔断结构10013可以位于发光区的角部，也可以位于平行于发光区的边部。隔断结构10013的设置位置以及数量可以根据实际版图的设计需求进行确定，本公开的实施例对此不作限制。
例如，如图10C所示，与图3所示出的显示基板相比，图10C所示的显示基板的不同之处在于，第二电极140在隔断结构10013处不断开。
例如，与图3所示出的显示基板相比，图10C所示出的显示基板中的主体部1001的凹槽10014在Z方向上的最大尺寸可以相对减小，但不限于此。
如图10C所示，发光功能层130在隔断结构10013处断开，第二电极140设置在发光功能层130的远离衬底基板01的一侧，第二电极140在隔断结构10013处连续设置。第二电极140位于主体部1001远离衬底基板01一侧的部分与第二电极140的位于开口1002内的部分连接为一体，并形成位于开口1002两侧的弯折区1401。例如，在同一个开口1002中，第二电极140的位于弯折区1401的部分的厚度小于第二电极140的位于开口1002中间部分的厚度。
例如，第二电极140的位于弯折区1401的部分的厚度小于第二电极140的位于主体部1001的远离衬底基板01一侧的部分的厚度，但不限于此。例如，第二电极140的位于弯折区1401的部分的厚度为第二电极140的位于主体部1001的远离衬底基板01一侧的部分的厚度的1/4-3/4。例如，上述尺寸可以为1/3-3/4。例如，上述尺寸可以为1/2-3/4。例如，上述尺寸可以为1/4-2/3。例如，上述尺寸可以为1/3-2/3。
由此，在图10C所示出的显示基板中，隔断结构10013的设置仅可将发光功能层130中的至少一个膜层断开，而不会破坏第二电极140的连续性，进而可以较好的保证相邻子像素之间的第二电极140正常连接。
需要说明的是，图10C所示出的第二电极140的连续状态仅是示意性的，在本公开的一些实施例中，根据工艺条件以及设计要求的不同，第二电极140的形态(例如，厚度)可以随之发生改变，对此不作限定。
图11为本公开一实施例提供的一种显示装置的示意图。
本公开的实施例还提供一种显示装置，包括上述任一显示基板。
如图11所示，该显示装置600包括显示基板500。显示基板500即为上述任一的显示基板。本公开的实施例中提及的显示基板，也可以称作显示面板。例如，显示基板可为柔性显示基板，但不限于此。
一方面，该显示基板(显示面板)通过在相邻的子像素之间设置隔断结构，并使得发光功能层中的至少一个膜层，例如，电荷产生层，在隔断结构所在的位置断开，从而避免导电性较高的膜层(例如，电荷产生层)造成相邻子像素之间的串扰。由此，包括该显示基板的显示装置因此也可避免相邻子像素之间的串扰，因此具有较高的产品良率和较高的显示品质。同时，通 过在显示基板(显示面板)中设置隔断结构，还可以增大发光元件的发光区面积，以增强显示效果。
另一方面，由于显示基板可在采用Tandem结构，以提高像素密度。因此，包括该显示基板的显示装置具有寿命长、功耗低、亮度高、分辨率高等优点。
例如，该显示装置可以为有机发光二极管显示装置等显示器件以及包括该显示装置的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本公开的实施例包括但不限于此。
图12至图20为本公开至少一个实施例所示的显示基板的制作方法流程示意图。
如图12至图20所示，本公开至少一个实施例还提供一种显示基板的制作方法，包括：在衬底基板01上形成平坦化层110；在平坦化层110上形成第一导电薄膜012，并对第一导电薄膜012进行构图，以形成第一电极120；在第一电极120上形成第二导电薄膜013，并对第二导电薄膜013进行构图，以形成牺牲结构150；在牺牲结构150上形成像素限定薄膜014，并对像素限定薄膜014进行构图以形成像素限定层100，像素限定层包括主体部1001和多个开口1002，每个开口1002可以暴露第一电极120的至少一部分；去除牺牲结构150，以使得主体部1001包括第一主体子部10011和第二主体子部10012，第一主体子部10011位于第二主体子部10012的靠近衬底基板01的一侧，第二主体子部10012相对于第一主体子部10011的突出，以在主体部1001中形成隔断结构10013；在像素限定层上依次形成发光功能层130和第二电极140，发光功能层130包括多个膜层，多个膜层中的至少一层在隔断结构10013处断开，隔断结构10013包括凹槽1004，发光功能层130延伸至凹槽1004中。
例如，如图12至图20所示，在衬底基板01上形成平坦化层110之前，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。例如，衬底基板01可以为柔性衬底基板。例如，形成衬底基板01可以包括在玻璃载板上依次形成叠设的第一柔性材料层、第一无机材料层、半导体层、第二柔性材料层和第二无机材料层。第一柔性材料层、第二柔性材料层的材料采用聚酰亚胺(PI)、聚对苯二甲酸乙二酯(PET)或经表面处理的聚合物软膜等材料。例如，第一无机材料层、第二无机材料层的材料采用氮化硅(SiNx)或氧化 硅(SiOx)等，用于提高衬底基板的抗水氧能力，第一无机材料层、第二无机材料层也称之为阻挡(Barrier)层。半导体层的材料采用非晶硅(a-si)。例如，以叠层结构PI1/Barrier1/a-si/PI2/Barrier2为例，其制备过程包括：先在玻璃载板上涂布一层聚酰亚胺，固化成膜后形成第一柔性(PI1)层；随后在第一柔性层上沉积一层阻挡薄膜，形成覆盖第一柔性层的第一阻挡(Barrier1)层；然后在第一阻挡层上沉积一层非晶硅薄膜，形成覆盖第一阻挡层的非晶硅(a-si)层；然后在非晶硅层上再涂布一层聚酰亚胺，固化成膜后形成第二柔性(PI2)层；然后在第二柔性层上沉积一层阻挡薄膜，形成覆盖第二柔性层的第二阻挡(Barrier2)层，最终完成衬底基板01的制备。
例如，如图12至图20所示，在衬底基板01上形成平坦化层110之前，显示基板的制作方法可以包括在衬底基板01上制备其他膜层011。参考图6所示出的衬底基板，其他膜层011可以包括驱动结构层，驱动结构层包括多个上述像素电路21。例如，形成驱动结构层可以包括在衬底基板01上依次沉积第一绝缘薄膜和有源层薄膜，通过构图工艺对有源层薄膜进行构图，形成覆盖整个衬底基板01的缓冲层0114，以及设置在缓冲层0114上的有源层图案，有源层图案至少包括有源层212。依次沉积第二绝缘薄膜和第一金属薄膜，通过构图工艺对第一金属薄膜进行构图，形成覆盖有源层212的第二绝缘层0113，以及设置在第二绝缘层0113上的第一栅金属层图案，第一栅金属层图案至少包括栅极211和第一极板310。依次沉积第三绝缘薄膜和第二金属薄膜，通过构图工艺对第二金属薄膜进行构图，形成覆盖栅极211的第三绝缘层0112，以及设置在第三绝缘层0112上的第二栅金属层图案，第二栅金属层图案至少包括第二极板320，第二极板320的位置与第一极板310的位置相对应。随后，沉积第四绝缘薄膜，通过构图工艺对第四绝缘薄膜进行构图，形成覆盖第二极板320的第四绝缘层0111，第四绝缘层0111上开设有至少两个第一过孔N1，两个第一过孔N1内的第四绝缘层0111、第三绝缘层0112和第二绝缘层0113被刻蚀掉，暴露出有源层图案的有源层212的表面。随后，沉积第三金属薄膜，通过构图工艺对第三金属薄膜进行构图，在第四绝缘层0111上形成源漏金属层图案，源漏金属层图案至少包括位于显示区域的源极210和漏极213。源极210和漏极213可以分别通过第一过孔N1与有源层图案中的有源层212连接。
例如，参考图6、图12至图20，缓冲层0114、第二绝缘层0113、第三 绝缘层0112和第四绝缘层0111采用硅氧化物(SiOx)、硅氮化物(SiNx)和氮氧化硅(SiON)中的任意一种或更多种，可以是单层、多层或复合层。例如，第一金属薄膜、第二金属薄膜和第三金属薄膜采用金属材料，如银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等。有源层图案采用非晶态氧化铟镓锌材料(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩、聚噻吩等一种或多种材料，即本公开适用于基于氧化物(Oxide)技术、硅技术以及有机物技术制造的晶体管。
例如，参考图6、图12至图14，在衬底基板01上形成平坦化层110包括：形成前述图案的衬底基板01上涂覆有机材料的平坦薄膜，形成覆盖整个衬底基板01的平坦(PLN，Planarization)层110，并通过掩膜、曝光、显影工艺，在显示区域的平坦层100上形成多个第二过孔N2。例如，多个第二过孔N2内的平坦层200被显影掉，分别暴露出多个子像素的像素电路的晶体管21的漏极213的表面。
例如，参考图6、图12至图14，在平坦化层110上沉积第一导电薄膜012，并对第一导电薄膜012进行构图，以形成第一电极120。例如，第一电极120通过平坦化层110中的第二过孔N2与晶体管21的漏极213连接。
例如，参考图12至图16，在第一电极120上形成第二导电薄膜013，并对第二导电薄膜013进行构图，以形成牺牲结构150。
例如，第一导电薄膜的材料包括导电的金属氧化物，第二导电薄膜的材料包括金属材料。例如，导电的金属氧化物包括氧化铟锡，金属包括铝或银。例如，第一导电薄膜或第二导电薄膜可以是单层结构，或者多层复合结构。
例如，牺牲结构150可以采用铝(Al)、银(Ag)以及钛(Ti)/铝(Al)/钛(Ti)形成的金属叠层中的任意一种。
例如，参考图12至图16，在形成第一电极120时，还包括通过构图工艺形成位于相邻第一电极120之间的第一间隔区1210。例如，第一间隔区1210可以将相邻子像素的第一电极120隔开。
例如，参考图6、图12至图16，在形成第一电极150时，还包括通过构图工艺形成位于相邻牺牲结构150之间的第二间隔区1510，沿X方向，第一间隔区1210在衬底基板01上的正投影落入第二间隔区1510在衬底基板上的 正投影中，且使得第二间隔区1510的最小尺寸大于或等于第一间隔区的最小尺寸，由此，可以使得第一主体子部10011在X方向上的最小尺寸大于第一间隔区1210的尺寸，以使得主体部1001的结构更加稳固。
例如，参考图6、图12至图16，对像素限定薄膜014进行构图后，形成的像素限定层100包括多个开口1002，沿相邻子像素的排列方向(即沿X方向)，开口1002的最小尺寸小于牺牲结构150的最小尺寸，并且开口1002在衬底基板01上的正投影落入牺牲结构150在衬底基板01上的正投影中。由此，可以使得在后续去除牺牲结构150后，在主体部1001中可以形成底切结构。在X方向上，例如，开口1002的最小尺寸可以是牺牲结构150的最小尺寸的50％-95％。例如，开口1002的最小尺寸可以是牺牲结构150的最小尺寸的60％-85％。例如，开口1002的最小尺寸可以是牺牲结构150的最小尺寸的70％-80％。
例如，参考图6、图12至图18，在形成像素限定层100时，还包括形成位于像素限定层100远离衬底基板一侧的支撑结构10016，其中，支撑结构10016在衬底基板01上的正投影与第二间隔区1510在衬底基板01上的正投影至少部分交叠。例如，支撑结构10016可以与主体部1001一体形成，并采用相同的材质，并被配置为在显示基板的蒸镀过程中支撑FMM(高精度掩膜板)。
例如，参考图6、图12至图19，第二导电薄膜013的厚度为第一导电薄膜012的厚度的1-3倍；像素限定薄膜014的厚度为第二导电薄膜013的厚度的3-8倍。也即，可以使得第一主体子部10011的厚度约为第一电极120的厚度的1-3倍，并使得主体部1001的厚度为牺牲结构150厚度的3-8倍。由此，可以根据实际的版图设计需求，使得主体部形成有效的隔断结构10013，以将发光功能层中的至少一个膜层断开。
例如，第二导电薄膜013的厚度为第一导电薄膜012的厚度的1.5-3倍；像素限定薄膜014的厚度为第二导电薄膜013的厚度的5-8倍。例如，第二导电薄膜013的厚度为第一导电薄膜012的厚度的1.5-2.5倍；像素限定薄膜014的厚度为第二导电薄膜013的厚度的4-7倍。例如，第二导电薄膜013的厚度为第一导电薄膜012的厚度的1.8-2.5倍；像素限定薄膜014的厚度为第二导电薄膜013的厚度的4.5-6.5倍。例如，第二导电薄膜013的厚度为第一导电薄膜012的厚度的2-2.5倍；像素限定薄膜014的厚度为第二导电薄膜013的 厚度的4.5-6.5倍。例如，第二导电薄膜013的厚度为第一导电薄膜012的厚度的2.5-3倍；像素限定薄膜014的厚度为第二导电薄膜013的厚度的5.5-7.5倍。
例如，参考图6、图12至图19，在形成牺牲结构150之后，并在去除牺牲结构150之前，制作方法还包括：对显示基板01进行热处理，以使得第一电极120晶化。
例如，参考图6、图12至图19，去除牺牲结构150可以采用湿刻工艺对牺牲结构150进行刻蚀去除。
例如，参考图6、图12至图19，对显示基板01进行热处理的过程中，第一电极120(例如，采用氧化铟锡的第一电极)将在高温下进行晶化，从而在后续去除牺牲结构150的过程中，可以减少被刻蚀溶液一并刻蚀去除的风险。
例如，参考图6、图12至图19，当第二导电薄膜013的材料采用铝或银等金属时，采用湿刻工艺对牺牲结构150进行刻蚀去除时可以使用酸性刻蚀液对由金属制成的中间膜层(即牺牲机构150)进行刻蚀。例如，酸性刻蚀液可以包括HNO 3(硝酸)等材料，但不限于此，本公开的实施例对此不作限定。
例如，参考图6、图12至图19，在去除牺牲结构150时，可根据实际的工艺要求，可以对牺牲结构150的去除时间和去除程度进行控制。例如，可以相对保留性的设置去除时间和去除程度，使得牺牲结构150也可以不完全被去除掉，而是可以具有一定的残留部90(如图5所示)，残留部90可以位于凹槽10014中，而不至于影响显示基板的发光性能。
例如，参考图6、图12至图19，形成发光功能层130时，发光功能层130的多个膜层中的至少一层在隔断结构10013处断开，一部分发光功能层130设置在主体部1001的远离衬底基板01的一侧，一部分发光功能层130位于开口1002中，并延伸至凹槽10014中。例如，第二电极140设置在发光功能层130的远离衬底基板的一侧，且第二电极140可以是在隔断结构10013处未断开的，以保证在相邻子像素10之间的连续性。
例如，参考图6、图12至图19，显示基板的制作方法还包括形成封装层41，即在第二电极140的远离衬底基板01的一侧依次形成第一封装层411、第二封装层412、以及第三封装层413，以使得显示基板具有良好的封装效果，防止水汽或杂质的侵入。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (20)

  1. 一种显示基板，包括：
    衬底基板；
    多个子像素，所述多个子像素中的每个子像素包括发光元件，所述发光元件包括发光功能层以及沿垂直于所述衬底基板的方向位于所述发光功能层两侧的第一电极和第二电极，所述第一电极位于所述发光功能层与所述衬底基板之间，所述发光功能层包括多个膜层；
    像素限定层，包括主体部及多个开口，所述开口由所述主体部所限定，所述开口暴露所述第一电极的至少一部分；以及
    平坦化层，设置在所述衬底基板和所述像素限定层之间，
    其中，所述主体部包括第一主体子部和第二主体子部，所述第一主体子部位于所述第二主体子部的靠近所述衬底基板的一侧，
    所述第二主体子部相对于第一主体子部突出，以形成隔断结构，所述多个膜层中的至少一层在所述主体部的隔断结构处断开，
    位于所述开口中的第一电极的远离所述衬底基板一侧的所述发光功能层在所述衬底基板上的正投影与位于所述主体部的远离所述衬底基板一侧的所述发光功能层在所述衬底基板上的正投影至少部分交叠。
  2. 根据权利要求1所述的显示基板，其中，对于同一个所述开口，所述像素限定层中的隔断结构沿所述开口的周向设置为不封闭的环形，相邻发光元件的所述第二电极在所述不封闭的环形的缺口处至少部分相连，
    所述不封闭的环形的缺口的长度为5-20微米。
  3. 根据权利要求1-2任一项所述的显示基板，其中，所述第二主体子部的至少部分侧面与平行于所述衬底基板的平面的最小坡度角为60度-90度。
  4. 根据权利要求1-3任一项所述的显示基板，其中，沿相邻子像素的排列方向，所述开口的最小尺寸为所述第一主体子部的最大尺寸的1.2-1.5倍。
  5. 根据权利要求1-4任一项所述的显示基板，其中，沿相邻子像素的排列方向，所述第一主体子部的最大尺寸为所述第二主体子部的最大尺寸的0.4-0.8倍；
    沿垂直于衬底基板01的方向，第一主体子部10011的最大尺寸N1为第二主体子部10012的最大尺寸N2的1-1.8倍。
  6. 根据权利要求1-5任一项所述的显示基板，其中，所述第一电极包括 晶化的导电的金属氧化物。
  7. 根据权利要求1-6任一项所述的显示基板，其中，所述发光功能层的位于所述第二主体子部远离所述衬底基板一侧的部分在所述衬底基板上的正投影，与所述发光功能层的位于所述开口中的部分在所述衬底基板上的正投影至少部分交叠。
  8. 根据权利要求1-7任一项所述的显示基板，其中，所述第二电极的位于所述第二主体子部远离所述衬底基板一侧的部分在所述衬底基板上的正投影，与所述第二电极的位于所述开口中的部分在所述衬底基板上的正投影至少部分交叠。
  9. 根据权利要求1-7任一项所述的显示基板，其中，
    所述隔断结构包括凹槽，所述发光功能层延伸至所述凹槽中；
    所述显示基板还包括残留部，所述残留部位于所述凹槽中，所述残留部在所述衬底基板上的正投影落入所述隔断结构在所述衬底基板上的正投影中。
  10. 一种显示装置，包括权利要求1-9任一项所述的显示基板。
  11. 一种显示基板的制作方法，包括：
    在衬底基板上形成平坦化层；
    在所述平坦化层上形成第一导电薄膜，并对所述第一导电薄膜进行构图，以形成第一电极；
    在所述第一电极上形成第二导电薄膜，并对所述第二导电薄膜进行构图，以形成牺牲结构；
    在所述牺牲结构上形成像素限定薄膜，并对所述像素限定薄膜进行构图以形成像素限定层，所述像素限定层包括主体部和多个开口，所述开口暴露所述第一电极的至少一部分；
    去除所述牺牲结构，以使得所述主体部包括第一主体子部和第二主体子部，所述第一主体子部位于所述第二主体子部的靠近所述衬底基板的一侧，所述第二主体子部相对于第一主体子部突出，以在所述主体部中形成隔断结构；
    在所述像素限定层上依次形成发光功能层和第二电极，所述发光功能层包括多个膜层，所述多个膜层中的至少一层在所述隔断结构处断开，
    所述隔断结构包括凹槽，所述发光功能层延伸至所述凹槽中。
  12. 根据权利要求11所述的制作方法，其中，
    形成所述第一电极包括：形成位于相邻第一电极之间的第一间隔区；
    形成所述牺牲结构包括：形成位于相邻牺牲结构之间的第二间隔区，沿相邻子像素的排列方向，使得所述第一间隔区在所述衬底基板上的正投影落入所述第二间隔区在所述衬底基板上的正投影中，且使得所述第二间隔区的最小尺寸大于或等于所述第一间隔区的最小尺寸。
  13. 根据权利要求11-12任一项所述的制作方法，其中，沿相邻子像素的排列方向，所述开口的最小尺寸小于所述牺牲结构的最小尺寸，并且所述开口在所述衬底基板上的正投影落入所述牺牲结构在所述衬底基板上的正投影中。
  14. 根据权利要求11-13任一项所述的制作方法，还包括：
    形成位于所述像素限定层远离所述衬底基板一侧的支撑结构，其中，所述支撑结构在所述衬底基板上的正投影与所述第二间隔区在所述衬底基板上的正投影至少部分交叠。
  15. 根据权利要求11-13任一项所述的制作方法，其中，
    所述第二导电薄膜的厚度为所述第一导电薄膜的厚度的1-3倍；
    所述像素限定薄膜的厚度为所述第二导电薄膜的厚度的3-8倍。
  16. 根据权利要求11-15任一项所述的制作方法，其中，所述第一导电薄膜的材料包括导电的金属氧化物，所述第二导电薄膜的材料包括金属。
  17. 根据权利要求16所述的制作方法，其中，
    所述导电的金属氧化物包括氧化铟锡；
    所述金属包括铝、银以及钛/铝/钛形成的金属叠层中的任意一种。
  18. 根据权利要求16-17任一项所述的制作方法，在形成所述牺牲结构之后，并在去除所述牺牲结构之前，所述制作方法还包括：
    对所述显示基板进行热处理，以使得所述第一电极晶化。
  19. 根据权利要求18所述的制作方法，其中，去除所述牺牲结构包括：
    采用湿刻工艺对所述牺牲结构进行刻蚀去除。
  20. 根据权利要求19所述的制作方法，其中，所述第二导电薄膜的材料包括金属，所述采用湿刻工艺对所述牺牲结构进行刻蚀去除包括：使用酸性刻蚀液对由所述金属制成的中间膜层进行刻蚀。
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