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Definitions

• the available step moves down the steps. Holes are formed when electrons in atoms move out of the valence band of the atom (typically the outermost electron shell completely filled with electrons) into the conduction band (the area in an atom where electrons can escape easily), which typically happens everywhere in a semiconductor.
• Nc is the net concentration of carriers.
• ND is the concentration of electrically active donor impurity atoms.
• NA is the concentration of electrically active acceptor impurity atoms.
• Nc is negative for a p-type material signifying a lack of electrons.
• crystal generally refers to the structure that is initially grown and then removed from the growth apparatus.
• ingot generally refers to a crystal that has had one, or both, of its ends processed, e.g., flattened.
• boule generally refers to an ingot that has been further processes, e.g., a flat formed on the boule, and is ready for the wafering processes (i.e., fabrication of wafers from the boule).
• crystals are grown in vapor deposition apparatus using a vapor deposition processes, and in particular a PVT apparatus and processes.
• SiC wafers are formed by cutting the wafers generally transverse to the c-axis (growth axis) of a larger crystal, e.g., a boule.
• the wafers can be on the growth axis (i.e., on axis) or a few degrees of this axis (i.e., off axis), typically, for off axis wafers, about 0.1 to about 5 degrees off the growth axis.
• the wafers can have a thickness of from about 80 mhi to about 600 mhi, and a diameter of from about 50 mm to about 250 mm, with diameters of about 150 mm being preferred.
• the SiC wafers When cut on, or slightly off axis, typically have a carbon face or surface and a silicon face or surface. Wafers may also be cut along the growth axis, and in any other orientation to the growth axis.
• the present inventions solves these long-standing needs, by providing formulations, methods and apparatus to obtain p-type SiC materials and semiconductor devices utilizing those p-type SiC materials.
• a low resistivity n-type boule having a diameter from about 4” (100 mm) to about 6” (150 mm); and a height from about 1” (25 mm) to about 6” (150 mm) and comprising donor atoms, wherein the donor atoms consist essentially of phosphorous.
• pNc negative potential net carrier concentration
• compositions, materials, crystals, boules and wafers having one or more of the following features: further having a polytype selected from the group consisting of 4H and 6H; wherein the wafer is a uniformly doped wafer; wherein the boule is a uniformly doped boule; wherein the acceptor atoms comprise, aluminum, boron, or a combination of aluminum and boron; wherein the wafer has an NA of at least 10 18 /cm 3 ; wherein the wafer has an NA from 1018/cm 3 to about 10 2 °/cm 3 ; wherein the wafer has an NA from 10 18 /cm 3 to 10 21 /cm 3 ; further having an orientation of ⁇ 0001>+/-0.5 degrees; further having a bow of ⁇ 40 mhi; further having a warp of ⁇ 60 mhi; further having a TTV of ⁇ 15 mhi; further having a SBIR (LTV) (10mm
• a semiconductor device comprising or built on these wafers, or a portion of these wafers.
• FIG. 13 is a schematic cross sectional schematic view of an embodiment of an IGTB device utilizing a p-type SiC wafer in accordance with the present inventions.
• embodiments of the present inventions relate to hexagonal p-type SiC crystals, including ingots, boules and wafers, processes to make those p-type items, and devices that are made from, or based upon, those p-type wafers.
• the present inventions relate to low resistivity SiC crystals, including ingots, boules, and wafers, processes to make those items, and devices that are made from, or based upon, those wafers.
• the present inventions relate to n-type and p-type SiC wafers having resistivities of 0.010 ohm-cm and less, and preferably resistivities of 0.005 ohm-cm and less.
• These low resistivity wafers can be p-type or n-type wafers.
• these low resistivity wafers have cubic or hexagonal crystalline structures, each of which are also p-type or n-type wafers.
• Preferred PDCs are “polysilocarb” materials, which are PDC materials containing silicon (Si), oxygen (O) and carbon (C). Polysilocarb materials and methods of making those materials are disclosed and taught in US Patent Nos. 9,815,943, 9,657,409, 10,322,936, 10,753,010, 11 ,014,819 and 11 ,091 ,370 and US Patent Publication No. 2018/0290893, the entire disclosures of each of which are incorporated herein by reference.
• the predetermined placement of the dopant is not uniform, but results in the uniform distribution of the dopant in the SiC crystal.
• a matrix of Si, C and atomic impurities e.g., donor atoms, acceptor atoms, or both.
• the doped shaped change is this a porous matrix of Si, C and the atomic impurities, where the matrix holds the atomic impurities, fixes the atomic impurities or both.
• the starting material for the vapor deposition process e.g., PVT, to grow a p-type crystal has a dopant selected from one or more of the elements from selected from Group 13 (Boron, et al) of the periodic table.
• the dopant is covalently bonded to the Si, the C or both of the source material, and is uniformly distributed thought out the source material.
• the starting material is configured as a shaped charged, with the dopant distributed in a predetermined manner throughout the shaped charged, e.g., uniformly, layers of varied concentrations, etc.
• the vapor deposition process is then carried out using this source material, for example, as described in the subsection “Crystal Growth - Generally” of this Specification.
• the vacuum evacuation is completed to a pressure below 1x10 5 Torr prior to re-pressurizing with inert gas.
• the vacuum evacuation process can be completed anywhere from zero to >4 times before proceeding.
• the furnace, containers, handling equipment, and other components of the curing apparatus are clean, essentially free from, free from and do not contribute any elements or materials, that would be considered contaminants, to the pyrolized material.
• the dopant materials that, for example, provide aluminum in the source material, which can then provide aluminum atomic electrically active impurities into the SiC crystalline structure are generally: reactive aluminum materials; non-reactive aluminum materials; and pure alumina materials.
• reactive aluminum materials are added to the liquid precursor materials (e.g., a precursor formulation) and then chemical react with those precursor materials during the curing step.
• Reactive aluminum materials include for example:
• Nitrogen containing or providing materials can be added to the liquid precursor materials (e.g., a precursor formulation).
• Such dopants would include amines; amides; azo & diazo; carbamates; urethanes; carboimides; heterocycles of C and N; ureas; isocyanates; as potential candidate functional groups to incorporate.
• Nylons or other N-containing carbon based polymers could also be added to the formulation to react during pyrolysis. However, it should be noted that the addition of too great an amount of nitrogen introduces undesirable stress, stacking faults and related defects to the crystals.
• co-dopants sources of N and P
• cyclophosphazene compounds are cyclophosphazene compounds, polyphosphazene compounds, and hexachlorotriphosphazene compounds.
• These co-dopants are added to the liquid precursor materials (e.g., a precursor formulation) and then chemical react with those precursor materials during the curing, pyrolysis or both steps.
• These materials having the dopant or electrically active impurity essentially uniformly distributed (i.e., less than 10% variation, top to bottom, side to side, as described generally above) throughout the materials will be referred to herein as a “uniform p-type SiC” wafer, ingot, crystal or boule.
• These uniform p-type SiC crystals, ingot, boules, and wafers also include p+ and p- types.
• the radius of curvature (i.e., the reciprocal of the curvature) of the tail can be at least about 6 inches, at least about 8 inches, at least about 20 inches, at least about 60 inches, and approaching infinite (i.e., planar), as well as all values within the range of these values.
• the radius of curvature (i.e., the reciprocal of the curvature) would be at least about 10 inches, at least about 15 inches, at least about 25 inches, at least about 60 inches, and approaching infinite (i.e., planar), as well as all values within the range of these values.
• the seed crystal may have the same type and amount of doping as intended to be found in the crystal that is grown on the seed crystal 1800.
• the see crystal 1800 has a surface 1802a.
• the seed crystal 1802 has a cross section or diameter 1822 and a height 1823.
• the seed crystal can be mounted on a movable platform 1803 to adjust the distance between surface 1802a and surface 1823.
• Surface 1802a must be kept at a temperature that is cool enough to cause the gaseous silicon carbon species and dopant atomic impurities to deposit out on its surface forming a doped SiC crystal.
• the seed crystal 1802 is grown into a p-type, or n-type or p-type low resistivity, SiC crystal by continuously adding grown SiC with dopant(s) in polytype-matched orientation onto its surface.
• device 1803 which is shown in the fully retracted position
• surface 1803 will grow toward the bottom 1809, and thus, decrease the distance between surface 1802a and the bottom 1809.
• a volumetric shape and its predetermined gradient could allow some heavier impurities to be trapped behind in the bottom of the growth chamber within the structure of the volumetric shape, while the lighter elements are sublimed along with the Si-C vapor and are carried to the seed. This theoretically provides the ability to have dopants or other additives release at predetermined times in the process or growth cycle.
• the shaped charge provides for a more consistent rate of flux formation for a given temperature.
• the shape of the shaped charge can be tailored to provide a more uniform temperature throughout the shape, allowing for a higher volume fraction of the shape to be subliming at once, driving higher rates of flux at the seed/vapor interface at a given temperature than a standard pile of powder or cylindrical shape of powder.
• growth of polytypes which require a lower temperature growth processes will not be limited to slower growth rates as a consequence.
• Embodiments provide for the distribution of different stoichiometry, binder content, dopant content and both of powder throughout the shape, e.g., layers, zones, areas having different types of powder starting material, different binders, and combinations and variations of these.
• This predetermined distribution of different stoichiometries, binder content and both provide several advantages, including: customization of the sublimation composition as the source material is consumed from the outside in, which enables less shift in composition from beginning to end of the growth cycle.
• This predetermined distribution of different stoichiometries, binder content and both can also enhance polytype stability because of the consistent composition of the vapor.
• Embodiments of the alpha category of polysilocarb derived p-type SiC or low resistivity SiC typically contains hexagonal (H), rhombohedral (R), trigonal (T) structures and may contain combinations of these.
• the beta category typically contains a cubic (C) or zincblende structure.
• polytypes of polysilocarb derived p-type SiC or low resistivity SiC would include: 3C-SiC ( b - SiC or b 3C-SiCJ, which has a stacking sequence of ABCABC... ; 2H-SiC, which has a stacking sequence of ABAB...
• SiC n- type wafers Due to the prior limitations of the SiC industry to commercialize p-type SiC crystals and wafers, and only commercialize n-type, nitrogen doped SiC crystals and wafers, the best-known methods for fabricating SiC wafers suitable for use in manufacturing semiconductor device are based on SiC n- type wafers, and can be used for the fabrication of p-type, n-type low resistivity, and p-type low resistivity wafers.
• Embodiments of the present methods and resultant cut and polished p-type SiC or low resistivity SiC wafers may also include being used to initiate the growth of a boule, (i.e., as the “seed”) from which the rest of the grown boule matches the structure.
• the p-type SiC or low resistivity SiC wafer, or p-type SiC or low resistivity SiC seed can be, among others, about 2-inch diameter wafers and smaller, about 3-inch diameter wafers, about 4- inch diameter wafers, about 5-inch diameter wafers, about 6-inch diameter wafers, about 7-inch diameter wafers, about 12-inch diameter wafers and potentially larger, wafers having diameters from about 2 inches to about 8 inches, wafers having diameters from about 4 inches to about 6 inches, square shaped, round shaped, and other shapes, surface area per side of about 4 square inches, about 8 square inches, about 12 square inches, about 30 square inches, about 50 square inches, and larger and smaller, a thickness of about 100 mhi, a thickness of about 200 mhi, a thickness of about 300 mhi, a thickness of about 500 mhi, a thickness of about 1500 mhi, a thickness of about 2500 mhi, a thickness from about 50 mhi to about
• Embodiments of the present p-type SiC or low resistivity SiC boules, p-type SiC or low resistivity SiC wafers, and the microelectronics fabricated from those wafers find applications and utilizations in among other things, diodes, broad band amplifiers, military communications, radar, telecom, data link and tactical data links, satcom and point-to-point radio power electronics, LEDs, lasers, lighting and sensors. Additionally, these embodiments can find applications and uses in transistors, such High- electron-mobility transisitors (HEMT), including HEMT-based monolithic microwave integrated circuit (MMIC) and IGBTs.
• HEMT High- electron-mobility transisitors
• MMIC monolithic microwave integrated circuit
• transistors can employ a distributed (traveling-wave) amplifier design approach, and with SiC’s greater band gap, enabling extremely wide bandwidths to be achieved in a small footprint.
• embodiments of the present inventions would include these devices and articles that are made from or otherwise based upon the present methods, vapor deposition techniques, and polymer derived SiC, SiC boules, SiC wafers and the microelectronics fabricated from these wafers.
• the embodiments of the present inventions can have, or utilize, one or more of the embodiments, features, functions, parameters, components, processes or systems set forth in the Precursors & Source Materials - Generally, Dopant Materials - Generally, Doped Crystal Growth - Generally, P- and Low Resistivity Type Wafers - Generally, and P-Type Devices - Generally teachings of this Specification, as well as, one or more of the embodiments, features, functions, parameters, components, processes or systems in the examples and figures. [00285] Examples
• Example 1C The cured volumetric shape of Example 1C is pyrolized, as set forth in Table 4, to provide an Al doped SiC shape charge source material, for use in PVT growth of a p-type SiC crystal.
• triallylphosphine is added to the liquid pressor formulation (1% to 15% by weight triallylphosphine to precusor formulation) and may also be added with the binder (1% to 15% by weight triallylphosphine to the P doped SiC powder and binder) to form the cured P doped SiC volumetric shape, which is then pyrolized to form the P doped SiC shaped charge source material.
• the P doped SiC shaped charge source material is for use in PVT growth of a low resistivity n-type SiC crystal.
• FIG. 6 there is shown a schematic of a P- channel E-MOSFET device 600 using a p-type SiC wafer.
• the device 600 has a gate 612, a metal electrode 605, a metal oxide layer 604.
• the device 600 has a source 609, a drain 608, and a body 610.
• a circuit 611 is formed between source 609 and body 610.
• the source 609 is connect through a metal electrode to an p-type SiC 602.
• the drain 608 is connected through a metal electrode to an p-type SiC 603.
• the p-type SiC 602, 603 are made from a p-type wafer cut from p-type boule.
• the device 600 has an n-type substrate 601.
• a metal oxide layer 607 is adjacent to the n-type substrate 601.
• the body 610 is connected through an electrode 607 to the n-type substrate 601.
• a lower resistivity SiC wafer provides significant advantages when used to produce devices by eliminating the need for costly processing steps of (e.g., grinding or thinning the SiC substrate) while the same time requiring minimal, and preferably not requiring any, design changes to the circuitry.
• a lower resistivity SiC wafer also having a resistivity of between 1 and 5 milliohm-cm.
• the prior 4H silicon carbide p-type material, which were grown as an epitaxial layer on a substrate (which was typically an n-type SiC), that were available to fabricate n-channel IGBTs generally lack both the quality and conductivity to work well in the IGBT, and in particular, lack both the quality and conductivity to work as a commercially acceptable IGBT.
• the present inventions addresses and solves this problem by providing the p-type SiC wafers that are cut from p-type SiC boules, which wafers provide the ability to make commercially acceptable and operable SiC IGBT devices.

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• Chemical Kinetics & Catalysis (AREA)
• Crystals, And After-Treatments Of Crystals (AREA)
• Insulated Gate Type Field-Effect Transistor (AREA)

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• 2022
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