WO2023221746A1 - 一种基于pcb城堡板的基站射频电路的制作方法 - Google Patents

一种基于pcb城堡板的基站射频电路的制作方法 Download PDF

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Publication number
WO2023221746A1
WO2023221746A1 PCT/CN2023/090251 CN2023090251W WO2023221746A1 WO 2023221746 A1 WO2023221746 A1 WO 2023221746A1 CN 2023090251 W CN2023090251 W CN 2023090251W WO 2023221746 A1 WO2023221746 A1 WO 2023221746A1
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Prior art keywords
board
pad
power amplifier
radio frequency
pcb
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PCT/CN2023/090251
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English (en)
French (fr)
Inventor
陈树波
陈传友
闫书保
杜德棚
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广东省新一代通信与网络创新研究院
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Publication of WO2023221746A1 publication Critical patent/WO2023221746A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R4/00—Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation
    • H01R4/02—Soldered or welded connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
    • H01R43/02—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for soldered or welded connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps

Definitions

  • the present invention relates to the technical field of PCB castle boards, and in particular to a method of manufacturing a base station radio frequency circuit based on PCB castle boards.
  • the single-chip Transceiver integrates multi-channel transceivers, that is, each base station equipment requires multiple antennas to achieve 2T2R, 4T4R or more, and the signal transmission quality requirements are high.
  • the digital intermediate frequency circuit in the radio frequency hardware circuit needs to be connected to a high-power power amplifier circuit, the high-power power amplifier circuit can easily interfere with the small-signal digital intermediate frequency circuit. Therefore, most current base station systems use high-power amplifier circuits and digital intermediate frequency circuits through castle boards to independently design the functional modules in a single large board into small unit daughter boards, and install them with the larger motherboard through one welding. Union.
  • the castle board will jump due to the pad size, stress, board material and trace width of the motherboard, which will cause impedance jumps at the docking point of the daughter motherboard, which will lead to radio frequency quality such as insertion loss and Reflection and other indicators become worse, which greatly affects the quality of signal transmission.
  • the technical problem to be solved by the present invention is to provide a method for manufacturing a base station radio frequency circuit based on a PCB castle board, which can find the entire
  • the optimal welding method of the PCB castle board pad, the optimal RF routing, and the optimization of RF indicators can solve the pain points and difficulties of the existing castle solution for 5G base stations and meet the needs of large base station coverage, large bandwidth, high capacity, and low latency. Extension and other rigid requirements.
  • the first aspect of the present invention discloses a method for manufacturing a base station radio frequency circuit based on a PCB castle board.
  • the radio frequency circuit includes a digital intermediate frequency board and a plurality of power amplifier boards.
  • the method includes: providing a digital intermediate frequency board Cover the first pad with the patch; cover the second pad with via holes for the power amplifier board, wherein the microstrip trace between the top device of the power amplifier board and the second pad is a directly connected circle arc; align and fit the joint between the first pad of the digital IF board and the second pad of the power amplifier board; heat the joint to achieve radio frequency circuit welding of the PCB castle board.
  • the width of the microstrip trace between the top device of the power amplifier board and the second bonding pad is consistent with the width of the second bonding pad.
  • covering the second pad with the via hole for the power amplifier board includes: starting from the contact point of the second pad of the power amplifier board and the microstrip trace, along the length direction of the second pad, The width of the via hole of the second bonding pad is rounded and arc proportionally reduced to the end of the second bonding pad. The hole wall width of the via.
  • covering the first pad with the patch for the digital IF board includes: starting from the contact point of the first pad of the digital IF board and the microstrip trace, along the length of the first pad direction, the patch width of the first pad is rounded and arc proportionally reduced to the width of the microstrip trace.
  • the radius of the rounding corner is determined through simulation calculation to determine the optimal radius of the rounding corner; the optimal radius of the rounding corner is used to reduce the arc proportion.
  • covering the second pad with the via hole for the power amplifier board then includes: performing a PCB layout of devices and wiring on the power amplifier board and outputting the power amplifier board parameter information;
  • the above-mentioned digital IF board performs PCB layout of devices and wiring and outputs digital IF board parameter information.
  • the method further includes: performing simulation verification on the laid out power amplifier board and digital intermediate frequency board; and connecting the first soldering pad of the digital intermediate frequency board that has passed the simulation verification to the second soldering pad of the power amplifier board.
  • the butt joints of the disks are aligned and heated to achieve RF circuit welding of the PCB castle board.
  • performing simulation verification on the laid out power amplifier board and digital IF board includes using wave port modeling and simulation based on the power amplifier board parameter information and the digital IF board parameter information.
  • the layout of the power amplifier board and the digital intermediate frequency board is simulated and verified, and then includes: simulating the force on the power amplifier board and the digital intermediate frequency board, and determining whether the power amplifier board and the digital intermediate frequency board are under force to change the power amplifier. Board parameter information and digital IF board parameter information; iterative simulation is performed based on the judgment results; wherein, the power amplifier board parameter information and digital IF board parameter information include pad variable information and pad shape variable information.
  • a second aspect of the present invention discloses a 4T4R base station radio frequency circuit board.
  • the base station radio frequency circuit board includes: a digital intermediate frequency board and four power amplifier boards made by using the above-mentioned production method of a base station radio frequency circuit based on a PCB castle board. .
  • the implementation of the present invention can be used to analyze the structure of the power amplifier board and the digital intermediate frequency board, the radio frequency wiring of the castle board, and the force of the pad one by one, and start from the radio frequency quality factors that affect the impedance jump at the docking point to find the quality of the entire PCB castle board pad.
  • the optimal welding method, optimal RF routing, and optimized RF indicators can solve the pain points and difficulties of the existing castle solution for 5G base stations and meet rigid requirements such as large base station coverage, large bandwidth, high capacity, and low latency.
  • Figure 1 is a schematic flow chart of a manufacturing method of a base station radio frequency circuit based on a PCB castle board disclosed in an embodiment of the present invention
  • Figure 2 is a schematic diagram of the structure of the power amplifier board and the position of the second pad of a base station radio frequency circuit based on a PCB castle board disclosed in an embodiment of the present invention
  • Figure 3 is a schematic diagram of the motherboard and daughter board pad docking wiring design of a base station radio frequency circuit based on a PCB castle board disclosed in an embodiment of the present invention
  • Figure 4 is a schematic flowchart of a manufacturing method for a base station radio frequency circuit based on a PCB castle board disclosed in an embodiment of the present invention
  • Figure 5 is a schematic structural diagram of a 4T4R base station radio frequency circuit board disclosed in an embodiment of the present invention.
  • the embodiment of the present invention discloses a method for manufacturing a base station radio frequency circuit based on a PCB castle board, which can analyze the structure of the power amplifier board and the digital intermediate frequency board, the radio frequency wiring of the castle board, and the force of the pad one by one, from the influence of the docking point.
  • a method for manufacturing a base station radio frequency circuit based on a PCB castle board which can analyze the structure of the power amplifier board and the digital intermediate frequency board, the radio frequency wiring of the castle board, and the force of the pad one by one, from the influence of the docking point.
  • the optimal welding method of the entire PCB castle board pad, the optimal radio frequency routing, and optimize the radio frequency indicators so as to solve the pain points and difficulties of the existing castle solution of the 5G base station and meet the needs of the base station.
  • Rigid requirements include large coverage, large bandwidth, high capacity, and low latency.
  • FIG. 1 is a schematic flowchart of a method for manufacturing a base station radio frequency circuit based on a PCB castle board disclosed in an embodiment of the present invention.
  • the manufacturing method of the base station radio frequency circuit based on the PCB castle board can be applied to the 5G base station system.
  • the embodiment of the present invention does not limit the application of the manufacturing method of the base station radio frequency circuit based on the PCB castle board.
  • the manufacturing method of the base station radio frequency circuit based on the PCB castle board may include the following operations:
  • the radio frequency circuit includes a digital IF board and multiple power amplifier boards.
  • the digital IF board can be used as a master board, and the multiple power amplifier boards can be used as daughter boards.
  • the digital IF board is mainly composed of four parts, including the power supply part of the whole machine, the digital processing part, the RF small signal part and the PA peripheral part.
  • the digital processing part can include monitoring and management, baseband signal processing, clock, interface, on-board Power supply and other modules suitable for base station processing; in the RF small signal part, it mainly includes a 4-channel transceiver, PA driver stage, and RX small signal part.
  • the power amplifier board adopts two-stage cascade amplification, and the final stage adopts Doherty power amplifier tube, which can output up to 100W.
  • the top layer of the motherboard of the digital IF board is covered with the first pad of the patch, which can be achieved by covering the surface of the pad with solder.
  • the power amplifier board is covered with a second soldering pad having a via hole.
  • the surface of the soldering via hole of the second soldering pad is covered with solder, and the soldering via hole may have a metallized hole wall.
  • the power amplifier board directly confirms the size and placement of the via pad, that is, the second pad, based on the structural dimensions of the entire radio frequency circuit, without much consideration of the impact of the second pad on the entire circuit board.
  • a 50-ohm microstrip line is used to connect the second pad and the RF device circuit.
  • the inventor discovered that the problem caused by this is that the length and width of the pad are different from the width of the 50-ohm microstrip line.
  • the impedance of the pad is not 50 ohms in the designed frequency band.
  • the microstrip The connection between the tape trace and the pad is often not a straight line. For example, it will appear to be a 135° trace with the pad. Both of these aspects will affect the trace impedance jump.
  • the inventor conceives to route the microstrip between the top device of the power amplifier board and the second pad as a directly connected arc line. In other preferred embodiments, the top device of the power amplifier board is also connected to the second pad.
  • the width of the microstrip trace between the pads is consistent with the width of the second pad.
  • the width of the microstrip trace between the top device of the power amplifier board and the pad is set to W1 (50 ohms), and Keep the width of the second pad at the same value as W1. This design method can ensure the consistency of the impedance and ensure that the microstrip trace will not affect the signal transmission quality.
  • the second pad of the power amplifier board has a metallized hole wall during welding, from the power amplifier board to the digital intermediate frequency board.
  • the signal needs to pass through the hole wall, so the impedance changes will occur, and the top and bottom surfaces of the power amplifier board pad have the same radio frequency signal.
  • the top and bottom surfaces of the second pad are connected through the metallized hole wall.
  • the radio frequency signal It no longer belongs to the microstrip trace at the pad, and the line width cannot be calculated through the microstrip trace.
  • the effects of these two aspects are generally ignored or simply add discrete components to the power amplifier board and digital IF board to adjust the matching.
  • this processing method still causes impedance jumps at the joint between the power amplifier board and the digital IF board, and will lead to a long debugging cycle.
  • the inventor conceived the idea of rounding the second bonding pad into an arc instead of the existing rectangular parallelepiped pad through-hole method. Specifically, it can be implemented as shown in Figure 2, starting from the contact point between the second pad of the power amplifier board and the microstrip trace, along the length direction of the second pad, The width of the via hole is reduced in proportion to the radius of the rounding arc to the width of the hole wall of the via hole at the end of the second pad.
  • the digital IF board is a motherboard
  • impedance analysis can be performed directly through microstrip traces, and there will be
  • the width of the 50-ohm microstrip line between the RF device circuit of the daughter board and the second pad is different from the width of the patch pad, causing impedance jump problems.
  • it is the same as the above-mentioned power amplifier board processing.
  • the width of the digital IF board patch pad is the same as the width of the pad end connected to the power amplifier board.
  • the proportion of the arc is gradually reduced by gradually rounding, until the width of the 50-ohm microstrip line between the sub-board RF device circuit and the pad is reached.
  • the shape of the butt joints of the castle board pads can be replaced, and the above-mentioned first pad and the second pad are replaced from the original rounding arc changes to not rounding, but only rounding. Arc changes, thereby reducing process complexity.
  • the above-mentioned rounding radius of the power amplifier board and digital intermediate frequency board is determined through simulation calculation.
  • the simulation calculation method can be implemented using existing simulation software, and then the optimal rounding radius is used. The radius is reduced proportionally to the arc.
  • the PCB design layout of the power amplifier board can be prioritized, that is, the power amplifier board is first designed with components and The PCB layout of the wiring outputs the parameter information of the power amplifier board, and then the digital IF board is processed according to the parameter information of the power amplifier board.
  • the PCB layout of the wiring outputs the parameter information of the digital IF board to complete the layout and placement of important components.
  • the output parameter information of the power amplifier board and digital intermediate frequency can include the PCB board width, butt pad size and position, as shown in Figure 3, the pad butt bus design diagram of the motherboard and the daughter board.
  • the first pad of the digital IF board motherboard designed through the above steps is aligned and bonded with the second pad of the power amplifier board, and the bonded first pad and the second pad remain aligned up and down.
  • the joint is heated so that the solder of the first pad and the second pad at the joint melts and infiltrates the first pad and the second pad. 2. Weld the through holes. After cooling, the welding of the RF circuit of the entire PCB castle board is completed.
  • the method disclosed in this embodiment can effectively ensure the impedance continuity of the castle board motherboard and daughter board docking RF traces, greatly reducing the occurrence of impedance jumps; it can also optimize the motherboard and daughter board docking trace RF indicators - insertion loss and return Minimize loss, improve the data transmission quality of the base station system; weapon, improve the welding reliability of the castle board motherboard and daughter board, the pad adopts arc transition type, reducing the impact of pad size, force and plate material on RF indicators.
  • the motherboard and daughter board can be separated to facilitate fault location and troubleshooting, reduce the interference of large RF signals to small signals, and shorten the debugging cycle of pad butt impedance matching. It can also optimize radio frequency indicators to reduce the external radiation of macro base stations, causing electromagnetic environmental pollution, and optimize radio frequency indicators, which greatly improves the working efficiency of the complete power amplifier, improves product reliability, and greatly reduces power consumption under the same power.
  • FIG. 4 is a schematic flow chart of another method for manufacturing a base station radio frequency circuit based on a PCB castle board disclosed in an embodiment of the present invention.
  • the production method of the base station radio frequency circuit based on the PCB castle board can be applied to the 5G base station system.
  • the manufacturing method of the base station radio frequency circuit based on the PCB castle board may include the following operations:
  • wave port modeling simulation can be used to determine the feasibility based on the parameter information of the power amplifier board and the parameter information of the digital IF board.
  • the parameter information of the power amplifier board and the parameter information of the digital IF board please refer to the following table:
  • the force on the power amplifier board and the digital IF board is also simulated, and it is judged whether the power amplifier board and the digital IF board are under force, and the parameter information of the power amplifier board and the digital IF board are changed; iterative simulation is performed based on the judgment results.
  • the power amplifier board parameter information and the digital IF board parameter information both include pad variable information and pad shape variable information.
  • the joints of the first pad of the digital IF board and the second pad of the power amplifier board which have passed the above simulation verification, are aligned and bonded and heated to achieve RF circuit welding of the PCB castle board.
  • FIG. 5 is a schematic structural diagram of a 4T4R base station radio frequency circuit board disclosed in an embodiment of the present invention.
  • the base station RF circuit board includes:
  • a digital IF board and four power amplifier boards are manufactured using the method of Embodiment 1 or Embodiment 2 mentioned above. It can be seen that the digital IF board is used as a master board and welded to the four power amplifier board sub-boards, and base station requirements that meet the requirements of 4T4R can be realized. In other embodiments, one digital intermediate frequency board and two power amplifier boards can also be used to meet the base station requirements that meet 2T4R requirements, or other base station requirements.
  • the present invention does not limit the connection structure of the digital intermediate frequency board and the power amplifier board.
  • modules described as separate components may or may not be physically separated.
  • the components shown as modules may or may not be physical modules, that is, they may be located in a place, or can be distributed to multiple network modules. You can select some or all of the modules according to actual needs to implement this implementation.
  • the purpose of the example program Persons of ordinary skill in the art can understand and implement the method without any creative effort.
  • the manufacturing method of a base station radio frequency circuit based on a PCB castle board disclosed in the embodiment of the present invention is only a preferred embodiment of the present invention, and is only used to illustrate the technical solution of the present invention.
  • Limitation thereof although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art will understand that they can still modify the technical solutions recorded in the foregoing embodiments, or modify some of the technical features. Equivalent substitutions; and these modifications or substitutions do not deviate from the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

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  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
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Abstract

本发明公开了一种基于PCB城堡板的基站射频电路的制作方法，射频电路包括数字中频板和多个功放板，该方法包括：为数字中频板覆盖具有贴片的第一焊盘；为功放板覆盖具有过孔的第二焊盘，其中，功放板的顶层器件与第二焊盘之间的微带走线为直连圆弧线；将数字中频板的第一焊盘与所述功放板的第二焊盘的对接处对准贴合；对对接处进行加热实现PCB城堡板的射频电路焊接。根据本发明公开的方法能够解决5G基站现有城堡方案存在的的痛点难点问题，满足基站覆盖范围大、大带宽高容量、低时延等刚性要求。

Description

一种基于PCB城堡板的基站射频电路的制作方法 技术领域
本发明涉及PCB城堡板技术领域，尤其涉及一种基于PCB城堡板的基站射频电路的制作方法。
背景技术
随着5G网络的大规模应用，对基站提出了覆盖范围大、宽带宽高容量、低时延等刚性要求，其基站设备建设特点是更大的带宽，更高的频段，更高的功率，单片Transceiver集成多通道收发器，也即每个基站设备需要多根天线来实现2T2R、4T4R或者更多，信号传输质量要求高，这些方面大大增加基站设备内部印制板电路设计复杂度，尤其是射频硬件电路，射频硬件电路设计的水平决定射频指标的好坏。由于射频硬件电路中的数字中频电路需要连接大功率功放电路，但是大功率功放电路容易干扰小信号的数字中频电路。由此，目前大部分基站系统是将大功率功放电路、数字中频电路通过城堡板将单个大板中的功能模块独立设计成小单元的子板，并与较大的母板通过一次焊接进行装联。
但是，在实际使用中，城堡板会因子母版的焊盘大小、受力、板材及走线宽度跳变，而导致子母版的对接处存在阻抗跳变，进而导致射频质量如插损及反射等指标变差，大大影响信号传输质量。
发明内容
本发明所要解决的技术问题在于，提供一种基于PCB城堡板的基站射频电路的制作方法，能够通过对功放板和数字中频板结构、城堡板的射频走线、焊盘受力分析，寻找整个PCB城堡板焊盘的最优焊接方式，射频最优走线，优化射频指标，从而达到解决5G基站现有城堡方案存在的的痛点难点问题，满足基站覆盖范围大、大带宽高容量、低时延等刚性要求。
为了解决上述技术问题，本发明第一方面公开了一种基于PCB城堡板的基站射频电路的制作方法，所述射频电路包括数字中频板和多个功放板，所述方法包括：为数字中频板覆盖具有贴片的第一焊盘；为功放板覆盖具有过孔的第二焊盘，其中，所述功放板的顶层器件与所述第二焊盘之间的微带走线为直连圆弧线；将所述数字中频板的第一焊盘与所述功放板的第二焊盘的对接处对准贴合；对所述对接处进行加热实现PCB城堡板的射频电路焊接。
在一些实施方式中，所述功放板的顶层器件与所述第二焊盘之间的微带走线宽度与所述第二焊盘的宽度一致。
在一些实施方式中，为功放板覆盖具有过孔的第二焊盘包括：从功放板的第二焊盘与微带走线的接触点开始，沿着所述第二焊盘的长度方向，将所述第二焊盘的过孔宽度进行倒圆角圆弧比例缩小至所述第二焊盘末端 过孔的孔壁宽度。
在一些实施方式中，为数字中频板覆盖具有贴片的第一焊盘包括：从数字中频板的第一焊盘与微带走线的接触点开始，沿着所述第一焊盘的长度方向，将所述第一焊盘的贴片宽度进行倒圆角圆弧比例缩小至微带走线宽度。
在一些实施方式中，所述倒圆角的半径通过仿真计算确定最优倒圆角半径；利用所述最优倒圆角半径进行圆弧比例缩小。
在一些实施方式中，为功放板覆盖具有过孔的第二焊盘，之后包括：对所述功放板进行器件和走线的PCB布局输出功放板参数信息；根据所述功放板参数信息对所述数字中频板进行器件和走线的PCB布局输出数字中频板参数信息。
在一些实施方式中，所述方法还包括：对布局后的功放板和数字中频板进行仿真验证；将通过所述仿真验证的数字中频板的第一焊盘与所述功放板的第二焊盘的对接处对准贴合并进行加热实现PCB城堡板的射频电路焊接。
在一些实施方式中，对布局后的功放板和数字中频板进行仿真验证包括，根据功放板参数信息和数字中频板参数信息采用波端口建模仿真。
在一些实施方式中，对布局后的功放板和数字中频板进行仿真验证，之后包括：模拟所述功放板和数字中频板的受力，判断所述功放板和数字中频板是否受力改变功放板参数信息和数字中频板参数信息；根据判断结果进行迭代仿真；其中，所述功放板参数信息和数字中频板参数信息均包括焊盘变量信息和焊盘形状变量信息。
本发明第二方面公开了一种4T4R的基站射频电路板，所述基站射频电路板包括：利用如上述的基于PCB城堡板的基站射频电路的制作方法制作的一块数字中频板和四块功放板。
与现有技术相比，本发明的有益效果在于：
实施本发明能够通过对功放板和数字中频板结构、城堡板的射频走线、焊盘受力的逐个分析，从影响对接处阻抗跳变的射频质量因素出发，寻找整个PCB城堡板焊盘的最优焊接方式，射频最优走线，优化射频指标，从而达到解决5G基站现有城堡方案存在的的痛点难点问题，满足基站覆盖范围大、大带宽高容量、低时延等刚性要求。
附图说明
图1为本发明实施例公开的一种基于PCB城堡板的基站射频电路的制作方法流程示意图；
图2为本发明实施例公开的一种基于PCB城堡板的基站射频电路的功放板的结构及第二焊盘的位置示意图；
图3为本发明实施例公开的一种基于PCB城堡板的基站射频电路的母板子板焊盘对接走线设计示意图；
图4为本发明实施例公开的又一种基于PCB城堡板的基站射频电路的制作方法流程示意图；
图5为本发明实施例公开的一种4T4R的基站射频电路板的结构示意图。
具体实施方式
为了更好地理解和实施，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例的术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或模块的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或模块，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或模块。
本发明实施例公开了一种基于PCB城堡板的基站射频电路的制作方法，能够通过对功放板和数字中频板结构、城堡板的射频走线、焊盘受力的逐个分析，从影响对接处阻抗跳变的射频质量因素出发，寻找整个PCB城堡板焊盘的最优焊接方式，射频最优走线，优化射频指标，从而达到解决5G基站现有城堡方案存在的的痛点难点问题，满足基站覆盖范围大、大带宽高容量、低时延等刚性要求。
实施例一
请参阅图1，图1为本发明实施例公开的一种基于PCB城堡板的基站射频电路的制作方法的流程示意图。其中，该基于PCB城堡板的基站射频电路的制作方法可以应用在5G基站系统，对于该基于PCB城堡板的基站射频电路的制作方法的应用本发明实施例不做限制。如图1所示，该基于PCB城堡板的基站射频电路的制作方法方法可以包括以下操作：
101、为数字中频板覆盖具有贴片的第一焊盘。
为了克服城堡板因焊盘大小、受力、板材及走线宽度跳变，而导致对接处存在阻抗跳变，进而导致射频质量(插损及反射)变差，大大影响信号传输质量的问题，发明人构思从数字中频板与功放板的对接处入手，在本实施例中，射频电路包括数字中频板和多个功放板，数字中频板可以作为母版，多个功放板可以作为子板。其中，数字中频板主要由四部分组成，包括整机电源部分、数字处理部分，射频小信号部分和PA外围部分，在数字处理部分中可以包含监控管理、基带信号处理、时钟、接口、板上电源等适用于基站处理的模块；在射频小信号部分，主要包括4通道收发器、PA驱动级、RX小信号部分。在功放板采用两级级联放大，末级采用Doherty功放管，最大可以输出100W。
首先，对数字中频板母板顶层覆盖具有贴片第一焊盘，可以在该焊盘表面覆焊锡实现。
102、为功放板覆盖具有过孔的第二焊盘，其中，功放板的顶层器件与第二焊盘之间的微带走线为直连圆弧线。
之后，为功放板子板覆盖具有过孔的第二焊盘，同样，该第二焊盘的焊接过孔表面覆有焊锡，焊接过孔可以具有金属化的孔壁。在现有技术中，功放板子板直接通过整个射频电路的结构尺寸确认过孔焊盘即第二焊盘的大小及摆放位置，并没有过多考虑第二焊盘对整个电路板所带来的影响，第二焊盘与射频器件电路之间采用50欧姆微带线连接。但是，发明人经过多次试验后发现这样带来的问题是焊盘的长宽尺寸跟50欧姆微带线宽度是不一样的，焊盘的阻抗在设计的频段中并不是50欧姆，同时微带走线与焊盘的连接往往也不是直线，如会呈现为与焊盘成135°走线，这两方面都会影响走线阻抗跳变。于此，发明人构思将功放板的顶层器件与第二焊盘之间的微带走线为直连圆弧线，在其他优选实施方式中，还将功放板的顶层器件与所述第二焊盘之间的微带走线宽度与所述第二焊盘的宽度一致，示例性地，将功放板顶层器件与焊盘之间的微带走线宽度设置为W1(50欧姆)，并将第二焊盘的宽度保持跟W1一样数值，由此，通过这种设计方式可以保证阻抗的一致性，以及保障微带走线不会影响信号传输质量等问题。
进一步地，从另一种影响阻抗跳变的因素来看，在城堡板中功放板的第二焊盘，在焊接时由于通孔具有金属化的孔壁，从功放板至数字中频板之间信号需经由该孔壁，所以就会产生阻抗变化，并且功放板焊盘顶层和底层表面都是同个射频信号，第二焊盘顶层和底层是通过金属化的孔壁连接，这时射频信号在焊盘处就不再是属于微带走线了，线宽也不能通过微带走线去计算。在现行的处理方式中一般是直接忽略这两方面的影响或者简单在功放板和数字中频板增加分立元件去调整匹配。但是，这样的处理方式导致功放板和数字中频板的对接处仍存在阻抗跳变，并且会导致调试周期长。为了解决这种问题，发明人构思将第二焊盘进行倒圆角圆弧变化，而不是现有的长方体焊盘打通孔方式。具体地，可以实现为如图2所示，从功放板的第二焊盘与微带走线的接触点开始，沿着所述第二焊盘的长度方向，将所述第二焊盘的过孔宽度进行倒圆角圆弧比例缩小至第二焊盘末端过孔的孔壁宽度。
相应地，由于数字中频板是母板，与功放板的第二焊盘是没有过孔的，母板的表面是贴片焊盘，所以可以直接通过微带走线进行阻抗分析，会存在将子板的射频器件电路至第二焊盘之间的50欧姆微带线宽度，与贴片焊盘的宽度不一样，从而造成阻抗跳变的问题。在一般的处理中与上述的功放板处理一样，有的是直接忽略这方面的影响或者在数字中频板增加分立元件去匹配，这样的处理方式也会导致对接处存在阻抗跳变。所以，本实施例中将数字中频板贴片焊盘宽度采用与功放板对接的焊盘末端宽度相同， 也是通过逐渐倒圆角圆弧比例缩小，直至子板射频器件电路至焊盘之间的50欧姆微带线宽度。
在其他优选实施方式中，可以对城堡板焊盘对接的形状进行替换，将上述的第一焊盘和第二焊盘由原来的倒圆角圆弧变化替换为不进行倒圆角，只是进行圆弧变化，由此可以降低工艺复杂度。
需要说明的是，上述功放板和数字中频板的倒圆角半径通过仿真计算确定最优倒圆角半径，仿真计算的方式可以使用现有的仿真软件实现，之后再利用该最优倒圆角半径进行圆弧比例缩小。
进一步地，从另一种影响阻抗跳变的因素来看，由于功放板对走线、器件布局、散热设计要求高，所以可以优先进行功放板的PCB设计布局，即先对功放板进行器件和走线的PCB布局输出功放板参数信息，再根据功放板参数信息对数字中频板进行器件和走线的PCB布局输出数字中频板参数信息完成布局及重要器件摆放走线。其中，输出的功放板和数字中频参数信息可以包括PCB板宽、对接焊盘尺寸及位置，如图3所示的母板与子板的焊盘对接总线设计图。
103、将数字中频板的第一焊盘与功放板的第二焊盘的对接处对准贴合。
之后将经过上述步骤设计的数字中频板母板的第一焊盘与功放板子板的第二焊盘对准贴合，贴合后的第一焊盘与第二焊盘保持上下对齐。
104、对对接处进行加热实现PCB城堡板的射频电路焊接。
在贴合了数字中频板的第一焊盘与功放板的第二焊盘之后，加热对接处，使得对接处的第一焊盘和第二焊盘的焊锡熔化并浸润第一焊盘和第二焊接通孔，冷却后就完成了整个PCB城堡板的射频电路的焊接。
由此，根据本实施例公开的方法能够有效保障城堡板母板子板对接射频走线阻抗连续性，大大减小发生阻抗跳变；还可以优化母板子板对接走线射频指标-插损和回损最小，提高基站系统的数据传输质量；兵器，提高城堡板母板子板焊接可靠性，焊盘采用圆弧过渡型，减小因焊盘大小、受力、板材原因对射频指标的影响。此外，还可以母板子板分开，有利于故障定位及排查，减小射频大信号于小信号的干扰，缩短焊盘对接阻抗匹配的调试周期。还可以优化射频指标，较小宏基站对外辐射，造成电磁环境污染以及优化射频指标，大大提高了整机功放的工作效率，提高产品可靠性，同等功率下耗电量也大大减小。
实施例二
请参阅图4，图4为本发明实施例公开的又一种基于PCB城堡板的基站射频电路的制作方法的流程示意图。其中，该基于PCB城堡板的基站射频电路的制作方法可以应用在5G基站系统。如图4所示，该基于PCB城堡板的基站射频电路的制作方法方法可以包括以下操作：
201、对布局后的功放板和数字中频板进行仿真验证。
为了加强对PCB城堡板的精确度要求，需要对布局后的功放板和数字中频板进行仿真验证，具体地，可以根据功放板参数信息和数字中频板参数信息采用波端口建模仿真判断可行性，对于功放板参数信息和数字中频板参数信息在具体实现上可以参照下述表格：
进一步地，在其他实施方式中，还要模拟功放板和数字中频板的受力，判断功放板和数字中频板是否受力改变功放板参数信息和数字中频板参数信息；根据判断结果进行迭代仿真，其中，功放板参数信息和数字中频板参数信息均包括焊盘变量信息和焊盘形状变量信息。
202、将通过仿真验证的数字中频板的第一焊盘与功放板的第二焊盘的对接处对准贴合并进行加热实现PCB城堡板的射频电路焊接。
之后将通过了上述仿真验证的数字中频板的第一焊盘与功放板的第二焊盘的对接处对准贴合并进行加热实现PCB城堡板的射频电路焊接。
具体地，在实际应用中，可以先根据系统方案制定母板(数字中频板)与子板(功放板)对接的第一焊盘和第二焊盘的管脚定义，射频指标，之后计算母板子板板材、叠层信息，以及射频50欧姆微带走线的宽度。然后进行子板射频初步PCB布局及走线，输出对接焊盘及焊盘参数，再继续根据子板PCB封装进行母板PCB布局及走线，输出对接焊盘参数。通过仿真软件辅助验证，最终完成PCB打样及进行城堡工艺焊接贴装，完成基站电路板设计。
实施例三
请参阅图5，图5为本发明实施例公开的一种4T4R的基站射频电路板结构示意图。如图5所示，该基站射频电路板包括：
利用如上述的实施例一或实施例二形成的方法制作的一块数字中频板和四块功放板，可见数字中频板作为母版与四个功放板子板焊接，可以实现符合4T4R需求的基站需求，在其他实施方式中，也可以采用一块数字中频板和两块功放板实现符合2T4R需求的基站需求，或其他基站需求，本发明并不对数字中频板和功放板的连接结构进行限制。
以上所描述的实施例仅是示意性的，其中所述作为分离部件说明的模块可以是或者也可以不是物理上分开的，作为模块显示的部件可以是或者也可以不是物理模块，即可以位于一个地方，或者也可以分布到多个网络模块上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施 例方案的目的。本领域普通技术人员在不付出创造性的劳动的情况下，即可以理解并实施。
最后应说明的是：本发明实施例公开的一种基于PCB城堡板的基站射频电路的制作方法所揭露的仅为本发明较佳实施例而已，仅用于说明本发明的技术方案，而非对其限制；尽管参照前述实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解；其依然可以对前述各项实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或替换，并不使相应的技术方案的本质脱离本发明各项实施例技术方案的精神和范围。

Claims (8)

  1. 一种基于PCB城堡板的基站射频电路的制作方法，所述射频电路包括数字中频板和多个功放板，其特征在于，所述方法包括：
    为数字中频板覆盖具有贴片的第一焊盘；
    为功放板覆盖具有过孔的第二焊盘，其中，所述功放板的顶层器件与所述第二焊盘之间的微带走线为直连圆弧线；
    为数字中频板覆盖具有贴片的第一焊盘包括：从数字中频板的第一焊盘与微带走线的接触点开始，沿着所述第一焊盘的长度方向，将所述第一焊盘的贴片宽度进行倒圆角圆弧比例缩小至微带走线宽度；和/或为功放板覆盖具有过孔的第二焊盘包括：从功放板的第二焊盘与微带走线的接触点开始，沿着所述第二焊盘的长度方向，将所述第二焊盘的过孔宽度进行倒圆角圆弧比例缩小至所述第二焊盘末端过孔的孔壁宽度；
    将所述数字中频板的第一焊盘与所述功放板的第二焊盘的对接处对准贴合；
    对所述对接处进行加热实现PCB城堡板的射频电路焊接。
  2. 根据权利要求1所述的基于PCB城堡板的基站射频电路的制作方法，其特征在于，所述功放板的顶层器件与所述第二焊盘之间的微带走线宽度与所述第二焊盘的宽度一致。
  3. 根据权利要求1所述的基于PCB城堡板的基站射频电路的制作方法，其特征在于，所述倒圆角的半径通过仿真计算确定最优倒圆角半径；
    利用所述最优倒圆角半径进行圆弧比例缩小。
  4. 根据权利要求1所述的基于PCB城堡板的基站射频电路的制作方法，其特征在于，为功放板覆盖具有过孔的第二焊盘，之后包括：
    对所述功放板进行器件和走线的PCB布局输出功放板参数信息；
    根据所述功放板参数信息对所述数字中频板进行器件和走线的PCB布局输出数字中频板参数信息。
  5. 根据权利要求4所述的基于PCB城堡板的基站射频电路的制作方法，其特征在于，所述方法还包括：
    对布局后的功放板和数字中频板进行仿真验证；
    将通过所述仿真验证的数字中频板的第一焊盘与所述功放板的第二焊盘的对接处对准贴合并进行加热实现PCB城堡板的射频电路焊接。
  6. 根据权利要求5所述的基于PCB城堡板的基站射频电路的制作方法，其特征在于，对布局后的功放板和数字中频板进行仿真验证包括：
    根据功放板参数信息和数字中频板参数信息采用波端口建模仿真。
  7. 根据权利要求6所述的基于PCB城堡板的基站射频电路的制作方法，其特征在于，对布局后的功放板和数字中频板进行仿真验证，之后包括：
    模拟所述功放板和数字中频板的受力，判断所述功放板和数字中频板是否受力改变功放板参数信息和数字中频板参数信息；
    根据判断结果进行迭代仿真；
    其中，所述功放板参数信息和数字中频板参数信息均包括焊盘变量信息和焊盘形状变量信息。
  8. 一种4T4R的基站射频电路板，其特征在于，所述基站射频电路板包括：
    利用如权利要求1-7任一项所述的基于PCB城堡板的基站射频电路的制作方法制作的一块数字中频板和四块功放板。
PCT/CN2023/090251 2022-05-19 2023-04-24 一种基于pcb城堡板的基站射频电路的制作方法 WO2023221746A1 (zh)

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