WO2023178755A1 - 半导体结构及其形成方法 - Google Patents

半导体结构及其形成方法 Download PDF

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WO2023178755A1
WO2023178755A1 PCT/CN2022/086728 CN2022086728W WO2023178755A1 WO 2023178755 A1 WO2023178755 A1 WO 2023178755A1 CN 2022086728 W CN2022086728 W CN 2022086728W WO 2023178755 A1 WO2023178755 A1 WO 2023178755A1
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dielectric layer
substrate
oxidation treatment
semiconductor structure
oxidation
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PCT/CN2022/086728
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English (en)
French (fr)
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罗清
晏陶燕
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长鑫存储技术有限公司
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Priority to US17/806,571 priority Critical patent/US20230307308A1/en
Publication of WO2023178755A1 publication Critical patent/WO2023178755A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith

Definitions

  • Embodiments of the present disclosure relate to the field of semiconductors, and in particular to semiconductor structures and methods of forming the same.
  • the dielectric layer is usually used to achieve electrical isolation.
  • the performance of the dielectric layer will affect the electrical characteristics and reliability of the semiconductor structure. And, as the critical dimensions of semiconductor structures continue to shrink, the required dielectric layer thickness becomes thinner and thinner.
  • the thickness of the dielectric layer will change depending on the position of the dielectric layer on the silicon wafer, and the contact interface between the dielectric layer and other film layers may also form a certain degree of defects.
  • the gate oxide layer as an example, a gate oxide layer with poor thickness uniformity or defects will affect the threshold voltage of the semiconductor device, thereby reducing the performance of the semiconductor structure. Therefore, forming a dielectric layer with controllable thickness and better film quality is an urgent problem that needs to be solved.
  • Embodiments of the present disclosure provide a semiconductor structure and a forming method thereof, which are at least beneficial to improving the controllability of the thickness of the dielectric layer and improving the quality of the dielectric layer.
  • embodiments of the present disclosure provide a semiconductor structure, including: a substrate and a dielectric layer located above the substrate; the dielectric layer includes a first dielectric layer and a second dielectric layer, and the second dielectric layer is located on the substrate.
  • the first dielectric layer is located on the surface of the second dielectric layer; the first dielectric layer and the second dielectric layer are prepared using different oxidation processes.
  • the first dielectric layer includes a nitride layer and the second dielectric layer includes an oxide layer.
  • the gas used to prepare the first dielectric layer includes N2O and the first carrier gas; the gas used to prepare the second dielectric layer includes O2 and the second carrier gas; both the first carrier gas and the second carrier gas include H2 .
  • a substrate is provided; a first oxidation treatment is performed on a portion of the substrate to form a first dielectric layer; a second oxidation treatment is performed on a portion of the substrate directly below the first dielectric layer to form a second dielectric layer.
  • the dielectric layer and the second dielectric layer constitute a dielectric layer located above the substrate; wherein the oxidation rate of the base material in the first oxidation treatment is smaller than the oxidation rate of the base material in the second oxidation treatment.
  • the gas used in the first oxidation treatment includes N2O and the first carrier gas.
  • the gas flow rate of N2O is 10 slm to 30 slm.
  • the process temperature of the first oxidation treatment is 900°C to 1150°C.
  • the process duration of the first oxidation treatment is 10s ⁇ 120s.
  • the process time of the first oxidation treatment is longer than the process time of the second oxidation treatment.
  • the gas used in the second oxidation treatment includes O2 and a second carrier gas.
  • the O2 flow rate is 10 slm to 30 slm.
  • the first carrier gas includes H2 and the second carrier gas includes H2.
  • the gas flow rate of the first carrier gas is 2 slm ⁇ 15 slm; the gas flow rate of the second carrier gas is 0.15 slm ⁇ 10 slm.
  • the gas flow rate of the second carrier gas is less than the gas flow rate of the first carrier gas.
  • the process temperature of the second oxidation treatment is 800°C to 1100°C.
  • the process duration of the second oxidation treatment is 5 to 80 s.
  • the process temperature of the second oxidation treatment is lower than the process temperature of the first oxidation treatment.
  • the thickness of the first dielectric layer is 10A ⁇ 20A.
  • the method further includes: nitriding the dielectric layer.
  • the nitriding treatment is performed in the reaction chamber.
  • the process parameters of the nitriding treatment include: providing N2 into the reaction chamber, the gas flow rate of N2 is 50slm ⁇ 400slm, and the temperature in the reaction chamber is 700°C ⁇ 1150°C. , the pressure in the reaction chamber is 10mtor ⁇ 100mtor, the radio frequency power is 1500W ⁇ 2500W, and the process time is 30s ⁇ 300s.
  • Embodiments of the present disclosure form a first dielectric layer with a thinner thickness by performing a first oxidation treatment at a slower rate on the substrate; and perform a second oxidation treatment under the barrier of the first dielectric layer to reduce the impact of the second oxidation treatment on the base material.
  • the oxidation rate is such that a thinner second dielectric layer is formed on the substrate between the substrate and the first dielectric layer.
  • the method for forming a semiconductor structure is beneficial to forming a dielectric layer with controllable thickness and better film quality, which is beneficial to reducing the size of the semiconductor structure, increasing the reliability of the semiconductor structure, and improving the semiconductor structure. electrical properties.
  • FIGS. 1 to 4 are structural schematic diagrams corresponding to each step of a semiconductor structure forming method provided by embodiments of the present disclosure.
  • Embodiments of the present disclosure provide a semiconductor structure and a formation method thereof.
  • a first dielectric layer of a certain thickness is first formed on the surface of the substrate through a slow first oxidation treatment, and then the substrate under the first dielectric layer is A second oxidation treatment is performed to reduce the oxidation rate of the base material in the second oxidation treatment to form a second dielectric layer.
  • the slower oxidation rate of the base material makes the film thickness of the first dielectric layer and the second dielectric layer controllable, which is conducive to the formation of thinner first dielectric layer and second dielectric layer;
  • the base material A slower oxidation rate can increase the recombination rate of chemical bonds between reactive ions and the substrate material, reduce the density of dangling bonds in the interface state between the first dielectric layer and the substrate, and help reduce interface state defects between the first dielectric layer and the substrate. , in this way, it is beneficial to make the film thickness of the dielectric layer composed of the first dielectric layer and the second dielectric layer more controllable, and to reduce interface state defects between the dielectric layer and the substrate.
  • FIGS. 1 to 4 are structural schematic diagrams corresponding to each step of a semiconductor structure forming method provided by embodiments of the present disclosure.
  • the method of forming a semiconductor structure includes: providing a substrate 100 ; performing a first oxidation treatment on part of the substrate 100 to form a first dielectric layer 111 ; and performing a second step on part of the substrate 100 directly below the first dielectric layer 111 .
  • the first dielectric layer 111 and the second dielectric layer 112 constitute the dielectric layer 110 located above the substrate 100; wherein the oxidation rate of the material of the substrate 100 in the first oxidation treatment is smaller than that of the second oxidation treatment.
  • the oxidation rate of the substrate 100 material is provided.
  • the first dielectric layer 111 formed by performing the first oxidation treatment on the substrate 100 can reduce the oxidation rate of the material of the substrate 100 during the second oxidation treatment.
  • the reason is as follows: the gas for the second oxidation treatment needs to pass through a certain thickness of the first medium. Only the layer 111 can contact and react with the material of the substrate 100.
  • the first dielectric layer 111 reduces the kinetic energy of the reactants of the second oxidation treatment to reach the surface of the substrate 100, so the oxidation rate of the substrate 100 during the second oxidation treatment also decreases.
  • the oxidation treatment of the substrate 100 material with a fast oxidation rate will, on the one hand, cause too many products to grow uniformly on the surface of the substrate 100, affecting the uniformity of the film thickness of the dielectric layer 110; on the other hand, it will reduce the interaction between the reactive ions and the substrate.
  • the recombination rate of chemical bonds in the 110 material causes more unsaturated dangling bonds to be generated in the interface state between the dielectric layer 110 and the substrate 100.
  • the unsaturated dangling bonds adsorb impurity ions, resulting in an interface state between the dielectric layer 110 and the substrate 100.
  • the defects in the dielectric layer 110 increase, affecting the quality of the dielectric layer 110 .
  • the oxidation treatment of the substrate 100 material with a slow oxidation rate can effectively control the thickness of the formed dielectric layer 110 by controlling the reaction time, which is beneficial to forming a thinner dielectric layer 110 .
  • the step of performing the first oxidation treatment may include: placing the substrate 100 into a chamber for performing the first oxidation treatment, and performing the first oxidation treatment on the substrate 100 .
  • the first oxidation process forms a first dielectric layer 111 with a certain thickness on the substrate 100.
  • the first dielectric layer 111 can reduce the oxidation rate of the material of the substrate 100 during the second oxidation process when the second dielectric layer 112 is subsequently formed, thereby improving the second dielectric layer 111.
  • the thickness uniformity of the two dielectric layers 112 improves the interface state defects between the second dielectric layer 112 and the substrate 100 .
  • the gas used in the first oxidation treatment includes N2O and the first carrier gas. Since O2 at the same concentration has a lower proportion of oxygen atoms in N2O than N2O, during the first oxidation treatment of the substrate 100, compared with O2 at the same concentration, the gas phase active radicals generated by N2O are atoms The concentration of oxygen is lower. Since gas phase active free radicals, namely atomic oxygen, are the main reactants of the oxidation reaction, the first oxidation treatment involving N2O has a slower oxidation rate of the substrate 100 material. The slower oxidation rate of the substrate 100 material has It is beneficial to improve the thickness uniformity and density of the formed first dielectric layer 111, and is also beneficial to forming the first dielectric layer 111 with a thin film thickness.
  • the gas flow rate of N2O may be 10 slm to 30 slm.
  • the flow rate of N2O is related to the oxidation rate of the substrate 100 material in the first oxidation treatment.
  • the temperature required for the first oxidation treatment is relatively high. High. In order to ensure that the temperature is maintained at a high level, when performing the first oxidation process, the equipment needs to consume electricity to provide heat for the chamber that performs the first oxidation process.
  • a too low oxidation rate for the substrate 100 material not only causes a waste of time but also This results in a waste of electricity; on the other hand, if the flow rate of N2O is too large, all the N2O that passes into the chamber may not participate in the reaction, and the N2O that does not participate in the reaction is discharged, causing a waste of reaction gas and increasing the preparation cost. Therefore, controlling the gas flow rate of N2O to 10 slm to 30 slm will, on the one hand, ensure the formation of the first dielectric layer 111 with good quality, and on the other hand, rationally utilize the reaction gas and electric energy to reduce waste and production costs.
  • the gas flow rate of N2O can be 15slm, 20slm or 25slm, etc.
  • the process temperature of the first oxidation treatment may be 900°C to 1150°C.
  • a process temperature that is too low may cause incomplete reaction of the reaction gases involved in the first oxidation process, resulting in a waste of reaction gases.
  • a process temperature that is too high cannot affect the oxidation rate of the substrate 100 material in the first oxidation process and the generated first medium. Due to the quality of layer 111, in order to maintain a higher process temperature, the equipment needs to consume more power to provide heat for the chamber that performs the first oxidation treatment, resulting in a waste of power energy and increasing production costs.
  • controlling the process temperature of the first oxidation treatment between 900°C and 1150°C is conducive to rational utilization of reaction gases, reducing waste of power energy and reducing production costs.
  • the process temperature of the first oxidation treatment may be 950°C, 980°C, or 1000°C.
  • the process duration of the first oxidation treatment may range from 10s to 120s.
  • the process duration of the first oxidation treatment is too short, the thickness of the formed first dielectric layer 111 will be too thin, which cannot effectively reduce the oxidation rate of the substrate 100 material in the second oxidation treatment.
  • the process time of the first oxidation process is too long, the first dielectric layer 111 will be formed to be too thick, which will affect the oxidation rate of the substrate 100 during the second oxidation process and increase the process time of forming the dielectric layer 110 .
  • the overall thickness of the first dielectric layer 111 and the second dielectric layer 112 is too large, which is not conducive to reducing the size of the semiconductor structure.
  • additional process steps may be required to remove part of the thickness of the first dielectric layer. 111, which complicates the processing process of the dielectric layer 110. Therefore, the process duration of the first oxidation treatment is 10s to 120s, which is beneficial to forming the first dielectric layer 111 that effectively reduces the oxidation rate of the substrate 100 material during the second oxidation process, and is beneficial to avoiding removal of part of the thickness of the first dielectric layer 111 Waste of processing time.
  • the thickness of the first dielectric layer 111 may be 10A ⁇ 20A.
  • the first dielectric layer 111 with a thickness range of 10A to 20A is formed.
  • the oxidation rate of the substrate 100 material in the second oxidation process can be effectively reduced.
  • the increase in the size of the semiconductor structure caused by the excessively thick first dielectric layer 111 and the waste of time caused by removing the excessively thick first dielectric layer 111 are avoided.
  • the first dielectric layer 111 with a thickness of 10A to 20A is conducive to effectively reducing the oxidation rate of the substrate 100 material in the second oxidation treatment, and is conducive to avoiding waste of processing time when removing the overly thick first dielectric layer 111 .
  • the thickness of the first dielectric layer 111 can also be greater than 20A, as long as the subsequent second oxidation process can be carried out smoothly and the thickness of the formed dielectric layer 110 is suitable for the overall layout of the semiconductor structure. .
  • the step of performing the second oxidation treatment may include: placing the substrate 100 in a chamber for performing the second oxidation treatment, and performing the second oxidation treatment. Since the first dielectric layer 111 of a certain thickness has been formed on the surface of the substrate 100, the second oxidation treatment performed under the barrier of the first dielectric layer 111 reduces the oxidation rate of the material of the substrate 100, which is beneficial to improving the formation of the second dielectric layer.
  • the thickness uniformity of 112 and the reduction of interface state dangling bonds between the second dielectric layer 112 and the substrate 100 avoid the increase in impurity concentration caused by the recombination of dangling bonds and impurity ions, which is beneficial to improving the stability of the semiconductor structure and Electrical properties of semiconductor structures.
  • the gas used in the second oxidation treatment may include O2 and a second carrier gas.
  • O2 reacts with the material of the substrate 100 to form an oxide layer that does not contain other impurity elements and has better charge driving ability.
  • the oxidation rate of the substrate 100 is reduced by O2, and an oxide layer is formed. The thickness uniformity is better, and there are fewer interface state defects between the oxide layer and the substrate 100 .
  • the O2 flow rate in the second oxidation treatment, may be 10 slm to 30 slm.
  • the flow rate of O2 is related to the oxidation rate of the substrate 100 material in the second oxidation treatment.
  • the flow rate of O2 is too small, which will cause the reactive gas to be unable to pass through the first dielectric layer 111 to react with the substrate 100, and the reaction of the second oxidation treatment
  • the temperature is relatively high, and the chamber performing the second oxidation treatment needs to continuously consume electric energy in order to maintain a higher reaction temperature.
  • the flow rate of the reactants is too small, the heat will not be properly utilized, resulting in a waste of electric energy; another On the one hand, the flow rate of O2 is too large, resulting in the failure of all the O2 introduced into the chamber to participate in the reaction, resulting in a waste of reaction gas and increasing processing costs. Or an excessive O2 flow rate causes the second oxidation treatment to oxidize the material of the substrate 100 too quickly, affecting the quality of the formed second dielectric layer 112 . Therefore, controlling the O2 flow rate to 10 slm to 30 slm is beneficial to ensuring the formation of the second dielectric layer 112 with good quality, and is beneficial to reducing the waste of reaction gas and power energy. In an example, the gas flow rate of O2 can be 15slm, 20slm or 25slm, etc.
  • the process temperature of the second oxidation treatment is 800°C to 1100°C. Too low a process temperature causes incomplete reaction of the gases involved in the second oxidation process, resulting in a waste of reaction gases. Too high a process temperature cannot affect the oxidation rate of the substrate 100 material in the second oxidation process and the generated second dielectric layer 112 On the contrary, in order to maintain a higher process temperature, it will cause a waste of electric energy and increase production costs. Therefore, controlling the process temperature of the second oxidation treatment between 800°C and 1100°C is conducive to the rational use of reaction gases, reducing the waste of power energy and reducing production costs. In one example, the process temperature of the second oxidation treatment may be 850°C, 900°C, or 950°C.
  • the process temperature of the second oxidation treatment is lower than the process temperature of the first oxidation treatment. Since the oxidation rate of the substrate 100 in the second oxidation treatment is faster than the oxidation rate of the substrate 100 in the first oxidation treatment, it means that the second oxidation treatment is easier to perform. Appropriately lowering the temperature of the second oxidation treatment can reduce the efficiency of the second oxidation treatment.
  • the oxidation rate of the substrate 100 material is conducive to the formation of the second dielectric layer 112 with better film thickness uniformity and fewer interface state defects with the substrate 100 .
  • the process temperature of the first oxidation process can also be the same as or slightly higher than the process temperature of the second oxidation process.
  • the process temperature of the second oxidation treatment can also be the same as or slightly higher than the process temperature of the second oxidation process.
  • the process duration of the second oxidation treatment may be 5 to 80 s.
  • the process duration of the second oxidation process cannot be too short. Too short a process duration may cause The reactants of the second oxidation treatment cannot reach the surface of the substrate 100 material, and thus the second dielectric layer 112 cannot be formed.
  • the dielectric layer 110 composed of the second dielectric layer 112 and the first dielectric layer 111 that is too thin reflects more of the properties of the thicker first dielectric layer 111, resulting in a better charge of the second dielectric layer 112. The driving ability cannot be effectively exerted.
  • the process duration of the second oxidation treatment is 5 s to 80 s, which is beneficial to forming the second dielectric layer 112 with a certain thickness and strong charge driving capability, and is helpful to avoid wasting processing time when removing part of the thickness of the dielectric layer 110 .
  • the thickness of the second dielectric layer 112 may be 15A ⁇ 30A, which is beneficial for the dielectric layer 110 to exhibit better charge driving capability.
  • the process time of the first oxidation treatment is longer than the process time of the second oxidation treatment.
  • the thicknesses of the first dielectric layer 111 and the second dielectric layer 112 need to be balanced.
  • the second oxidation treatment itself has a faster oxidation rate on the material of the substrate 100 , even under the obstruction of the first dielectric layer 111 , compared with the oxidation rate of the material on the substrate 100 during the first oxidation treatment, the second oxidation treatment has a higher oxidation rate on the material of the substrate 100 .
  • the oxidation rate of the material is also relatively fast, so the process duration of the first oxidation treatment can be longer than the process duration of the second oxidation treatment, which is beneficial to forming the dielectric layer 110 with better impurity blocking ability and good charge driving ability, and thus has It is beneficial to improve the electrical performance and reliability of semiconductor structures.
  • the process time of the first oxidation process may also be the same as or slightly shorter than the process time of the second oxidation process.
  • the process duration of the dioxide treatment is also be the same as or slightly shorter than the process time of the second oxidation process.
  • the first carrier gas includes H2 and the second carrier gas includes H2.
  • H2 can catalyze the oxidation reaction between N2O and the substrate 100 material. At high temperatures, H2 and N2O produce a chemical reaction similar to combustion, generating a large amount of gas phase active free radicals, namely atomic oxygen. Since atomic oxygen has a strong oxidizing effect on the substrate 100 material, it will A first dielectric layer 111 with fewer defects and better quality is formed. In the same way, H2 can also catalyze the oxidation reaction between O2 and the substrate 100 material. At high temperatures, H2 and O2 produce a chemical reaction similar to combustion, generating a large amount of gas-phase active free radicals, namely atomic oxygen. The oxidation effect of atomic oxygen on the substrate 100 material is relatively small. Stronger, a second dielectric layer 112 with fewer defects and better quality will be formed.
  • the gas flow rate of the first carrier gas is 2 slm ⁇ 15 slm; the gas flow rate of the second carrier gas is 0.15 slm ⁇ 10 slm.
  • a low flow rate of H2 can catalyze the reaction between N2O and the material of the substrate 100. After the flow rate of H2 exceeds the limit, the growth rate of the first dielectric layer 111 will not increase, but will cause a waste of H2. In the same way, a lower flow rate of H2 can catalyze the reaction between O2 and the material of the substrate 100.
  • the gas flow rate of the first carrier gas is 2slm ⁇ 15slm
  • the gas flow rate of the second carrier gas is 0.15slm ⁇ 10slm, which is beneficial to reducing the waste of H2 and reducing safety hazards.
  • the gas flow rate of the second carrier gas is less than the gas flow rate of the first carrier gas. Since the reaction gas of the first oxidation treatment includes N2O, the reaction gas of the second oxidation treatment includes O2. During the oxidation process of the substrate 100 material, compared with O2 at the same flow rate of N2O, the concentration of active free radicals generated by N2O is lower, that is, atomic oxygen. Moreover, the H2 flow rate has an impact on the oxidation rate of the substrate 100 material during the oxidation treatment. A larger first carrier gas flow rate can enhance the oxidation rate of N2O on the substrate 100 material. Therefore, the gas flow rate of the second carrier gas is smaller than the gas flow rate of the first carrier gas, which is helpful to compensate for the problem of too slow oxidation rate of the substrate 100 material caused by the low content of oxygen atoms in N2O.
  • the method of forming the semiconductor structure may further include: performing a nitriding process on the dielectric layer 110 .
  • the nitridation treatment can make the dielectric layer 110 have a relatively high dielectric constant, which can effectively block the diffusion of impurity ions, thereby improving the stability of the semiconductor structure.
  • nitriding the dielectric layer 110 may include the following steps: performing nitriding in a reaction chamber, and the process parameters of the nitriding include: providing N2 into the reaction chamber, and the gas flow rate of N2 is 50 slm. ⁇ 400slm, the temperature in the reaction chamber is 700°C ⁇ 1150°C, the pressure in the reaction chamber is 10mtor ⁇ mtor, the RF power is 1500W ⁇ 2500W, and the process time is 30s ⁇ 300s.
  • Nitriding the dielectric layer 110 under the above process conditions can accurately control the nitridation degree of the dielectric layer 110, effectively improving the quality of the dielectric layer while preventing the nitrogen element from approaching the interface state between the dielectric layer 110 and the substrate 100.
  • the dielectric constant of 110 increases the density of the dielectric layer 110 and improves the uniformity of the dielectric layer 110, which is beneficial to increasing the reliability of the semiconductor structure and improving the electrical performance of the semiconductor structure.
  • the method of forming a semiconductor structure may further include removing a part of the thickness of the first dielectric layer 111 to obtain a dielectric layer 110 with a thinner thickness and better film thickness uniformity as a gate oxide layer.
  • a gate layer is formed on the surface of the dielectric layer 110 away from the substrate 100 , and part of the gate layer 110 on the dielectric layer 110 and part of the dielectric layer 110 on the substrate 100 are removed to obtain mutually independent gate electrodes 120 and mutually independent dielectric layers 110 .
  • the gate electrode 120 and the dielectric layer 110 form a gate structure and are formed on the sidewalls of the gate structure.
  • the sidewall isolation layer 130 can provide a blocking effect for subsequent source and drain injection, preventing impurities from diffusing into the gate structure and affecting the electrical properties of the semiconductor structure. nature.
  • an active region 140 may be formed in the substrate 100. When the semiconductor structure is a PMOS device, the active region 140 is P-type doped. When the semiconductor structure is an NMOS device, the active region 140 is N-type doped.
  • the method for forming a semiconductor structure involves performing a first oxidation treatment on the substrate 100 to form a first dielectric layer 111, and performing a second oxidation treatment under the barrier of the first dielectric layer 111, so that the second oxidation treatment
  • the kinetic energy of the reactants reaching the surface of the substrate 100 is reduced, thereby reducing the oxidation rate of the material of the substrate 100 in the second oxidation process to form the second dielectric layer 112 .
  • the slower oxidation rate of the substrate 100 material will, on the one hand, help the products to grow uniformly on the surface of the substrate 100 and improve the uniformity of the film thickness; on the other hand, it will reduce the dangling bonds in the interface state between the dielectric layer 110 and the substrate 100, resulting in It is beneficial to reduce the increase in defects caused by the adsorption of impurity ions by unsaturated dangling bonds.
  • a slower oxidation rate of the substrate 100 material makes it easier to control the thickness of the formed dielectric layer 110 , which is beneficial to forming a thinner dielectric layer 110 .
  • the formation method provided by the embodiment of the present disclosure performs the first oxidation treatment with a slower oxidation rate on the substrate 100 and the second oxidation treatment.
  • the dielectric layer 110 with better control and quality is conducive to reducing the size of the semiconductor structure, improving the reliability of the semiconductor structure, and improving the electrical performance of the semiconductor structure.
  • embodiments of the present disclosure also provide a semiconductor structure, which can be formed by the method for forming a semiconductor structure provided in the above embodiments. It should be noted that for parts that are the same as or corresponding to the foregoing embodiments, reference may be made to the detailed description of the foregoing embodiments and will not be described in detail below.
  • the semiconductor structure includes: a substrate 100 and a dielectric layer 110 located above the substrate 100; the dielectric layer 110 includes a first dielectric layer 111 and a second dielectric layer 112.
  • the second dielectric layer 112 is located on the surface of the substrate 100.
  • the first dielectric layer 110 is located on the surface of the substrate 100.
  • the layer 111 is located on the surface of the second dielectric layer 112; the first dielectric layer 111 and the second dielectric layer 112 are prepared using different oxidation processes.
  • the substrate 100 can be a material that directly enters the manufacturing process to produce a semiconductor device.
  • the material of the substrate 100 can also be silicon, germanium, silicon, silicon germanium, carbide on the insulating substrate 100 Silicon, gallium arsenide or sapphire, etc.
  • the substrate 100 has different active areas (not shown in the figure), and the different active areas are used to form different devices. Among them, N-type doping or P-type doping can be formed in the active area.
  • the ions forming N-type doping include arsenic ions, phosphorus ions or antimony ions, etc.
  • the ions forming P-type doping include boron ions and aluminum ions. Or gallium ions, etc.
  • the substrate 100 may also have an isolation structure (not shown in the figure).
  • the surface of the isolation structure exposes the substrate 100 for isolating adjacent active areas.
  • the material of the isolation structure may be silicon oxide, silicon nitride or silicon oxynitride. At least one of other insulating materials.
  • the dielectric layer 110 is a film layer obtained by oxidizing the material of the substrate 100.
  • the dielectric layer 110 may be located on the surface of the substrate 100 formed with P-type doping or the surface of the substrate 100 formed with N-type doping.
  • the dielectric layer 110 is a stacked structure composed of a first dielectric layer 111 and a second dielectric layer 112. Since the oxidation process for forming the first dielectric layer 111 has a slow oxidation rate on the material of the substrate 100, the first dielectric layer 111 The thickness uniformity is good and the film thickness is thin.
  • the second dielectric layer 112 is formed using an oxidation treatment process after the first dielectric layer 111 is formed on the surface of the substrate 100.
  • the oxidation treatment process of the second dielectric layer 110 has a slow oxidation rate for the material of the substrate 100, causing the second dielectric layer to be
  • the thickness of layer 112 is thin, and the interface state between the second dielectric layer 112 and the substrate 100 has fewer dangling bonds.
  • the thickness difference of the first dielectric layer 111 located on the surface of the substrate 100 at different positions is also small, that is, the thickness uniformity is relatively small. good.
  • the thickness of the dielectric layer 110 on the surface of the substrate 100 composed of the first dielectric layer 111 and the second dielectric layer 112 is more uniform, and the interface state between the dielectric layer 110 and the substrate 100 is also more stable, which is beneficial to improving the reliability of the semiconductor structure. and electrical performance.
  • the first dielectric layer 111 may include a nitride layer
  • the second dielectric layer 112 may include an oxide layer.
  • the nitride layer has a stronger blocking ability, which can prevent impurity ions from diffusing into the oxide layer
  • the nitride layer has a larger dielectric constant, which can increase the overall dielectric constant of the dielectric layer 110 .
  • the dielectric layer 110 composed of a stacked nitride layer and an oxide layer is used as the gate oxide layer
  • the surface of the dielectric layer 110 away from the substrate 100 may have a polysilicon gate.
  • Fluorine ions are usually implanted into the polysilicon gate so that the fluorine ions occupy the polysilicon gate and the polysilicon gate.
  • the defects at the interface state of the dielectric layer 110 form covalent bonds with the silicon atoms of the polysilicon gate to improve the lattice defects at the interface between the polysilicon gate and the dielectric layer 110 .
  • the first dielectric layer 111 that is, the nitride layer, located at the junction with the polysilicon gate, can block fluorine ions from entering the second dielectric layer 112, reduce the impurity concentration in the second dielectric layer 112, that is, the oxide layer, and ensure good charge driving capability of the oxide layer. , which is beneficial to improving the electrical performance of semiconductor structures.
  • the gate oxide layer when the dielectric layer 110 is used as a gate oxide layer, in order to increase the dielectric constant of the gate oxide layer and the impurity blocking capability of the gate oxide layer, the gate oxide layer is usually nitrided.
  • the nitrogen element entering the gate oxide layer will increase the defect concentration in the gate oxide layer. If the defect concentration reaches a certain level at the interface between the gate oxide layer and the substrate 100, it will affect the noise performance of the semiconductor structure.
  • Some radio frequency devices have certain requirements on the noise performance of the gate oxide layer, so the nitrogen element is required to be as far away from the interface between the gate oxide layer and the substrate 100 as possible.
  • the nitrided layer is the first dielectric layer 111, the nitrogen element during the nitriding process can be prevented from entering the interface between the dielectric layer 110 and the substrate 100, thereby improving the noise performance of the semiconductor structure.
  • the gas used to prepare the first dielectric layer 111 includes N2O and a first carrier gas; the gas used to prepare the second dielectric layer 112 includes O2 and a second carrier gas; the first carrier gas and the first carrier gas Both carrier gases include H2.
  • the oxidation speed of N2O to the material of the substrate 100 is slower than the oxidation speed of the material of the substrate 100 by O2, so it is suitable to use N2O to form the first dielectric layer 111 with a thinner thickness.
  • the speed of forming the second dielectric layer 112 using O2 will be slowed down, and an oxide layer with better film quality and stronger charge driving ability can be formed, and the first dielectric layer 111 formed using N2O is
  • the oxynitride layer can prevent impurity ions from diffusing into the oxide layer and affecting the charge driving capability of the dielectric layer 110 .
  • H2 as the first carrier gas can catalyze the oxidation reaction of N2O on the substrate 100, forming a nitrogen oxide layer with fewer defects and better quality.
  • H2 as the second carrier gas can catalyze the oxidation reaction of O2 on the substrate 100, forming an oxide layer with fewer defects and better quality.
  • the dielectric layer 110 on the substrate 100 includes: a second dielectric layer 112 adjacent to the substrate 100 and a first dielectric layer 111 on the second dielectric layer 112 that is far away from the substrate 100.
  • the first dielectric layer 111 and the The two dielectric layers 112 are formed by oxidizing the material of the substrate 100 using different oxidation processes. Since the oxidation rate of the material of the substrate 100 is slow during the oxidation process, the first dielectric layer 111 and the second dielectric layer 112 formed are thinner. It also has better thickness uniformity and fewer interface state defects between the second dielectric layer 112 and the substrate 100 , so that the film thickness of the dielectric layer 110 is controllable while having better thickness uniformity and stability.
  • the first dielectric layer 111 made of a nitride layer is located above the second dielectric layer 112 made of an oxide layer, impurity ions can be prevented from diffusing into the second dielectric layer 112, thereby avoiding charge driving of the second dielectric layer 112.
  • ability to make an impact when the first dielectric layer 111 made of a nitride layer is located above the second dielectric layer 112 made of an oxide layer, impurity ions can be prevented from diffusing into the second dielectric layer 112, thereby avoiding charge driving of the second dielectric layer 112.
  • ability to make an impact when the first dielectric layer 111 made of a nitride layer is located above the second dielectric layer 112 made of an oxide layer, impurity ions can be prevented from diffusing into the second dielectric layer 112, thereby avoiding charge driving of the second dielectric layer 112.

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Abstract

本公开实施例涉及半导体领域，提供一种半导体结构及形成方法，形成方法包括：提供基底(100)；对部分基底(100)进行第一氧化处理，形成第一介质层(111)；对第一介质层(111)正下方的部分基底(100)进行第二氧化处理，以形成第二介质层(112)，第一介质层(111)和第二介质层(112)构成位于基底(100)上方的介质层(110)；其中，第一氧化处理对基底(100)材料的氧化速率小于第二氧化处理对基底(100)材料的氧化速率。本公开实施例至少有利于提高介质层(110)厚度的可控性以及提高介质层(110)的质量。

Description

半导体结构及其形成方法
交叉引用
本公开要求于2022年03月25日递交的名称为“半导体结构及其形成方法”、申请号为202210306382.5的中国专利申请的优先权，其通过引用被全部并入本公开。
技术领域
本公开实施例涉及半导体领域，特别涉及半导体结构及其形成方法。
背景技术
在半导体的制备工艺中，介质层通常用于实现电性隔离，介质层的性能会对半导体结构的电学特性和可靠性产生影响。并且，随着半导体结构的关键尺寸持续微缩，所需的介质层厚度也越来越薄。
目前，通过传统方法生长较薄的介质层具有一定的难度。并且介质层的厚度会随着介质层在硅片上的位置不同而发生改变，介质层与其他膜层的接触界面也可能形成一定程度的缺陷。以栅氧化层为例，厚度均一性较差或者具有缺陷的栅氧化层会影响半导体器件的阈值电压，进而降低半导体结构的性能。因此形成厚度可控膜质较优的介质层是亟需解决的问题。
发明内容
本公开实施例提供一种半导体结构及其形成方法，至少有利于提高介质层厚度的可控性以及提高介质层的质量。
根据本公开一些实施例，本公开实施例一方面提供一种半导体结构，包括：基底和位于基底上方的介质层；介质层包括第一介质层和第二介质层，第二介质层位于基底的表面，第一介质层位于第二介质层的表面；其中，第一介质层和第二介质层采用不同的氧化处理工艺制备。
在一些实施例中，第一介质层包括氮化层，第二介质层包括氧化层。
在一些实施例中，制备第一介质层采用的气体包括N2O和第一载气；制备第二介质层采用的气体包括O2和第二载气；第一载气和第二载气均包括H2。
根据本公开一些实施例，提供基底；对部分基底进行第一氧化处理，形成第一介质层；对第一介质层正下方的部分基底进行第二氧化处理，以形成第二介质层，第一介质层和第二介质层构成位于基底上方的介质层；其中，第一氧化处理对基底材料的氧化速率小于第二氧化处理对基底材料的氧化速率。
在一些实施例中，第一氧化处理采用的气体包括N2O和第一载气。
在一些实施例中，第一氧化处理中，N2O的气体流量为10slm～30slm。
在一些实施例中，第一氧化处理的工艺温度为900℃～1150℃。
在一些实施例中，第一氧化处理的工艺时长为10s～120s。
在一些实施例中，第一氧化处理的工艺时长大于第二氧化处理的工艺时长。
在一些实施例中，第二氧化处理采用的气体包括O2和第二载气。
在一些实施例中，第二氧化处理中，O2流量为10slm～30slm。
在一些实施例中，第一载气包括H2，第二载气包括H2。
在一些实施例中，第一载气的气体流量为2slm～15slm；第二载气的气体流量为0.15slm～10slm。
在一些实施例中，第二载气的气体流量小于第一载气的气体流量。
在一些实施例中，第二氧化处理的工艺温度为800℃～1100℃。
在一些实施例中，第二氧化处理的工艺时长为5s～80s。
在一些实施例中，第二氧化处理的工艺温度低于第一氧化处理的工艺温度。
在一些实施例中，第一介质层的厚度为10A～20A。
在一些实施例中，在形成第二介质层后，还包括：对介质层进行氮化处理。
在一些实施例中，在反应腔室内进行氮化处理，氮化处理的工艺参数包括：向反应腔室内提供N2，N2的气体流量为50slm～400slm，反应腔室内的温度为700℃～1150℃，反应腔室内的压强为10mtor～100mtor，射频功率为 1500W～2500W，工艺时长为30s～300s。
本公开实施例提供的技术方案至少具有以下优点：
本公开实施例通过对基底进行速率较缓的第一氧化处理，形成厚度较薄的第一介质层；在第一介质层的阻挡下进行第二氧化处理，以降低第二氧化处理对基底材料的氧化速率，在基底与第一介质层之间的基底上形成厚度较薄的第二介质层。由于第一氧化处理与第二氧化处理对基底的氧化速率较慢，形成的第一介质层和第二介质层厚度可控的同时也具有较优的厚度均一性，并且第二介质层与基底之间的界面态具有较少的悬挂键，避免了悬挂键吸附杂质离子导致的界面态缺陷。综上所述，本公开实施例提供的半导体结构的形成方法有利于形成厚度可控，膜质更优的介质层，进而有利于缩小半导体结构的尺寸、提升半导体结构的可靠性以及改善半导体结构的电学性能。
附图说明
一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，除非有特别申明，附图中的图不构成比例限制。一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，除非有特别申明，附图中的图不构成比例限制；为了更清楚地说明本公开实施例或传统技术中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1至图4为本公开实施例提供的半导体结构形成方法各步骤对应的结构示意图。
具体实施方式
本公开实施例提供了一种半导体结构及其形成方法，形成方法中，首先通过速率较慢的第一氧化处理在基底表面形成一定厚度的第一介质层，再对第一介质层下的基底进行第二氧化处理，降低第二氧化处理对基底材料的氧化速率，以形成第二介质层。对基底材料较慢的氧化速率一方面使得第一介质层以及第二介质层的膜厚可控，有利于形成厚度较薄的第一介质层以及第二介质层；另一方面，对基底材料较慢的氧化速率可以提高反应离子与基底材料化学键的 复合率，减少第一介质层与基底之间的界面态中悬挂键的密度，有利于减少第一介质层与基底之间的界面态缺陷，如此，有利于使第一介质层与第二介质层构成的介质层的膜厚更加可控，并且有利于降低介质层与基底之间的界面态缺陷。
下面将结合附图对本公开各实施例进行详细的阐述。然而，本领域的普通技术人员可以理解，在本公开各实施例中，为了使读者更好地理解本公开实施例而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施例的种种变化和修改，也可以实现本公开实施例所要求保护的技术方案。
图1至图4为本公开实施例提供的半导体结构形成方法各步骤对应的结构示意图。
参考图1至图3，半导体结构的形成方法包括：提供基底100；对部分基底100进行第一氧化处理，形成第一介质层111；对第一介质层111正下方的部分基底100进行第二氧化处理，以形成第二介质层112，第一介质层111和第二介质层112构成位于基底100上方的介质层110；其中，第一氧化处理对基底100材料的氧化速率小于第二氧化处理对基底100材料的氧化速率。
其中，对基底100进行第一氧化处理形成的第一介质层111可以降低第二氧化处理对基底100材料的氧化速率，理由如下：进行第二氧化处理的气体需要穿过一定厚度的第一介质层111才能与基底100材料相接触并发生反应，第一介质层111使第二氧化处理的反应物到达基底100表面的动能降低，所以第二氧化处理对基底100的氧化速率也降低。并且，对基底100材料氧化速率较快的氧化处理一方面会导致过多的生成物无法均匀地生长在基底100表面，影响介质层110的膜厚均匀性，另一方面会降低反应离子与基底110材料中化学键的复合率，使生成的介质层110与基底100之间的界面态产生较多的不饱和悬挂键，不饱和悬挂键吸附杂质离子导致介质层110与基底100之间的界面态中的缺陷增多，影响介质层110的质量。此外，对基底100材料的氧化速率较慢的氧化处理可以通过控制反应时间，有效控制形成的介质层110的厚度，有利于形成厚度较薄的介质层110。
在一些实施例中，进行第一氧化处理的步骤可以包括：将基底100放置到进行第一氧化处理的腔室中，并对基底100进行第一氧化处理。第一氧化处 理在基底100上形成一定厚度的第一介质层111，第一介质层111可在后续形成第二介质层112时，降低第二氧化处理对基底100材料的氧化速率，从而提高第二介质层112厚度均一性，改善第二介质层112与基底100之间的界面态缺陷。
在一些实施例中，第一氧化处理采用的气体包括N2O和第一载气。由于相同浓度的O2与N2O相比，N2O中氧原子的比例更低，所以在对基底100进行第一氧化处理的过程中，与相同浓度的O2相比，N2O产生的气相活性自由基即原子氧的浓度更低，由于气相活性自由基即原子氧为氧化反应的主要反应物，所以N2O参与的第一氧化处理对基底100材料的氧化速率较慢，对基底100材料较慢的氧化速率有利于提高形成的第一介质层111的厚度均一性以及致密度，也有利于形成膜厚较薄的第一介质层111。
在一些实施例中，第一氧化处理中，N2O的气体流量可以为10slm～30slm。N2O的流量与第一氧化处理对基底100材料的氧化速率有关，一方面，N2O的流量过小虽然可以降低对基底100材料的氧化速率，但是通常情况下，第一氧化处理所需的温度较高，为了保证温度维持在较高的水平，进行第一氧化处理时，设备需要消耗电力为进行第一氧化处理的腔室提供热量，对基底100材料过低的氧化速率不仅造成时间的浪费还造成了电力的浪费；另一方面，N2O的流量过大，可能导致通入腔室内的N2O未能全部参与反应，未参与反应的N2O被排出，造成反应气体的浪费，增大了制备成本。因此，控制N2O的气体流量为10slm～30slm，一方面有利于保证形成质量较好的第一介质层111，另一方面，可以合理利用反应气体以及电力能源，减少浪费，降低生产成本。在一个例子中，N2O的气体流量可以为15slm、20slm或者25slm等。
在一些实施例中，第一氧化处理的工艺温度可以为900℃～1150℃。过低的工艺温度可能造成参与第一氧化处理的反应气体反应不完全，造成反应气体的浪费，过高的工艺温度也无法影响第一氧化处理对基底100材料的氧化速率以及生成的第一介质层111的质量，反而为了维持较高的工艺温度，设备需要消耗更多的电力为进行第一氧化处理的腔室提供热量，造成电力能源的浪费，增加生产成本。所以，控制第一氧化处理的工艺温度在900℃～1150℃之间，有利于合理利用反应气体，减少电力能源的浪费，降低生产成本。在一个例子中，第一氧化处理的工艺温度可以为950℃、980℃或者1000℃等。
在一些实施例中，第一氧化处理的工艺时长可以为10s～120s。一方面，第一氧化处理的工艺时长过短，会使形成的第一介质层111的厚度过薄，无法有效的降低第二氧化处理对基底100材料的氧化速率。另一方面，第一氧化处理的工艺时间过长，会导致形成过厚的第一介质层111，进而影响第二氧化处理对基底100的氧化速率，增加形成介质层110的工艺时长。此外，第一介质层111与第二介质层112整体的厚度过大不利于缩小半导体结构的尺寸，在形成第二介质层112后，可能需要增加额外的工艺步骤去除部分厚度的第一介质层111，使介质层110的加工过程复杂化。因此，第一氧化处理的工艺时长为10s～120s，有利于形成有效降低第二氧化处理对基底100材料氧化速率的第一介质层111，以及有利于避免去除部分厚度的第一介质层111时加工时间的浪费。
在一些实施例中，第一介质层111的厚度可以为10A～20A。通过对第一氧化处理的反应气体流量、工艺温度以及工艺时长进行控制，形成厚度区间为10A～20A的第一介质层111，一方面可以有效的降低第二氧化处理对基底100材料的氧化速率。另一方面，避免了过厚的第一介质层111造成的半导体结构尺寸的增大，以及去除过厚的第一介质层111造成的时间浪费。因此，厚度为10A～20A的第一介质层111，有利于有效降低第二氧化处理对基底100材料的氧化速率，以及有利于避免去除过厚的第一介质层111时加工时间的浪费。可以理解的是，在另一些实施例中，第一介质层111的厚度也可大于20A，只要保证后续的第二氧化处理可以顺利进行，形成的介质层110厚度适合半导体结构的整体布局即可。
参考图3，在一些实施例中，进行第二氧化处理的步骤可以包括：将基底100放置在进行第二氧化处理的腔室中，进行第二氧化处理。由于基底100表面已经形成了一定厚度的第一介质层111，在第一介质层111的阻挡下进行的第二氧化处理对基底100材料的氧化速率被降低，有利于提高形成的第二介质层112的厚度均一性，以及减少第二介质层112与基底100之间的界面态悬挂键，避免了悬挂键与杂质离子的复合导致的杂质浓度的升高，有利于提高半导体结构的稳定性以及半导体结构的电学性能。
在一些实施例中，第二氧化处理采用的气体可以包括O2和第二载气。O2与基底100材料进行反应，可形成不含其它杂质元素且具有较优电荷驱动能力的氧化层，并且由于第一介质层111的阻挡，使O2对基底100的氧化速率降 低，形成的氧化层厚度均一性更好，氧化层与基底100之间的界面态缺陷也较少。
在一些实施例中，第二氧化处理中，O2流量可以为10slm～30slm。O2的流量与第二氧化处理对基底100材料的氧化速率有关，一方面，O2的流量过小会导致反应气体无法穿过第一介质层111与基底100发生反应，并且第二氧化处理的反应温度较高，进行第二氧化处理的腔室为了维持较高的反应温度需要不断的消耗电力能源，但是反应物的流量过小，会导致热量无法被合理利用，造成电力能源的浪费；另一方面，O2的流量过大，导致通入腔室内的O2未能全部参与反应，造成反应气体的浪费，增大了加工成本。或者过大的O2流量使得第二氧化处理对基底100材料的氧化速率过快，影响形成的第二介质层112的质量。所以控制O2流量为10slm～30slm，有利于在保证形成质量较好的第二介质层112，以及有利于减少反应气体的浪费和电力能源的浪费。在一个例子中，O2的气体流量可以为15slm、20slm或者25slm等。
在一些实施例中，第二氧化处理的工艺温度为800℃～1100℃。过低的工艺温度使参与第二氧化处理的气体反应不完全，造成反应气体的浪费，过高的工艺温度也无法影响第二氧化处理对基底100材料的氧化速率以及生成的第二介质层112的质量，反而为了维持较高的工艺温度，会造成电力能源的浪费，增加生产成本。所以，控制第二氧化处理的工艺温度在800℃～1100℃之间，有利于合理利用反应气体，减少电力能源的浪费，降低生产成本。在一个例子中，第二氧化处理的工艺温度可以为850℃、900℃或者950℃等。
在一些实施例中，第二氧化处理的工艺温度低于第一氧化处理的工艺温度。由于第二氧化处理对基底100的氧化速率比第一氧化处理对基底100的氧化速率更快，说明第二氧化处理更容易进行，适当降低第二氧化处理的温度，可以降低第二氧化处理的对基底100材料的氧化速率，有利于生成膜厚均一性更好，与基底100之间的界面态缺陷更少的第二介质层112。可以理解的是，在另一些实施例中，在保证形成的第二介质层112质量较好的情况下，第一氧化处理的工艺温度也可以与第二氧化处理的工艺温度相同或者略高于第二氧化处理的工艺温度。
在一些实施例中，第二氧化处理的工艺时长可以为5s～80s。一方面，为了使第二氧化处理在第一介质层111的阻挡下，可以形成的位于基底100上的 第二介质层，第二氧化处理的工艺时长不能过短，过短的工艺时长可能导致第二氧化处理的反应物无法到达基底100材料的表面，进而无法形成第二介质层112。并且，厚度过薄的第二介质层112和第一介质层111构成的介质层110，体现更多的是厚度较厚的第一介质层111的性质，导致第二介质层112较优的电荷驱动能力无法有效发挥。另一方面，第二氧化处理的工艺时间过长，会形成过厚的第二介质层112，导致第一介质层111与第二介质层112整体的厚度过大，不利于缩小半导体结构的尺寸。甚至需要增加额外的工艺步骤去除部分厚度的介质层110，使介质层110的加工过程复杂化。所以第二氧化处理的工艺时长为5s～80s，有利于形成具有一定厚度且电荷驱动能力较强的第二介质层112，以及有利于避免去除部分厚度的介质层110时加工时间的浪费。
在一些实施例中，第二介质层112的厚度可以为15A～30A，有利于使介质层110表现出较好的电荷驱动能力。
在一些实施例中，第一氧化处理的工艺时长大于第二氧化处理的工艺时长。为了使介质层110具有较优的杂质阻挡能力以及良好的电荷驱动能力，需要平衡第一介质层111与第二介质层112的厚度。但由于第二氧化处理本身对基底100材料的氧化速率较快，即使在第一介质层111的阻挡下，与第一氧化处理对基底100材料的氧化速率相比，第二氧化处理对基底100材料的氧化速率也相对较快，所以第一氧化处理的工艺时长可以大于第二氧化处理的工艺时长，有利于形成具有较优的杂质阻挡能力以及良好的电荷驱动能力的介质层110，进而有利于提高半导体结构的电学性能以及可靠性。可以理解的是，在另一些实施例中，在保证介质层110具有较优的杂质阻挡能力的情况下，第一氧化处理的工艺时长也可以与第二氧化处理的工艺时长相同或者略小于第二氧化处理的工艺时长。
在一些实施例中，第一载气包括H2，第二载气包括H2。H2可催化N2O与基底100材料的氧化反应，高温下H2和N2O产生类似于燃烧的化学反应，生成大量的气相活性自由基即原子氧，由于原子氧对基底100材料的氧化作用较强，会形成缺陷更少、质量更好的第一介质层111。同理，H2也可催化O2与基底100材料的氧化反应，高温下H2和O2产生类似于燃烧的化学反应，生成大量的气相活性自由基即原子氧，原子氧对基底100材料的氧化作用较强，会形成缺陷更少、质量更好的第二介质层112。
在一些实施例中，第一载气的气体流量为2slm～15slm；第二载气的气体流量为0.15slm～10slm。较低的H2的流量即可催化N2O与基底100材料的反应，H2的流量超过极限后，第一介质层111的生长速率也不会增加，反而造成H2的浪费。同理，较低的H2的流量即可催化O2与基底100材料的反应，并且，H2与O2对基底100材料进行第二氧化处理的过程中，H2的流量超过极限后，第二介质层112的生长速率也不会增加。并且，H2可燃性较高，H2含量过高的反应产物在尾气处理过程也具有一定的安全隐患。因此，第一载气的气体流量为2slm～15slm，第二载气的气体流量为0.15slm～10slm，有利于减少H2的浪费，减少安全隐患。
在一些实施例中，第二载气的气体流量小于第一载气的气体流量。由于第一氧化处理的反应气体包括N2O，第二氧化处理的反应气体包括O2。对基底100材料的氧化过程中，相同流量的N2O与O2相比，N2O产生的活性自由基即原子氧的浓度更低。并且，H2流量对氧化处理对基底100材料的氧化速率具有影响，较大的第一载气流量可以增强N2O对基底100材料的氧化速率。所以第二载气的气体流量小于第一载气的气体流量，有利于弥补N2O中氧原子含量较低造成的对基底100材料氧化速率过慢的问题。
在一些实施例中，在形成第二介质层112后，半导体结构的形成方法还可以包括：对介质层110进行氮化处理。氮化处理可以使介质层110具有相对较高的介电常数，能有效阻挡杂质离子的扩散，进而提高半导体结构的稳定性。
在一些实施例中，对介质层110进行氮化处理可以包括如下步骤：在反应腔室内进行氮化处理，且氮化处理的工艺参数包括：向反应腔室内提供N2，N2的气体流量为50slm～400slm，反应腔室内的温度为700℃～1150℃，反应腔室内的压强为10mtor～mtor，射频功率为1500W～2500W，工艺时长为30s～300s。
通过上述工艺条件对介质层110进行氮化处理，可精准的控制介质层110的氮化程度，在避免氮元素接近介质层110与基底100之间的界面态的情况下，有效的提高介质层110的介电常数，增加介质层110的致密性并改善介质层110的均匀性，有利于增加半导体结构的可靠性以及提升半导体结构的电学性能。
参考图4，在一些实施例中，半导体结构的形成方法还可以包括，去除部分厚度的第一介质层111，得到厚度较薄且膜厚均一性较好的介质层110作为栅 氧化层，在介质层110远离基底100的表面形成栅极层，并去除部分介质层110上的栅极层以及部分基底100上的介质层110，得到相互独立的栅极120以及相互独立的介质层110。栅极120以及介质层110构成栅极结构，在栅极结构的侧壁形成，侧墙隔离层130可为后续的源漏注入提供阻挡作用，避免杂质扩散进入栅极结构，影响半导体结构的电学性质。此外，在基底100内可以形成有源区140，半导体结构为PMOS器件时，有源区140为P型掺杂，半导体结构为NMOS器件时，有源区140为N型掺杂。
上述实施例提供的半导体结构的形成方法，通过对基底100进行第一氧化处理，形成第一介质层111，并在第一介质层111的阻挡下进行第二氧化处理，使第二氧化处理的反应物到达基底100表面的动能降低，从而降低第二氧化处理对基底100材料的氧化速率，以形成第二介质层112。对基底100材料较慢的氧化速率一方面有利于使生成物均匀地生长在基底100表面，改善膜厚的均匀性；另一方面会减少介质层110与基底100之间界面态悬挂键，有利于减少不饱和悬挂键吸附杂质离子导致的缺陷增多现象。此外，对基底100材料较慢氧化速率更容易控制形成的介质层110的厚度，有利于形成厚度较薄的介质层110。综上所述，相较于直接通过第二氧化处理对基底100进行处理得到的膜层，本公开实施例提供的形成方法，通过对基底100进行氧化速率较慢的第一氧化处理以及第二氧化处理，以分别形成厚度较薄、膜厚均一性更好并且杂质缺陷更少的第一介质层111以及第二介质层112，进而在基底100上形成了膜厚均一性更好、厚度可控以及质量更优的介质层110，有利于缩小半导体结构的尺寸、提升半导体结构的可靠性以及改善半导体结构的电学性能。
相应的，本公开实施例另一方面还提供一种半导体结构，该半导体结构可以由上述实施例提供的半导体结构的形成方法形成。需要说明的是，与前述实施例相同或者相应的部分，可参考前述实施例的详细说明，以下将不做赘述。
参考图3，半导体结构包括：基底100和位于基底100上方的介质层110；介质层110包括第一介质层111和第二介质层112，第二介质层112位于基底100的表面，第一介质层111位于第二介质层112的表面；其中，第一介质层111和第二介质层112采用不同的氧化处理工艺制备。
在一些实施例中，基底100可以为直接进入制造环节生产半导体器件的材料，在另一些实施例中，基底100的材料也可以为绝缘基底100上的硅、锗、 硅、锗化硅、碳化硅、砷化镓或者蓝宝石等。基底100内具有不同的有源区(图中未示出)，不同的有源区用于形成不同的器件。其中，可以在有源区内形成N型掺杂或P型掺杂，形成N型掺杂的离子包括砷离子、磷离子或者锑离子等，形成P型掺杂的离子包括硼离子、铝离子或者镓离子等。基底100内还可以具有隔离结构(图中未示出)，隔离结构的表面露出基底100，用于隔离相邻的有源区，隔离结构的材料可以为氧化硅、氮化硅或者氮氧化硅等绝缘材料中的至少一种。
介质层110是对基底100材料进行氧化得到的膜层，在一些实施例中，介质层110可以位于形成了P型掺杂的基底100表面或者形成了N型掺杂的基底100表面。介质层110是由第一介质层111和第二介质层112构成的叠层结构，由于形成第一介质层111的氧化处理工艺对基底100材料的氧化速率较慢，使得第一介质层111的厚度均一性较好，膜厚较薄。第二介质层112是在基底100表面形成了第一介质层111后，采用氧化处理工艺形成的，所以第二介质层110的氧化处理工艺对基底100材料的氧化速率较慢，使第二介质层112厚度较薄，且第二介质层112与基底100的界面态具有较少的悬挂键，位于不同位置的基底100表面的第一介质层111的厚度差异也较小，即厚度均一性较好。综上，第一介质层111和第二介质层112构成的基底100表面的介质层110厚度均一性较好，介质层110与基底100的界面态也更加稳定，有利于提高半导体结构的可靠性以及电学性能。
在一些实施例中，参考图3，第一介质层111可以包括氮化层，第二介质层112可以包括氧化层。氮化层的阻挡能力更强，可以避免杂质离子扩散进入氧化层，并且氮化层的介电常数更大，可以增大介质层110整体的介电常数。例如，将堆叠的氮化层和氧化层构成的介质层110作为栅氧化层时，介质层110远离基底100的表面可以具有多晶硅栅，通常将氟离子注入多晶硅栅，使氟离子占据多晶硅栅与介质层110界面态处的缺陷，并与多晶硅栅的硅原子形成共价键，以改善多晶硅栅与介质层110交界处的晶格缺陷。位于与多晶硅栅交界处的第一介质层111即氮化层可以阻挡氟离子进入第二介质层112内，降低第二介质层112即氧化层内的杂质浓度，保证氧化层良好的电荷驱动能力，有利于提高半导体结构的电学性能。
此外，在一些实施例中，介质层110作为栅氧化层时，为了增加栅氧化 层的介电常数以及栅氧化层的杂质阻挡能力，通常会对栅氧化层进行氮化处理。氮元素进入栅氧化层，会增加栅氧化层中的缺陷浓度，如果缺陷浓度在栅氧化层与基底100的界面达到一定程度，会影响半导体结构的噪声表现。一些射频器件对栅氧化层的噪声表现有一定的要求，所以要求氮元素尽量远离栅氧化层与基底100之间的界面。氮化层为第一介质层111时，可以防止氮化过程中的氮元素进入介质层110与基底100之间的界面，改善半导体结构的噪声表现。
在一些实施例中，参考图3，制备第一介质层111采用的气体包括N2O和第一载气；制备第二介质层112采用的气体包括O2和第二载气；第一载气和第二载气均包括H2。N2O对基底100材料的氧化速度比O2对基底100材料的氧化速度更慢，所以适合采用N2O形成厚度较薄的第一介质层111。在第一介质层111的阻挡下，采用O2形成第二介质层112的速度会减缓，可以形成膜质更好且电荷驱动能力更强的氧化层，且采用N2O形成的第一介质层111为氮氧化层，可以避免杂质离子扩散进入氧化层影响介质层110的电荷驱动能力。此外，H2作为第一载气可催化N2O对基底100的氧化反应，形成缺陷更少以及质量更好的氮氧化层。同理，H2作为第二载气可催化O2对基底100的氧化反应，形成缺陷更少以及质量更好的氧化层。
上述实施例提供的半导体结构，基底100上的介质层110包括：邻近基底100的第二介质层112以及第二介质层112上远离基底100的第一介质层111，第一介质层111以及第二介质层112为不同的氧化处理工艺对基底100材料进行氧化形成的，由于氧化处理工艺对基底100材料的氧化速率较慢，使形成的第一介质层111以及第二介质层112厚度较薄且具有较优的厚度均一性，以及使得第二介质层112与基底100之间的界面态缺陷更少，从而使得介质层110膜厚可控的同时具有较优的厚度均一性以及稳定性。此外，材料为氮化层的第一介质层111位于材料为氧化层的第二介质层112上方时，可以避免杂质离子扩散进入第二介质层112，进而避免对第二介质层112的电荷驱动能力造成影响。
本领域的普通技术人员可以理解，上述各实施方式是实现本公开的具体实施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本公开的精神和范围。任何本领域技术人员，在不脱离本公开的精神和范围内，均可作各自变动与修改，因此本公开的保护范围应当以权利要求限定的范围为准。

Claims (20)

  1. 一种半导体结构，包括：
    基底和位于所述基底上方的介质层；
    所述介质层包括第一介质层和第二介质层，所述第二介质层位于所述基底的表面，所述第一介质层位于所述第二介质层的表面；
    其中，所述第一介质层和所述第二介质层采用不同的氧化处理工艺制备。
  2. 如权利要求1所述的半导体结构，其中，所述第一介质层包括氮化层，所述第二介质层包括氧化层。
  3. 如权利要求1所述的半导体结构，其中，制备所述第一介质层采用的气体包括N2O和第一载气；制备所述第二介质层采用的气体包括O2和第二载气；所述第一载气和所述第二载气均包括H2。
  4. 一种半导体结构的制造方法，包括：
    提供基底；
    对部分所述基底进行第一氧化处理，形成第一介质层；
    对所述第一介质层正下方的部分所述基底进行第二氧化处理，以形成第二介质层，所述第一介质层和所述第二介质层构成位于所述基底上方的介质层；
    其中，所述第一氧化处理对所述基底材料的氧化速率小于所述第二氧化处理对所述基底材料的氧化速率。
  5. 如权利要求4所述的半导体结构的制造方法，其中，所述第一氧化处理采用的气体包括N2O和第一载气。
  6. 如权利要求5所述的半导体结构的制造方法，其中，所述第一氧化处理中，所述N2O的气体流量为10slm～30slm。
  7. 如权利要求5所述的半导体结构的制造方法，其中，所述第一氧化处理的工艺温度为900℃～1150℃。
  8. 如权利要求7所述的半导体结构的制造方法，其中，所述第一氧化处理的工艺时长为10s～120s。
  9. 如权利要求4所述的半导体结构的制造方法，其中，所述第一氧化处理的工艺时长大于所述第二氧化处理的工艺时长。
  10. 如权利要求5所述的半导体结构的制造方法，其中，所述第二氧化处理采用 的气体包括O2和第二载气。
  11. 如权利要求10所述的半导体结构的制造方法，其中，所述第二氧化处理中，所述O2流量为10slm～30slm。
  12. 如权利要求10所述的半导体结构的制造方法，其中，所述第一载气包括H2，所述第二载气包括H2。
  13. 如权利要求12所述的半导体结构的制造方法，其中，所述第一载气的气体流量为2slm～15slm；所述第二载气的气体流量为0.15slm～10slm。
  14. 如权利要求12所述的半导体结构的制造方法，其中，所述第二载气的气体流量小于所述第一载气的气体流量。
  15. 如权利要求10所述的半导体结构的制造方法，其中，所述第二氧化处理的工艺温度为800℃～1100℃。
  16. 如权利要求15所述的半导体结构的制造方法，其中，所述第二氧化处理的工艺时长为5s～80s。
  17. 如权利要求4所述的半导体结构的制造方法，其中，所述第二氧化处理的工艺温度低于所述第一氧化处理的工艺温度。
  18. 如权利要求4所述的半导体结构的制造方法，其中，所述第一介质层的厚度为10A～20A。
  19. 如权利要求4所述的半导体结构的制造方法，其中，在形成所述第二介质层后，还包括：对所述介质层进行氮化处理。
  20. 如权利要求19所述的半导体结构的制造方法，其中，在反应腔室内进行所述氮化处理，所述氮化处理的工艺参数包括：向反应腔室内提供N2，所述N2的气体流量为50slm～400slm，所述反应腔室内的温度为700℃～1150℃，所述反应腔室内的压强为10mtor～100mtor，射频功率为1500W～2500W，工艺时长为30s～300s。
PCT/CN2022/086728 2022-03-25 2022-04-14 半导体结构及其形成方法 WO2023178755A1 (zh)

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CN1400634A (zh) * 2001-08-06 2003-03-05 旺宏电子股份有限公司 以单一晶片制程制作一闸极介电层的方法
JP2004193409A (ja) * 2002-12-12 2004-07-08 Tokyo Electron Ltd 絶縁膜の形成方法
US20050196533A1 (en) * 2003-10-14 2005-09-08 Kazuhide Hasebe Method and apparatus for forming silicon oxide film
CN101290886A (zh) * 2007-04-20 2008-10-22 中芯国际集成电路制造(上海)有限公司 栅极介质层及栅极的制造方法
CN114068323A (zh) * 2020-08-03 2022-02-18 长鑫存储技术有限公司 氧化层、半导体结构及其制作方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1400634A (zh) * 2001-08-06 2003-03-05 旺宏电子股份有限公司 以单一晶片制程制作一闸极介电层的方法
JP2004193409A (ja) * 2002-12-12 2004-07-08 Tokyo Electron Ltd 絶縁膜の形成方法
US20050196533A1 (en) * 2003-10-14 2005-09-08 Kazuhide Hasebe Method and apparatus for forming silicon oxide film
CN101290886A (zh) * 2007-04-20 2008-10-22 中芯国际集成电路制造(上海)有限公司 栅极介质层及栅极的制造方法
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